Update for 2015.11.1

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
libpng: security bump to version 1.6.20
2026-01-08 02:09:48 +03:00 · 2015-12-05 23:05:32 +01:00 · 2015-12-04 22:02:01 +01:00 · 2015-12-04 22:01:15 +01:00 · 2015-12-04 21:59:54 +01:00 · 2015-12-03 00:02:02 +01:00
14516 changed files with 226436 additions and 392422 deletions
--- a/.checkpackageignore
+++ b/.checkpackageignore
--- a/.clang-format
+++ b/.clang-format
@@ -1,567 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# clang-format configuration file. Intended for clang-format >= 4.
-#
-# For more information, see:
-#
-#   Documentation/process/clang-format.rst
-#   https://clang.llvm.org/docs/ClangFormat.html
-#   https://clang.llvm.org/docs/ClangFormatStyleOptions.html
-#
-
-# Buildroot: imported from Linux 5.15.6, with minimal modifications.
-#            Please note, this is not enforced at the moment. Intended
-#            as an aid when working with in-tree C files, like
-#            makedevs.c
-#
---
-AccessModifierOffset: -4
-AlignAfterOpenBracket: Align
-AlignConsecutiveAssignments: false
-AlignConsecutiveDeclarations: false
-#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
-AlignOperands: true
-AlignTrailingComments: false
-AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortBlocksOnASingleLine: false
-AllowShortCaseLabelsOnASingleLine: false
-AllowShortFunctionsOnASingleLine: None
-AllowShortIfStatementsOnASingleLine: false
-AllowShortLoopsOnASingleLine: false
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: false
-BinPackArguments: true
-BinPackParameters: true
-BraceWrapping:
-  AfterClass: false
-  AfterControlStatement: false
-  AfterEnum: false
-  AfterFunction: true
-  AfterNamespace: true
-  AfterObjCDeclaration: false
-  AfterStruct: false
-  AfterUnion: false
-  #AfterExternBlock: false # Unknown to clang-format-5.0
-  BeforeCatch: false
-  BeforeElse: false
-  IndentBraces: false
-  #SplitEmptyFunction: true # Unknown to clang-format-4.0
-  #SplitEmptyRecord: true # Unknown to clang-format-4.0
-  #SplitEmptyNamespace: true # Unknown to clang-format-4.0
-BreakBeforeBinaryOperators: None
-BreakBeforeBraces: Custom
-#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
-BreakBeforeTernaryOperators: false
-BreakConstructorInitializersBeforeComma: false
-#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
-BreakAfterJavaFieldAnnotations: false
-BreakStringLiterals: false
-ColumnLimit: 132 # Specially for Buildroot
-CommentPragmas: '^ IWYU pragma:'
-#CompactNamespaces: false # Unknown to clang-format-4.0
-ConstructorInitializerAllOnOneLineOrOnePerLine: false
-ConstructorInitializerIndentWidth: 8
-ContinuationIndentWidth: 8
-Cpp11BracedListStyle: false
-DerivePointerAlignment: false
-DisableFormat: false
-ExperimentalAutoDetectBinPacking: false
-#FixNamespaceComments: false # Unknown to clang-format-4.0
-
-# Taken from:
-#   git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
-#   | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$,  - '\1'," \
-#   | sort | uniq
-ForEachMacros:
-  - 'apei_estatus_for_each_section'
-  - 'ata_for_each_dev'
-  - 'ata_for_each_link'
-  - '__ata_qc_for_each'
-  - 'ata_qc_for_each'
-  - 'ata_qc_for_each_raw'
-  - 'ata_qc_for_each_with_internal'
-  - 'ax25_for_each'
-  - 'ax25_uid_for_each'
-  - '__bio_for_each_bvec'
-  - 'bio_for_each_bvec'
-  - 'bio_for_each_bvec_all'
-  - 'bio_for_each_integrity_vec'
-  - '__bio_for_each_segment'
-  - 'bio_for_each_segment'
-  - 'bio_for_each_segment_all'
-  - 'bio_list_for_each'
-  - 'bip_for_each_vec'
-  - 'bitmap_for_each_clear_region'
-  - 'bitmap_for_each_set_region'
-  - 'blkg_for_each_descendant_post'
-  - 'blkg_for_each_descendant_pre'
-  - 'blk_queue_for_each_rl'
-  - 'bond_for_each_slave'
-  - 'bond_for_each_slave_rcu'
-  - 'bpf_for_each_spilled_reg'
-  - 'btree_for_each_safe128'
-  - 'btree_for_each_safe32'
-  - 'btree_for_each_safe64'
-  - 'btree_for_each_safel'
-  - 'card_for_each_dev'
-  - 'cgroup_taskset_for_each'
-  - 'cgroup_taskset_for_each_leader'
-  - 'cpufreq_for_each_entry'
-  - 'cpufreq_for_each_entry_idx'
-  - 'cpufreq_for_each_valid_entry'
-  - 'cpufreq_for_each_valid_entry_idx'
-  - 'css_for_each_child'
-  - 'css_for_each_descendant_post'
-  - 'css_for_each_descendant_pre'
-  - 'device_for_each_child_node'
-  - 'displayid_iter_for_each'
-  - 'dma_fence_chain_for_each'
-  - 'do_for_each_ftrace_op'
-  - 'drm_atomic_crtc_for_each_plane'
-  - 'drm_atomic_crtc_state_for_each_plane'
-  - 'drm_atomic_crtc_state_for_each_plane_state'
-  - 'drm_atomic_for_each_plane_damage'
-  - 'drm_client_for_each_connector_iter'
-  - 'drm_client_for_each_modeset'
-  - 'drm_connector_for_each_possible_encoder'
-  - 'drm_for_each_bridge_in_chain'
-  - 'drm_for_each_connector_iter'
-  - 'drm_for_each_crtc'
-  - 'drm_for_each_crtc_reverse'
-  - 'drm_for_each_encoder'
-  - 'drm_for_each_encoder_mask'
-  - 'drm_for_each_fb'
-  - 'drm_for_each_legacy_plane'
-  - 'drm_for_each_plane'
-  - 'drm_for_each_plane_mask'
-  - 'drm_for_each_privobj'
-  - 'drm_mm_for_each_hole'
-  - 'drm_mm_for_each_node'
-  - 'drm_mm_for_each_node_in_range'
-  - 'drm_mm_for_each_node_safe'
-  - 'flow_action_for_each'
-  - 'for_each_acpi_dev_match'
-  - 'for_each_active_dev_scope'
-  - 'for_each_active_drhd_unit'
-  - 'for_each_active_iommu'
-  - 'for_each_aggr_pgid'
-  - 'for_each_available_child_of_node'
-  - 'for_each_bio'
-  - 'for_each_board_func_rsrc'
-  - 'for_each_bvec'
-  - 'for_each_card_auxs'
-  - 'for_each_card_auxs_safe'
-  - 'for_each_card_components'
-  - 'for_each_card_dapms'
-  - 'for_each_card_pre_auxs'
-  - 'for_each_card_prelinks'
-  - 'for_each_card_rtds'
-  - 'for_each_card_rtds_safe'
-  - 'for_each_card_widgets'
-  - 'for_each_card_widgets_safe'
-  - 'for_each_cgroup_storage_type'
-  - 'for_each_child_of_node'
-  - 'for_each_clear_bit'
-  - 'for_each_clear_bit_from'
-  - 'for_each_cmsghdr'
-  - 'for_each_compatible_node'
-  - 'for_each_component_dais'
-  - 'for_each_component_dais_safe'
-  - 'for_each_comp_order'
-  - 'for_each_console'
-  - 'for_each_cpu'
-  - 'for_each_cpu_and'
-  - 'for_each_cpu_not'
-  - 'for_each_cpu_wrap'
-  - 'for_each_dapm_widgets'
-  - 'for_each_dev_addr'
-  - 'for_each_dev_scope'
-  - 'for_each_dma_cap_mask'
-  - 'for_each_dpcm_be'
-  - 'for_each_dpcm_be_rollback'
-  - 'for_each_dpcm_be_safe'
-  - 'for_each_dpcm_fe'
-  - 'for_each_drhd_unit'
-  - 'for_each_dss_dev'
-  - 'for_each_dtpm_table'
-  - 'for_each_efi_memory_desc'
-  - 'for_each_efi_memory_desc_in_map'
-  - 'for_each_element'
-  - 'for_each_element_extid'
-  - 'for_each_element_id'
-  - 'for_each_endpoint_of_node'
-  - 'for_each_evictable_lru'
-  - 'for_each_fib6_node_rt_rcu'
-  - 'for_each_fib6_walker_rt'
-  - 'for_each_free_mem_pfn_range_in_zone'
-  - 'for_each_free_mem_pfn_range_in_zone_from'
-  - 'for_each_free_mem_range'
-  - 'for_each_free_mem_range_reverse'
-  - 'for_each_func_rsrc'
-  - 'for_each_hstate'
-  - 'for_each_if'
-  - 'for_each_iommu'
-  - 'for_each_ip_tunnel_rcu'
-  - 'for_each_irq_nr'
-  - 'for_each_link_codecs'
-  - 'for_each_link_cpus'
-  - 'for_each_link_platforms'
-  - 'for_each_lru'
-  - 'for_each_matching_node'
-  - 'for_each_matching_node_and_match'
-  - 'for_each_member'
-  - 'for_each_memcg_cache_index'
-  - 'for_each_mem_pfn_range'
-  - '__for_each_mem_range'
-  - 'for_each_mem_range'
-  - '__for_each_mem_range_rev'
-  - 'for_each_mem_range_rev'
-  - 'for_each_mem_region'
-  - 'for_each_migratetype_order'
-  - 'for_each_msi_entry'
-  - 'for_each_msi_entry_safe'
-  - 'for_each_msi_vector'
-  - 'for_each_net'
-  - 'for_each_net_continue_reverse'
-  - 'for_each_netdev'
-  - 'for_each_netdev_continue'
-  - 'for_each_netdev_continue_rcu'
-  - 'for_each_netdev_continue_reverse'
-  - 'for_each_netdev_feature'
-  - 'for_each_netdev_in_bond_rcu'
-  - 'for_each_netdev_rcu'
-  - 'for_each_netdev_reverse'
-  - 'for_each_netdev_safe'
-  - 'for_each_net_rcu'
-  - 'for_each_new_connector_in_state'
-  - 'for_each_new_crtc_in_state'
-  - 'for_each_new_mst_mgr_in_state'
-  - 'for_each_new_plane_in_state'
-  - 'for_each_new_private_obj_in_state'
-  - 'for_each_node'
-  - 'for_each_node_by_name'
-  - 'for_each_node_by_type'
-  - 'for_each_node_mask'
-  - 'for_each_node_state'
-  - 'for_each_node_with_cpus'
-  - 'for_each_node_with_property'
-  - 'for_each_nonreserved_multicast_dest_pgid'
-  - 'for_each_of_allnodes'
-  - 'for_each_of_allnodes_from'
-  - 'for_each_of_cpu_node'
-  - 'for_each_of_pci_range'
-  - 'for_each_old_connector_in_state'
-  - 'for_each_old_crtc_in_state'
-  - 'for_each_old_mst_mgr_in_state'
-  - 'for_each_oldnew_connector_in_state'
-  - 'for_each_oldnew_crtc_in_state'
-  - 'for_each_oldnew_mst_mgr_in_state'
-  - 'for_each_oldnew_plane_in_state'
-  - 'for_each_oldnew_plane_in_state_reverse'
-  - 'for_each_oldnew_private_obj_in_state'
-  - 'for_each_old_plane_in_state'
-  - 'for_each_old_private_obj_in_state'
-  - 'for_each_online_cpu'
-  - 'for_each_online_node'
-  - 'for_each_online_pgdat'
-  - 'for_each_pci_bridge'
-  - 'for_each_pci_dev'
-  - 'for_each_pci_msi_entry'
-  - 'for_each_pcm_streams'
-  - 'for_each_physmem_range'
-  - 'for_each_populated_zone'
-  - 'for_each_possible_cpu'
-  - 'for_each_present_cpu'
-  - 'for_each_prime_number'
-  - 'for_each_prime_number_from'
-  - 'for_each_process'
-  - 'for_each_process_thread'
-  - 'for_each_prop_codec_conf'
-  - 'for_each_prop_dai_codec'
-  - 'for_each_prop_dai_cpu'
-  - 'for_each_prop_dlc_codecs'
-  - 'for_each_prop_dlc_cpus'
-  - 'for_each_prop_dlc_platforms'
-  - 'for_each_property_of_node'
-  - 'for_each_registered_fb'
-  - 'for_each_requested_gpio'
-  - 'for_each_requested_gpio_in_range'
-  - 'for_each_reserved_mem_range'
-  - 'for_each_reserved_mem_region'
-  - 'for_each_rtd_codec_dais'
-  - 'for_each_rtd_components'
-  - 'for_each_rtd_cpu_dais'
-  - 'for_each_rtd_dais'
-  - 'for_each_set_bit'
-  - 'for_each_set_bit_from'
-  - 'for_each_set_clump8'
-  - 'for_each_sg'
-  - 'for_each_sg_dma_page'
-  - 'for_each_sg_page'
-  - 'for_each_sgtable_dma_page'
-  - 'for_each_sgtable_dma_sg'
-  - 'for_each_sgtable_page'
-  - 'for_each_sgtable_sg'
-  - 'for_each_sibling_event'
-  - 'for_each_subelement'
-  - 'for_each_subelement_extid'
-  - 'for_each_subelement_id'
-  - '__for_each_thread'
-  - 'for_each_thread'
-  - 'for_each_unicast_dest_pgid'
-  - 'for_each_vsi'
-  - 'for_each_wakeup_source'
-  - 'for_each_zone'
-  - 'for_each_zone_zonelist'
-  - 'for_each_zone_zonelist_nodemask'
-  - 'fwnode_for_each_available_child_node'
-  - 'fwnode_for_each_child_node'
-  - 'fwnode_graph_for_each_endpoint'
-  - 'gadget_for_each_ep'
-  - 'genradix_for_each'
-  - 'genradix_for_each_from'
-  - 'hash_for_each'
-  - 'hash_for_each_possible'
-  - 'hash_for_each_possible_rcu'
-  - 'hash_for_each_possible_rcu_notrace'
-  - 'hash_for_each_possible_safe'
-  - 'hash_for_each_rcu'
-  - 'hash_for_each_safe'
-  - 'hctx_for_each_ctx'
-  - 'hlist_bl_for_each_entry'
-  - 'hlist_bl_for_each_entry_rcu'
-  - 'hlist_bl_for_each_entry_safe'
-  - 'hlist_for_each'
-  - 'hlist_for_each_entry'
-  - 'hlist_for_each_entry_continue'
-  - 'hlist_for_each_entry_continue_rcu'
-  - 'hlist_for_each_entry_continue_rcu_bh'
-  - 'hlist_for_each_entry_from'
-  - 'hlist_for_each_entry_from_rcu'
-  - 'hlist_for_each_entry_rcu'
-  - 'hlist_for_each_entry_rcu_bh'
-  - 'hlist_for_each_entry_rcu_notrace'
-  - 'hlist_for_each_entry_safe'
-  - 'hlist_for_each_entry_srcu'
-  - '__hlist_for_each_rcu'
-  - 'hlist_for_each_safe'
-  - 'hlist_nulls_for_each_entry'
-  - 'hlist_nulls_for_each_entry_from'
-  - 'hlist_nulls_for_each_entry_rcu'
-  - 'hlist_nulls_for_each_entry_safe'
-  - 'i3c_bus_for_each_i2cdev'
-  - 'i3c_bus_for_each_i3cdev'
-  - 'ide_host_for_each_port'
-  - 'ide_port_for_each_dev'
-  - 'ide_port_for_each_present_dev'
-  - 'idr_for_each_entry'
-  - 'idr_for_each_entry_continue'
-  - 'idr_for_each_entry_continue_ul'
-  - 'idr_for_each_entry_ul'
-  - 'in_dev_for_each_ifa_rcu'
-  - 'in_dev_for_each_ifa_rtnl'
-  - 'inet_bind_bucket_for_each'
-  - 'inet_lhash2_for_each_icsk_rcu'
-  - 'key_for_each'
-  - 'key_for_each_safe'
-  - 'klp_for_each_func'
-  - 'klp_for_each_func_safe'
-  - 'klp_for_each_func_static'
-  - 'klp_for_each_object'
-  - 'klp_for_each_object_safe'
-  - 'klp_for_each_object_static'
-  - 'kunit_suite_for_each_test_case'
-  - 'kvm_for_each_memslot'
-  - 'kvm_for_each_vcpu'
-  - 'list_for_each'
-  - 'list_for_each_codec'
-  - 'list_for_each_codec_safe'
-  - 'list_for_each_continue'
-  - 'list_for_each_entry'
-  - 'list_for_each_entry_continue'
-  - 'list_for_each_entry_continue_rcu'
-  - 'list_for_each_entry_continue_reverse'
-  - 'list_for_each_entry_from'
-  - 'list_for_each_entry_from_rcu'
-  - 'list_for_each_entry_from_reverse'
-  - 'list_for_each_entry_lockless'
-  - 'list_for_each_entry_rcu'
-  - 'list_for_each_entry_reverse'
-  - 'list_for_each_entry_safe'
-  - 'list_for_each_entry_safe_continue'
-  - 'list_for_each_entry_safe_from'
-  - 'list_for_each_entry_safe_reverse'
-  - 'list_for_each_entry_srcu'
-  - 'list_for_each_prev'
-  - 'list_for_each_prev_safe'
-  - 'list_for_each_safe'
-  - 'llist_for_each'
-  - 'llist_for_each_entry'
-  - 'llist_for_each_entry_safe'
-  - 'llist_for_each_safe'
-  - 'mci_for_each_dimm'
-  - 'media_device_for_each_entity'
-  - 'media_device_for_each_intf'
-  - 'media_device_for_each_link'
-  - 'media_device_for_each_pad'
-  - 'nanddev_io_for_each_page'
-  - 'netdev_for_each_lower_dev'
-  - 'netdev_for_each_lower_private'
-  - 'netdev_for_each_lower_private_rcu'
-  - 'netdev_for_each_mc_addr'
-  - 'netdev_for_each_uc_addr'
-  - 'netdev_for_each_upper_dev_rcu'
-  - 'netdev_hw_addr_list_for_each'
-  - 'nft_rule_for_each_expr'
-  - 'nla_for_each_attr'
-  - 'nla_for_each_nested'
-  - 'nlmsg_for_each_attr'
-  - 'nlmsg_for_each_msg'
-  - 'nr_neigh_for_each'
-  - 'nr_neigh_for_each_safe'
-  - 'nr_node_for_each'
-  - 'nr_node_for_each_safe'
-  - 'of_for_each_phandle'
-  - 'of_property_for_each_string'
-  - 'of_property_for_each_u32'
-  - 'pci_bus_for_each_resource'
-  - 'pcl_for_each_chunk'
-  - 'pcl_for_each_segment'
-  - 'pcm_for_each_format'
-  - 'ping_portaddr_for_each_entry'
-  - 'plist_for_each'
-  - 'plist_for_each_continue'
-  - 'plist_for_each_entry'
-  - 'plist_for_each_entry_continue'
-  - 'plist_for_each_entry_safe'
-  - 'plist_for_each_safe'
-  - 'pnp_for_each_card'
-  - 'pnp_for_each_dev'
-  - 'protocol_for_each_card'
-  - 'protocol_for_each_dev'
-  - 'queue_for_each_hw_ctx'
-  - 'radix_tree_for_each_slot'
-  - 'radix_tree_for_each_tagged'
-  - 'rb_for_each'
-  - 'rbtree_postorder_for_each_entry_safe'
-  - 'rdma_for_each_block'
-  - 'rdma_for_each_port'
-  - 'rdma_umem_for_each_dma_block'
-  - 'resource_list_for_each_entry'
-  - 'resource_list_for_each_entry_safe'
-  - 'rhl_for_each_entry_rcu'
-  - 'rhl_for_each_rcu'
-  - 'rht_for_each'
-  - 'rht_for_each_entry'
-  - 'rht_for_each_entry_from'
-  - 'rht_for_each_entry_rcu'
-  - 'rht_for_each_entry_rcu_from'
-  - 'rht_for_each_entry_safe'
-  - 'rht_for_each_from'
-  - 'rht_for_each_rcu'
-  - 'rht_for_each_rcu_from'
-  - '__rq_for_each_bio'
-  - 'rq_for_each_bvec'
-  - 'rq_for_each_segment'
-  - 'scsi_for_each_prot_sg'
-  - 'scsi_for_each_sg'
-  - 'sctp_for_each_hentry'
-  - 'sctp_skb_for_each'
-  - 'shdma_for_each_chan'
-  - '__shost_for_each_device'
-  - 'shost_for_each_device'
-  - 'sk_for_each'
-  - 'sk_for_each_bound'
-  - 'sk_for_each_entry_offset_rcu'
-  - 'sk_for_each_from'
-  - 'sk_for_each_rcu'
-  - 'sk_for_each_safe'
-  - 'sk_nulls_for_each'
-  - 'sk_nulls_for_each_from'
-  - 'sk_nulls_for_each_rcu'
-  - 'snd_array_for_each'
-  - 'snd_pcm_group_for_each_entry'
-  - 'snd_soc_dapm_widget_for_each_path'
-  - 'snd_soc_dapm_widget_for_each_path_safe'
-  - 'snd_soc_dapm_widget_for_each_sink_path'
-  - 'snd_soc_dapm_widget_for_each_source_path'
-  - 'tb_property_for_each'
-  - 'tcf_exts_for_each_action'
-  - 'udp_portaddr_for_each_entry'
-  - 'udp_portaddr_for_each_entry_rcu'
-  - 'usb_hub_for_each_child'
-  - 'v4l2_device_for_each_subdev'
-  - 'v4l2_m2m_for_each_dst_buf'
-  - 'v4l2_m2m_for_each_dst_buf_safe'
-  - 'v4l2_m2m_for_each_src_buf'
-  - 'v4l2_m2m_for_each_src_buf_safe'
-  - 'virtio_device_for_each_vq'
-  - 'while_for_each_ftrace_op'
-  - 'xa_for_each'
-  - 'xa_for_each_marked'
-  - 'xa_for_each_range'
-  - 'xa_for_each_start'
-  - 'xas_for_each'
-  - 'xas_for_each_conflict'
-  - 'xas_for_each_marked'
-  - 'xbc_array_for_each_value'
-  - 'xbc_for_each_key_value'
-  - 'xbc_node_for_each_array_value'
-  - 'xbc_node_for_each_child'
-  - 'xbc_node_for_each_key_value'
-  - 'zorro_for_each_dev'
-
-#IncludeBlocks: Preserve # Unknown to clang-format-5.0
-IncludeCategories:
-  - Regex: '.*'
-    Priority: 1
-IncludeIsMainRegex: '(Test)?$'
-IndentCaseLabels: false
-#IndentPPDirectives: None # Unknown to clang-format-5.0
-IndentWidth: 8
-IndentWrappedFunctionNames: false
-JavaScriptQuotes: Leave
-JavaScriptWrapImports: true
-KeepEmptyLinesAtTheStartOfBlocks: false
-MacroBlockBegin: ''
-MacroBlockEnd: ''
-MaxEmptyLinesToKeep: 1
-NamespaceIndentation: None
-#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
-ObjCBlockIndentWidth: 8
-ObjCSpaceAfterProperty: true
-ObjCSpaceBeforeProtocolList: true
-
-# Taken from git's rules
-#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
-PenaltyBreakBeforeFirstCallParameter: 30
-PenaltyBreakComment: 10
-PenaltyBreakFirstLessLess: 0
-PenaltyBreakString: 10
-PenaltyExcessCharacter: 100
-PenaltyReturnTypeOnItsOwnLine: 60
-
-PointerAlignment: Right
-ReflowComments: false
-SortIncludes: false
-#SortUsingDeclarations: false # Unknown to clang-format-4.0
-SpaceAfterCStyleCast: false
-SpaceAfterTemplateKeyword: true
-SpaceBeforeAssignmentOperators: true
-#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
-#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
-SpaceBeforeParens: ControlStatements
-#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 1
-SpacesInAngles: false
-SpacesInContainerLiterals: false
-SpacesInCStyleCastParentheses: false
-SpacesInParentheses: false
-SpacesInSquareBrackets: false
-Standard: Cpp03
-TabWidth: 8
-UseTab: Always
-...
--- a/.defconfig
+++ b/.defconfig
@@ -15,9 +15,11 @@ BR2_i386=y
 # BR2_nios2 is not set
 # BR2_powerpc is not set
 # BR2_sh is not set
+# BR2_sh64 is not set
 # BR2_sparc is not set
 # BR2_sparc64 is not set
 # BR2_x86_64 is not set
+# BR2_x86_i386 is not set
 # BR2_x86_i486 is not set
 # BR2_x86_i586 is not set
 BR2_x86_i686=y
--- a/.flake8
+++ b/.flake8
@@ -1,5 +0,0 @@
-[flake8]
-exclude=
-    # copied from the kernel sources
-    utils/diffconfig
-max-line-length=132
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -1,33 +0,0 @@
-# Configuration for Gitlab-CI.
-# Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
-
-image: $CI_REGISTRY/buildroot.org/buildroot/base:20230207.1123
-
-stages:
-  - generate-gitlab-ci
-  - build
-
-generate-gitlab-ci-yml:
-  stage: generate-gitlab-ci
-  script: ./support/scripts/generate-gitlab-ci-yml support/misc/gitlab-ci.yml.in > generated-gitlab-ci.yml
-  retry:
-    max: 2
-    when:
-      - runner_system_failure
-      - stuck_or_timeout_failure
-  artifacts:
-    when: always
-    paths:
-      - generated-gitlab-ci.yml
-      - br-test-pkg/*/.config
-      - br-test-pkg/*/missing.config
-
-buildroot-pipeline:
-  stage: build
-  trigger:
-    include:
-      - artifact: generated-gitlab-ci.yml
-        job: generate-gitlab-ci-yml
-    strategy: depend
-  variables:
-    PARENT_PIPELINE_ID: $CI_PIPELINE_ID
--- a/9026
+++ b/9026
--- a/16
+++ b/16
@@ -1,19 +1,3 @@
-With the exceptions below, Buildroot is distributed under the terms of
-the GNU General Public License, reproduced below; either version 2 of
-the License, or (at your option) any later version.
-
-Some files in Buildroot contain a different license statement. Those
-files are licensed under the license contained in the file itself.
-
-Buildroot also bundles patch files, which are applied to the sources
-of the various packages. Those patches are not covered by the license
-of Buildroot. Instead, they are covered by the license of the software
-to which the patches are applied. When said software is available
-under multiple licenses, the Buildroot patches are only provided under
-the publicly accessible licenses.
-
-----------------------------------------------------------------
-
 		    GNU GENERAL PUBLIC LICENSE
 		       Version 2, June 1991

--- a/Config.in
+++ b/Config.in
--- a/Config.in.legacy
+++ b/Config.in.legacy
--- a/3206
+++ b/3206
--- a/Dockerfile.linux-builder
+++ b/Dockerfile.linux-builder
@@ -1,6 +0,0 @@
-FROM almalinux:8
-
-RUN yum -y update && \
-    yum -y install make ncurses-devel which unzip perl cpio rsync fileutils bc bzip2 gzip sed git python3 file patch wget perl-Thread-Queue perl-Data-Dumper perl-ExtUtils-MakeMaker perl-IPC-Cmd gcc gcc-c++ && \
-    yum clean all
-
--- a/966
+++ b/966
--- a/Makefile.legacy
+++ b/Makefile.legacy
@@ -4,6 +4,9 @@
 # This file contains placeholders to detect backward-compatibility problems.
 # When a buildroot "API" feature is being deprecated, a rule should be added
 # here that issues an error when the old feature is used.
+#
+# This file is not included if BR2_DEPRECATED is selected, so it is possible
+# to bypass the errors (although that's usually a bad idea).

 ifeq ($(BR2_LEGACY),y)
 $(error "You have legacy configuration in your .config! Please check your configuration.")
--- a/23
+++ b/23
@@ -0,0 +1,23 @@
+Buildroot is a simple, efficient and easy-to-use tool to generate embedded
+Linux systems through cross-compilation.
+
+The documentation can be found in docs/manual. You can generate a text
+document with 'make manual-text' and read output/docs/manual/manual.text.
+Online documentation can be found at http://buildroot.org/docs.html
+
+To build and use the buildroot stuff, do the following:
+
+1) run 'make menuconfig'
+2) select the target architecture and the packages you wish to compile
+3) run 'make'
+4) wait while it compiles
+5) find the kernel, bootloader, root filesystem, etc. in output/images
+
+You do not need to be root to build or run buildroot.  Have fun!
+
+Buildroot comes with a basic configuration for a number of boards. Run
+'make list-defconfigs' to view the list of provided configurations.
+
+Please feed suggestions, bug reports, insults, and bribes back to the
+buildroot mailing list: buildroot@buildroot.org
+You can also find us on #buildroot on Freenode IRC.
--- a/README.md
+++ b/README.md
@@ -1,83 +0,0 @@
-# Godot buildroot
-
-This repository contains the Godot buildroot to generate toolchains for building the Godot engine in a portable way for Linux. Using these toolchains is the best way to distribute Linux builds of your custom-compiled Godot game.
-
-*You will only need this if you built the engine manually. If you use official templates you will not need this*
-
-The toolchain current contains the following:
- * gcc-13.2.0
- * glibc-2.28
- * pulseaudio
- * alsa
- * X client libraries
- * udev
- * libGL
- * fontconfig
- * speechd
-
-# Using the SDKs
-
-This section is first because there's a lot of stuff below and this is likely what you came here for. Don't forget to check out the `Obtaining an SDK` section below!
-
-The first part of an SDK filename referes to the architecture that this SDK will generate binaries *for*. If you want to ship your game to both 32bit and 64bit Intel/AMD users you will need both `x86_64-godot-linux-gnu_sdk-buildroot.tar.gz` and `i686-godot-linux-gnu_sdk-buildroot.tar.gz`.
-
-Unpack the toolchain anywhere you like and run the `relocate-sdk.sh` script within. This needs to happen every time you move the toolchain to a different directory, but only needs to happen once after installation.
-
-After this you can build the engine more-or-less like normal. For instance for `x86_64`:
-
-`scons p=x11 target=release_debug CC=/home/hp/tmp/x86_64-godot-linux-gnu_sdk-buildroot/bin/x86_64-godot-linux-gnu-gcc CXX=/home/hp/tmp/x86_64-godot-linux-gnu_sdk-buildroot/bin/x86_64-godot-linux-gnu-g++ -j64`
-
-And for 32-bit Intel:
-
-`scons p=x11 target=release_debug CC=/home/hp/tmp/i686-godot-linux-gnu_sdk-buildroot/bin/i686-godot-linux-gnu-gcc CXX=/home/hp/tmp/i686-godot-linux-gnu_sdk-buildroot/bin/i686-godot-linux-gnu-g++ -j64 use_static_cpp=yes bits=32`
-*Note the `bits=32` at the end!*
-
-For other build-time options please see https://docs.godotengine.org/en/stable/development/compiling/compiling_for_x11.html
-
-# Obtaining an SDK
-
-## Downloading a pre-built SDK
-
-Pre-built toolchains are available on https://download.tuxfamily.org/godotengine/toolchains/linux.
-
-## Using buildroot to generate SDKs
-
-###  Building a toolchain for local use
-
-*Using this method will create a toolchain you yourself can use to create Godot releases that will work on any Linux system currently in use. However the toolchain you generate will not be portable to older Linuxes. If you plan to distribute the toolchain itself use the podman method below*
-
-The basic steps for building a toolchain are:
-
- * copy `config-godot-<arch>` to `.config`
- * run `make olddefconfig`
- * run `make clean sdk`
-
-Afterwards the SDK will be in `output/images/<arch>-godot-linux-gnu_sdk-buildroot.tar.gz`.
-
-**NOTE: that `make clean sdk` will delete old builds. Move them out of the way first!**
-
-###  Building a toolchain for distribution
-
-This method uses a Alma Linux 8 container to make the buildroot *itself* portable so it can be distributed to other users. This is also the way the downloads above are generated.
-
- * run `./build-sdk.sh <arch>` for instance `x86_64`
-
-The toolchain will appear in the `godot-toolchains` directory
-
-## Modifying the toolchain
-
-For detailed information please see https://buildroot.org however a short version is here:
-
-**NOTE: re-running the build-sdk.sh script will overwrite your changes by default. Take care**
-
- * Copy the architecture you would like to change to `.config` for instance `cp config-godot-x86_64 .config`
- * Run `make menuconfig`
- * Make your changes
-
-At this point your changes exist in .config. **Make a backup**. If you're building for local use just run `make clean sdk`, if you're using the container approach copy your `.config` file to the arch config like `config-godot-x64_64`
-
-## Making Pull Requests for this repository
-
-First of all: Thanks for wanting to help! Second of all: Since we support multiple architectures make sure that you make *the same* changes to all architectures and PR them together. If you *specifically* want to make a change to one architecture please note that clearly in the PR message.
-
-Thanks!
--- a/README.upstream
+++ b/README.upstream
@@ -1,26 +0,0 @@
-Buildroot is a simple, efficient and easy-to-use tool to generate embedded
-Linux systems through cross-compilation.
-
-The documentation can be found in docs/manual. You can generate a text
-document with 'make manual-text' and read output/docs/manual/manual.text.
-Online documentation can be found at http://buildroot.org/docs.html
-
-To build and use the buildroot stuff, do the following:
-
-1) run 'make menuconfig'
-2) select the target architecture and the packages you wish to compile
-3) run 'make'
-4) wait while it compiles
-5) find the kernel, bootloader, root filesystem, etc. in output/images
-
-You do not need to be root to build or run buildroot.  Have fun!
-
-Buildroot comes with a basic configuration for a number of boards. Run
-'make list-defconfigs' to view the list of provided configurations.
-
-Please feed suggestions, bug reports, insults, and bribes back to the
-buildroot mailing list: buildroot@buildroot.org
-You can also find us on #buildroot on OFTC IRC.
-
-If you would like to contribute patches, please read
-https://buildroot.org/manual.html#submitting-patches
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -9,7 +9,13 @@ config BR2_KERNEL_64_USERLAND_32
 config BR2_SOFT_FLOAT
 	bool

-config BR2_USE_MMU
+config BR2_ARCH_HAS_MMU_MANDATORY
+	bool
+
+config BR2_ARCH_HAS_MMU_OPTIONAL
+	bool
+
+config BR2_ARCH_HAS_FDPIC_SUPPORT
 	bool

 choice
@@ -20,43 +26,42 @@ choice

 config BR2_arcle
 	bool "ARC (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  Synopsys' DesignWare ARC Processor Cores are a family of
-	  32-bit CPUs that can be used from deeply embedded to high
-	  performance host applications. Little endian.
+	  Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
+	  that can be used from deeply embedded to high performance host
+	  applications. Little endian.

 config BR2_arceb
 	bool "ARC (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  Synopsys' DesignWare ARC Processor Cores are a family of
-	  32-bit CPUs that can be used from deeply embedded to high
-	  performance host applications. Big endian.
+	  Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
+	  that can be used from deeply embedded to high performance host
+	  applications. Big endian.

 config BR2_arm
 	bool "ARM (little endian)"
 	# MMU support is set by the subarchitecture file, arch/Config.in.arm
 	help
-	  ARM is a 32-bit reduced instruction set computer (RISC)
-	  instruction set architecture (ISA) developed by ARM Holdings.
-	  Little endian.
+	  ARM is a 32-bit reduced instruction set computer (RISC) instruction
+	  set architecture (ISA) developed by ARM Holdings. Little endian.
 	  http://www.arm.com/
 	  http://en.wikipedia.org/wiki/ARM

 config BR2_armeb
 	bool "ARM (big endian)"
-	select BR2_USE_MMU
+	# MMU support is set by the subarchitecture file, arch/Config.in.arm
 	help
-	  ARM is a 32-bit reduced instruction set computer (RISC)
-	  instruction set architecture (ISA) developed by ARM Holdings.
-	  Big endian.
+	  ARM is a 32-bit reduced instruction set computer (RISC) instruction
+	  set architecture (ISA) developed by ARM Holdings. Big endian.
 	  http://www.arm.com/
 	  http://en.wikipedia.org/wiki/ARM

 config BR2_aarch64
 	bool "AArch64 (little endian)"
 	select BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
 	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -65,184 +70,167 @@ config BR2_aarch64
 config BR2_aarch64_be
 	bool "AArch64 (big endian)"
 	select BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
 	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
 	  http://en.wikipedia.org/wiki/ARM

+config BR2_bfin
+	bool "Blackfin"
+	select BR2_ARCH_HAS_FDPIC_SUPPORT
+	help
+	  The Blackfin is a family of 16 or 32-bit microprocessors developed,
+	  manufactured and marketed by Analog Devices.
+	  http://www.analog.com/
+	  http://en.wikipedia.org/wiki/Blackfin
+
 config BR2_i386
 	bool "i386"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Intel i386 architecture compatible microprocessor
 	  http://en.wikipedia.org/wiki/I386

 config BR2_m68k
 	bool "m68k"
-	# MMU support is set by the subarchitecture file, arch/Config.in.m68k
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	depends on BROKEN # ice in uclibc / inet_ntoa_r
 	help
 	  Motorola 68000 family microprocessor
 	  http://en.wikipedia.org/wiki/M68k

 config BR2_microblazeel
 	bool "Microblaze AXI (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
-	  bus based architecture (little endian)
+	  Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
+	  based architecture (little endian)
 	  http://www.xilinx.com
 	  http://en.wikipedia.org/wiki/Microblaze

 config BR2_microblazebe
 	bool "Microblaze non-AXI (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
-	  bus based architecture (non-AXI, big endian)
+	  Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
+	  based architecture (non-AXI, big endian)
 	  http://www.xilinx.com
 	  http://en.wikipedia.org/wiki/Microblaze

 config BR2_mips
 	bool "MIPS (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Big
-	  endian.
+	  MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
 	  http://www.mips.com/
 	  http://en.wikipedia.org/wiki/MIPS_Technologies

 config BR2_mipsel
 	bool "MIPS (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Little
-	  endian.
+	  MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
 	  http://www.mips.com/
 	  http://en.wikipedia.org/wiki/MIPS_Technologies

 config BR2_mips64
 	bool "MIPS64 (big endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Big
-	  endian.
+	  MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
 	  http://www.mips.com/
 	  http://en.wikipedia.org/wiki/MIPS_Technologies

 config BR2_mips64el
 	bool "MIPS64 (little endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Little
-	  endian.
+	  MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
 	  http://www.mips.com/
 	  http://en.wikipedia.org/wiki/MIPS_Technologies

 config BR2_nios2
 	bool "Nios II"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Nios II is a soft core processor from Altera Corporation.
 	  http://www.altera.com/
 	  http://en.wikipedia.org/wiki/Nios_II

-config BR2_or1k
-	bool "OpenRISC"
-	select BR2_USE_MMU
-	help
-	  OpenRISC is a free and open processor for embedded system.
-	  http://openrisc.io
-
 config BR2_powerpc
 	bool "PowerPC"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
-	  alliance. Big endian.
+	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
+	  Big endian.
 	  http://www.power.org/
 	  http://en.wikipedia.org/wiki/Powerpc

 config BR2_powerpc64
 	bool "PowerPC64 (big endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
-	  alliance. Big endian.
+	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
+	  Big endian.
 	  http://www.power.org/
 	  http://en.wikipedia.org/wiki/Powerpc

 config BR2_powerpc64le
 	bool "PowerPC64 (little endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
-	  alliance. Little endian.
+	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
+	  Little endian.
 	  http://www.power.org/
 	  http://en.wikipedia.org/wiki/Powerpc

-config BR2_riscv
-	bool "RISCV"
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-	help
-	  RISC-V is an open, free Instruction Set Architecture created
-	  by the UC Berkeley Architecture Research group and supported
-	  and promoted by RISC-V Foundation.
-	  https://riscv.org/
-	  https://en.wikipedia.org/wiki/RISC-V
-
-config BR2_s390x
-	bool "s390x"
-	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
-	help
-	  s390x is a big-endian architecture made by IBM.
-	  http://www.ibm.com/
-	  http://en.wikipedia.org/wiki/IBM_System/390
-
 config BR2_sh
 	bool "SuperH"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	help
-	  SuperH (or SH) is a 32-bit reduced instruction set computer
-	  (RISC) instruction set architecture (ISA) developed by
-	  Hitachi.
+	  SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
+	  instruction set architecture (ISA) developed by Hitachi.
+	  http://www.hitachi.com/
+	  http://en.wikipedia.org/wiki/SuperH
+
+config BR2_sh64
+	bool "SuperH64"
+	depends on BR2_DEPRECATED_SINCE_2015_05
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	help
+	  SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
+	  instruction set architecture (ISA) developed by Hitachi.
 	  http://www.hitachi.com/
 	  http://en.wikipedia.org/wiki/SuperH

 config BR2_sparc
 	bool "SPARC"
-	select BR2_USE_MMU
-	# uClibc-ng broken on sparc due to recent gcc changes
-	# that need to be reverted since gcc 8.4, 9.3 and 10.1.
-	# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
-	# gcc <= 10.x has been removed from Buildroot.
-	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  SPARC (from Scalable Processor Architecture) is a RISC
-	  instruction set architecture (ISA) developed by Sun
-	  Microsystems.
+	  SPARC (from Scalable Processor Architecture) is a RISC instruction
+	  set architecture (ISA) developed by Sun Microsystems.
 	  http://www.oracle.com/sun
 	  http://en.wikipedia.org/wiki/Sparc

 config BR2_sparc64
 	bool "SPARC64"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  SPARC (from Scalable Processor Architecture) is a RISC
-	  instruction set architecture (ISA) developed by Sun
-	  Microsystems.
+	  SPARC (from Scalable Processor Architecture) is a RISC instruction
+	  set architecture (ISA) developed by Sun Microsystems.
 	  http://www.oracle.com/sun
 	  http://en.wikipedia.org/wiki/Sparc

 config BR2_x86_64
 	bool "x86_64"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  x86-64 is an extension of the x86 instruction set (Intel i386
 	  architecture compatible microprocessor).
@@ -258,69 +246,11 @@ config BR2_xtensa

 endchoice

-# For some architectures or specific cores, our internal toolchain
-# backend is not suitable (like, missing support in upstream gcc, or
-# no ChipCo fork exists...)
-config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
-	bool
-
-config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
-	bool
-	default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
-
-# The following symbols are selected by the individual
-# Config.in.$ARCH files
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
-	bool
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH
 	string

-config BR2_NORMALIZED_ARCH
-	string
-
 config BR2_ENDIAN
 	string

@@ -330,15 +260,12 @@ config BR2_GCC_TARGET_ARCH
 config BR2_GCC_TARGET_ABI
 	string

-config BR2_GCC_TARGET_NAN
-	string
-
-config BR2_GCC_TARGET_FP32_MODE
-	string
-
 config BR2_GCC_TARGET_CPU
 	string

+config BR2_GCC_TARGET_CPU_REVISION
+	string
+
 # The value of this option will be passed as --with-fpu=<value> when
 # building gcc (internal backend) or -mfpu=<value> in the toolchain
 # wrapper (external toolchain)
@@ -357,24 +284,96 @@ config BR2_GCC_TARGET_FLOAT_ABI
 config BR2_GCC_TARGET_MODE
 	string

+# If the architecture has atomic operations, select this:
+config BR2_ARCH_HAS_ATOMICS
+	bool
+
 # Must be selected by binary formats that support shared libraries.
 config BR2_BINFMT_SUPPORTS_SHARED
 	bool

-# Must match the name of the architecture from readelf point of view,
-# i.e the "Machine:" field of readelf output. See get_machine_name()
-# in binutils/readelf.c for the list of possible values.
-config BR2_READELF_ARCH_NAME
-	string
+# Set up target binary format
+choice
+	prompt "Target Binary Format"
+	default BR2_BINFMT_ELF if BR2_USE_MMU
+	default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
+	default BR2_BINFMT_FLAT
+
+config BR2_BINFMT_ELF
+	bool "ELF"
+	depends on BR2_USE_MMU
+	select BR2_BINFMT_SUPPORTS_SHARED
+	help
+	  ELF (Executable and Linkable Format) is a format for libraries and
+	  executables used across different architectures and operating
+	  systems.
+
+config BR2_BINFMT_FDPIC
+	bool "FDPIC"
+	depends on BR2_ARCH_HAS_FDPIC_SUPPORT
+	select BR2_BINFMT_SUPPORTS_SHARED
+	help
+	  ELF FDPIC binaries are based on ELF, but allow the individual load
+	  segments of a binary to be located in memory independently of each
+	  other. This makes this format ideal for use in environments where no
+	  MMU is available.
+
+config BR2_BINFMT_FLAT
+	bool "FLAT"
+	depends on !BR2_USE_MMU
+	help
+	  FLAT binary is a relatively simple and lightweight executable format
+	  based on the original a.out format. It is widely used in environment
+	  where no MMU is available.
+
+endchoice
+
+# Set up flat binary type
+choice
+	prompt "FLAT Binary type"
+	depends on BR2_BINFMT_FLAT
+	default BR2_BINFMT_FLAT_ONE
+
+config BR2_BINFMT_FLAT_ONE
+	bool "One memory region"
+	help
+	  All segments are linked into one memory region.
+
+config BR2_BINFMT_FLAT_SEP_DATA
+	bool "Separate data and code region"
+	help
+	  Allow for the data and text segments to be separated and placed in
+	  different regions of memory.
+
+config BR2_BINFMT_FLAT_SHARED
+	bool "Shared binary"
+	# Even though this really generates shared binaries, there is no libdl
+	# and dlopen() cannot be used. So packages that require shared
+	# libraries cannot be built. Therefore, we don't select
+	# BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
+	# Although this adds -static to the compilation, that's not a problem
+	# because the -mid-shared-library option overrides it.
+	help
+	  Allow to load and link indiviual FLAT binaries at run time.
+
+endchoice

 if BR2_arcle || BR2_arceb
 source "arch/Config.in.arc"
 endif

-if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
+if BR2_arm || BR2_armeb
 source "arch/Config.in.arm"
 endif

+if BR2_aarch64 || BR2_aarch64_be
+source "arch/Config.in.aarch64"
+endif
+
+if BR2_bfin
+source "arch/Config.in.bfin"
+endif
+
 if BR2_m68k
 source "arch/Config.in.m68k"
 endif
@@ -391,23 +390,11 @@ if BR2_nios2
 source "arch/Config.in.nios2"
 endif

-if BR2_or1k
-source "arch/Config.in.or1k"
-endif
-
 if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
 source "arch/Config.in.powerpc"
 endif

-if BR2_riscv
-source "arch/Config.in.riscv"
-endif
-
-if BR2_s390x
-source "arch/Config.in.s390x"
-endif
-
-if BR2_sh
+if BR2_sh || BR2_sh64
 source "arch/Config.in.sh"
 endif

@@ -423,54 +410,4 @@ if BR2_xtensa
 source "arch/Config.in.xtensa"
 endif

-# Set up target binary format
-choice
-	prompt "Target Binary Format"
-	default BR2_BINFMT_ELF if BR2_USE_MMU
-	default BR2_BINFMT_FLAT
-
-config BR2_BINFMT_ELF
-	bool "ELF"
-	depends on BR2_USE_MMU
-	select BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  ELF (Executable and Linkable Format) is a format for libraries
-	  and executables used across different architectures and
-	  operating systems.
-
-config BR2_BINFMT_FLAT
-	bool "FLAT"
-	depends on !BR2_USE_MMU
-	help
-	  FLAT binary is a relatively simple and lightweight executable
-	  format based on the original a.out format. It is widely used
-	  in environment where no MMU is available.
-
-endchoice
-
-# Set up flat binary type
-choice
-	prompt "FLAT Binary type"
-	default BR2_BINFMT_FLAT_ONE
-	depends on BR2_BINFMT_FLAT
-
-config BR2_BINFMT_FLAT_ONE
-	bool "One memory region"
-	help
-	  All segments are linked into one memory region.
-
-config BR2_BINFMT_FLAT_SHARED
-	bool "Shared binary"
-	depends on BR2_m68k
-	# Even though this really generates shared binaries, there is no libdl
-	# and dlopen() cannot be used. So packages that require shared
-	# libraries cannot be built. Therefore, we don't select
-	# BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
-	# Although this adds -static to the compilation, that's not a problem
-	# because the -mid-shared-library option overrides it.
-	help
-	  Allow to load and link indiviual FLAT binaries at run time.
-
-endchoice
-
 endmenu # Target options
--- a/arch/Config.in.aarch64
+++ b/arch/Config.in.aarch64
@@ -0,0 +1,10 @@
+config BR2_ARCH
+	default "aarch64"	if BR2_aarch64
+	default "aarch64_be"	if BR2_aarch64_be
+
+config BR2_ENDIAN
+	default "LITTLE" if BR2_aarch64
+	default "BIG"	 if BR2_aarch64_be
+
+config BR2_ARCH_HAS_ATOMICS
+	default y
--- a/arch/Config.in.arc
+++ b/arch/Config.in.arc
@@ -1,7 +1,7 @@
 choice
 	prompt "Target CPU"
-	default BR2_arc770d
 	depends on BR2_arc
+	default BR2_arc770d
 	help
 	    Specific CPU to use

@@ -13,58 +13,21 @@ config BR2_arc770d

 config BR2_archs38
 	bool "ARC HS38"
-	help
-	  Generic ARC HS capable of running Linux, i.e. with MMU,
-	  caches and 32-bit multiplier. Also it corresponds to the
-	  default configuration in older GNU toolchain versions.
-
-config BR2_archs38_64mpy
-	bool "ARC HS38 with 64-bit mpy"
-	help
-	  Fully featured ARC HS capable of running Linux, i.e. with
-	  MMU, caches and 64-bit multiplier.
-
-	  If you're not sure which version of ARC HS core you build
-	  for use this one.
-
-config BR2_archs38_full
-	bool "ARC HS38 with Quad MAC & FPU"
-	help
-	  Fully featured ARC HS with additional support for
-	   - Dual- and quad multiply and MC oprations
-	   - Double-precision FPU
-
-	  It corresponds to "hs38_slc_full" ARC HS template in
-	  ARChitect.
-
-config BR2_archs4x_rel31
-	bool "ARC HS48 rel 31"
-	help
-	   Build for HS48 release 3.1
-
-config BR2_archs4x
-	bool "ARC HS48"
-	help
-	   Latest release of HS48 processor
-	   - Dual and Quad multiply and MAC operations
-	   - Double-precision FPU

 endchoice

 # Choice of atomic instructions presence
 config BR2_ARC_ATOMIC_EXT
 	bool "Atomic extension (LLOCK/SCOND instructions)"
-	default y if BR2_arc770d
-	default y if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
-	default y if BR2_archs4x_rel31 || BR2_archs4x
+	default y if BR2_arc770d || BR2_archs38
+
+config BR2_ARCH_HAS_ATOMICS
+	default y if BR2_ARC_ATOMIC_EXT

 config BR2_ARCH
 	default "arc"	if BR2_arcle
 	default "arceb"	if BR2_arceb

-config BR2_NORMALIZED_ARCH
-	default "arc"
-
 config BR2_arc
 	bool
 	default y if BR2_arcle || BR2_arceb
@@ -77,15 +40,6 @@ config BR2_GCC_TARGET_CPU
 	default "arc700" if BR2_arc750d
 	default "arc700" if BR2_arc770d
 	default "archs"	 if BR2_archs38
-	default "hs38"	 if BR2_archs38_64mpy
-	default "hs38_linux"	 if BR2_archs38_full
-	default "hs4x_rel31"	 if BR2_archs4x_rel31
-	default "hs4x"	 if BR2_archs4x
-
-config BR2_READELF_ARCH_NAME
-	default "ARCompact"	if BR2_arc750d || BR2_arc770d
-	default "ARCv2"		if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
-	default "ARCv2"		if BR2_archs4x_rel31 || BR2_archs4x

 choice
 	prompt "MMU Page Size"
@@ -105,7 +59,7 @@ choice

 config BR2_ARC_PAGE_SIZE_4K
 	bool "4KB"
-	depends on !BR2_arc750d
+	depends on BR2_arc770d || BR2_archs38

 config BR2_ARC_PAGE_SIZE_8K
 	bool "8KB"
@@ -115,7 +69,7 @@ config BR2_ARC_PAGE_SIZE_8K

 config BR2_ARC_PAGE_SIZE_16K
 	bool "16KB"
-	depends on !BR2_arc750d
+	depends on BR2_arc770d || BR2_archs38

 endchoice

@@ -124,6 +78,3 @@ config BR2_ARC_PAGE_SIZE
 	default "4K" if BR2_ARC_PAGE_SIZE_4K
 	default "8K" if BR2_ARC_PAGE_SIZE_8K
 	default "16K" if BR2_ARC_PAGE_SIZE_16K
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -6,21 +6,12 @@ config BR2_ARM_CPU_HAS_NEON
 config BR2_ARM_CPU_MAYBE_HAS_NEON
 	bool

-# For some cores, the FPU is optional
-config BR2_ARM_CPU_MAYBE_HAS_FPU
-	bool
-
-config BR2_ARM_CPU_HAS_FPU
-	bool
-
 # for some cores, VFPv2 is optional
 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	bool
-	select BR2_ARM_CPU_MAYBE_HAS_FPU

 config BR2_ARM_CPU_HAS_VFPV2
 	bool
-	select BR2_ARM_CPU_HAS_FPU

 # for some cores, VFPv3 is optional
 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
@@ -40,28 +31,6 @@ config BR2_ARM_CPU_HAS_VFPV4
 	bool
 	select BR2_ARM_CPU_HAS_VFPV3

-# FPv4 is always optional
-config BR2_ARM_CPU_MAYBE_HAS_FPV4
-	bool
-	select BR2_ARM_CPU_MAYBE_HAS_FPU
-
-config BR2_ARM_CPU_HAS_FPV4
-	bool
-	select BR2_ARM_CPU_HAS_FPU
-
-# FPv5 is always optional
-config BR2_ARM_CPU_MAYBE_HAS_FPV5
-	bool
-	select BR2_ARM_CPU_MAYBE_HAS_FPV4
-
-config BR2_ARM_CPU_HAS_FPV5
-	bool
-	select BR2_ARM_CPU_HAS_FPV4
-
-config BR2_ARM_CPU_HAS_FP_ARMV8
-	bool
-	select BR2_ARM_CPU_HAS_VFPV4
-
 config BR2_ARM_CPU_HAS_ARM
 	bool

@@ -73,99 +42,68 @@ config BR2_ARM_CPU_HAS_THUMB2

 config BR2_ARM_CPU_ARMV4
 	bool
-	select BR2_USE_MMU

 config BR2_ARM_CPU_ARMV5
 	bool
-	select BR2_USE_MMU

 config BR2_ARM_CPU_ARMV6
 	bool
-	select BR2_USE_MMU

 config BR2_ARM_CPU_ARMV7A
 	bool
-	select BR2_USE_MMU
-
-config BR2_ARM_CPU_ARMV7M
-	bool
-
-config BR2_ARM_CPU_ARMV8A
-	bool
-	select BR2_USE_MMU

 choice
 	prompt "Target Architecture Variant"
-	default BR2_cortex_a53 if BR2_ARCH_IS_64
+	depends on BR2_arm || BR2_armeb
 	default BR2_arm926t
 	help
 	  Specific CPU variant to use

-if !BR2_ARCH_IS_64
-comment "armv4 cores"
 config BR2_arm920t
 	bool "arm920t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm922t
 	bool "arm922t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
-config BR2_fa526
-	bool "fa526/626"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-config BR2_strongarm
-	bool "strongarm sa110/sa1100"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-
-comment "armv5 cores"
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm926t
 	bool "arm926t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
-config BR2_xscale
-	bool "xscale"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV5
-
-comment "armv6 cores"
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1136j_s
 	bool "arm1136j-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1136jf_s
 	bool "arm1136jf-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
-config BR2_arm11mpcore
-	bool "mpcore"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-
-comment "armv7a cores"
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a5
 	bool "cortex-A5"
 	select BR2_ARM_CPU_HAS_ARM
@@ -173,6 +111,7 @@ config BR2_cortex_a5
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a7
 	bool "cortex-A7"
 	select BR2_ARM_CPU_HAS_ARM
@@ -180,6 +119,7 @@ config BR2_cortex_a7
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a8
 	bool "cortex-A8"
 	select BR2_ARM_CPU_HAS_ARM
@@ -187,6 +127,7 @@ config BR2_cortex_a8
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a9
 	bool "cortex-A9"
 	select BR2_ARM_CPU_HAS_ARM
@@ -194,6 +135,7 @@ config BR2_cortex_a9
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a12
 	bool "cortex-A12"
 	select BR2_ARM_CPU_HAS_ARM
@@ -201,6 +143,7 @@ config BR2_cortex_a12
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a15
 	bool "cortex-A15"
 	select BR2_ARM_CPU_HAS_ARM
@@ -208,314 +151,45 @@ config BR2_cortex_a15
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
-config BR2_cortex_a15_a7
-	bool "cortex-A15/A7 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_cortex_m3
+	bool "cortex-M3"
+	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_cortex_a17
-	bool "cortex-A17"
+config BR2_fa526
+	bool "fa526/626"
 	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_cortex_a17_a7
-	bool "cortex-A17/A7 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_pj4
 	bool "pj4"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_ARMV7A
-
-# Cortex-M cores are only supported for little endian configurations
-if BR2_arm
-comment "armv7m cores"
-config BR2_cortex_m3
-	bool "cortex-M3"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7M
-config BR2_cortex_m4
-	bool "cortex-M4"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_MAYBE_HAS_FPV4
-	select BR2_ARM_CPU_ARMV7M
-config BR2_cortex_m7
-	bool "cortex-M7"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_MAYBE_HAS_FPV5
-	select BR2_ARM_CPU_ARMV7M
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-endif # BR2_arm
-endif # !BR2_ARCH_IS_64
-
-comment "armv8 cores"
-config BR2_cortex_a32
-	bool "cortex-A32"
-	depends on !BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_strongarm
+	bool "strongarm sa110/sa1100"
 	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_cortex_a35
-	bool "cortex-A35"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_cortex_a53
-	bool "cortex-A53"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-config BR2_cortex_a57
-	bool "cortex-A57"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-config BR2_cortex_a57_a53
-	bool "cortex-A57/A53 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_cortex_a72
-	bool "cortex-A72"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_cortex_a72_a53
-	bool "cortex-A72/A53 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_cortex_a73
-	bool "cortex-A73"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_cortex_a73_a35
-	bool "cortex-A73/A35 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_cortex_a73_a53
-	bool "cortex-A73/A53 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_emag
-	bool "emag"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_exynos_m1
-	bool "exynos-m1"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_falkor
-	bool "falkor"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_phecda
-	bool "phecda"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_qdf24xx
-	bool "qdf24xx"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_thunderx
-	bool "thunderx (aka octeontx)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_thunderxt81
-	bool "thunderxt81 (aka octeontx81)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_thunderxt83
-	bool "thunderxt83 (aka octeontx83)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_thunderxt88
-	bool "thunderxt88"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_thunderxt88p1
-	bool "thunderxt88p1"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_xgene1
-	bool "xgene1"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-
-comment "armv8.1a cores"
-config BR2_thunderx2t99
-	bool "thunderx2t99"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_thunderx2t99p1
-	bool "thunderx2t99p1"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-config BR2_vulcan
-	bool "vulcan"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-
-comment "armv8.2a cores"
-config BR2_cortex_a55
-	bool "cortex-A55"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_cortex_a75
-	bool "cortex-A75"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_cortex_a75_a55
-	bool "cortex-A75/A55 big.LITTLE"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_cortex_a76
-	bool "cortex-A76"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_cortex_a76_a55
-	bool "cortex-A76/A55 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_neoverse_n1
-	bool "neoverse-N1 (aka ares)"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_tsv110
-	bool "tsv110"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-
-comment "armv8.4a cores"
-config BR2_saphira
-	bool "saphira"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
+	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_xscale
+	bool "xscale"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_HAS_THUMB
+	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_iwmmxt
+	bool "iwmmxt"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 endchoice

-config BR2_ARM_ENABLE_NEON
-	bool "Enable NEON SIMD extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_NEON
-	select BR2_ARM_CPU_HAS_NEON
-	help
-	  For some CPU cores, the NEON SIMD extension is optional.
-	  Select this option if you are certain your particular
-	  implementation has NEON support and you want to use it.
-
-config BR2_ARM_ENABLE_VFP
-	bool "Enable VFP extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_FPU
-	select BR2_ARM_CPU_HAS_FPV5 if BR2_ARM_CPU_MAYBE_HAS_FPV5
-	select BR2_ARM_CPU_HAS_FPV4 if BR2_ARM_CPU_MAYBE_HAS_FPV4
-	select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
-	select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	help
-	  For some CPU cores, the VFP extension is optional. Select
-	  this option if you are certain your particular
-	  implementation has VFP support and you want to use it.
-
 choice
 	prompt "Target ABI"
-	default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_FPU
-	default BR2_ARM_EABI
 	depends on BR2_arm || BR2_armeb
+	default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
+	default BR2_ARM_EABI
 	help
 	  Application Binary Interface to use. The Application Binary
 	  Interface describes the calling conventions (how arguments
@@ -548,7 +222,7 @@ config BR2_ARM_EABI

 config BR2_ARM_EABIHF
 	bool "EABIhf"
-	depends on BR2_ARM_CPU_HAS_FPU
+	depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
 	help
 	  The EABIhf is an extension of EABI which supports the 'hard'
 	  floating point model. This model uses the floating point
@@ -566,15 +240,22 @@ config BR2_ARM_EABIHF

 endchoice

+config BR2_ARM_ENABLE_NEON
+	bool "Enable NEON SIMD extension support"
+	depends on BR2_ARM_CPU_MAYBE_HAS_NEON
+	select BR2_ARM_CPU_HAS_NEON
+	help
+	  For some CPU cores, the NEON SIMD extension is optional.
+	  Select this option if you are certain your particular
+	  implementation has NEON support and you want to use it.
+
 choice
 	prompt "Floating point strategy"
-	default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
-	default BR2_ARM_FPU_FPV5D16 if BR2_ARM_CPU_HAS_FPV5
-	default BR2_ARM_FPU_FPV4D16 if BR2_ARM_CPU_HAS_FPV4
+	depends on BR2_ARM_EABI || BR2_ARM_EABIHF
 	default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 	default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 	default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
-	default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_FPU
+	default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2

 config BR2_ARM_SOFT_FLOAT
 	bool "Soft float"
@@ -588,7 +269,7 @@ config BR2_ARM_SOFT_FLOAT

 config BR2_ARM_FPU_VFPV2
 	bool "VFPv2"
-	depends on BR2_ARM_CPU_HAS_VFPV2
+	depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	help
 	  This option allows to use the VFPv2 floating point unit, as
 	  available in some ARMv5 processors (ARM926EJ-S) and some
@@ -601,7 +282,7 @@ config BR2_ARM_FPU_VFPV2

 config BR2_ARM_FPU_VFPV3
 	bool "VFPv3"
-	depends on BR2_ARM_CPU_HAS_VFPV3
+	depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	help
 	  This option allows to use the VFPv3 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{8, 9}). This
@@ -617,7 +298,7 @@ config BR2_ARM_FPU_VFPV3

 config BR2_ARM_FPU_VFPV3D16
 	bool "VFPv3-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV3
+	depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	help
 	  This option allows to use the VFPv3 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{8, 9}). This
@@ -632,7 +313,7 @@ config BR2_ARM_FPU_VFPV3D16

 config BR2_ARM_FPU_VFPV4
 	bool "VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	help
 	  This option allows to use the VFPv4 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
@@ -647,7 +328,7 @@ config BR2_ARM_FPU_VFPV4

 config BR2_ARM_FPU_VFPV4D16
 	bool "VFPv4-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	help
 	  This option allows to use the VFPv4 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
@@ -672,7 +353,7 @@ config BR2_ARM_FPU_NEON

 config BR2_ARM_FPU_NEON_VFPV4
 	bool "NEON/VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	depends on BR2_ARM_CPU_HAS_NEON
 	help
 	  This option allows to use both the VFPv4 and the NEON SIMD
@@ -681,57 +362,10 @@ config BR2_ARM_FPU_NEON_VFPV4
 	  example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 	  NEON is optional.

-config BR2_ARM_FPU_FPV4D16
-	bool "FPv4-D16"
-	depends on BR2_ARM_CPU_HAS_FPV4
-	help
-	  This option allows to use the FPv4-SP (single precision)
-	  floating point unit, as available in some ARMv7m processors
-	  (Cortex-M4).
-
-config BR2_ARM_FPU_FPV5D16
-	bool "FPv5-D16"
-	depends on BR2_ARM_CPU_HAS_FPV5
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-	help
-	  This option allows to use the FPv5-SP (single precision)
-	  floating point unit, as available in some ARMv7m processors
-	  (Cortex-M7).
-
-	  Note that if you want binary code that works on the earlier
-	  Cortex-M4, you should instead select FPv4-D16.
-
-config BR2_ARM_FPU_FPV5DPD16
-	bool "FPv5-DP-D16"
-	depends on BR2_ARM_CPU_HAS_FPV5
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-	help
-	  This option allows to use the FPv5-DP (double precision)
-	  floating point unit, as available in some ARMv7m processors
-	  (Cortex-M7).
-
-	  Note that if you want binary code that works on the earlier
-	  Cortex-M4, you should instead select FPv4-D16.
-
-config BR2_ARM_FPU_FP_ARMV8
-	bool "FP-ARMv8"
-	depends on BR2_ARM_CPU_HAS_FP_ARMV8
-	help
-	  This option allows to use the ARMv8 floating point unit.
-
-config BR2_ARM_FPU_NEON_FP_ARMV8
-	bool "NEON/FP-ARMv8"
-	depends on BR2_ARM_CPU_HAS_FP_ARMV8
-	depends on BR2_ARM_CPU_HAS_NEON
-	help
-	  This option allows to use both the ARMv8 floating point unit
-	  and the NEON SIMD unit for floating point operations.
-
 endchoice

 choice
 	prompt "ARM instruction set"
-	depends on BR2_arm || BR2_armeb

 config BR2_ARM_INSTRUCTIONS_ARM
 	bool "ARM"
@@ -766,134 +400,49 @@ config BR2_ARM_INSTRUCTIONS_THUMB2

 endchoice

-choice
-	prompt "MMU Page Size"
-	default BR2_ARM64_PAGE_SIZE_4K
-	depends on BR2_aarch64 || BR2_aarch64_be
-	help
-	  The default is 4KB, and you should probably keep this unless
-	  you know what you are doing. In particular, the kernel
-	  configuration must match this choice. If your kernel is
-	  built by Buildroot, the kernel configuration is
-	  automatically adjusted, but not if you built your kernel
-	  outside of Buildroot.
-
-config BR2_ARM64_PAGE_SIZE_4K
-	bool "4KB"
-
-config BR2_ARM64_PAGE_SIZE_64K
-	bool "64KB"
-
-endchoice
-
-config BR2_ARM64_PAGE_SIZE
-	string
-	default "4K" if BR2_ARM64_PAGE_SIZE_4K
-	default "64K" if BR2_ARM64_PAGE_SIZE_64K
-
 config BR2_ARCH
-	default "arm"		if BR2_arm
-	default "armeb"		if BR2_armeb
-	default "aarch64"	if BR2_aarch64
-	default "aarch64_be"	if BR2_aarch64_be
-
-config BR2_NORMALIZED_ARCH
-	default "arm"		if BR2_arm || BR2_armeb
-	default "arm64"		if BR2_aarch64 || BR2_aarch64_be
+	default "arm"	if BR2_arm
+	default "armeb"	if BR2_armeb

 config BR2_ENDIAN
-	default "LITTLE" if (BR2_arm || BR2_aarch64)
-	default "BIG"	 if (BR2_armeb || BR2_aarch64_be)
+	default "LITTLE" if BR2_arm
+	default "BIG"	 if BR2_armeb
+
+config BR2_ARCH_HAS_ATOMICS
+	default y

 config BR2_GCC_TARGET_CPU
-	# armv4
 	default "arm920t"	if BR2_arm920t
 	default "arm922t"	if BR2_arm922t
-	default "fa526"		if BR2_fa526
-	default "strongarm"	if BR2_strongarm
-	# armv5
 	default "arm926ej-s"	if BR2_arm926t
-	default "xscale"	if BR2_xscale
-	# armv6
 	default "arm1136j-s"	if BR2_arm1136j_s
 	default "arm1136jf-s"	if BR2_arm1136jf_s
 	default "arm1176jz-s"	if BR2_arm1176jz_s
 	default "arm1176jzf-s"	if BR2_arm1176jzf_s
-	default "mpcore"	if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
-	default "mpcorenovfp"	if BR2_arm11mpcore
-	# armv7a
 	default "cortex-a5"	if BR2_cortex_a5
 	default "cortex-a7"	if BR2_cortex_a7
 	default "cortex-a8"	if BR2_cortex_a8
 	default "cortex-a9"	if BR2_cortex_a9
 	default "cortex-a12"	if BR2_cortex_a12
 	default "cortex-a15"	if BR2_cortex_a15
-	default "cortex-a15.cortex-a7"	if BR2_cortex_a15_a7
-	default "cortex-a17"	if BR2_cortex_a17
-	default "cortex-a17.cortex-a7"	if BR2_cortex_a17_a7
-	default "marvell-pj4"	if BR2_pj4
-	# armv7m
 	default "cortex-m3"	if BR2_cortex_m3
-	default "cortex-m4"	if BR2_cortex_m4
-	default "cortex-m7"	if BR2_cortex_m7
-	# armv8a
-	default "cortex-a32"	if BR2_cortex_a32
-	default "cortex-a35"	if BR2_cortex_a35
-	default "cortex-a53"	if BR2_cortex_a53
-	default "cortex-a57"	if BR2_cortex_a57
-	default "cortex-a57.cortex-a53"	if BR2_cortex_a57_a53
-	default "cortex-a72"	if BR2_cortex_a72
-	default "cortex-a72.cortex-a53"	if BR2_cortex_a72_a53
-	default "cortex-a73"	if BR2_cortex_a73
-	default "cortex-a73.cortex-a35"	if BR2_cortex_a73_a35
-	default "cortex-a73.cortex-a53"	if BR2_cortex_a73_a53
-	default "emag"		if BR2_emag
-	default "exynos-m1"	if BR2_exynos_m1
-	default "falkor"	if BR2_falkor
-	default "phecda"	if BR2_phecda
-	default "qdf24xx"	if BR2_qdf24xx
-	default "thunderx"	if BR2_thunderx && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
-	default "octeontx"	if BR2_thunderx && BR2_TOOLCHAIN_GCC_AT_LEAST_9
-	default "thunderxt81"	if BR2_thunderxt81 && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
-	default "octeontx81"	if BR2_thunderxt81 && BR2_TOOLCHAIN_GCC_AT_LEAST_9
-	default "thunderxt83"	if BR2_thunderxt83 && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
-	default "octeontx83"	if BR2_thunderxt83 && BR2_TOOLCHAIN_GCC_AT_LEAST_9
-	default "thunderxt88"	if BR2_thunderxt88
-	default "thunderxt88p1"	if BR2_thunderxt88p1
-	default "xgene1"	if BR2_xgene1
-	# armv8.1a
-	default "thunderx2t99"	if BR2_thunderx2t99
-	default "thunderx2t99p1"	if BR2_thunderx2t99p1
-	default "vulcan"	if BR2_vulcan
-	# armv8.2a
-	default "cortex-a55"	if BR2_cortex_a55
-	default "cortex-a75"	if BR2_cortex_a75
-	default "cortex-a75.cortex-a55"	if BR2_cortex_a75_a55
-	default "cortex-a76"	if BR2_cortex_a76
-	default "cortex-a76.cortex-a55"	if BR2_cortex_a76_a55
-	default "neoverse-n1"	if BR2_neoverse_n1
-	default "tsv110"	if BR2_tsv110
-	# armv8.4a
-	default "saphira"	if BR2_saphira
+	default "fa526"		if BR2_fa526
+	default "marvell-pj4"	if BR2_pj4
+	default "strongarm"	if BR2_strongarm
+	default "xscale"	if BR2_xscale
+	default "iwmmxt"	if BR2_iwmmxt

 config BR2_GCC_TARGET_ABI
-	default "aapcs-linux"	if BR2_arm || BR2_armeb
-	default "lp64"		if BR2_aarch64 || BR2_aarch64_be
+	default "aapcs-linux"

 config BR2_GCC_TARGET_FPU
 	default "vfp"		if BR2_ARM_FPU_VFPV2
 	default "vfpv3"		if BR2_ARM_FPU_VFPV3
-	default "vfpv3-d16"	if BR2_ARM_FPU_VFPV3D16
-	default "vfpv4"		if BR2_ARM_FPU_VFPV4
-	default "vfpv4-d16"	if BR2_ARM_FPU_VFPV4D16
-	default "neon"		if BR2_ARM_FPU_NEON
-	default "neon-vfpv4"	if BR2_ARM_FPU_NEON_VFPV4
-	default "fpv4-sp-d16"   if BR2_ARM_FPU_FPV4D16
-	default "fpv5-sp-d16"	if BR2_ARM_FPU_FPV5D16
-	default "fpv5-d16"	if BR2_ARM_FPU_FPV5DPD16
-	default "fp-armv8"	if BR2_ARM_FPU_FP_ARMV8
-	default "neon-fp-armv8"	if BR2_ARM_FPU_NEON_FP_ARMV8
-	depends on BR2_arm || BR2_armeb
+	default "vfpv3-d16" 	if BR2_ARM_FPU_VFPV3D16
+	default "vfpv4" 	if BR2_ARM_FPU_VFPV4
+	default "vfpv4-d16" 	if BR2_ARM_FPU_VFPV4D16
+	default "neon" 		if BR2_ARM_FPU_NEON
+	default "neon-vfpv4" 	if BR2_ARM_FPU_NEON_VFPV4

 config BR2_GCC_TARGET_FLOAT_ABI
 	default "soft"		if BR2_ARM_SOFT_FLOAT
@@ -903,10 +452,3 @@ config BR2_GCC_TARGET_FLOAT_ABI
 config BR2_GCC_TARGET_MODE
 	default "arm"		if BR2_ARM_INSTRUCTIONS_ARM
 	default "thumb"		if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
-
-config BR2_READELF_ARCH_NAME
-	default "ARM"		if BR2_arm || BR2_armeb
-	default "AArch64"	if BR2_aarch64 || BR2_aarch64_be
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.bfin
+++ b/arch/Config.in.bfin
@@ -0,0 +1,110 @@
+choice
+	prompt "Target CPU"
+	depends on BR2_bfin
+	default BR2_bf609
+	help
+	  Specify target CPU
+config BR2_bf606
+	bool "bf606"
+config BR2_bf607
+	bool "bf607"
+config BR2_bf608
+	bool "bf608"
+config BR2_bf609
+	bool "bf609"
+config BR2_bf512
+	bool "bf512"
+config BR2_bf514
+	bool "bf514"
+config BR2_bf516
+	bool "bf516"
+config BR2_bf518
+	bool "bf518"
+config BR2_bf522
+	bool "bf522"
+config BR2_bf523
+	bool "bf523"
+config BR2_bf524
+	bool "bf524"
+config BR2_bf525
+	bool "bf525"
+config BR2_bf526
+	bool "bf526"
+config BR2_bf527
+	bool "bf527"
+config BR2_bf531
+	bool "bf531"
+config BR2_bf532
+	bool "bf532"
+config BR2_bf533
+	bool "bf533"
+config BR2_bf534
+	bool "bf534"
+config BR2_bf536
+	bool "bf536"
+config BR2_bf537
+	bool "bf537"
+config BR2_bf538
+	bool "bf538"
+config BR2_bf539
+	bool "bf539"
+config BR2_bf542
+	bool "bf542"
+config BR2_bf544
+	bool "bf544"
+config BR2_bf547
+	bool "bf547"
+config BR2_bf548
+	bool "bf548"
+config BR2_bf549
+	bool "bf549"
+config BR2_bf561
+	bool "bf561"
+endchoice
+
+config BR2_ARCH
+	default "bfin"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_ARCH_HAS_ATOMICS
+	default y
+
+config BR2_GCC_TARGET_CPU
+	default bf606		if BR2_bf606
+	default bf607		if BR2_bf607
+	default bf608		if BR2_bf608
+	default bf609		if BR2_bf609
+	default bf512		if BR2_bf512
+	default bf514		if BR2_bf514
+	default bf516		if BR2_bf516
+	default bf518		if BR2_bf518
+	default bf522		if BR2_bf522
+	default bf523		if BR2_bf523
+	default bf524		if BR2_bf524
+	default bf525		if BR2_bf525
+	default bf526		if BR2_bf526
+	default bf527		if BR2_bf527
+	default bf531		if BR2_bf531
+	default bf532		if BR2_bf532
+	default bf533		if BR2_bf533
+	default bf534		if BR2_bf534
+	default bf536		if BR2_bf536
+	default bf537		if BR2_bf537
+	default bf538		if BR2_bf538
+	default bf539		if BR2_bf539
+	default bf542		if BR2_bf542
+	default bf544		if BR2_bf544
+	default bf547		if BR2_bf547
+	default bf548		if BR2_bf548
+	default bf549		if BR2_bf549
+	default bf561		if BR2_bf561
+
+config BR2_GCC_TARGET_CPU_REVISION
+	string "Target CPU revision"
+	help
+	  Specify a target CPU revision, which will be appended to the
+	  value of the -mcpu option. For example, if the selected CPU is
+	  bf609, and then selected CPU revision is "0.0", then gcc will
+	  receive the -mcpu=bf609-0.0 option.
--- a/arch/Config.in.m68k
+++ b/arch/Config.in.m68k
@@ -1,46 +1,16 @@
 config BR2_ARCH
 	default "m68k"		if BR2_m68k

-config BR2_NORMALIZED_ARCH
-	default "m68k"
-
 config BR2_ENDIAN
 	default "BIG"

-# symbols used to distinguish between m68k and coldfire
-# for gcc multilib
-config BR2_m68k_m68k
-	bool
+config BR2_ARCH_HAS_ATOMICS
+	default y

-config BR2_m68k_cf
-	bool
-
-# coldfire variants will be added later
-choice
-	prompt "Target CPU"
-	default BR2_m68k_68040
-	depends on BR2_m68k
-	help
-	  Specific CPU variant to use
-
-config BR2_m68k_68040
-	bool "68040"
-	select BR2_m68k_m68k
-	select BR2_USE_MMU
-
-config BR2_m68k_cf5208
-	bool "5208"
-	select BR2_m68k_cf
-	select BR2_SOFT_FLOAT
-
-endchoice
-
-config BR2_GCC_TARGET_CPU
+config BR2_GCC_TARGET_ARCH
+	default "68000"		if BR2_m68k_68000
+	default "68010"		if BR2_m68k_68010
+	default "68020"		if BR2_m68k_68020
+	default "68030"		if BR2_m68k_68030
 	default "68040"		if BR2_m68k_68040
-	default "5208"		if BR2_m68k_cf5208
-
-config BR2_READELF_ARCH_NAME
-	default "MC68000"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
+	default "68060"		if BR2_m68k_68060
--- a/arch/Config.in.microblaze
+++ b/arch/Config.in.microblaze
@@ -2,19 +2,13 @@ config BR2_ARCH
 	default "microblazeel"  if BR2_microblazeel
 	default "microblaze"    if BR2_microblazebe

-config BR2_NORMALIZED_ARCH
-	default "microblaze"
-
 config BR2_ENDIAN
 	default "LITTLE" if BR2_microblazeel
 	default "BIG"	 if BR2_microblazebe

-config BR2_READELF_ARCH_NAME
-	default "Xilinx MicroBlaze"
-
 config BR2_microblaze
 	bool
 	default y if BR2_microblazeel || BR2_microblazebe

-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
+config BR2_ARCH_HAS_ATOMICS
+	default y
--- a/arch/Config.in.mips
+++ b/arch/Config.in.mips
@@ -1,152 +1,39 @@
-# mips default CPU ISAs
-config BR2_MIPS_CPU_MIPS32
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS32R2
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS32R3
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS32R5
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_MIPS_CPU_MIPS32R6
-	bool
-	select BR2_MIPS_NAN_2008
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_MIPS_CPU_MIPS64
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS64R2
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS64R3
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS64R5
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_MIPS_CPU_MIPS64R6
-	bool
-	select BR2_MIPS_NAN_2008
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-
 choice
 	prompt "Target Architecture Variant"
+	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
 	default BR2_mips_32 if BR2_mips || BR2_mipsel
 	default BR2_mips_64 if BR2_mips64 || BR2_mips64el
-	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
 	help
 	  Specific CPU variant to use

-	  64bit capable: 64, 64r2, 64r3, 64r5, 64r6
-	  non-64bit capable: 32, 32r2, 32r3, 32r5, 32r6
+	  64bit cabable: 64, 64r2, 64r6
+	  non-64bit capable: 32, 32r2, 32r6

 config BR2_mips_32
-	bool "Generic MIPS32"
+	bool "mips 32"
 	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32
 config BR2_mips_32r2
-	bool "Generic MIPS32R2"
+	bool "mips 32r2"
 	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_32r3
-	bool "Generic MIPS32R3"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R3
-config BR2_mips_32r5
-	bool "Generic MIPS32R5"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
 config BR2_mips_32r6
-	bool "Generic MIPS32R6"
+	bool "mips 32r6"
 	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R6
-config BR2_mips_interaptiv
-	bool "interAptiv"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_mips_m5150
-	bool "M5150"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-	select BR2_MIPS_NAN_2008
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_mips_m6250
-	bool "M6250"
-	depends on !BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
-	select BR2_MIPS_CPU_MIPS32R6
-config BR2_mips_p5600
-	bool "P5600"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-	select BR2_MIPS_NAN_2008
-config BR2_mips_xburst
-	bool "XBurst"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-	help
-	  The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
-	  bug in the FPU that can generate incorrect results in
-	  certain cases. The problem shows up when you have several
-	  fused madd instructions in sequence with dependant
-	  operands. This requires the -mno-fused-madd compiler option
-	  to be used in order to prevent emitting these instructions.
-
-	  See http://www.ingenic.com/en/?xburst.html
 config BR2_mips_64
-	bool "Generic MIPS64"
+	bool "mips 64"
 	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64
 config BR2_mips_64r2
-	bool "Generic MIPS64R2"
+	bool "mips 64r2"
 	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R2
-config BR2_mips_64r3
-	bool "Generic MIPS64R3"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R3
-config BR2_mips_64r5
-	bool "Generic MIPS64R5"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R5
 config BR2_mips_64r6
-	bool "Generic MIPS64R6"
+	bool "mips 64r6"
 	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
-config BR2_mips_i6400
-	bool "I6400"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_mips_octeon2
-	bool "Octeon II"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R2
-	help
-	  Marvell (formerly Cavium Networks) Octeon II CN60XX
-	  processors.
-config BR2_mips_octeon3
-	bool "Octeon III"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R3
-	help
-	  Marvell (formerly Cavium Networks) Octeon III CN7XXX
-	  processors.
-config BR2_mips_p6600
-	bool "P6600"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
-	select BR2_MIPS_CPU_MIPS64R6
 endchoice

+
 choice
 	prompt "Target ABI"
-	default BR2_MIPS_NABI32
 	depends on BR2_mips64 || BR2_mips64el
+	default BR2_MIPS_NABI32

 	help
 	  Application Binary Interface to use
@@ -163,7 +50,6 @@ endchoice
 config BR2_MIPS_SOFT_FLOAT
 	bool "Use soft-float"
 	default y
-	depends on !BR2_mips_octeon3 # hard-float only
 	select BR2_SOFT_FLOAT
 	help
 	  If your target CPU does not have a Floating Point Unit (FPU)
@@ -171,97 +57,26 @@ config BR2_MIPS_SOFT_FLOAT
 	  floating point functions, then everything will need to be
 	  compiled with soft floating point support (-msoft-float).

-choice
-	prompt "FP mode"
-	default BR2_MIPS_FP32_MODE_XX
-	depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
-	help
-	  MIPS32 supports different FP modes (32,xx,64). Information
-	  about FP modes can be found here:
-	  https://sourceware.org/binutils/docs/as/MIPS-Options.html
-	  https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
-
-config BR2_MIPS_FP32_MODE_32
-	bool "32"
-	depends on !BR2_MIPS_CPU_MIPS32R6
-
-config BR2_MIPS_FP32_MODE_XX
-	bool "xx"
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-
-config BR2_MIPS_FP32_MODE_64
-	bool "64"
-	depends on !BR2_MIPS_CPU_MIPS32
-endchoice
-
-config BR2_GCC_TARGET_FP32_MODE
-	default "32"	if BR2_MIPS_FP32_MODE_32
-	default "xx"	if BR2_MIPS_FP32_MODE_XX
-	default "64"	if BR2_MIPS_FP32_MODE_64
-
-config BR2_MIPS_NAN_LEGACY
-	bool
-
-config BR2_MIPS_NAN_2008
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-
-choice
-	prompt "Target NaN"
-	default BR2_MIPS_ENABLE_NAN_2008
-	depends on BR2_mips_32r5 || BR2_mips_64r5
-	help
-	  MIPS supports two different NaN encodings, legacy and 2008.
-	  Information about MIPS NaN encodings can be found here:
-	  https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
-
-config BR2_MIPS_ENABLE_NAN_LEGACY
-	bool "legacy"
-	select BR2_MIPS_NAN_LEGACY
-
-config BR2_MIPS_ENABLE_NAN_2008
-	bool "2008"
-	depends on !BR2_MIPS_SOFT_FLOAT
-	select BR2_MIPS_NAN_2008
-endchoice
-
-config BR2_GCC_TARGET_NAN
-	default "legacy"	if BR2_MIPS_NAN_LEGACY
-	default "2008"		if BR2_MIPS_NAN_2008
-
 config BR2_ARCH
 	default "mips"		if BR2_mips
 	default "mipsel"	if BR2_mipsel
 	default "mips64"	if BR2_mips64
 	default "mips64el"	if BR2_mips64el

-config BR2_NORMALIZED_ARCH
-	default "mips"
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_mipsel || BR2_mips64el
-	default "BIG"		if BR2_mips || BR2_mips64
+	default "BIG" 	    	if BR2_mips || BR2_mips64
+
+config BR2_ARCH_HAS_ATOMICS
+	default y

 config BR2_GCC_TARGET_ARCH
 	default "mips32"	if BR2_mips_32
 	default "mips32r2"	if BR2_mips_32r2
-	default "mips32r3"	if BR2_mips_32r3
-	default "mips32r5"	if BR2_mips_32r5
 	default "mips32r6"	if BR2_mips_32r6
-	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5101"		if BR2_mips_m5150
-	default "m6201"		if BR2_mips_m6250
-	default "p5600"		if BR2_mips_p5600
-	default "mips32r2"	if BR2_mips_xburst
 	default "mips64"	if BR2_mips_64
 	default "mips64r2"	if BR2_mips_64r2
-	default "mips64r3"	if BR2_mips_64r3
-	default "mips64r5"	if BR2_mips_64r5
 	default "mips64r6"	if BR2_mips_64r6
-	default "i6400"		if BR2_mips_i6400
-	default "octeon2"	if BR2_mips_octeon2
-	default "octeon3"	if BR2_mips_octeon3
-	default "p6600"		if BR2_mips_p6600

 config BR2_MIPS_OABI32
 	bool
@@ -271,9 +86,3 @@ config BR2_GCC_TARGET_ABI
 	default "32"		if BR2_MIPS_OABI32
 	default "n32"		if BR2_MIPS_NABI32
 	default "64"		if BR2_MIPS_NABI64
-
-config BR2_READELF_ARCH_NAME
-	default "MIPS R3000"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.nios2
+++ b/arch/Config.in.nios2
@@ -1,14 +1,8 @@
 config BR2_ARCH
 	default "nios2"

-config BR2_NORMALIZED_ARCH
-	default "nios2"
-
 config BR2_ENDIAN
 	default "LITTLE"

-config BR2_READELF_ARCH_NAME
-	default "Altera Nios II"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
+config BR2_ARCH_HAS_ATOMICS
+	default y
--- a/arch/Config.in.or1k
+++ b/arch/Config.in.or1k
@@ -1,14 +0,0 @@
-config BR2_ARCH
-	default "or1k"
-
-config BR2_NORMALIZED_ARCH
-	default "openrisc"
-
-config BR2_ENDIAN
-	default "BIG"
-
-config BR2_READELF_ARCH_NAME
-	default "OpenRISC 1000"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.powerpc
+++ b/arch/Config.in.powerpc
@@ -1,10 +1,6 @@
 config BR2_POWERPC_CPU_HAS_ALTIVEC
 	bool

-config BR2_POWERPC_CPU_HAS_VSX
-	bool
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-
 config BR2_POWERPC_CPU_HAS_SPE
 	bool

@@ -15,135 +11,124 @@ choice
 	  Specific CPU variant to use
 config BR2_generic_powerpc
 	bool "generic"
-	# No C library supports this variant on ppc64le
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_401
 	bool "401"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_403
 	bool "403"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405
 	bool "405"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405fp
 	bool "405 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440
 	bool "440"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440fp
 	bool "440 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464
 	bool "464"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464fp
 	bool "464 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476
 	bool "476"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476fp
 	bool "476 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_505
 	bool "505"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
+config BR2_powerpc_601
+	bool "601"
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_602
 	bool "602"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603
 	bool "603"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603e
 	bool "603e"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604
 	bool "604"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604e
 	bool "604e"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_620
 	bool "620"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_630
 	bool "630"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_740
 	bool "740"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_7400
 	bool "7400"
-	depends on BR2_powerpc
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_7450
 	bool "7450"
-	depends on BR2_powerpc
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_750
 	bool "750"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_821
 	bool "821"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_823
 	bool "823"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_860
 	bool "860"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_970
 	bool "970"
-	depends on BR2_powerpc || BR2_powerpc64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_8540
 	bool "8540 / e500v1"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_8548
 	bool "8548 / e500v2"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_e300c2
 	bool "e300c2"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e300c3
 	bool "e300c3"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e500mc
 	bool "e500mc"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e5500
 	bool "e5500"
-	depends on BR2_powerpc || BR2_powerpc64
+	depends on !BR2_powerpc64le
 config BR2_powerpc_e6500
 	bool "e6500"
-	depends on BR2_powerpc || BR2_powerpc64
+	depends on !BR2_powerpc64le
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power4
 	bool "power4"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_power5
 	bool "power5"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_power6
 	bool "power6"
-	depends on BR2_powerpc || BR2_powerpc64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power7
 	bool "power7"
-	depends on BR2_powerpc || BR2_powerpc64
-	select BR2_POWERPC_CPU_HAS_VSX
+	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power8
 	bool "power8"
-	select BR2_POWERPC_CPU_HAS_VSX
-config BR2_powerpc_power9
-	bool "power9"
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
-	select BR2_POWERPC_CPU_HAS_VSX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 endchoice

 choice
@@ -175,13 +160,13 @@ config BR2_ARCH
 	default "powerpc64"	if BR2_powerpc64
 	default "powerpc64le"	if BR2_powerpc64le

-config BR2_NORMALIZED_ARCH
-	default "powerpc"
-
 config BR2_ENDIAN
 	default "BIG"    if BR2_powerpc || BR2_powerpc64
 	default "LITTLE" if BR2_powerpc64le

+config BR2_ARCH_HAS_ATOMICS
+	default y
+
 config BR2_GCC_TARGET_CPU
 	default "401"		if BR2_powerpc_401
 	default "403"		if BR2_powerpc_403
@@ -194,6 +179,7 @@ config BR2_GCC_TARGET_CPU
 	default "476"		if BR2_powerpc_476
 	default "476fp"		if BR2_powerpc_476fp
 	default "505"		if BR2_powerpc_505
+	default "601"		if BR2_powerpc_601
 	default "602"		if BR2_powerpc_602
 	default "603"		if BR2_powerpc_603
 	default "603e"		if BR2_powerpc_603e
@@ -221,11 +207,11 @@ config BR2_GCC_TARGET_CPU
 	default "power6"	if BR2_powerpc_power6
 	default "power7"	if BR2_powerpc_power7
 	default "power8"	if BR2_powerpc_power8
-	default "power9"	if BR2_powerpc_power9

-config BR2_READELF_ARCH_NAME
-	default "PowerPC"	if BR2_powerpc
-	default "PowerPC64"	if BR2_powerpc64 || BR2_powerpc64le
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
+config BR2_GCC_TARGET_ABI
+	default "altivec"		if BR2_PPC_ABI_altivec
+	default "no-altivec"		if BR2_PPC_ABI_no-altivec
+	default "spe"			if BR2_PPC_ABI_spe
+	default "no-spe"		if BR2_PPC_ABI_no-spe
+	default "ibmlongdouble"		if BR2_PPC_ABI_ibmlongdouble
+	default "ieeelongdouble"	if BR2_PPC_ABI_ieeelongdouble
--- a/arch/Config.in.riscv
+++ b/arch/Config.in.riscv
@@ -1,156 +0,0 @@
-# RISC-V CPU ISA extensions.
-
-config BR2_RISCV_ISA_RVI
-	bool
-
-config BR2_RISCV_ISA_RVM
-	bool
-
-config BR2_RISCV_ISA_RVA
-	bool
-
-config BR2_RISCV_ISA_RVF
-	bool
-
-config BR2_RISCV_ISA_RVD
-	bool
-
-config BR2_RISCV_ISA_RVC
-	bool
-
-config BR2_RISCV_ISA_RVV
-	bool
-
-choice
-	prompt "Target Architecture Variant"
-	default BR2_riscv_g
-
-config BR2_riscv_g
-	bool "General purpose (G)"
-	select BR2_RISCV_ISA_RVI
-	select BR2_RISCV_ISA_RVM
-	select BR2_RISCV_ISA_RVA
-	select BR2_RISCV_ISA_RVF
-	select BR2_RISCV_ISA_RVD
-	help
-	  General purpose (G) is equivalent to IMAFD.
-
-config BR2_riscv_custom
-	bool "Custom architecture"
-	select BR2_RISCV_ISA_RVI
-
-endchoice
-
-if BR2_riscv_custom
-
-comment "Instruction Set Extensions"
-
-config BR2_RISCV_ISA_CUSTOM_RVM
-	bool "Integer Multiplication and Division (M)"
-	select BR2_RISCV_ISA_RVM
-
-config BR2_RISCV_ISA_CUSTOM_RVA
-	bool "Atomic Instructions (A)"
-	select BR2_RISCV_ISA_RVA
-
-config BR2_RISCV_ISA_CUSTOM_RVF
-	bool "Single-precision Floating-point (F)"
-	select BR2_RISCV_ISA_RVF
-
-config BR2_RISCV_ISA_CUSTOM_RVD
-	bool "Double-precision Floating-point (D)"
-	depends on BR2_RISCV_ISA_RVF
-	select BR2_RISCV_ISA_RVD
-
-config BR2_RISCV_ISA_CUSTOM_RVC
-	bool "Compressed Instructions (C)"
-	select BR2_RISCV_ISA_RVC
-
-config BR2_RISCV_ISA_CUSTOM_RVV
-	bool "Vector Instructions (V)"
-	select BR2_RISCV_ISA_RVV
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-
-endif
-
-choice
-	prompt "Target Architecture Size"
-	default BR2_RISCV_64
-
-config BR2_RISCV_32
-	bool "32-bit"
-	select BR2_USE_MMU
-
-config BR2_RISCV_64
-	bool "64-bit"
-	select BR2_ARCH_IS_64
-
-endchoice
-
-config BR2_RISCV_USE_MMU
-	bool "MMU support"
-	default y
-	depends on BR2_RISCV_64
-	select BR2_USE_MMU
-	help
-	  Enable this option if your RISC-V core has a MMU (Memory
-	  Management Unit).
-
-choice
-	prompt "Target ABI"
-	default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
-	default BR2_RISCV_ABI_ILP32F if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
-	default BR2_RISCV_ABI_ILP32  if !BR2_ARCH_IS_64
-	default BR2_RISCV_ABI_LP64D  if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
-	default BR2_RISCV_ABI_LP64F  if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
-	default BR2_RISCV_ABI_LP64   if BR2_ARCH_IS_64
-
-config BR2_RISCV_ABI_ILP32
-	bool "ilp32"
-	depends on !BR2_ARCH_IS_64
-
-config BR2_RISCV_ABI_ILP32F
-	bool "ilp32f"
-	depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
-
-config BR2_RISCV_ABI_ILP32D
-	bool "ilp32d"
-	depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
-
-config BR2_RISCV_ABI_LP64
-	bool "lp64"
-	depends on BR2_ARCH_IS_64
-
-config BR2_RISCV_ABI_LP64F
-	bool "lp64f"
-	depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
-	depends on BR2_USE_MMU
-
-config BR2_RISCV_ABI_LP64D
-	bool "lp64d"
-	depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
-endchoice
-
-config BR2_ARCH
-	default "riscv32" if !BR2_ARCH_IS_64
-	default "riscv64" if BR2_ARCH_IS_64
-
-config BR2_NORMALIZED_ARCH
-	default "riscv"
-
-config BR2_ENDIAN
-	default "LITTLE"
-
-config BR2_GCC_TARGET_ABI
-	default "ilp32" if BR2_RISCV_ABI_ILP32
-	default "ilp32f" if BR2_RISCV_ABI_ILP32F
-	default "ilp32d" if BR2_RISCV_ABI_ILP32D
-	default "lp64" if BR2_RISCV_ABI_LP64
-	default "lp64f" if BR2_RISCV_ABI_LP64F
-	default "lp64d" if BR2_RISCV_ABI_LP64D
-
-config BR2_READELF_ARCH_NAME
-	default "RISC-V"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.s390x
+++ b/arch/Config.in.s390x
@@ -1,32 +0,0 @@
-choice
-	prompt "Target Architecture Variant"
-	help
-	  Specific CPU variant to use
-
-config BR2_s390x_z13
-	bool "z13"
-
-config BR2_s390x_z14
-	bool "z14"
-
-config BR2_s390x_z15
-	bool "z15"
-
-endchoice
-
-config BR2_ARCH
-	default "s390x"	if BR2_s390x
-
-config BR2_NORMALIZED_ARCH
-	default "s390"
-
-config BR2_ENDIAN
-	default "BIG"
-
-config BR2_GCC_TARGET_ARCH
-	default "arch11" if BR2_s390x_z13
-	default "arch12" if BR2_s390x_z14
-	default "arch13" if BR2_s390x_z15
-
-config BR2_READELF_ARCH_NAME
-	default "IBM S/390"	if BR2_s390x
--- a/arch/Config.in.sh
+++ b/arch/Config.in.sh
@@ -1,10 +1,12 @@
 choice
 	prompt "Target Architecture Variant"
-	default BR2_sh4
 	depends on BR2_sh
+	default BR2_sh4
 	help
 	  Specific CPU variant to use

+config BR2_sh2a
+	bool "sh2a (SH2A big endian)"
 config BR2_sh4
 	bool "sh4 (SH4 little endian)"
 config BR2_sh4eb
@@ -16,20 +18,16 @@ config BR2_sh4aeb
 endchoice

 config BR2_ARCH
+	default "sh2a"		if BR2_sh2a
 	default "sh4"		if BR2_sh4
 	default "sh4eb"		if BR2_sh4eb
 	default "sh4a"		if BR2_sh4a
 	default "sh4aeb"	if BR2_sh4aeb
-
-config BR2_NORMALIZED_ARCH
-	default "sh"
+	default "sh64"		if BR2_sh64

 config BR2_ENDIAN
-	default "LITTLE"	if BR2_sh4 || BR2_sh4a
-	default "BIG"		if BR2_sh4eb || BR2_sh4aeb
+	default "LITTLE"	if BR2_sh4 || BR2_sh4a || BR2_sh64
+	default "BIG"		if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb

-config BR2_READELF_ARCH_NAME
-	default "Renesas / SuperH SH"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
+config BR2_ARCH_HAS_ATOMICS
+	default y
--- a/arch/Config.in.sparc
+++ b/arch/Config.in.sparc
@@ -1,8 +1,8 @@
 choice
 	prompt "Target Architecture Variant"
+	depends on BR2_sparc || BR2_sparc64
 	default BR2_sparc_v8 if BR2_sparc
 	default BR2_sparc_v9 if BR2_sparc64
-	depends on BR2_sparc || BR2_sparc64
 	help
 	  Specific CPU variant to use

@@ -21,10 +21,6 @@ config BR2_ARCH
 	default "sparc"	if BR2_sparc
 	default "sparc64" if BR2_sparc64

-config BR2_NORMALIZED_ARCH
-	default "sparc"	if BR2_sparc
-	default "sparc64" if BR2_sparc64
-
 config BR2_ENDIAN
 	default "BIG"

@@ -32,10 +28,3 @@ config BR2_GCC_TARGET_CPU
 	default "leon3"		if BR2_sparc_leon3
 	default "v8"		if BR2_sparc_v8
 	default "ultrasparc"	if BR2_sparc_v9
-
-config BR2_READELF_ARCH_NAME
-	default "Sparc"		if BR2_sparc
-	default "Sparc v9"	if BR2_sparc64
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -1,8 +1,6 @@
 # i386/x86_64 cpu features
 config BR2_X86_CPU_HAS_MMX
 	bool
-config BR2_X86_CPU_HAS_3DNOW
-	bool
 config BR2_X86_CPU_HAS_SSE
 	bool
 config BR2_X86_CPU_HAS_SSE2
@@ -20,26 +18,16 @@ config BR2_X86_CPU_HAS_AVX
 config BR2_X86_CPU_HAS_AVX2
 	bool

-# BR2_X86_CPU_HAS_AVX512 implies the following AVX512 extensions:
-#   AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
-# This subset is common to Intel Xeon (excl Xeon Phi), AMD Zen 4, and
-# the x86-64-v4 psABI.
-#
-# Only select BR2_X86_CPU_HAS_AVX512 if the CPU supports this entire
-# subset of extensions.
-config BR2_X86_CPU_HAS_AVX512
-	bool
-
-# This list of CPU architecture variant is (loosely) ordered according
-# to the gcc documentation at
-# https://gcc.gnu.org/onlinedocs/gcc-13.2.0/gcc/x86-Options.html
 choice
 	prompt "Target Architecture Variant"
-	default BR2_x86_i586 if BR2_i386
 	depends on BR2_i386 || BR2_x86_64
+	default BR2_x86_i586 if BR2_i386
 	help
 	  Specific CPU variant to use

+config BR2_x86_i386
+	bool "i386"
+	depends on !BR2_x86_64
 config BR2_x86_i486
 	bool "i486"
 	depends on !BR2_x86_64
@@ -65,107 +53,35 @@ config BR2_x86_pentiumpro
 	depends on !BR2_x86_64
 config BR2_x86_pentium_mmx
 	bool "pentium MMX"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
+	depends on !BR2_x86_64
 config BR2_x86_pentium_m
 	bool "pentium mobile"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_SSE
+	depends on !BR2_x86_64
 config BR2_x86_pentium2
 	bool "pentium2"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
+	depends on !BR2_x86_64
 config BR2_x86_pentium3
 	bool "pentium3"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_SSE
+	depends on !BR2_x86_64
 config BR2_x86_pentium4
 	bool "pentium4"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_SSE
 	select BR2_X86_CPU_HAS_SSE2
+	depends on !BR2_x86_64
 config BR2_x86_prescott
 	bool "prescott"
+	select BR2_X86_CPU_HAS_MMX
+	select BR2_X86_CPU_HAS_SSE
+	select BR2_X86_CPU_HAS_SSE2
+	select BR2_X86_CPU_HAS_SSE3
 	depends on !BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_x86_64
-	bool "x86-64"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	help
-	  This option corresponds to -march=x86-64, documented as a
-	  "Generic CPU with 64-bit extensions" by the GCC
-	  documentation. It is a 64-bit CPU with MMX, SSE and SSE2
-	  support.
-config BR2_x86_x86_64_v2
-	bool "x86-64-v2"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v2 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is close to the Nehalem CPU architecture, and is
-	  applicable for CPUs that support CMPXCHG16B, LAHF-SAHF,
-	  POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3.
-config BR2_x86_x86_64_v3
-	bool "x86-64-v3"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v3 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is close to the Haswell CPU architecture, and is
-	  applicable for CPUs that support all of x86-64-v2 plus AVX,
-	  AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE.
-config BR2_x86_x86_64_v4
-	bool "x86-64-v4"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v4 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is applicable for CPUs that support all of x86-64-v3 plus
-	  AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL.
 config BR2_x86_nocona
 	bool "nocona"
 	select BR2_X86_CPU_HAS_MMX
@@ -188,29 +104,6 @@ config BR2_x86_corei7
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "nehalem" is preferred. Use BR2_x86_nehalem instead.
-config BR2_x86_nehalem
-	bool "nehalem"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_westmere
-	bool "westmere"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_corei7_avx
 	bool "corei7-avx"
 	select BR2_X86_CPU_HAS_MMX
@@ -221,31 +114,6 @@ config BR2_x86_corei7_avx
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_AVX
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "sandybridge" is preferred. Use BR2_x86_sandybridge instead.
-config BR2_x86_sandybridge
-	bool "sandybridge"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_ivybridge
-	bool "ivybridge"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_core_avx2
 	bool "core-avx2"
 	select BR2_X86_CPU_HAS_MMX
@@ -257,45 +125,6 @@ config BR2_x86_core_avx2
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_AVX
 	select BR2_X86_CPU_HAS_AVX2
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "haswell" is preferred. Use BR2_x86_haswell instead.
-config BR2_x86_haswell
-	bool "haswell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_broadwell
-	bool "broadwell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_skylake
-	bool "skylake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_x86_atom
 	bool "atom"
 	select BR2_X86_CPU_HAS_MMX
@@ -303,284 +132,23 @@ config BR2_x86_atom
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
 	select BR2_X86_CPU_HAS_SSSE3
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "bonnell" is preferred. Use BR2_x86_bonnell instead.
-config BR2_x86_bonnell
-	bool "bonnell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_silvermont
-	bool "silvermont"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_goldmont
-	bool "goldmont"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_goldmont_plus
-	bool "goldmont-plus"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_tremont
-	bool "tremont"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_sierraforest
-	bool "sierraforest"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-config BR2_x86_grandridge
-	bool "grandridge"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-config BR2_x86_knightslanding
-	bool "knightslanding"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-config BR2_x86_knightsmill
-	bool "knightsmill"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_skylake_avx512
-	bool "skylake-avx512"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_x86_cannonlake
-	bool "cannonlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_icelake_client
-	bool "icelake-client"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_icelake_server
-	bool "icelake-server"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_cascadelake
-	bool "cascadelake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_cooperlake
-	bool "cooperlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
-config BR2_x86_tigerlake
-	bool "tigerlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_sapphirerapids
-	bool "sapphirerapids"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  Use for Sapphire Rapids, Emerald Rapids
-config BR2_x86_alderlake
-	bool "alderlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  Use for Alder Lake, Raptor Lake, Meteor Lake
-config BR2_x86_rocketlake
-	bool "rocketlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-config BR2_x86_graniterapids
-	bool "graniterapids"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-config BR2_x86_graniterapids_d
-	bool "graniterapids-d"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
 config BR2_x86_k6
 	bool "k6"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
+	depends on !BR2_x86_64
 config BR2_x86_k6_2
 	bool "k6-2"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_3DNOW
+	depends on !BR2_x86_64
 config BR2_x86_athlon
 	bool "athlon"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_3DNOW
+	depends on !BR2_x86_64
 config BR2_x86_athlon_4
 	bool "athlon-4"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_3DNOW
+	depends on !BR2_x86_64
 config BR2_x86_opteron
 	bool "opteron"
 	select BR2_X86_CPU_HAS_MMX
@@ -598,13 +166,6 @@ config BR2_x86_barcelona
 	select BR2_X86_CPU_HAS_SSE
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_bobcat
-	bool "bobcat"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
 config BR2_x86_jaguar
 	bool "jaguar"
 	select BR2_X86_CPU_HAS_MMX
@@ -614,25 +175,6 @@ config BR2_x86_jaguar
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
-config BR2_x86_bulldozer
-	bool "bulldozer"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-config BR2_x86_piledriver
-	bool "piledriver"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
 config BR2_x86_steamroller
 	bool "steamroller"
 	select BR2_X86_CPU_HAS_MMX
@@ -642,94 +184,33 @@ config BR2_x86_steamroller
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
-config BR2_x86_excavator
-	bool "excavator"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_zen
-	bool "zen"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_x86_zen2
-	bool "zen 2"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_zen3
-	bool "zen 3"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-config BR2_x86_zen4
-	bool "zen 4"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
 config BR2_x86_geode
-	bool "AMD Geode"
+	bool "geode"
+	# Don't include MMX support because there several variant of geode
+	# processor, some with MMX support, some without.
+	# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
 	depends on !BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_3DNOW
 config BR2_x86_c3
 	bool "Via/Cyrix C3 (Samuel/Ezra cores)"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_3DNOW
+	depends on !BR2_x86_64
 config BR2_x86_c32
 	bool "Via C3-2 (Nehemiah cores)"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_SSE
+	depends on !BR2_x86_64
 config BR2_x86_winchip_c6
 	bool "IDT Winchip C6"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
+	depends on !BR2_x86_64
 config BR2_x86_winchip2
 	bool "IDT Winchip 2"
-	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
+	depends on !BR2_x86_64
 endchoice

 config BR2_ARCH
+	default "i386"		if BR2_x86_i386
 	default "i486"		if BR2_x86_i486
 	default "i586"		if BR2_x86_i586
 	default "i586"		if BR2_x86_x1000
@@ -739,22 +220,36 @@ config BR2_ARCH
 	default "i686"		if BR2_x86_c32
 	default "i586"		if BR2_x86_winchip_c6
 	default "i586"		if BR2_x86_winchip2
-	# We use the property of Kconfig that the first match of a
-	# list of default will be chosen. So the following entry will
-	# not match for all BR2_i386=y configurations, but only the
-	# ones that didn't match any of the previous cases (i486,
-	# i586).
-	default "i686"		if BR2_i386
-	default "x86_64"	if BR2_x86_64
-
-config BR2_NORMALIZED_ARCH
-	default "i386"		if !BR2_x86_64
+	default "i686"		if BR2_x86_i686
+	default "i686"		if BR2_x86_pentium2
+	default "i686"		if BR2_x86_pentium3
+	default "i686"		if BR2_x86_pentium4
+	default "i686"		if BR2_x86_pentium_m
+	default "i686"		if BR2_x86_pentiumpro
+	default "i686"		if BR2_x86_prescott
+	default "i686"		if BR2_x86_nocona && BR2_i386
+	default "i686"		if BR2_x86_core2 && BR2_i386
+	default "i686"		if BR2_x86_corei7 && BR2_i386
+	default "i686"		if BR2_x86_atom && BR2_i386
+	default "i686"		if BR2_x86_opteron && BR2_i386
+	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
+	default "i686"		if BR2_x86_barcelona && BR2_i386
+	default "i686"		if BR2_x86_jaguar && BR2_i386
+	default "i686"		if BR2_x86_steamroller && BR2_i386
+	default "i686"		if BR2_x86_k6
+	default "i686"		if BR2_x86_k6_2
+	default "i686"		if BR2_x86_athlon
+	default "i686"		if BR2_x86_athlon_4
 	default "x86_64"	if BR2_x86_64

 config BR2_ENDIAN
 	default "LITTLE"

+config BR2_ARCH_HAS_ATOMICS
+	default y if !BR2_x86_i386
+
 config BR2_GCC_TARGET_ARCH
+	default "i386"		if BR2_x86_i386
 	default "i486"		if BR2_x86_i486
 	default "i586"		if BR2_x86_i586
 	default "i586"		if BR2_x86_x1000
@@ -766,57 +261,17 @@ config BR2_GCC_TARGET_ARCH
 	default "pentium3"	if BR2_x86_pentium3
 	default "pentium4"	if BR2_x86_pentium4
 	default "prescott"	if BR2_x86_prescott
-	default "x86-64"	if BR2_x86_x86_64
-	default "x86-64-v2"	if BR2_x86_x86_64_v2
-	default "x86-64-v3"	if BR2_x86_x86_64_v3
-	default "x86-64-v4"	if BR2_x86_x86_64_v4
 	default "nocona"	if BR2_x86_nocona
 	default "core2"		if BR2_x86_core2
 	default "corei7"	if BR2_x86_corei7
-	default "nehalem"	if BR2_x86_nehalem
 	default "corei7-avx"	if BR2_x86_corei7_avx
-	default "sandybridge"	if BR2_x86_sandybridge
-	default "ivybridge"	if BR2_x86_ivybridge
 	default "core-avx2"	if BR2_x86_core_avx2
-	default "haswell"	if BR2_x86_haswell
-	default "broadwell"	if BR2_x86_broadwell
-	default "skylake"	if BR2_x86_skylake
 	default "atom"		if BR2_x86_atom
-	default "bonnell"	if BR2_x86_bonnell
-	default "westmere"	if BR2_x86_westmere
-	default "silvermont"	if BR2_x86_silvermont
-	default "goldmont"	if BR2_x86_goldmont
-	default "goldmont-plus"	if BR2_x86_goldmont_plus
-	default "tremont"	if BR2_x86_tremont
-	default "sierraforest"	if BR2_x86_sierraforest
-	default "grandridge"	if BR2_x86_grandridge
-	default "knl"		if BR2_x86_knightslanding
-	default "knm"		if BR2_x86_knightsmill
-	default "skylake-avx512" if BR2_x86_skylake_avx512
-	default "cannonlake"	if BR2_x86_cannonlake
-	default "icelake-client" if BR2_x86_icelake_client
-	default "icelake-server" if BR2_x86_icelake_server
-	default "cascadelake"	if BR2_x86_cascadelake
-	default "cooperlake"	if BR2_x86_cooperlake
-	default "tigerlake"	if BR2_x86_tigerlake
-	default "sapphirerapids" if BR2_x86_sapphirerapids
-	default "alderlake"	if BR2_x86_alderlake
-	default "rocketlake"	if BR2_x86_rocketlake
-	default "graniterapids"	if BR2_x86_graniterapids
-	default "graniterapids-d"	if BR2_x86_graniterapids_d
 	default "k8"		if BR2_x86_opteron
 	default "k8-sse3"	if BR2_x86_opteron_sse3
 	default "barcelona"	if BR2_x86_barcelona
-	default "btver1"	if BR2_x86_bobcat
 	default "btver2"	if BR2_x86_jaguar
-	default "bdver1"	if BR2_x86_bulldozer
-	default "bdver2"	if BR2_x86_piledriver
 	default "bdver3"	if BR2_x86_steamroller
-	default "bdver4"	if BR2_x86_excavator
-	default "znver1"	if BR2_x86_zen
-	default "znver2"	if BR2_x86_zen2
-	default "znver3"	if BR2_x86_zen3
-	default "znver4"	if BR2_x86_zen4
 	default "k6"		if BR2_x86_k6
 	default "k6-2"		if BR2_x86_k6_2
 	default "athlon"	if BR2_x86_athlon
@@ -826,10 +281,3 @@ config BR2_GCC_TARGET_ARCH
 	default "c3"		if BR2_x86_c3
 	default "c3-2"		if BR2_x86_c32
 	default "geode"		if BR2_x86_geode
-
-config BR2_READELF_ARCH_NAME
-	default "Intel 80386"			if BR2_i386
-	default "Advanced Micro Devices X86-64" if BR2_x86_64
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.xtensa
+++ b/arch/Config.in.xtensa
@@ -1,36 +1,44 @@
 choice
 	prompt "Target Architecture Variant"
-	default BR2_xtensa_fsf
 	depends on BR2_xtensa
-
+	default BR2_xtensa_fsf
 config BR2_XTENSA_CUSTOM
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	bool "Custom Xtensa processor configuration"
-
 config BR2_xtensa_fsf
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	bool "fsf - Default configuration"
-	select BR2_USE_MMU
-
 endchoice

-config BR2_XTENSA_OVERLAY_FILE
-	string "Overlay file for custom configuration"
+config BR2_XTENSA_CUSTOM_NAME
+	string "Custom Xtensa processor configuration name"
 	depends on BR2_XTENSA_CUSTOM
+	default ""
 	help
-	  Enter the path to the overlay tarball for a custom processor
-	  configuration.
+	  Name given to a custom Xtensa processor configuration.

-	  These overlay files are tar packages with updated
-	  configuration files for various toolchain packages and Xtensa
-	  processor configurations. They are provided by the processor
-	  vendor or directly from Tensilica.
+config BR2_XTENSA_CORE_NAME
+	string
+	default BR2_XTENSA_CUSTOM_NAME	if BR2_XTENSA_CUSTOM
+	default ""			if BR2_xtensa_fsf

-	  The path can be either absolute, or relative to the top
-	  directory of buildroot.
+config BR2_XTENSA_OVERLAY_DIR
+	string "Overlay directory for custom configuration"
+	depends on BR2_XTENSA_CUSTOM
+	default ""
+	help
+	  Provide the directory path that contains the overlay file
+	  for a custom processor configuration. The path is relative
+	  to the top directory of buildroot.
+	  These overlay files are tar packages with updated configuration
+	  files for various toolchain packages and Xtensa processor
+	  configurations. They are provided by the processor vendor or
+	  directly from Tensilica.

 choice
 	prompt "Target Architecture Endianness"
-	default BR2_XTENSA_LITTLE_ENDIAN
 	depends on BR2_XTENSA_CUSTOM
+	default BR2_XTENSA_LITTLE_ENDIAN

 config BR2_XTENSA_LITTLE_ENDIAN
 	bool "Little endian"
@@ -40,15 +48,6 @@ config BR2_XTENSA_BIG_ENDIAN

 endchoice

-config BR2_XTENSA_USE_MMU
-	bool "MMU support"
-	default y
-	depends on BR2_XTENSA_CUSTOM
-	select BR2_USE_MMU
-	help
-	  Enable this option if your Xtensa core has a MMU (Memory
-	  Management Unit).
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_XTENSA_LITTLE_ENDIAN
 	default "BIG"		if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
@@ -56,11 +55,5 @@ config BR2_ENDIAN
 config BR2_ARCH
 	default "xtensa"	if BR2_xtensa

-config BR2_NORMALIZED_ARCH
-	default "xtensa"
-
-config BR2_READELF_ARCH_NAME
-	default "Tensilica Xtensa Processor"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
+config BR2_ARCH_HAS_ATOMICS
+	default y
--- a/arch/arch.mk
+++ b/arch/arch.mk
@@ -1,34 +0,0 @@
-################################################################################
-#
-# Architecture-specific definitions
-#
-################################################################################
-
-# Allow GCC target configuration settings to be optionally
-# overwritten by architecture specific makefiles.
-
-# Makefiles must use the GCC_TARGET_* variables below instead
-# of the BR2_GCC_TARGET_* versions.
-GCC_TARGET_ARCH := $(call qstrip,$(BR2_GCC_TARGET_ARCH))
-GCC_TARGET_ABI := $(call qstrip,$(BR2_GCC_TARGET_ABI))
-GCC_TARGET_NAN := $(call qstrip,$(BR2_GCC_TARGET_NAN))
-GCC_TARGET_FP32_MODE := $(call qstrip,$(BR2_GCC_TARGET_FP32_MODE))
-GCC_TARGET_CPU := $(call qstrip,$(BR2_GCC_TARGET_CPU))
-GCC_TARGET_FPU := $(call qstrip,$(BR2_GCC_TARGET_FPU))
-GCC_TARGET_FLOAT_ABI := $(call qstrip,$(BR2_GCC_TARGET_FLOAT_ABI))
-GCC_TARGET_MODE := $(call qstrip,$(BR2_GCC_TARGET_MODE))
-
-# Explicitly set LD's "max-page-size" instead of relying on some defaults
-ifeq ($(BR2_ARC_PAGE_SIZE_4K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
-else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192 -Wl,-z,common-page-size=8192
-else ifeq ($(BR2_ARC_PAGE_SIZE_16K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384 -Wl,-z,common-page-size=16384
-else ifeq ($(BR2_aarch64),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384 -Wl,-z,common-page-size=16384
-else
-endif
-
-# Include any architecture specific makefiles.
-include $(sort $(wildcard arch/arch.mk.*))
--- a/arch/arch.mk.arc
+++ b/arch/arch.mk.arc
@@ -1,8 +0,0 @@
-ifeq ($(BR2_arc),y)
-
-# -matomic is always required when the ARC core has the atomic extensions
-ifeq ($(BR2_ARC_ATOMIC_EXT),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -matomic
-endif
-
-endif
--- a/arch/arch.mk.riscv
+++ b/arch/arch.mk.riscv
@@ -1,42 +0,0 @@
-#
-# Configure the GCC_TARGET_ARCH variable and append the
-# appropriate RISC-V ISA extensions.
-#
-
-ifeq ($(BR2_riscv),y)
-
-ifeq ($(BR2_RISCV_64),y)
-GCC_TARGET_ARCH := rv64i
-else
-GCC_TARGET_ARCH := rv32i
-endif
-
-ifeq ($(BR2_RISCV_ISA_RVM),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)m
-endif
-ifeq ($(BR2_RISCV_ISA_RVA),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)a
-endif
-ifeq ($(BR2_RISCV_ISA_RVF),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)f
-endif
-ifeq ($(BR2_RISCV_ISA_RVD),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)d
-endif
-ifeq ($(BR2_RISCV_ISA_RVC),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
-endif
-ifeq ($(BR2_RISCV_ISA_RVV),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)v
-endif
-
-# Starting from gcc 12.x, csr and fence instructions have been
-# separated from the base I instruction set, and special -march
-# suffixes are needed to enable their support. In Buildroot, we assume
-# all RISC-V cores that support Linux implement those instructions, so
-# we unconditionally enable those extensions.
-ifeq ($(BR2_TOOLCHAIN_GCC_AT_LEAST_12),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)_zicsr_zifencei
-endif
-
-endif
--- a/arch/arch.mk.xtensa
+++ b/arch/arch.mk.xtensa
@@ -1,41 +0,0 @@
-BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
-
-ifeq ($(BR_BUILDING)$(BR2_XTENSA_CUSTOM)$(BR2_TOOLCHAIN_BUILDROOT):$(BR_ARCH_XTENSA_OVERLAY_FILE),yyy:)
-$(error No xtensa overlay file provided. Check your BR2_XTENSA_OVERLAY_FILE setting)
-endif
-
-################################################################################
-# This variable can be used by packages that need to extract the overlay.
-#
-# ARCH_XTENSA_OVERLAY_FILE is the path to the overlay tarball; empty if not
-#                          using any overlay
-#
-# Example:
-#   ifneq ($(ARCH_XTENSA_OVERLAY_FILE),)
-#       tar xf $(ARCH_XTENSA_OVERLAY_FILE) -C $(@D) --strip-components=1 gcc
-#   endif
-################################################################################
-ifneq ($(filter http://% https://% ftp://% scp://%,$(BR_ARCH_XTENSA_OVERLAY_FILE)),)
-ARCH_XTENSA_OVERLAY_URL = $(BR_ARCH_XTENSA_OVERLAY_FILE)
-ARCH_XTENSA_OVERLAY_FILE = $($(PKG)_DL_DIR)/$(notdir $(BR_ARCH_XTENSA_OVERLAY_FILE))
-# Do not check that file, we can't know its hash
-BR_NO_CHECK_HASH_FOR += $(notdir $(ARCH_XTENSA_OVERLAY_URL))
-else
-ARCH_XTENSA_OVERLAY_FILE = $(BR_ARCH_XTENSA_OVERLAY_FILE)
-endif
-
-################################################################################
-# arch-xtensa-overlay-extract -- extract an extensa overlay
-#
-# argument 1 is the path in which to extract
-# argument 2 is the component to extract, one of: gcc, binutils, gdb, linux,
-#            u-boot
-#
-# Example:
-#   $(call arch-xtensa-overlay-extract,/path/to/overlay.tar,$(@D),gcc)
-################################################################################
-define arch-xtensa-overlay-extract
-	$(call suitable-extractor,$(ARCH_XTENSA_OVERLAY_FILE)) \
-		$(ARCH_XTENSA_OVERLAY_FILE) | \
-	$(TAR) --strip-components=1 -C $(1) $(TAR_OPTIONS) - $(2)
-endef
--- a/board/aarch64-efi/genimage-efi.cfg
+++ b/board/aarch64-efi/genimage-efi.cfg
@@ -1,30 +0,0 @@
-image efi-part.vfat {
-	vfat {
-		file EFI {
-			image = "efi-part/EFI"
-		}
-		file Image {
-			image = "Image"
-		}
-	}
-
-	size = 64M
-}
-
-image disk.img {
-	hdimage {
-		partition-table-type = "gpt"
-	}
-
-	partition boot {
-		image = "efi-part.vfat"
-		partition-type-uuid = U
-		offset = 32K
-		bootable = true
-	}
-
-	partition root {
-		partition-type-uuid = b921b045-1df0-41c3-af44-4c6f280d3fae
-		image = "rootfs.ext2"
-	}
-}
--- a/board/aarch64-efi/grub.cfg
+++ b/board/aarch64-efi/grub.cfg
@@ -1,6 +0,0 @@
-set default="0"
-set timeout="5"
-
-menuentry "Buildroot" {
-	linux /Image root=PARTLABEL=root rootwait
-}
--- a/board/aarch64-efi/post-image.sh
+++ b/board/aarch64-efi/post-image.sh
@@ -1,5 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-
-cp -f ${BOARD_DIR}/grub.cfg ${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg
--- a/board/aarch64-efi/readme.txt
+++ b/board/aarch64-efi/readme.txt
@@ -1,53 +0,0 @@
-
-The aarch64_efi_defconfig allows to build a minimal Linux system that
-can boot on all AArch64 servers providing an EFI firmware.
-
-This includes all Arm EBBR[1] compliant systems, and all Arm SystemReady[2]
-compliant systems for example.
-
-
-Building and booting
-====================
-
-$ make aarch64_efi_defconfig
-$ make
-
-The file output/images/disk.img is a complete disk image that can be
-booted, it includes the grub2 bootloader, Linux kernel and root
-filesystem.
-
-Testing under Qemu
-==================
-
-This image can also be tested using Qemu:
-
-qemu-system-aarch64 \
-	-M virt \
-	-cpu cortex-a57 \
-	-m 512 \
-	-nographic \
-	-bios </path/to/QEMU_EFI.fd> \
-	-drive file=output/images/disk.img,if=none,format=raw,id=hd0 \
-	-device virtio-blk-device,drive=hd0 \
-	-netdev user,id=eth0 \
-	-device virtio-net-device,netdev=eth0
-
-Note that </path/to/QEMU_EFI.fd> needs to point to a valid aarch64 UEFI
-firmware image for qemu.
-It may be provided by your distribution as a edk2-aarch64 or AAVMF
-package, in path such as /usr/share/edk2/aarch64/QEMU_EFI.fd .
-
-U-Boot based qemu firmware
-==========================
-
-A qemu firmware with support for UEFI based on U-Boot can be built following
-the instructions in [3], with qemu_arm64_defconfig.
-
-This should give you a nor_flash.bin, which you can use with qemu as an
-alternative to QEMU_EFI.fd. You will also need to change the machine
-specification to "-M virt,secure=on" on qemu command line, to enable TrustZone
-support, and you will need to increase the memory with "-m 1024".
-
-[1]: https://github.com/ARM-software/ebbr
-[2]: https://developer.arm.com/architectures/system-architectures/arm-systemready
-[3]: https://github.com/glikely/u-boot-tfa-build
--- a/board/acmesystems/acqua-a5/at91-sama5d3_acqua.dts
+++ b/board/acmesystems/acqua-a5/at91-sama5d3_acqua.dts
@@ -1,334 +0,0 @@
-/*
- * acme-acqua.dts - Device Tree file for Acqua A5 Board
- *
- *  Copyright (C) 2014 Atmel,
- *		  2014 Nicolas Ferre <nicolas.ferre@atmel.com>
- * 
- *	2022 Sergio Tanzilli <tanzilli@acmesystems.it>
- *
- * Licensed under GPLv2 or later.
- */
-/dts-v1/;
-#include "sama5d31.dtsi"
-
-/ {
-	model = "Acme Systems Acqua SOM";
-	compatible = "acme,acqua", "atmel,sama5d3", "atmel,sama5";
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-		bootargs = "mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait net.ifnames=0";
-	};
-
-	memory {
-		reg = <0x20000000 0x10000000>;
-	};
-
-	clocks {
-		slow_xtal {
-			clock-frequency = <32768>;
-		};
-
-		main_xtal {
-			clock-frequency = <12000000>;
-		};
-	};
-
-	ahb {
-		apb {
-			hlcdc: hlcdc@f0030000 {
-				status = "disabled";
-				hlcdc-display-controller {
-					pinctrl-names = "default";
-					pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888_alt>;
-					port@0 {
-						hlcdc_panel_output: endpoint@0 {
-							remote-endpoint = <&panel_input>;
-						};
-					};
-				};
-			};
-		
-			/* MicroSD mounted on the SOM */
-		
-			mmc0: mmc@f0000000 {
-				pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
-				status = "okay";
-				slot@0 {
-					reg = <0>;
-					bus-width = <4>;
-				};
-			};
-  
-  			/* Optional MicroSD to mount on the carrier board */
-  
-			mmc1: mmc@f8000000 {
-				pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
-				status = "disabled";
-				slot@0 {
-					reg = <0>;
-					bus-width = <4>;
-					cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>;
-				};
-			};
-
-			spi0: spi@f0004000 {
-				cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
-				status = "disabled";
-			};
-
-			can0: can@f000c000 {
-				status = "disabled";
-			};
-
-			tcb0: timer@f0010000 {
-				timer0: timer@0 {
-					compatible = "atmel,tcb-timer";
-					reg = <0>;
-				};
-
-				timer1: timer@1 {
-					compatible = "atmel,tcb-timer";
-					reg = <1>;
-				};
-			};
-
-			i2c0: i2c@f0014000 {
-				pinctrl-0 = <&pinctrl_i2c0_pu>;
-				status = "disabled";
-			};
-
-			i2c1: i2c@f0018000 {
-				status = "disabled";
-			};
-
-			macb1: ethernet@f802c000 {
-				compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb";
-				
-				status = "okay";
-				phy-mode = "rmii";
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				nvmem-cells = <&eth0_addr>;
-				nvmem-cell-names = "mac-address";
-
-                phy0: ethernet-phy@1 {
-                    interrupt-parent = <&pioE>;
-                    interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
-                    reg = <1>;
-                };
-
-				/*ethernet-phy@1 {
-					reg = <0x1>;
-				};*/
-			};
-
-			/* Bit banging internal I2C to manage the AT24MAC402 chip */
-
-			i2c3@ {
-				compatible = "i2c-gpio";
-
-				sda-gpios = <&pioE 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
-				scl-gpios = <&pioE 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 
-				
-				pinctrl-names = "default";
-				pinctrl-0 = <&pinctrl_i2c3_gpio>;
-				
-				i2c-gpio,delay-us = <4>; /* ~178 kHz */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				
-				/* EEPROM contains the eth0 MAC address */
-				
-				eeprom@58 {
-					compatible = "atmel,24mac402";
-					pagesize = <256>;
-					read-only;
-					reg = <0x58>;
-					#address-cells = <1>;
-					#size-cells = <1>;
-
-					eth0_addr: eth-mac-addr@9A {
-						reg = <0x0 0x06>;
-					};
-				};
-				
-			};
-
-			pwm0: pwm@f002c000 {
-				pinctrl-names = "default";
-				pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
-				status = "disabled";
-			};
-
-			usart0: serial@f001c000 {
-				status = "okay";
-			};
-
-			usart1: serial@f0020000 {
-				pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
-				status = "disabled";
-			};
-
-			uart0: serial@f0024000 {
-				status = "disabled";
-			};
-
-
-			spi1: spi@f8008000 {
-				cs-gpios = <&pioC 25 0>;
-				status = "disabled";
-			};
-
-			adc0: adc@f8018000 {
-				atmel,adc-vref = <3300>;
-				atmel,adc-channels-used = <0xfe>;
-				pinctrl-0 = <
-					&pinctrl_adc0_adtrg
-					&pinctrl_adc0_ad1
-					&pinctrl_adc0_ad2
-					&pinctrl_adc0_ad3
-					&pinctrl_adc0_ad4
-					&pinctrl_adc0_ad5
-					&pinctrl_adc0_ad6
-					&pinctrl_adc0_ad7
-					>;
-				status = "disabled";
-			};
-
-			i2c2: i2c@f801c000 {
-				dmas = <0>, <0>;	/* Do not use DMA for i2c2 */
-				pinctrl-0 = <&pinctrl_i2c2_pu>;
-				status = "disabled";
-			};
-
-
-			dbgu: serial@ffffee00 {
-				status = "okay";
-			};
-
-			pinctrl@fffff200 {
-
-				atmel,mux-mask = <
-					/*   A          B          C  */
-					0xffffffff 0xc0fc0000 0xc0ff0000	/* pioA */
-					0xffffffff 0x0ff8ffff 0x00000000	/* pioB */
-					0xffffffff 0xbc00f1ff 0x7c00fc00	/* pioC */
-					0xffffffff 0xc001c0e0 0x0001c1e0	/* pioD */
-					0xfffffff9 0xbf9f8000 0x18000000 	/* pioE */
-				/*	0xffffffff 0xb8000000 0x18000000 */	/* pioE */
-					>;
-
-				board {
-					pinctrl_i2c0_pu: i2c0_pu {
-						atmel,pins =
-							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
-							<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
-					};
-
-					pinctrl_i2c2_pu: i2c2_pu {
-						atmel,pins =
-							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
-							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
-					};
-
-					pinctrl_i2c3_gpio: i2c3-gpio {
-						atmel,pins =
-							<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
-					};
-
-
-					pinctrl_key_gpio: key_gpio_0 {
-						atmel,pins =
-							<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_mmc0_cd: mmc0_cd {
-						atmel,pins =
-							<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_mmc1_cd: mmc1_cd {
-						atmel,pins =
-							<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_usba_vbus: usba_vbus {
-						atmel,pins =
-							<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;	/* PE9, conflicts with A9 */
-					};
-					
-					pinctrl_gpio_leds: gpio_leds_default {
-						atmel,pins =
-							<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
-					};
-				};
-			};
-		};
-
-        usb0: gadget@500000 {
-            status = "disabled";
-        };
-
-        usb1: ohci@600000 {
-            status = "okay";
-        };
-
-        usb2: ehci@700000 {
-            status = "okay";
-        };
-		
-	};
-
-
-	panel: panel {
-		/* compatible = "acme,43inch", "simple-panel"; */
-		compatible = "acme,50inch", "simple-panel";
-		/* compatible = "acme,70inch", "simple-panel"; */
-		
-		status = "disable";
-
-		port@0 {
-			panel_input: endpoint@0 {
-				remote-endpoint = <&hlcdc_panel_output>;
-			};
-		};
-	};
-
- 
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_gpio_leds>;
-
-		led0 {
-			label = "led0";
-			gpios = <&pioE 3 GPIO_ACTIVE_LOW>;
-			default-state = "off";
-		};
-
-		led1 {
-			label = "led1";
-			gpios = <&pioE 4 GPIO_ACTIVE_LOW>;
-			default-state = "off";
-		};
-
-		led2 {
-			label = "led2";
-			gpios = <&pioE 5 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		led3 {
-			label = "led3";
-			gpios = <&pioE 6 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "mmc0";
-			default-state = "off";
-		};
-	};		
-};
--- a/board/acmesystems/acqua-a5/genimage.cfg
+++ b/board/acmesystems/acqua-a5/genimage.cfg
@@ -1,29 +0,0 @@
-# Minimal SD card image for the Acme Systems Acqua A5
-
-image boot.vfat {
-	vfat {
-		files = {
-			"boot.bin",
-			"zImage",
-			"at91-sama5d3_acqua.dtb"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-	}
-}
--- a/board/acmesystems/acqua-a5/readme.txt
+++ b/board/acmesystems/acqua-a5/readme.txt
@@ -1,44 +0,0 @@
-Acme Systems Acqua A5
-
-Intro
-=====
-
-The Acqua A5 is a system on module based on the Microchip SAMA5D31 SoC:
-
-    https://www.acmesystems.it/acqua
-
-The files here support configurations that build a microSD image for a
-minimal system that can be accessed through the serial console. You will
-need an USB-to-serial interface in order to access that console from
-your computer:
-
-    https://www.acmesystems.it/DPI
-
-How to build the image
-======================
-
-If you have an Acqua module with 256 MiB of RAM, type:
-
-$ make acmesystems_acqua_a5_256mb_defconfig
-
-If you have the 512 MiB version, type instead:
-
-$ make acmesystems_acqua_a5_512mb_defconfig
-
-You can optionally tweak the configuration and add packages by typing:
-
-$ make menuconfig
-
-Then, proceed with the build:
-
-$ make
-
-How to write the microSD card
-=============================
-
-The system image is the file "sdcard.img" in the "output/images"
-directory. Write it to the card by invoking:
-
-$ sudo dd if=output/images/sdcard.img of=/dev/sdX bs=1M
-
-where `sdX' is the block device representing the microSD card.
--- a/board/acmesystems/aria-g25/genimage.cfg
+++ b/board/acmesystems/aria-g25/genimage.cfg
@@ -1,36 +0,0 @@
-# Minimal SD card image for the Acmesystems Aria G25
-
-image boot.vfat {
-	vfat {
-		file zImage {
-			image = "zImage"
-		}
-
-		file at91-ariag25.dtb {
-			image = "at91-ariag25.dtb"
-		}
-
-		file boot.bin {
-			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.10.3.bin"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}
--- a/board/acmesystems/aria-g25/readme.txt
+++ b/board/acmesystems/aria-g25/readme.txt
@@ -1,44 +1,51 @@
-Acme Systems Aria G25
-
 Build instructions
 ==================

-To build an image for the Aria G25 choose the configuration
-corresponding to the Aria variant.
+As a regular user configure and then build:

-For 128MB RAM variant type:
-
-$ make acmesystems_aria_g25_128mb_defconfig
-
-else for 256MB RAM variant type:
-
-$ make acmesystems_aria_g25_256mb_defconfig
-
-To customize the configuration choosed type:
-
-$ make menuconfig
-
-When you are ready to start building Buildroot type:
+$ make acmesystems_aria_g25_128mb_defconfig (128MB RAM variant)
+  or...
+$ make acmesystems_aria_g25_256mb_defconfig (256MB RAM variant)

 $ make

-How to write the microSD card
-=============================
+Writing to the MicroSD card
+===========================

-Once the build process is finished you will have an image called
-"sdcard.img" in the output/images/ directory.
+Assuming your Aria G25 baseboard has a MicroSD socket, for example with
+the Terra baseboard, you'll need a blank MicroSD (obviously) initialized
+in a particular way to be able to boot from it.

-Write the bootable SD card image "sdcard.img" onto an SD card with
-"dd" command:
+Assuming the card is seen as /dev/sdb in your PC/laptop/other device
+you'll need to run the following commands as root or via sudo.

-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
+Make sure all of the card partitions are unmounted before starting.

-Assuming your Aria G25 baseboard has a MicroSD socket, for example
-with the Terra baseboard, insert the microSD card into the baseboard
-slot and power it.
+First we'll need to create two partitions:

-To get the kernel log messages you can use a DPI cable
-(http://www.acmesystems.it/DPI)
+# sfdisk -uM /dev/sdb <<EOF
+,32,6
+;
+EOF
+
+Then we'll need to create the empty filesystems:
+
+# mkdosfs -n SD_BOOT /dev/sdb1
+# mkfs.ext4 -L SD_ROOT /dev/sdb2
+
+We'll populate the first partition (boot) with the relevant files:
+
+# mount /dev/sdb1 /mnt
+# cp output/images/at91bootstrap.bin /mnt/BOOT.BIN
+# cp output/images/zImage /mnt
+# cp output/images/at91-ariag25.dtb /mnt
+# umount /mnt
+
+And the root filesystem afterwards:
+
+# mount /dev/sdb2 /mnt
+# tar -C /mnt output/images/rootfs.tar
+# umount /mnt
+
+You're done, insert the MicroSD card in the slot and enjoy.

-You can find additional informations, tutorials and a very
-comprehensive documentation on http://www.acmesystems.it/aria.
--- a/board/acmesystems/arietta-g25/genimage.cfg
+++ b/board/acmesystems/arietta-g25/genimage.cfg
@@ -1,36 +0,0 @@
-# Minimal SD card image for the Acmesystems Arietta G25
-
-image boot.vfat {
-	vfat {
-		file zImage {
-			image = "zImage"
-		}
-
-		file acme-arietta.dtb {
-			image = "at91-ariettag25.dtb"
-		}
-
-		file boot.bin {
-			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.10.3.bin"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}
--- a/board/acmesystems/arietta-g25/readme.txt
+++ b/board/acmesystems/arietta-g25/readme.txt
@@ -1,49 +0,0 @@
-Acme Systems Arietta G25
-
-Intro
-=====
-
-This default configuration will allow you to start experimenting with the
-buildroot environment for the Arietta G25. With the current configuration
-it will bring-up the board, and allow access through the serial console.
-
-You can find additional informations, tutorials and a very comprehensive
-documentation on http://www.acmesystems.it/arietta.
-
-Build instructions
-==================
-
-To build an image for the Arietta G25 choose the configuration
-corresponding to the Arietta variant.
-
-For 128MB RAM variant type:
-
-$ make acmesystems_arietta_g25_128mb_defconfig
-
-else for 256MB RAM variant type:
-
-$ make acmesystems_arietta_g25_256mb_defconfig
-
-To customize the configuration chosen type:
-
-$ make menuconfig
-
-When you are ready to start building Buildroot type:
-
-$ make
-
-How to write the microSD card
-=============================
-
-Once the build process is finished you will have an image called "sdcard.img"
-in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an SD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Insert the microSD card into the Arietta slot and power it.
-
-The image just built is fairly basic and the only output
-you will get is on serial console, please consider to use a DPI
-cable (http://www.acmesystems.it/DPI)
--- a/board/altera/post-image.sh
+++ b/board/altera/post-image.sh
@@ -0,0 +1,8 @@
+#!/bin/sh
+# post-image.sh for SoCkit/SoCDK
+# 2014, "Roman Diouskine" <roman.diouskine@savoirfairelinux.com>
+# 2014, "Sebastien Bourdelin" <sebastien.bourdelin@savoirfairelinux.com>
+
+# create a DTB file copy with the name expected by the u-boot config
+# Name of the DTB is passed as the second argument to the script.
+cp -af $BINARIES_DIR/${2}.dtb  $BINARIES_DIR/socfpga.dtb
--- a/board/altera/readme.txt
+++ b/board/altera/readme.txt
@@ -0,0 +1,162 @@
+SoCkit
+
+Intro
+=====
+
+This is the buildroot board support for the Arrow SoCkit Evaluation Board
+and the Altera Cyclone 5 Development Board.
+
+A good source of information is :
+http://www.rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard
+
+How it works
+============
+
+Boot process :
+--------------
+
+In summary, the bootloader has multiple stages, an hardcoded boot routine is
+loaded from an on-chip ROM.
+
+  - That first stage is scanning the SD card's partition table to find
+    partition having the 0xA2 type.
+  - This partition is expected to contain a boot image on its first 60 Kb,
+    because u-boot is bigger, we must fill it with a preloader (u-boot-spl)
+    which will load the u-boot image.
+  - Then the u-boot image will load the Linux kernel.
+
+A good source of information for the boot process is :
+http://xillybus.com/tutorials/u-boot-image-altera-soc
+
+Note for the SPL :
+The SPL generated by the u-boot from Rocketboards doesn't seems to work,
+therefore we provide a patch for {uboot-PKG}/board/altera/socfpga_cyclone5/*
+based on the files generated with the Altera example design.
+
+For more information about this files please look at :
+http://www.rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization#Common_Source_Code
+
+How to build it
+===============
+
+Configure Buildroot
+-------------------
+
+The altera_sockit_defconfig configuration is a minimal configuration with
+all that is required to bring the SoCkit :
+
+  $ make altera_sockit_defconfig
+
+and for the SoC Development Board :
+
+  $ make altera_sockdk_defconfig
+
+Build everything
+----------------
+
+Note: you will need to have access to the network, since Buildroot will
+download the packages' sources.
+
+  $ make
+
+Result of the build
+-------------------
+
+After building, you should obtain this tree:
+
+    output/images/
+    ├── rootfs.ext2
+    ├── rootfs.ext3 -> rootfs.ext2
+    ├── rootfs.tar
+    ├── socfpga_cyclone5_sockit.dtb or socfpga_cyclone5_socdk.dtb
+    ├── socfpga.dtb
+    ├── u-boot.img
+    ├── u-boot-spl.bin
+    └── uImage
+
+
+Signing the Preloader
+---------------------
+
+*** BEWARE ****
+The u-boot-spl.bin must be signed using the Altera's tool "mkpimage".
+This tool comes as a part of the Altera development environnment (SoC EDS).
+A fork of this tool have been done by Maxime Hadjinlian and can be found here :
+https://github.com/maximeh/mkpimage
+
+Remember that without signing the u-boot-spl.bin, the board will not boot !!!
+
+  $ mkpimage u-boot-spl.bin -o u-boot-spl-signed.bin
+
+Prepare your SDcard
+===================
+
+A good source of information for the partitioning process is :
+http://www.rocketboards.org/foswiki/view/Projects/SoCKitLinaroLinuxDesktop#Partition_the_SD_Card
+
+Create the SDcard partition table
+----------------------------------
+
+Determine the device associated to the SD card :
+
+  $ cat /proc/partitions
+
+let's assume it is /dev/mmcblk0 :
+
+  $ sudo fdisk /dev/mmcblk0
+
+Delete all previous partitions with 'd' then create the new partition table,
+using these options, pressing enter after each one:
+
+  * n p 1 9000000 +20480K t 1 b
+  * n p 2 4096 +4496384K t 83
+  * n p 3 2048 +1024K t 3 a2
+
+Using the 'p' option, the SD card's partition must look like this :
+
+Device         Boot     Start       End  Blocks  Id System
+/dev/mmcblk0p1        9000000   9041919   20960   b W95 FAT32
+/dev/mmcblk0p2           4096   8996863 4496384  83 Linux
+/dev/mmcblk0p3           2048      4095    1024  a2 Unknown
+
+Then write the partition table using 'w' and exit.
+
+Make partition one a DOS partition :
+
+  $ sudo mkdosfs /dev/mmcblk0p1
+
+Install the binaries to the SDcard
+----------------------------------
+
+Remember your binaries are located in output/images/, go inside that directory :
+
+  $ cd output/images
+
+The partition with type a2 is the partition scan by the first bootloader stage
+in the SoCkit ROM to find the next bootloader stage so we must write the signed
+preloader and the u-boot binaries in that partition :
+
+  $ sudo dd if=u-boot-spl-signed.bin of=/dev/mmcblk0p3 bs=64k seek=0
+  $ sudo dd if=u-boot.img of=/dev/mmcblk0p3 bs=64k seek=4
+
+Copy the Linux kernel and its Device tree :
+
+  $ sudo mkdir /mnt/sdcard
+  $ sudo mount /dev/mmcblk0p1 /mnt/sdcard
+  $ sudo cp socfpga.dtb uImage /mnt/sdcard
+  $ sudo umount /mnt/sdcard
+
+Copy the rootfs :
+
+  $ sudo dd if=rootfs.ext2 of=/dev/mmcblk0p2 bs=64k
+  $ sudo sync
+
+It's Done!
+
+Finish
+======
+
+Eject your SDcard, insert it in your SoCkit, and power it up.
+
+if you want a serial console, you can plug a micro B USB cable on the USB-UART
+port, the serial port config to used is 57600/8-N-1.
--- a/board/altera/sockit/uboot-sockit-preloader-sample-design.patch
+++ b/board/altera/sockit/uboot-sockit-preloader-sample-design.patch
@@ -0,0 +1,820 @@
+From c70f2ebb350da20af1a0ed4b7960b8e5a1952713 Mon Sep 17 00:00:00 2001
+From: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
+Date: Thu, 20 Feb 2014 11:51:31 -0500
+Subject: [PATCH] board: add to sockit a working preloader design
+
+---
+ board/altera/socfpga_cyclone5/build.h              |   2 +-
+ board/altera/socfpga_cyclone5/iocsr_config.c       | 314 ++++++++++-----------
+ board/altera/socfpga_cyclone5/pinmux_config.c      |  32 +--
+ board/altera/socfpga_cyclone5/pinmux_config.h      |   8 +-
+ board/altera/socfpga_cyclone5/sdram/sdram_config.h |  14 +-
+ .../altera/socfpga_cyclone5/sdram/sequencer_auto.h |  16 +-
+ .../sdram/sequencer_auto_ac_init.c                 |  16 +-
+ .../socfpga_cyclone5/sdram/sequencer_defines.h     |  34 +--
+ 8 files changed, 218 insertions(+), 218 deletions(-)
+
+diff --git a/board/altera/socfpga_cyclone5/build.h b/board/altera/socfpga_cyclone5/build.h
+index e5d9c3c..a369015 100644
+--- a/board/altera/socfpga_cyclone5/build.h
+++ b/board/altera/socfpga_cyclone5/build.h
+@@ -29,7 +29,7 @@
+  * Handoff files must provide user option whether to
+  * enable watchdog during preloader execution phase
+  */
+-#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(0)
+#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(1)
+ 
+ /*
+  * Handoff files must provide user option whether to enable
+diff --git a/board/altera/socfpga_cyclone5/iocsr_config.c b/board/altera/socfpga_cyclone5/iocsr_config.c
+index fa663e1..90fc154 100644
+--- a/board/altera/socfpga_cyclone5/iocsr_config.c
+++ b/board/altera/socfpga_cyclone5/iocsr_config.c
+@@ -7,113 +7,113 @@ const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
+ 	0xC0000000,
+ 	0x0000003F,
+ 	0x00008000,
+-	0x00020080,
+-	0x08020000,
+-	0x08000000,
+-	0x00018020,
+	0x00060180,
+	0x18060000,
+	0x18000000,
+	0x00018060,
+ 	0x00000000,
+ 	0x00004000,
+-	0x00010040,
+-	0x04010000,
+-	0x04000000,
+-	0x00000010,
+-	0x00004010,
+	0x000300C0,
+	0x0C030000,
+	0x0C000000,
+	0x00000030,
+	0x0000C030,
+ 	0x00002000,
+-	0x00020000,
+-	0x02008000,
+-	0x02000000,
+-	0x00000008,
+-	0x00002008,
+	0x00018060,
+	0x06018000,
+	0x06000000,
+	0x00000018,
+	0x00006018,
+ 	0x00001000,
+ };
+ 
+ const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = {
+-	0x000C0300,
+-	0x10040000,
+-	0x100000C0,
+-	0x00000040,
+-	0x00010040,
+	0x00100000,
+	0x300C0000,
+	0x300000C0,
+	0x000000C0,
+	0x000300C0,
+ 	0x00008000,
+ 	0x00080000,
+-	0x18060000,
+-	0x18000000,
+-	0x00000060,
+-	0x00018060,
+	0x20000000,
+	0x00000000,
+	0x00000080,
+	0x00020000,
+ 	0x00004000,
+-	0x00010040,
+	0x000300C0,
+ 	0x10000000,
+-	0x04000000,
+-	0x00000010,
+-	0x00004010,
+	0x0C000000,
+	0x00000030,
+	0x0000C030,
+ 	0x00002000,
+-	0x06008020,
+-	0x02008000,
+	0x06018060,
+	0x06018000,
+ 	0x01FE0000,
+ 	0xF8000000,
+ 	0x00000007,
+ 	0x00001000,
+-	0x00004010,
+-	0x01004000,
+-	0x01000000,
+-	0x00003004,
+-	0x00001004,
+	0x0000C030,
+	0x0300C000,
+	0x03000000,
+	0x0000300C,
+	0x0000300C,
+ 	0x00000800,
+ 	0x00000000,
+ 	0x00000000,
+-	0x00800000,
+-	0x00000002,
+	0x01800000,
+	0x00000006,
+ 	0x00002000,
+ 	0x00000400,
+ 	0x00000000,
+-	0x00401000,
+	0x00C03000,
+ 	0x00000003,
+ 	0x00000000,
+ 	0x00000000,
+ 	0x00000200,
+-	0x00600802,
+	0x00601806,
+ 	0x00000000,
+-	0x80200000,
+-	0x80000600,
+-	0x00000200,
+	0x80600000,
+	0x80000601,
+	0x00000601,
+ 	0x00000100,
+-	0x00300401,
+-	0xC0100400,
+-	0x40100000,
+-	0x40000300,
+-	0x000C0100,
+	0x00300C03,
+	0xC0300C00,
+	0xC0300000,
+	0xC0000300,
+	0x000C0300,
+ 	0x00000080,
+ };
+ 
+ const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = {
+-	0x80040100,
+	0x300C0300,
+ 	0x00000000,
+ 	0x0FF00000,
+ 	0x00000000,
+-	0x0C010040,
+	0x0C0300C0,
+ 	0x00008000,
+-	0x18020080,
+-	0x00000000,
+-	0x08000000,
+-	0x00040020,
+-	0x06018060,
+	0x18060180,
+	0x18060000,
+	0x18000000,
+	0x00018060,
+	0x00018060,
+ 	0x00004000,
+-	0x0C010040,
+-	0x04010000,
+	0x000300C0,
+	0x0C030000,
+ 	0x00000030,
+ 	0x00000000,
+-	0x03004010,
+	0x0300C030,
+ 	0x00002000,
+-	0x06008020,
+-	0x02008000,
+-	0x02000018,
+-	0x00006008,
+-	0x01802008,
+	0x00018060,
+	0x06018000,
+	0x06000000,
+	0x00000018,
+	0x00006018,
+ 	0x00001000,
+-	0x03004010,
+-	0x01004000,
+-	0x0100000C,
+-	0x00003004,
+-	0x00C01004,
+	0x0000C030,
+	0x00000000,
+	0x03000000,
+	0x0000000C,
+	0x00C0300C,
+ 	0x00000800,
+ };
+ 
+@@ -170,14 +170,14 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xA0000034,
+ 	0x0D000001,
+ 	0x6068030C,
+-	0xC7034018,
+-	0x0E381A01,
+	0xCF034059,
+	0x1E781A03,
+ 	0x8030C0D0,
+-	0x34018606,
+-	0x01A01C70,
+	0x34059606,
+	0x01A03CF0,
+ 	0x0C0D0000,
+-	0x18606803,
+-	0x01C70340,
+	0x59606803,
+	0x03CF0340,
+ 	0xD000001A,
+ 	0x068030C0,
+ 	0x10040000,
+@@ -244,15 +244,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xA0000034,
+ 	0x0D000001,
+ 	0x6068030C,
+-	0xC7034018,
+-	0x0E381A01,
+	0xCF034059,
+	0x1E781A03,
+ 	0x8030C0D0,
+-	0x34018606,
+	0x34059606,
+ 	0x01A00000,
+ 	0x0C0D0000,
+-	0x18606803,
+-	0x01C70340,
+-	0xD00E381A,
+	0x59606803,
+	0x03CF0340,
+	0xD01E781A,
+ 	0x068030C0,
+ 	0x10040000,
+ 	0x00200000,
+@@ -273,7 +273,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
+	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -301,7 +301,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
+	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00010040,
+@@ -321,15 +321,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
+	0xF5DE791E,
+	0x0356D348,
+ 	0x821A0000,
+ 	0x0000D000,
+ 	0x01860680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
+	0x48F5DE79,
+	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -347,7 +347,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
+	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -375,7 +375,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
+	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00015000,
+@@ -395,15 +395,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
+-	0x821A00C3,
+	0xF5DE791E,
+	0x0356D348,
+	0x821A02CB,
+ 	0x0000D000,
+ 	0x00000680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
+	0x48F5DE79,
+	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -421,7 +421,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
+	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -449,7 +449,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
+	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00010040,
+@@ -469,15 +469,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
+	0xF5DE791E,
+	0x0356D348,
+ 	0x821A0000,
+ 	0x0000D000,
+ 	0x00000680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
+	0x48F5DE79,
+	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -495,7 +495,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
+	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -523,7 +523,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
+	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00010040,
+@@ -543,15 +543,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
+	0xF5DE791E,
+	0x0356D348,
+ 	0x821A0000,
+ 	0x0000D000,
+ 	0x00000680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
+	0x48F5DE79,
+	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -567,80 +567,80 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x04000002,
+ 	0x00820000,
+ 	0x00489000,
+-	0x001A1A1A,
+-	0x085506A0,
+-	0x0000E1D4,
+-	0x045506A0,
+-	0x0000E1D4,
+-	0x085506A0,
+-	0x8000E1D4,
+	0x801A1A1A,
+	0x00000200,
+	0x80000004,
+	0x00000200,
+	0x80000004,
+	0x00000200,
+	0x80000004,
+ 	0x00000200,
+ 	0x00000004,
+-	0x04000000,
+-	0x00000009,
+-	0x00002410,
+	0x00040000,
+	0x10000000,
+	0x00000000,
+ 	0x00000040,
+-	0x41000000,
+-	0x00002082,
+-	0x00000350,
+-	0x000000DA,
+	0x00010000,
+	0x40002000,
+	0x00000100,
+	0x40000002,
+	0x00000100,
+	0x40000002,
+ 	0x00000100,
+ 	0x40000002,
+ 	0x00000100,
+ 	0x00000002,
+-	0x042A8350,
+-	0x000070EA,
+-	0x86000000,
+-	0x08000004,
+	0x00020000,
+	0x08000000,
+ 	0x00000000,
+-	0x00482000,
+-	0x21800000,
+-	0x00101061,
+-	0x021541A8,
+-	0x00003875,
+-	0x011541A8,
+-	0x00003875,
+-	0x021541A8,
+-	0x20003875,
+	0x00000020,
+	0x00008000,
+	0x20001000,
+	0x00000080,
+	0x20000001,
+	0x00000080,
+	0x20000001,
+	0x00000080,
+	0x20000001,
+ 	0x00000080,
+ 	0x00000001,
+-	0x41000000,
+-	0x00000002,
+-	0x00FF0904,
+	0x00010000,
+	0x04000000,
+	0x00FF0000,
+ 	0x00000000,
+-	0x90400000,
+-	0x00000820,
+	0x00004000,
+	0x00000800,
+ 	0x80000001,
+-	0x38D612AF,
+-	0x86F8E38E,
+-	0x0A0A78B4,
+-	0x000D020A,
+	0x00041419,
+	0x40000000,
+	0x04000816,
+	0x000D0000,
+ 	0x00006800,
+-	0x028A4320,
+-	0xEBB4D23D,
+-	0x8F65E791,
+-	0xA47A0F3C,
+-	0x0001A769,
+-	0x00410D00,
+	0x00000340,
+	0xD000001A,
+	0x06800000,
+	0x00340000,
+	0x0001A000,
+	0x00000D00,
+ 	0x40000068,
+-	0x3D000003,
+-	0x91EBB4D2,
+-	0x3C8F65E7,
+-	0x69A47A0F,
+-	0x000001A7,
+	0x1A000003,
+	0x00D00000,
+	0x00068000,
+	0x00003400,
+	0x000001A0,
+	0x00000401,
+	0x00000008,
+ 	0x00000401,
+ 	0x00000008,
+ 	0x00000401,
+ 	0x00000008,
+-	0x00000540,
+-	0x000003A8,
+-	0x10AA0D40,
+-	0x8001C3A8,
+	0x00000401,
+	0x80000008,
+ 	0x0000007F,
+	0x20000000,
+ 	0x00000000,
+-	0x00004060,
+-	0xE1208000,
+	0xE0000080,
+ 	0x0000001F,
+-	0x00004100,
+	0x00004000,
+ };
+ 
+diff --git a/board/altera/socfpga_cyclone5/pinmux_config.c b/board/altera/socfpga_cyclone5/pinmux_config.c
+index 730067e..cfd74cd 100644
+--- a/board/altera/socfpga_cyclone5/pinmux_config.c
+++ b/board/altera/socfpga_cyclone5/pinmux_config.c
+@@ -23,7 +23,7 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+ 	0, /* EMACIO18 */
+ 	0, /* EMACIO19 */
+ 	3, /* FLASHIO0 */
+-	3, /* FLASHIO1 */
+	0, /* FLASHIO1 */
+ 	3, /* FLASHIO2 */
+ 	3, /* FLASHIO3 */
+ 	0, /* FLASHIO4 */
+@@ -34,25 +34,25 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+ 	3, /* FLASHIO9 */
+ 	3, /* FLASHIO10 */
+ 	3, /* FLASHIO11 */
+-	3, /* GENERALIO0 */
+-	3, /* GENERALIO1 */
+-	3, /* GENERALIO2 */
+-	3, /* GENERALIO3 */
+-	3, /* GENERALIO4 */
+-	3, /* GENERALIO5 */
+-	3, /* GENERALIO6 */
+-	3, /* GENERALIO7 */
+-	3, /* GENERALIO8 */
+	0, /* GENERALIO0 */
+	1, /* GENERALIO1 */
+	1, /* GENERALIO2 */
+	1, /* GENERALIO3 */
+	1, /* GENERALIO4 */
+	0, /* GENERALIO5 */
+	0, /* GENERALIO6 */
+	0, /* GENERALIO7 */
+	0, /* GENERALIO8 */
+ 	3, /* GENERALIO9 */
+ 	3, /* GENERALIO10 */
+ 	3, /* GENERALIO11 */
+ 	3, /* GENERALIO12 */
+-	2, /* GENERALIO13 */
+-	2, /* GENERALIO14 */
+-	3, /* GENERALIO15 */
+-	3, /* GENERALIO16 */
+-	2, /* GENERALIO17 */
+-	2, /* GENERALIO18 */
+	0, /* GENERALIO13 */
+	0, /* GENERALIO14 */
+	1, /* GENERALIO15 */
+	1, /* GENERALIO16 */
+	1, /* GENERALIO17 */
+	1, /* GENERALIO18 */
+ 	0, /* GENERALIO19 */
+ 	0, /* GENERALIO20 */
+ 	0, /* GENERALIO21 */
+diff --git a/board/altera/socfpga_cyclone5/pinmux_config.h b/board/altera/socfpga_cyclone5/pinmux_config.h
+index fb483ab..64c750a 100644
+--- a/board/altera/socfpga_cyclone5/pinmux_config.h
+++ b/board/altera/socfpga_cyclone5/pinmux_config.h
+@@ -11,15 +11,15 @@
+ #define CONFIG_HPS_UART0 (1)
+ #define CONFIG_HPS_UART1 (0)
+ #define CONFIG_HPS_TRACE (0)
+-#define CONFIG_HPS_I2C0 (1)
+-#define CONFIG_HPS_I2C1 (0)
+#define CONFIG_HPS_I2C0 (0)
+#define CONFIG_HPS_I2C1 (1)
+ #define CONFIG_HPS_I2C2 (0)
+ #define CONFIG_HPS_I2C3 (0)
+ #define CONFIG_HPS_SPIM0 (1)
+-#define CONFIG_HPS_SPIM1 (0)
+#define CONFIG_HPS_SPIM1 (1)
+ #define CONFIG_HPS_SPIS0 (0)
+ #define CONFIG_HPS_SPIS1 (0)
+-#define CONFIG_HPS_CAN0 (1)
+#define CONFIG_HPS_CAN0 (0)
+ #define CONFIG_HPS_CAN1 (0)
+ 
+ #define CONFIG_HPS_SDMMC_BUSWIDTH (4)
+diff --git a/board/altera/socfpga_cyclone5/sdram/sdram_config.h b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
+index b90d6f3..dd027ef 100755
+--- a/board/altera/socfpga_cyclone5/sdram/sdram_config.h
+++ b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
+@@ -4,16 +4,16 @@
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE			(2)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL			(8)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER		(0)
+-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(1)
+-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(1)
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(0)
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(0)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN		(1)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT		(10)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN			(0)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS			(0)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(6)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(8)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL			(0)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(7)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(4)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(11)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(3)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW			(12)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC			(104)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI		(3120)
+@@ -21,7 +21,7 @@
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP		(6)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR		(6)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR		(4)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(4)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(3)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS			(14)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC			(20)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD			(4)
+@@ -33,7 +33,7 @@
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS		(15)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS		(3)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS			(1)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(40)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(32)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH		(8)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN			(0)
+ #define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL			(2)
+diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
+index e8c5484..919676d 100644
+--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
+@@ -34,7 +34,7 @@
+ #define __RW_MGR_ac_read_en 0x21
+ #define __RW_MGR_ac_mrs3_mirr 0x0C
+ #define __RW_MGR_ac_mrs2 0x05
+-#define __RW_MGR_CONTENT_ac_mrs1 0x10090044
+#define __RW_MGR_CONTENT_ac_mrs1 0x10090006
+ #define __RW_MGR_CONTENT_ac_mrs3 0x100B0000
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata_wl_1 0x18980000
+ #define __RW_MGR_CONTENT_ac_act_1 0x106B0000
+@@ -46,8 +46,8 @@
+ #define __RW_MGR_CONTENT_ac_init_reset_0_cke_0 0x20700000
+ #define __RW_MGR_CONTENT_ac_read_bank_0_1_norden 0x10580008
+ #define __RW_MGR_CONTENT_ac_pre_all 0x10280400
+-#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080431
+-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080530
+#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080471
+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080570
+ #define __RW_MGR_CONTENT_ac_read_bank_0_0 0x13580000
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_1 0x1C980008
+ #define __RW_MGR_CONTENT_ac_read_bank_0_1 0x13580008
+@@ -55,21 +55,21 @@
+ #define __RW_MGR_CONTENT_ac_write_bank_1_col_1 0x1C9B0008
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_0 0x1C980000
+ #define __RW_MGR_CONTENT_ac_read_bank_1_0 0x135B0000
+-#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0024
+#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0006
+ #define __RW_MGR_CONTENT_ac_read_bank_1_1 0x135B0008
+ #define __RW_MGR_CONTENT_ac_des_odt_1 0x38780000
+-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804C8
+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804E8
+ #define __RW_MGR_CONTENT_ac_zqcl 0x10380400
+ #define __RW_MGR_CONTENT_ac_write_predata 0x38F80000
+-#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080449
+#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080469
+ #define __RW_MGR_CONTENT_ac_ref 0x10480000
+ #define __RW_MGR_CONTENT_ac_nop 0x30780000
+ #define __RW_MGR_CONTENT_ac_rdimm 0x10780000
+-#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090010
+#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090218
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata 0x18180000
+ #define __RW_MGR_CONTENT_ac_read_en 0x33780000
+ #define __RW_MGR_CONTENT_ac_mrs3_mirr 0x100B0000
+-#define __RW_MGR_CONTENT_ac_mrs2 0x100A0008
+#define __RW_MGR_CONTENT_ac_mrs2 0x100A0218
+ 
+ #define __RW_MGR_READ_B2B_WAIT2 0x6A
+ #define __RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x31
+diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
+index e16efa1..20b4ca1 100644
+--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
+@@ -6,16 +6,16 @@ const alt_u32 ac_rom_init[36] =
+ {
+ 	0x20700000,
+ 	0x20780000,
+-	0x10080431,
+-	0x10080530,
+-	0x10090044,
+-	0x100a0008,
+	0x10080471,
+	0x10080570,
+	0x10090006,
+	0x100a0218,
+ 	0x100b0000,
+ 	0x10380400,
+-	0x10080449,
+-	0x100804c8,
+-	0x100a0024,
+-	0x10090010,
+	0x10080469,
+	0x100804e8,
+	0x100a0006,
+	0x10090218,
+ 	0x100b0000,
+ 	0x30780000,
+ 	0x38780000,
+diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
+index 52faf3f..b85b85c 100644
+--- a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
+@@ -1,28 +1,28 @@
+ #ifndef _SEQUENCER_DEFINES_H_
+ #define _SEQUENCER_DEFINES_H_
+ 
+-#define AC_ROM_MR1_MIRR 0000000100100
+#define AC_ROM_MR1_MIRR 0000000000110
+ #define AC_ROM_MR1_OCD_ENABLE
+-#define AC_ROM_MR2_MIRR 0000000010000
+#define AC_ROM_MR2_MIRR 0001000011000
+ #define AC_ROM_MR3_MIRR 0000000000000
+ #define AC_ROM_MR0_CALIB
+-#define AC_ROM_MR0_DLL_RESET_MIRR 0010011001000
+-#define AC_ROM_MR0_DLL_RESET 0010100110000
+-#define AC_ROM_MR0_MIRR 0010001001001
+-#define AC_ROM_MR0 0010000110001
+-#define AC_ROM_MR1 0000001000100
+-#define AC_ROM_MR2 0000000001000
+#define AC_ROM_MR0_DLL_RESET_MIRR 0010011101000
+#define AC_ROM_MR0_DLL_RESET 0010101110000
+#define AC_ROM_MR0_MIRR 0010001101001
+#define AC_ROM_MR0 0010001110001
+#define AC_ROM_MR1 0000000000110
+#define AC_ROM_MR2 0001000011000
+ #define AC_ROM_MR3 0000000000000
+ #define AFI_CLK_FREQ 401
+ #define AFI_RATE_RATIO 1
+ #define ARRIAVGZ 0
+ #define ARRIAV 0
+-#define AVL_CLK_FREQ 67
+#define AVL_CLK_FREQ 81
+ #define BFM_MODE 0
+ #define BURST2 0
+ #define CALIBRATE_BIT_SLIPS 0
+-#define CALIB_LFIFO_OFFSET 7
+-#define CALIB_VFIFO_OFFSET 5
+#define CALIB_LFIFO_OFFSET 11
+#define CALIB_VFIFO_OFFSET 9
+ #define CYCLONEV 1
+ #define DDR2 0
+ #define DDR3 1
+@@ -89,20 +89,20 @@
+ #define RW_MGR_MEM_CHIP_SELECT_WIDTH 1
+ #define RW_MGR_MEM_CLK_EN_WIDTH 1
+ #define RW_MGR_MEM_CONTROL_WIDTH 1
+-#define RW_MGR_MEM_DATA_MASK_WIDTH 5
+-#define RW_MGR_MEM_DATA_WIDTH 40
+#define RW_MGR_MEM_DATA_MASK_WIDTH 4
+#define RW_MGR_MEM_DATA_WIDTH 32
+ #define RW_MGR_MEM_DQ_PER_READ_DQS 8
+ #define RW_MGR_MEM_DQ_PER_WRITE_DQS 8
+-#define RW_MGR_MEM_IF_READ_DQS_WIDTH 5
+-#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 5
+#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4
+#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4
+ #define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
+ #define RW_MGR_MEM_NUMBER_OF_RANKS 1
+ #define RW_MGR_MEM_ODT_WIDTH 1
+ #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
+ #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1
+ #define RW_MGR_MR0_BL 1
+-#define RW_MGR_MR0_CAS_LATENCY 3
+-#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 5
+#define RW_MGR_MR0_CAS_LATENCY 7
+#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4
+ #define RW_MGR_WRITE_TO_DEBUG_READ 1.0
+ #define SKEW_CALIBRATION 0
+ #define STATIC_FULL_CALIBRATION 1
+-- 
+1.9.0
+
--- a/board/altera/socrates_cyclone5/boot-env.txt
+++ b/board/altera/socrates_cyclone5/boot-env.txt
@@ -1,8 +0,0 @@
-linux_load_address=0x100000
-linux_dtb_load_address=0x100
-linux_dtb=socfpga_cyclone5_socrates.dtb
-linux_load=mmc rescan; fatload mmc 0:1 ${linux_load_address} zImage; fatload mmc 0:1 ${linux_dtb_load_address} ${linux_dtb}
-bootargs=console=ttyS0,115200 root=/dev/mmcblk0p3 ro rootwait
-source_env=fatload mmc 0:1 0x2000000 boot.scr; source 0x2000000
-bootcmd=run linux_load; bootz ${linux_load_address} - ${linux_dtb_load_address}
-bootdelay=1
--- a/board/altera/socrates_cyclone5/genimage.cfg
+++ b/board/altera/socrates_cyclone5/genimage.cfg
@@ -1,59 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"socfpga_cyclone5_socrates.dtb"
-		}
-	}
-
-	size = 8M
-}
-
-image uboot.img {
-	hdimage {
-		partition-table = "no"
-	}
-
-	partition spl {
-		in-partition-table = "no"
-		image = "u-boot-spl.bin.crc"
-		offset = 0
-		size = 64K
-	}
-
-	partition uboot-full {
-		in-partition-table = "no"
-		image = "u-boot.img"
-		offset = 256K
-	}
-
-	size = 1M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition uboot-env {
-		in-partition-table = "no"
-		image = "uboot-env.bin"
-		offset = 17K # 512 * 34 -> just after gpt
-	}
-
-	partition boot {
-		partition-type = 0xc
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition uboot {
-		partition-type = 0xa2
-		image = "uboot.img"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext2"
-		size = 500M
-	}
-}
--- a/board/altera/socrates_cyclone5/readme.txt
+++ b/board/altera/socrates_cyclone5/readme.txt
@@ -1,52 +0,0 @@
-EBV SoCrates Evaluation Board
-
-Intro
-=====
-
-More information about this board can be found here:
-https://rocketboards.org/foswiki/Documentation/EBVSoCratesEvaluationBoard
-
-Build
-=====
-
-First, load socrates config for buildroot
-
-    make socrates_cyclone5_defconfig
-
-Build everything
-
-    make
-
-Following files will be generated in output/images
-
-.
-├── boot.vfat
-├── rootfs.ext2
-├── rootfs.ext4 -> rootfs.ext2
-├── rootfs.tar
-├── sdcard.img
-├── socfpga_cyclone5_socrates.dtb
-├── u-boot-spl.bin
-├── u-boot-spl.bin.crc
-├── u-boot.bin
-├── u-boot.img
-├── uboot-env.bin
-├── uboot.img
-└── zImage
-
-
-Creating bootable SD card
-=========================
-
-Simply invoke
-
-dd if=output/images/sdcard.img of=/dev/sdX
-
-Where X is your SD card device (not partition)
-
-Booting
-=======
-
-Pins 6:8 on P18 selector is used to determine boot device. To boot socrates from
-sdcard set these pins to value 0x5 (101b). Remaining pins are used to determine
-how to configure FPGA and are not associated with booting into Linux kernel.
--- a/board/amarula/vyasa/extlinux.conf
+++ b/board/amarula/vyasa/extlinux.conf
@@ -1,4 +0,0 @@
-label Vyasa linux-next
-  kernel /boot/uImage
-  devicetree /boot/rk3288-vyasa.dtb
-  append console=ttyS2,115200n8 root=/dev/mmcblk0p1 rootwait
--- a/board/amarula/vyasa/genimage.cfg
+++ b/board/amarula/vyasa/genimage.cfg
@@ -1,22 +0,0 @@
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot-tpl-spl-dtb {
-		in-partition-table = "no"
-		image = "u-boot-tpl-spl-dtb.img"
-		offset = 32K
-	}
-
-	partition u-boot-dtb {
-		in-partition-table = "no"
-		image = "u-boot-dtb.img"
-		offset = 8M
-		size = 30M # falcon mode: args @ 16M args, uImage @ 17M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-	}
-}
--- a/board/amarula/vyasa/linux_gmac.fragment
+++ b/board/amarula/vyasa/linux_gmac.fragment
@@ -1,3 +0,0 @@
-# Currently mainline kernel exhibits issues when running rockchip gmac
-# on the board, so enable it as loadable module and insert it later
-CONFIG_DWMAC_ROCKCHIP=m
--- a/board/amarula/vyasa/post-build.sh
+++ b/board/amarula/vyasa/post-build.sh
@@ -1,9 +0,0 @@
-#!/bin/sh
-
-MKIMAGE=$HOST_DIR/bin/mkimage
-BOARD_DIR="$(dirname $0)"
-
-$MKIMAGE -n rk3288 -T rksd -d $BINARIES_DIR/u-boot-tpl.bin $BINARIES_DIR/u-boot-tpl.img
-cat $BINARIES_DIR/u-boot-tpl.img $BINARIES_DIR/u-boot-spl-dtb.bin > $BINARIES_DIR/u-boot-tpl-spl-dtb.img
-
-install -m 0644 -D $BOARD_DIR/extlinux.conf $TARGET_DIR/boot/extlinux/extlinux.conf
--- a/board/amarula/vyasa/readme.txt
+++ b/board/amarula/vyasa/readme.txt
@@ -1,31 +0,0 @@
-Vyasa RK3288
-============
-
-Vyasa is RK3288 based Single board computer with fully supported opensource software.
-
-https://openedev.amarulasolutions.com/display/ODWIKI/Vyasa+RK3288
-
-How to build it
-===============
-
-  $ make amarula_vyasa_rk3288_defconfig
-
-Then you can edit the build options using
-
-  $ make menuconfig
-
-Compile all and build rootfs image:
-
-  $ make
-
-Prepare your SDCard
-===================
-
-Buildroot generates a ready-to-use SD card image that you can flash directly to
-the card. The image will be in output/images/sdcard.img.
-You can write this image directly to an SD card device (i.e. /dev/xxx):
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/xxx
-  $ sudo sync
-
-Finally, you can insert the SD card to the Vyasa RK3288 board, close J4 and boot it.
--- a/board/andes/ae350/genimage_sdcard.cfg
+++ b/board/andes/ae350/genimage_sdcard.cfg
@@ -1,26 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"u-boot-spl.bin",
-			"u-boot.itb",
-			"ae350_ax45mp.dtb",
-		}
-	}
-	size = 2M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		bootable = true
-		image = "rootfs.ext4"
-	}
-}
--- a/board/andes/ae350/patches/uboot/0001-mmc-ftsdc010_mci-Support-DTS-of-ftsdc010-driver-for-.patch
+++ b/board/andes/ae350/patches/uboot/0001-mmc-ftsdc010_mci-Support-DTS-of-ftsdc010-driver-for-.patch
@@ -1,38 +0,0 @@
-From 16aad5594e08550295ea3c12c1c9ed6f64774748 Mon Sep 17 00:00:00 2001
-From: Rick Chen <rick@andestech.com>
-Date: Tue, 29 Mar 2022 13:41:10 +0800
-Subject: [PATCH] mmc: ftsdc010_mci: Support DTS of ftsdc010 driver for
- generic dma
-
-The ftsdc010 driver has been implemented for generic dma in Linux
-kernel. And its compatible is andestech,atfsdc010g to distinguish
-the legacy andestech,atfsdc010 which is not for generic dma.
-
-Althought the ftsdc010_mci driver in U-Boot does not use dma, but
-it still can work well with the mmc node for generic dma. So add
-the compatible string to support it.
-
-Signed-off-by: Rick Chen <rick@andestech.com>
-
-Upstream-Status: Pending
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
- drivers/mmc/ftsdc010_mci.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
-index 570d54cf9d..65b1d447a8 100644
--- a/drivers/mmc/ftsdc010_mci.c
-+++ b/drivers/mmc/ftsdc010_mci.c
-@@ -460,6 +460,7 @@ int ftsdc010_mmc_bind(struct udevice *dev)
- 
- static const struct udevice_id ftsdc010_mmc_ids[] = {
- 	{ .compatible = "andestech,atfsdc010" },
-+	{ .compatible = "andestech,atfsdc010g" },
- 	{ }
- };
- 
-- 
-2.34.1
-
--- a/board/andes/ae350/patches/uboot/0002-spl-Align-device-tree-blob-address-at-8-byte-boundar.patch
+++ b/board/andes/ae350/patches/uboot/0002-spl-Align-device-tree-blob-address-at-8-byte-boundar.patch
@@ -1,42 +0,0 @@
-From 933ad8a59f7fd9b2088badc3e97167d750a40b5a Mon Sep 17 00:00:00 2001
-From: Bin Meng <bmeng.cn@gmail.com>
-Date: Mon, 12 Jul 2021 11:52:31 +0800
-Subject: [PATCH] spl: Align device tree blob address at 8-byte boundary
-
-Since libfdt v1.6.1, a new requirement on the device tree address via:
-
-  commit 5e735860c478 ("libfdt: Check for 8-byte address alignment in fdt_ro_probe_()")
-
-must be met that the device tree must be loaded in to memory at an
-8-byte aligned address.
-
-Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
-
-This patch was imported from U-boot patchwork:
-https://patchwork.ozlabs.org/project/uboot/patch/20210712035231.26475-1-bmeng.cn@gmail.com/
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
- common/spl/spl_fit.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
-index a35be529..a76ad14a 100644
--- a/common/spl/spl_fit.c
-+++ b/common/spl/spl_fit.c
-@@ -382,6 +382,12 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
- 	 */
- 	image_info.load_addr = spl_image->load_addr + spl_image->size;
- 
-+	/*
-+	 * Since libfdt v1.6.1, the device tree must be loaded in to memory
-+	 * at an 8-byte aligned address.
-+	 */
-+	image_info.load_addr = roundup(image_info.load_addr, 8);
-+
- 	/* Figure out which device tree the board wants to use */
- 	node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index++);
- 	if (node < 0) {
-- 
-2.34.1
-
--- a/board/andes/ae350/post-build.sh
+++ b/board/andes/ae350/post-build.sh
@@ -1,3 +0,0 @@
-#!/bin/sh
-cp $BINARIES_DIR/Image $TARGET_DIR/boot
-cp $BINARIES_DIR/ae350_ax45mp.dtb $TARGET_DIR/boot
--- a/board/andes/ae350/readme.txt
+++ b/board/andes/ae350/readme.txt
@@ -1,63 +0,0 @@
-Intro
-=====
-
-Andestech AE350 Platform
-
-The AE350 prototype demonstrates the AE350 platform on the FPGA.
-
-How to build it
-===============
-
-Configure Buildroot
-------------------
-
-  $ make andes_ae350_45_defconfig
-
-If you want to customize your configuration:
-
-  $ make menuconfig
-
-Build everything
----------------
-Note: you will need to access to the network, since Buildroot will
-download the packages' sources.
-
-  $ make
-
-Result of the build
-------------------
-
-After building, you should obtain the following files:
-
-  output/images/
-  |-- ae350_ax45mp.dtb
-  |-- boot.vfat
-  |-- fw_dynamic.bin
-  |-- fw_dynamic.elf
-  |-- Image
-  |-- rootfs.ext2
-  |-- rootfs.ext4 -> rootfs.ext2
-  |-- sdcard.img
-  |-- u-boot-spl.bin
-  `-- u-boot.itb
-
-Copy the sdcard.img to a SD card with "dd":
-
-  $ sudo dd if=sdcard.img of=/dev/sdX bs=4096
-  $ sudo sync
-
-Your SD card partition should be:
-
-  Disk /dev/sdb: 14.48 GiB, 15552479232 bytes, 30375936 sectors
-  Disk model: Multi-Card
-  Units: sectors of 1 * 512 = 512 bytes
-  Sector size (logical/physical): 512 bytes / 512 bytes
-  I/O size (minimum/optimal): 512 bytes / 512 bytes
-  Disklabel type: dos
-  Disk identifier: 0x00000000
-
-  Device     Boot Start    End Sectors Size Id Type
-  /dev/sdb1           1   4096    4096   2M  c W95 FAT32 (LBA)
-  /dev/sdb2  *     4097 126976  122880  60M 83 Linux
-
-Insert SD card and reset the board, it should boot Linux from mmc.
--- a/board/andes/ae350/rootfs_overlay/boot/extlinux/extlinux.conf
+++ b/board/andes/ae350/rootfs_overlay/boot/extlinux/extlinux.conf
@@ -1,4 +0,0 @@
-label linux
-   kernel /boot/Image
-   fdt /boot/ae350_ax45mp.dtb
-   append earlycon=sbi root=/dev/mmcblk0p2 rootwait
--- a/board/andes/ae350/uboot.config.fragment
+++ b/board/andes/ae350/uboot.config.fragment
@@ -1,7 +0,0 @@
-CONFIG_SPL_FS_FAT=y
-CONFIG_SPL_MMC=y
-# CONFIG_SPL_RAM_SUPPORT is not set
-CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
-CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
-CONFIG_DISPLAY_CPUINFO=y
-CONFIG_DISPLAY_BOARDINFO=y
--- a/board/arcturus/aarch64-ucls1012a/post-build.sh
+++ b/board/arcturus/aarch64-ucls1012a/post-build.sh
@@ -1,4 +0,0 @@
-#!/bin/sh
-
-mkdir -p ${TARGET_DIR}/lib/firmware
-cp -f ${BUILD_DIR}/linux-custom/br2-ucls1012a.its ${BINARIES_DIR}/
--- a/board/arcturus/aarch64-ucls1012a/post-image.sh
+++ b/board/arcturus/aarch64-ucls1012a/post-image.sh
@@ -1,6 +0,0 @@
-#!/bin/sh
-
-MKIMAGE=${HOST_DIR}/usr/bin/mkimage
-MKIMAGE_IN=${BINARIES_DIR}/br2-ucls1012a.its
-MKIMAGE_OUT=${BINARIES_DIR}/part0-000000.itb
-${MKIMAGE} -f ${MKIMAGE_IN} ${MKIMAGE_OUT}
--- a/board/arcturus/aarch64-ucls1012a/readme.txt
+++ b/board/arcturus/aarch64-ucls1012a/readme.txt
@@ -1,74 +0,0 @@
-Arcturus uCLS1012A SoM
-======================
-
-This tutorial describes how to use the predefined Buildroot
-configuration for the Arcturus uCLS101A SoM platform.
-
-Additional information about the uCLS1012A System on Module can be found at
-https://www.arcturusnetworks.com/products/ucls1012a
-and product support for registered users at
-https://www.arcturusnetworks.com/support
-
-Building
--------
-
-Return to the top directory <buildrootdir> and execute the following commands.
-
-  make arcturus_ucls1012a_defconfig
-  make
-
-Result of the build
-------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- arc-ucls1012a.dtb
-    +-- Image.gz
-    +-- part0-000000.itb
-    +-- rootfs.cpio
-    +-- rootfs.cpio.gz
-    +-- rootfs.tar
-    +-- u-boot.bin
-    +-- br2-ucls1012a.its
-
-Flashing
--------
-
-You'll need to program the image created by buildroot into the SPI NOR flash.
-
-1. Reboot your module and via the serial console press <escape> to enter the B$
-u-boot shell.
-   From the shell you will need to update four environment variables replacing the
-   IPv4 IP Address with ones that will work with your network and tftp server.
-
-   B$ setenv ipaddr 192.168.1.81
-   B$ setenv serverip 192.168.1.80
-   B$ setenv gatewayip 192.168.1.1
-   B$ setenv netmask 255.255.255.0
-   B$ saveenv
-
-2. Enable tftp server to serve the <buildrootdir>/output/images/ folder.
-
-3. Program the new U-Boot binary (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    B$ tftp u-boot.bin
-    B$ run program_uboot
-
-4. Program the ITB image (includes Kernel, DTB and Ramdisk)
-
-    B$ tftp part0-000000.itb
-    B$ run iprogram
-
-5. Booting your new system
-
-    Reboot your system by reset command
-    B$ reset
-
-        or
-
-    B$ run bootcmd
-
-Good Luck !
--- a/board/arcturus/ppc-ucp1020/readme.txt
+++ b/board/arcturus/ppc-ucp1020/readme.txt
@@ -1,74 +0,0 @@
-Arcturus uCP1020 SoM
-====================
-
-This tutorial describes how to use the predefined Buildroot
-configuration for the Arcturus uCP1020 SoM platform.
-
-Additional information about this module can be found at
-<www.arcturusnetworks.com/products/ucp1020>
-
-Building
--------
-
-  make arcturus_ucp1020_defconfig
-  make
-
-Result of the build
-------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.jffs2
-    +-- rootfs.tar
-    +-- u-boot.bin
-    +-- ucp1020.dtb
-    +-- uImage
-
-Flashing
--------
-
-You'll need to program the files created by buildroot into the NOR flash.
-
-1. Program the new U-Boot binary (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    B$ tftp u-boot.bin
-    B$ protect off 0xeff80000 +$filesize
-    B$ erase 0xeff80000 +$filesize
-    B$ cp.b $loadaddr 0xeff80000 $filesize
-    B$ protect on 0xeff80000 +$filesize
-
-2. Program the kernel
-
-    B$ tftp uImage
-    B$ erase 0xec140000 +$filesize
-    B$ cp.b $loadaddr 0xec140000 $filesize
-
-3. Program the DTB
-
-    B$ tftp ucp1020.dtb
-    B$ erase 0xec100000 +$filesize
-    B$ cp.b $loadaddr 0xec100000 $filesize
-
-4. Program the jffs2 root filesystem
-
-    B$ tftp rootfs.jffs2
-    B$ erase 0xec800000 0xee8fffff
-    B$ cp.b $loadaddr 0xec800000 $filesize
-
-5. Booting your new system
-
-    B$ setenv norboot 'setenv bootargs root=/dev/mtdblock1 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xec140000 - 0xec100000'
-
-    If you want to set this boot option as default:
-
-    B$ setenv bootcmd 'run norboot'
-    B$ saveenv
-
-    ...or for a single boot:
-
-    B$ run norboot
-
-Good Luck !
--- a/board/arm/foundation-v8/readme.txt
+++ b/board/arm/foundation-v8/readme.txt
@@ -3,18 +3,17 @@ ARM software simulator of the AArch64 architecture.

 First, one has to download the AArch64 software simulator from:

-  https://armkeil.blob.core.windows.net/developer/Files/downloads/ecosystem-models/Foundation_Platform_11.20_15_Linux64.tgz
+  https://silver.arm.com/download/download.tm?pv=2482590

 Then, use the arm_foundationv8_defconfig configuration to build your
 Buildroot system.

 Finally, boot your system with:

- ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-9.3/Foundation_Platform \
+ ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-4.1/Foundation_Platform \
    --image output/images/linux-system.axf \
    --block-device output/images/rootfs.ext2 \
-    --network=nat \
-    --cores 4
+    --network=nat

 You can get network access from within the simulated environment
 by requesting an IP address using DHCP (run the command 'udhcpc').
--- a/board/armadeus/apf27/linux-3.18.config
+++ b/board/armadeus/apf27/linux-3.18.config
@@ -0,0 +1,224 @@
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_CGROUPS=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MXC=y
+CONFIG_MACH_IMX27_DT=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_PM_DEBUG=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_MCP251X=m
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+# CONFIG_MTD_CFI_I2 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_UBI=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_SMSC_PHY=y
+CONFIG_RTL8187=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RTL8192CU=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=m
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_W1=y
+CONFIG_W1_MASTER_MXC=y
+CONFIG_W1_SLAVE_THERM=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_PWC=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=m
+CONFIG_VIDEO_MX2=m
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+# CONFIG_DVB_AU8522_V4L is not set
+# CONFIG_DVB_TUNER_DIB0070 is not set
+# CONFIG_DVB_TUNER_DIB0090 is not set
+CONFIG_FB=y
+# CONFIG_FB_MX3 is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=m
+CONFIG_SND=m
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_IMX_SOC=m
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_DEBUG=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_HID=m
+CONFIG_MMC=y
+CONFIG_MMC_MXC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1374=y
+CONFIG_RTC_DRV_MXC=m
+CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
+CONFIG_IMX_DMA=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_IIO=y
+CONFIG_MAX1027=y
+CONFIG_MAX5821=y
+CONFIG_PWM=y
+CONFIG_PWM_IMX=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=m
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
--- a/board/armadeus/apf27/linux-4.12.config
+++ b/board/armadeus/apf27/linux-4.12.config
@@ -1,216 +0,0 @@
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MACH_IMX27_DT=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_CAN=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-CONFIG_SMSC_PHY=y
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT2500USB=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RTL8187=m
-CONFIG_RTL8192CU=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_IMX=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_W1=y
-CONFIG_W1_MASTER_MXC=y
-CONFIG_W1_SLAVE_THERM=y
-CONFIG_WATCHDOG=y
-CONFIG_IMX2_WDT=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_USB_PWC=m
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_SOC_CAMERA=m
-# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-CONFIG_FB=y
-# CONFIG_FB_MX3 is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_MXC=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_LEDS_TRIGGER_TRANSIENT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1374=y
-CONFIG_RTC_DRV_MXC=m
-CONFIG_DMADEVICES=y
-CONFIG_IMX_DMA=y
-CONFIG_IMX_SDMA=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_IIO=y
-CONFIG_MAX1027=y
-CONFIG_MAX5821=y
-CONFIG_PWM=y
-CONFIG_PWM_IMX=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=m
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
--- a/board/armadeus/apf28/linux-3.12.config
+++ b/board/armadeus/apf28/linux-3.12.config
@@ -0,0 +1,185 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MXS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_IDLE=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_FLEXCAN=m
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RC_PID=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER=m
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
+# CONFIG_M25PXX_USE_FAST_READ is not set
+CONFIG_MTD_SST25L=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+CONFIG_RTL8187=m
+CONFIG_RT2X00=m
+CONFIG_RT73USB=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=m
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_MXS_AUART=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MXS=y
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_MXS=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_HWMON=m
+CONFIG_WATCHDOG=y
+CONFIG_STMP3XXX_RTC_WATCHDOG=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_FB=y
+CONFIG_FB_MXS=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_MXS_PHY=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_ETH=m
+CONFIG_MMC=y
+CONFIG_MMC_MXS=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_STMP=y
+CONFIG_DMADEVICES=y
+CONFIG_MXS_DMA=y
+CONFIG_STAGING=y
+CONFIG_MXS_LRADC=y
+CONFIG_IIO=y
+CONFIG_PWM=y
+CONFIG_PWM_MXS=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_FS=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
--- a/board/armadeus/apf51/linux-3.12.config
+++ b/board/armadeus/apf51/linux-3.12.config
@@ -0,0 +1,266 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_MXC=y
+CONFIG_MXC_IRQ_PRIOR=y
+CONFIG_MACH_IMX51_DT=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_IMX=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_MCP251X=m
+CONFIG_BT=m
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RC_PID=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER=m
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_UBI=y
+CONFIG_MISC_DEVICES=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_SMSC_PHY=y
+CONFIG_NET_ETHERNET=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_RTL8187=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_RT2X00=m
+CONFIG_RT73USB=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_IMX=m
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_WM831X=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=m
+CONFIG_INPUT_WM831X_ON=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_WM831X=m
+CONFIG_POWER_SUPPLY=m
+CONFIG_WM831X_BACKUP=m
+CONFIG_WM831X_POWER=m
+CONFIG_HWMON=m
+CONFIG_SENSORS_AS1531=m
+CONFIG_SENSORS_WM831X=m
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WM831X_WATCHDOG=m
+CONFIG_IMX2_WDT=y
+CONFIG_MFD_WM831X_I2C=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MFD_IMX_IPU_V3=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_VIDEO_DEV=m
+# CONFIG_RC_CORE is not set
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+CONFIG_VIDEO_VIVI=m
+CONFIG_USB_VIDEO_CLASS=m
+# CONFIG_RADIO_ADAPTERS is not set
+CONFIG_FB=y
+CONFIG_FB_MX5=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
+CONFIG_SND=m
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_IMX_SOC=m
+CONFIG_SND_SOC_APF51_DEV_WM8960=m
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_WHITELIST is not set
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_PHY=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_GPIO_VBUS=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_DEBUG_FS=y
+CONFIG_USB_ETH=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_G_HID=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_MMC_SPI=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_WM831X_STATUS=m
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_MXC=y
+CONFIG_RTC_DRV_WM831X=y
+CONFIG_STAGING=y
+CONFIG_IIO=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_CMODE_NONE=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_FS=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
--- a/board/armadeus/apf51/linux-4.4.config
+++ b/board/armadeus/apf51/linux-4.4.config
@@ -1,278 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MXC_IRQ_PRIOR=y
-CONFIG_SOC_IMX51=y
-CONFIG_ARM_THUMBEE=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_IMX=y
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_SUSPEND is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_MISC_DEVICES=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_RTL8187=m
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=m
-CONFIG_KEYBOARD_IMX=m
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_WM831X=y
-CONFIG_TOUCHSCREEN_MC13XXX=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_MC13783_PWRBUTTON=m
-CONFIG_INPUT_UINPUT=m
-CONFIG_INPUT_WM831X_ON=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_WM831X=m
-CONFIG_POWER_SUPPLY=y
-CONFIG_WM831X_BACKUP=m
-CONFIG_WM831X_POWER=m
-CONFIG_HWMON=m
-CONFIG_SENSORS_AS1531=m
-CONFIG_SENSORS_MC13783_ADC=m
-CONFIG_SENSORS_WM831X=m
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WM831X_WATCHDOG=m
-CONFIG_IMX2_WDT=y
-CONFIG_MFD_MC13XXX_I2C=y
-CONFIG_MFD_WM831X_I2C=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_MC13892=m
-CONFIG_IMX_IPUV3_CORE=y
-CONFIG_DRM=y
-CONFIG_MFD_IMX_IPU_V3=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_VIDEO_DEV=m
-# CONFIG_RC_CORE is not set
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5761 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_XC2028 is not set
-# CONFIG_MEDIA_TUNER_XC5000 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_MEDIA_TUNER_MAX2165 is not set
-# CONFIG_MEDIA_TUNER_TDA18218 is not set
-CONFIG_VIDEO_VIVI=m
-CONFIG_USB_VIDEO_CLASS=m
-# CONFIG_RADIO_ADAPTERS is not set
-CONFIG_FB=y
-CONFIG_FB_MX5=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_SND_SOC_APF51_DEV_WM8960=m
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_OTG=y
-# CONFIG_USB_OTG_WHITELIST is not set
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_PHY=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_GPIO_VBUS=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ETH=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_MMC_SPI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_WM831X_STATUS=m
-CONFIG_LEDS_MC13783=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_MXC=y
-CONFIG_RTC_DRV_WM831X=y
-CONFIG_RTC_DRV_MC13XXX=m
-CONFIG_STAGING=y
-CONFIG_DRM_IMX=y
-CONFIG_DRM_IMX_FB_HELPER=y
-CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
-CONFIG_DRM_IMX_TVE=y
-CONFIG_DRM_IMX_IPUV3=y
-CONFIG_IIO=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_EXT4_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
--- a/board/armadeus/readme.txt
+++ b/board/armadeus/readme.txt
@@ -1,84 +0,0 @@
-Introduction
-============
-
-Armadeus APFxx are Systems On Module (SOM) based on Freescale/NXP i.MX
-processors associated with an FPGA (except on APF28). Non volatile
-data are stored in on-module NOR or NAND Flash, depending on the
-model. These SOM can be used on Armadeus development boards or with
-custom docking boards.
-
-Supported platforms
-===================
-
-Buildroot currently supports the following Armadeus platforms with the
-associated defconfigs:
-
- * APF27 SOM + devt board    -> armadeus_apf27_defconfig
- * APF51 SOM + devt board    -> armadeus_apf51_defconfig
- * APF28 SOM + devt board    -> armadeus_apf28_defconfig
-
-Vanilla Linux versions are preferred to Freescale's one in these
-configurations.
-
-How to build it
-===============
-
-Configure Buildroot
-------------------
-
-Let's say you own an APFxx SOM with it's corresponding development
-board, all you have to do is:
-
-  $ make armadeus_apfxx_defconfig
-
-where "apfxx" is the version of your SOM.
-
-Launch build
------------
-
-  $ make
-
-Result of the build
-------------------
-
-When the build is finished, you will end up with:
-
-    output/images/
-    +-- imx**-apfxxdev.dtb	[1]
-    +-- rootfs.tar
-    +-- rootfs.ubi
-    +-- rootfs.ubifs
-    +-- uImage
-
-[1] Only if the kernel version used uses a Device Tree.
-
-Building U-Boot is currently not supported in these configurations.
-
-Installation
-============
-
-You will require a serial connection to the board and a TFTP server on
-your Host PC. Assuming your server is configured for exporting
-/tftpboot/ directory, you will have to copy the generated images to
-it:
-
-  $ cp output/images/uImage /tftpboot/apfxx-linux.bin
-  $ cp output/images/*.dtb /tftpboot/
-  $ cp output/images/rootfs.ubi /tftpboot/apfxx-rootfs.ubi
-
-where "apfxx" is the version of your SOM, as used with _defconfigs.
-
-Then on your serial terminal, all you have to do is:
-
-* interrupt the boot process and access U-Boot console by pressing any
-  key when booting,
-* configure board and server IP addresses with "ipaddr" and "serverip"
-  environment variables,
-* if you want to update kernel:
-  BIOS > run update_kernel
-* if you want to update device tree:
-  BIOS > run update_dtb
-* if you want to update rootfs:
-  BIOS > run update_rootfs
-
-That's it !
--- a/board/arrow/avenger96/overlay/boot/extlinux/extlinux.conf
+++ b/board/arrow/avenger96/overlay/boot/extlinux/extlinux.conf
@@ -1,4 +0,0 @@
-label stm32mp157c-dk2-buildroot
-  kernel /boot/zImage
-  devicetree /boot/stm32mp157a-dhcor-avenger96.dtb
-  append root=/dev/mmcblk1p4 rootwait
--- a/board/arrow/avenger96/patches/arm-trusted-firmware/0001-stm32mp157a-avenger96.dts-enable-hash-device-to-unbr.patch
+++ b/board/arrow/avenger96/patches/arm-trusted-firmware/0001-stm32mp157a-avenger96.dts-enable-hash-device-to-unbr.patch
@@ -1,51 +0,0 @@
-From 336dc301e02d64507447f82020ce7a349797bef3 Mon Sep 17 00:00:00 2001
-From: Peter Korsgaard <peter@korsgaard.com>
-Date: Sun, 5 Nov 2023 14:59:16 +0100
-Subject: [PATCH] stm32mp157a-avenger96.dts: enable hash device to unbreak boot
- issue
-
-The avenger96 board was forgotten when authentication support was added with
-commit 4bdb1a7a6a1325343 (stm32mp1: add authentication support for
-stm32image), causing a panic when stm32mp_init_auth() is called, so fix it
-similar to how it was done for the STM32MP157C-ED1 board with:
-
-commit b37b52ef8bc05bfd8dcca992d4ba84cd7c5d23bb
-Author: Yann Gautier <yann.gautier@st.com>
-Date:   Tue Oct 13 18:05:06 2020 +0200
-
-    fdts: add missing hash node in STM32MP157C-ED1 board DT
-
-    Without this node, the board fails to boot and panics in the function
-    stm32mp_init_auth().
-
-    Change-Id: Ia54924410dac2a8c94dd6e45d7e93977fe7d87e2
-    Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
-Upstream: N/A - Upstream reworked authentication to skip it for MP157A
- variant since v2.7, see "feat(st): disable authentication based on
- part_number"
- (https://github.com/ARM-software/arm-trusted-firmware/commit/49abdfd8cececb91a4bc7e7b29a30c09dce461c7)
-
-Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
---
- fdts/stm32mp157a-avenger96.dts | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/fdts/stm32mp157a-avenger96.dts b/fdts/stm32mp157a-avenger96.dts
-index b967736e4..76edecb83 100644
--- a/fdts/stm32mp157a-avenger96.dts
-+++ b/fdts/stm32mp157a-avenger96.dts
-@@ -271,6 +271,10 @@
- 	};
- };
- 
-+&hash1 {
-+	status = "okay";
-+};
-+
- &rng1 {
- 	status = "okay";
- };
-- 
-2.39.2
-
--- a/board/arrow/avenger96/readme.txt
+++ b/board/arrow/avenger96/readme.txt
@@ -1,41 +0,0 @@
-Arrow Avenger96
-
-Intro
-=====
-
-This configuration supports the Arrow Avenger96 board:
-
-https://wiki.dh-electronics.com/index.php/Avenger96
-
-How to build
-============
-
- $ make avenger96_defconfig
- $ make
-
-How to write the microSD card
-=============================
-
-WARNING! This will destroy all the card content. Use with care!
-
-Once the build process is finished you will have an image called
-"sdcard.img" in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an microSD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Boot the board
-==============
-
- (1) Configure the boot switches for boot from microsd: 1-0-1
-
- (2) Insert the microSD card in the slot
-
- (3) Plug a serial adapter (beware: 1v8 levels!) to the low speed
-     expansion connector
-
- (4) Plug in power cable
-
- (5) The system will start, with the console on UART, but also visible
-     on the screen.
--- a/board/aspeed/ast2500-evb/genimage.cfg
+++ b/board/aspeed/ast2500-evb/genimage.cfg
@@ -1,40 +0,0 @@
-#
-# This config reproduces the OpenBMC flash layout defined in Linux :
-#
-#    arch/arm/boot/dts/openbmc-flash-layout.dtsi
-#
-# and included by aspeed-ast2500-evb.dts
-#
-flash nor-32M-256 {
-	pebsize = 4K
-	numpebs = 8K
-	minimum-io-unit-size = 256
-}
-
-image flash.img {
-	flash {
-	}
-	flashtype = "nor-32M-256"
-
-	partition uboot {
-		image = "u-boot.bin"
-		size = 384K
-	}
-
-	partition ubootenv {
-		/* TODO */
-		offset = 384K
-		size = 128K
-	}
-
-	partition fitimage {
-		image = "image.itb"
-		offset = 512K
-		size = 4352K
-	}
-
-	partition spare {
-		offset = 4864K
-		size = 27904K
-	}
-}
--- a/board/aspeed/ast2500-evb/linux.fragment
+++ b/board/aspeed/ast2500-evb/linux.fragment
@@ -1,7 +0,0 @@
-CONFIG_KERNEL_XZ=y
-CONFIG_ARCH_MULTI_V7=n
-CONFIG_MACH_ASPEED_G6=n
-CONFIG_SMP=n
-CONFIG_EXT4_FS=n
-CONFIG_DEBUG_FS=n
-CONFIG_SUSPEND=n
--- a/board/aspeed/ast2500-evb/readme.txt
+++ b/board/aspeed/ast2500-evb/readme.txt
@@ -1,80 +0,0 @@
-Aspeed AST2500 EVB
-
-Introduction
-============
-
-The AST2500 EVB is an evaluation board for the AST2500 SoC, most
-commonly used as a Server Management Processor. It includes an 800MHz
-ARM11 processor with DDR3 or DDR4 SDRAM (up to 1GB), SPI flash memory
-devices for BMC and host firmwares and numerous controllers to drive
-the server board.
-
-  https://www.aspeedtech.com/server_ast2500/
-
-How to build it
-===============
-
-Configure buildroot:
-
-  $ make aspeed_ast2500evb_defconfig
-
-Compile everything and build the rootfs image:
-
-  $ make
-
-Result of the build
-===================
-
-After building, the output/images directory contains:
-
-  output/images/
-    ├── aspeed-ast2500-evb.dtb
-    ├── flash.img
-    ├── image.itb
-    ├── rootfs.cpio
-    ├── rootfs.cpio.xz
-    ├── rootfs.tar
-    ├── u-boot.bin
-    └── zImage
-
-Flashing the image
-==================
-
-To update the contents of the first flash device, copy flash.img :
-
-  $ flashcp flash.img /dev/mtd0
-
-or simply the boot loader:
-
-  $ flashcp u-boot.bin /dev/mtd1
-
-Preparing the board
-===================
-
- * Connect a serial line to the board
- * Power-up the board
-
-Booting the board
-=================
-
-The AST2500 EVB boots from the SPI flash device directly and loads a
-first bootloader (usually U-Boot). U-Boot will attempt to load a Linux
-kernel from the same flash device by default but other storage could
-be used.
-
- * from U-Boot
-
-   The FIT image image.itb can be used to boot the board from U-Boot
-   using tftp
-
- * with QEMU
-
-   $ qemu-system-arm -M ast2500-evb \
-	-drive file=output/images/flash.img,format=raw,if=mtd \
-	-nographic
-
-   $ qemu-system-arm -M ast2500-evb \
-	-kernel output/images/zImage \
-	-initrd output/images/rootfs.cpio \
-	-dtb output/images/aspeed-ast2500-evb.dtb \
-	-nographic
--- a/board/aspeed/ast2500-evb/uboot.fragment
+++ b/board/aspeed/ast2500-evb/uboot.fragment
@@ -1,3 +0,0 @@
-CONFIG_BOOTCOMMAND="bootm 20080000"
-CONFIG_FIT=y
-CONFIG_SHA256=y
--- a/board/aspeed/ast2600-evb/genimage.cfg
+++ b/board/aspeed/ast2600-evb/genimage.cfg
@@ -1,40 +0,0 @@
-#
-# This config reproduces the OpenBMC flash layout defined in Linux :
-#
-#    arch/arm/boot/dts/openbmc-flash-layout-64.dtsi
-#
-# and included by aspeed-ast2600-evb.dts
-#
-flash nor-64M-256 {
-	pebsize = 4K
-	numpebs = 16K
-	minimum-io-unit-size = 256
-}
-
-image flash.img {
-	flash {
-	}
-	flashtype = "nor-64M-256"
-
-	partition uboot {
-		image = "u-boot.bin"
-		size = 896K
-	}
-
-	partition ubootenv {
-		/* TODO */
-		offset = 896K
-		size = 128K
-	}
-
-	partition fitimage {
-		image = "image.itb"
-		offset = 1M
-		size = 9M
-	}
-
-	partition spare {
-		offset = 10M
-		size = 54M
-	}
-}
--- a/board/aspeed/ast2600-evb/readme.txt
+++ b/board/aspeed/ast2600-evb/readme.txt
@@ -1,80 +0,0 @@
-Aspeed AST2600 EVB
-
-Introduction
-============
-
-The AST2600 EVB is an evaluation board for the AST2600 SoC, most
-commonly used as a Server Management Processor. It includes a
-Dual-core ARM Cortex A7 processor with DDR4 SDRAM (up to 2GB), SPI
-flash memory devices for BMC and host firmwares and numerous
-controllers to drive the server board.
-
-  https://www.aspeedtech.com/server_ast2600/
-
-How to build it
-===============
-
-Configure buildroot:
-
-  $ make aspeed_ast2600evb_defconfig
-
-Compile everything and build the rootfs image:
-
-  $ make
-
-Result of the build
-===================
-
-After building, the output/images directory contains:
-
-  output/images/
-    ├── aspeed-ast2600-evb.dtb
-    ├── flash.img
-    ├── image.itb
-    ├── rootfs.cpio
-    ├── rootfs.cpio.xz
-    ├── rootfs.tar
-    ├── u-boot.bin
-    └── zImage
-
-Flashing the image
-==================
-
-To update the contents of the first flash device, copy flash.img :
-
-  $ flashcp flash.img /dev/mtd0
-
-or simply the boot loader:
-
-  $ flashcp u-boot.bin /dev/mtd1
-
-Preparing the board
-===================
-
- * Connect a serial line to the board
- * Power-up the board
-
-Booting the board
-=================
-
-The AST2600 EVB boots from the SPI flash device directly and loads a
-first bootloader (usually U-Boot). U-Boot will attempt to load a Linux
-kernel from the same flash device by default but other storage could
-be used.
-
- * from U-Boot
-
-   The FIT image image.itb can be used to boot the board from U-Boot
-   using tftp
-
- * with QEMU
-
-   $ qemu-system-arm -M ast2600-evb \
-	-drive file=output/images/flash.img,format=raw,if=mtd \
-	-nographic
-
-   $ qemu-system-arm -M ast2600-evb \
-	-kernel output/images/zImage \
-	-initrd output/images/rootfs.cpio \
-	-dtb output/images/aspeed-ast2600-evb.dtb \
-	-nographic
--- a/board/aspeed/common/image.its.template
+++ b/board/aspeed/common/image.its.template
@@ -1,56 +0,0 @@
-/dts-v1/;
-
-/ {
-	description = "Kernel and buildroot image";
-	#address-cells = <1>;
-
-	images {
-		kernel-1 {
-			description = "Linux kernel";
-			data = /incbin/("zImage");
-			type = "kernel";
-			arch = "arm";
-			os = "linux";
-			compression = "none";
-			load = <0x80001000>;
-			entry = <0x80001000>;
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-		fdt-1 {
-			description = "Flattened Device Tree blob";
-			data = /incbin/("%BOARD_DTB%");
-			type = "flat_dt";
-			arch = "arm";
-			compression = "none";
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-		ramdisk-1 {
-			description = "ramdisk";
-			data = /incbin/("rootfs.cpio.xz");
-			type = "ramdisk";
-			arch = "arm";
-			os = "linux";
-			compression = "none";
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-	};
-
-	configurations {
-		default = "conf-1";
-		conf-1 {
-			description = "Boot Linux kernel with FDT blob, ramdisk";
-			kernel = "kernel-1";
-			fdt = "fdt-1";
-			ramdisk = "ramdisk-1";
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-	};
-};
--- a/board/aspeed/common/post-image.sh
+++ b/board/aspeed/common/post-image.sh
@@ -1,27 +0,0 @@
-#!/bin/bash
-
-BOARD_DIR="$(dirname $0)"
-mkimage=$HOST_DIR/bin/mkimage
-
-BOARD_DT=$(sed -n \
-           's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([a-z0-9\-]*\).*"$/\1/p' \
-           ${BR2_CONFIG})
-
-sed -e "s/%BOARD_DTB%/${BOARD_DT}.dtb/" \
-    $BOARD_DIR/image.its.template > $BINARIES_DIR/image.its
-
-(cd $BINARIES_DIR && $mkimage -f image.its image.itb)
-
-GENIMAGE_CFG="board/aspeed/${BOARD_DT#aspeed-*}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-  --rootpath "${TARGET_DIR}" \
-  --tmppath "${GENIMAGE_TMP}" \
-  --inputpath "${BINARIES_DIR}" \
-  --outputpath "${BINARIES_DIR}" \
-  --config "${GENIMAGE_CFG}"
-
-rm -f $BINARIES_DIR/image.its
--- a/board/asus/tinker/extlinux.conf
+++ b/board/asus/tinker/extlinux.conf
@@ -1,4 +0,0 @@
-label Tinker linux
-  kernel /boot/uImage
-  devicetree /boot/rk3288-tinker.dtb
-  append console=ttyS2,115200n8 root=/dev/mmcblk0p1 rootwait
--- a/board/asus/tinker/genimage.cfg
+++ b/board/asus/tinker/genimage.cfg
@@ -1,22 +0,0 @@
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot-tpl-spl-dtb {
-		in-partition-table = "no"
-		image = "u-boot-tpl-spl-dtb.img"
-		offset = 32K
-	}
-
-	partition u-boot-dtb {
-		in-partition-table = "no"
-		image = "u-boot-dtb.img"
-		offset = 8M
-		size = 30M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-	}
-}
--- a/board/asus/tinker/post-build.sh
+++ b/board/asus/tinker/post-build.sh
@@ -1,9 +0,0 @@
-#!/bin/sh
-
-MKIMAGE=$HOST_DIR/bin/mkimage
-BOARD_DIR="$(dirname $0)"
-
-$MKIMAGE -n rk3288 -T rksd -d $BINARIES_DIR/u-boot-tpl.bin $BINARIES_DIR/u-boot-tpl.img
-cat $BINARIES_DIR/u-boot-tpl.img $BINARIES_DIR/u-boot-spl-dtb.bin > $BINARIES_DIR/u-boot-tpl-spl-dtb.img
-
-install -m 0644 -D $BOARD_DIR/extlinux.conf $TARGET_DIR/boot/extlinux/extlinux.conf
--- a/board/asus/tinker/readme.txt
+++ b/board/asus/tinker/readme.txt
@@ -1,43 +0,0 @@
-Tinker RK3288
-=============
-
-Tinker Board is a Single Board Computer (SBC) in an ultra-small form
-factor that offers class-leading performance while leveraging outstanding
-mechanical compatibility.
-
-Tinker link:
-https://www.asus.com/in/Single-Board-Computer/Tinker-Board/
-
-Wiki link:
-https://openedev.amarulasolutions.com/display/ODWIKI/Tinker+RK3288
-
-How to build it
-===============
-
-  $ make asus_tinker_rk3288_defconfig
-
-Then you can edit the build options using
-
-  $ make menuconfig
-
-Compile all and build rootfs image:
-
-  $ make
-
-Prepare your SDCard
-===================
-
-Buildroot generates a ready-to-use SD card image that you can flash directly to
-the card. The image will be in output/images/sdcard.img.
-You can write this image directly to an SD card device (i.e. /dev/xxx):
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/xxx
-  $ sudo sync
-
-Finally, you can insert the SD card to the Tinker RK3288 board and boot it.
-
-NOTE:
-USB power supply requires more than the standard 500mA USB current, so
-this board must be supplied from a capable port or from an external
-AC/DC adapter. Otherwise it will hang forever while loading the kernel
-image.
--- a/board/atmel/at91sam9260ek/linux-3.9.config
+++ b/board/atmel/at91sam9260ek/linux-3.9.config
@@ -0,0 +1,98 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9260=y
+CONFIG_ARCH_AT91SAM9260_SAM9XE=y
+CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_MACH_CAM60=y
+CONFIG_MACH_SAM9_L9260=y
+CONFIG_MACH_AFEB9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_MACH_CPU9260=y
+CONFIG_MACH_FLEXIBITY=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_GPIO=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_AT91SAM9X_WATCHDOG=y
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DEBUG=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91SAM9=y
+CONFIG_EXT2_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
--- a/board/atmel/at91sam9x5ek_mmc/genimage.cfg
+++ b/board/atmel/at91sam9x5ek_mmc/genimage.cfg
@@ -1,40 +0,0 @@
-# Image for SD card boot on Atmel at91sam9x5ek boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91sam9g15ek.dtb",
-			"at91sam9g25ek.dtb",
-			"at91sam9g35ek.dtb",
-			"at91sam9x25ek.dtb",
-			"at91sam9x35ek.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-
-		file uboot.env {
-			image = "uboot-env.bin"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}
--- a/board/atmel/at91sam9x5ek_mmc/uboot-env.txt
+++ b/board/atmel/at91sam9x5ek_mmc/uboot-env.txt
@@ -1,7 +0,0 @@
-bootargs=console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait video=Unknown-1:800x480-16
-bootcmd=fatload mmc 0:1 0x21000000 at91sam9g35ek.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
-bootdelay=1
-ethact=gmac0
-stderr=serial
-stdin=serial
-stdout=serial
--- a/board/atmel/flasher.sh
+++ b/board/atmel/flasher.sh
@@ -4,10 +4,6 @@ BUILDIR=$1
 TTY=$2
 BOARD=$3

-family_at91sam9260ek="at91sam9260ek"
-mach_at91sam9260ek="at91sam9260-ek"
-dtb_at91sam9260ek="at91sam9260ek.dtb"
-
 family_at91sam9g45m10ek="at91sam9m10g45ek"
 mach_at91sam9g45m10ek="at91sam9m10-g45-ek"
 dtb_at91sam9g45m10ek="at91sam9m10g45ek.dtb"
@@ -20,10 +16,6 @@ family_at91sam9g15ek="at91sam9x5ek"
 mach_at91sam9g15ek="at91sam9g15-ek"
 dtb_at91sam9g15ek="at91sam9g15ek.dtb"

-family_at91sam9g20ek="at91sam9g20ek"
-mach_at91sam9g20ek="at91sam9g20-ek"
-dtb_at91sam9g20ek="at91sam9g20ek.dtb"
-
 family_at91sam9g25ek="at91sam9x5ek"
 mach_at91sam9g25ek="at91sam9g25-ek"
 dtb_at91sam9g25ek="at91sam9g25ek.dtb"
@@ -98,11 +90,9 @@ Usage:
  $0 <builddir_path> <interface> <board>

 Available boards:
-  at91sam9260ek
  at91sam9g45m10ek
  at91sam9rlek
  at91sam9g15ek
-  at91sam9g20ek
  at91sam9g25ek
  at91sam9x25ek
  at91sam9g35ek
@@ -140,6 +130,7 @@ if [[ $BOARD == "*pda4" ]]; then
 	video_mode="video=LVDS-1:480x272-16"
 fi

-echo "Executing: ${!F} O=$1/images $1/host/bin/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode"
+echo "Executing: ${!F} O=$1/images $1/host/opt/sam-ba/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode"
 export O=$1/images
-$1/host/bin/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode
+$1/host/opt/sam-ba/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode
+
--- a/board/atmel/readme.txt
+++ b/board/atmel/readme.txt
@@ -1,6 +1,10 @@
-This document explains how to set up a basic Buildroot system on
-various Atmel/Microchip boards. Additional details can also be found
-on the Linux4SAM website: http://www.linux4sam.org
+Flashing the NAND using SAM-BA
+==============================
+
+This document explains how to flash a basic Buildroot system on various
+Atmel boards. Additional details can
+also be found on the Linux4SAM website, in particular here:
+http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted

 This guide covers the following configurations:
 - at91sam9g45m10ek_defconfig
@@ -10,57 +14,20 @@ This guide covers the following configurations:
 - atmel_sama5d3xek_defconfig (sama5d31, sama5d33, sama5d34, sama5d35,
   sama5d36)
 - atmel_sama5d3_xplained_defconfig
- - atmel_sama5d3_xplained_dev_defconfig
- - atmel_sama5d3_xplained_mmc_defconfig
- - atmel_sama5d3_xplained_mmc_dev_defconfig
+ - atmel_sama5d4ek_defconfig
 - atmel_sama5d4_xplained_defconfig
- - atmel_sama5d4_xplained_dev_defconfig
- - atmel_sama5d4_xplained_mmc_defconfig
- - atmel_sama5d4_xplained_mmc_dev_defconfig
- - atmel_sama5d2_xplained_mmc_defconfig
- - atmel_sama5d2_xplained_mmc_dev_defconfig
- - microchip_sama5d27_wlsom1_ek_mmc_defconfig
- - microchip_sama5d27_wlsom1_ek_mmc_dev_defconfig
- - microchip_sam9x60ek_mmc_defconfig
- - microchip_sam9x60ek_mmc_dev_defconfig
- - microchip_sama5d2_icp_mmc_defconfig
- - microchip_sama5d2_icp_mmc_dev_defconfig
- - microchip_sama7g5ek_mmc_defconfig
- - microchip_sama7g5ek_mmc_dev_defconfig

 These configurations will use AT91Bootstrap, u-boot and a linux kernel from
-the git trees maintained by Atmel.
+the git trees maintained by Atmel. They also build u-boot SPL when
+available, it can replace AT91Bootstrap.

-The configurations labeled as 'dev' provide a development rootfs with tools to
-tests the features of the SoC:
- ALSA tools to test audio
- FFMPEG to record video from the ISI/ISC
- I2C, SPI, CAN, etc. tools
- modetest for LCD screens, HDMI
- Wilc1000/Wilc3000 firmware for the Atmel Wireless sdio module
- SSH for convenience
- GDB/GDB server for debug

 Configuring and building Buildroot
-==================================
-
-For the Xplained/Evaluation Kit boards, the Buildroot configuration is
-provided to boot from an SD card. Those configurations are labeled as
-'mmc'. In this case, after building Buildroot, follow the instructions
-in the "Preparing the SD card" section.
-
-For the other configurations listed above, the Buildroot configuration
-assumes the system will be flashed on NAND. In this case, after
-building Buildroot, follow the instructions in the "Flashing the NAND
-using SAM-BA" section below.
-
-To configure and build Buildroot, run:
+----------------------------------

  make <board>_defconfig
  make

-Flashing the NAND using SAM-BA
-==============================

 Flashing the board
 ------------------
@@ -138,44 +105,3 @@ board/atmel/flasher.sh /tmp/atmel_sama5d3_xplained/ /dev/ttyACM0 sama5d3_xplaine

 Reboot, the system should boot up to the buildroot login invite.

-Preparing the SD card
-=====================
-
-An image named sdcard.img is automatically generated. With this image,
-you no longer have to care about the creation of the partition and
-copying files to the SD card.
-
-You need at least a 1GB SD card. All the data on the SD card will be
-lost. To copy the image on the SD card:
-
-/!\ Caution be sure to do it on the right mmcblk device /!\
-
-dd if=output/images/sdcard.img of=/dev/mmcblk0
-
-Insert your SD card in your Xplained/Evaluation Kit board, and
-enjoy. The default U-Boot environment will load properly the kernel
-and Device Tree blob from the first partition of the SD card, so
-everything works automatically.
-
-By default a 16MB FAT partition is created. It contains at91bootstrap,
-u-boot, the kernel image and all dtb variants for your board. The dtb
-used is the basic one:
-
-U-Boot> print
-[...]
-bootcmd=fatload mmc 1:1 0x21000000 at91-sama5d2_xplained.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
-[...]
-
-If you want to use a variant such as the _pda7 one, you will have to
-update your u-boot environment:
-
-U-Boot> setenv bootcmd 'fatload mmc 1:1 0x21000000 at91-sama5d2_xplained_pda7.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000'
-U-Boot> save
-Saving Environment to FAT...
-writing uboot.env
-done
-
-A 512MB ext4 partition is also created to store the rootfs generated.
-
-If you want to customize the size of the partitions and their content,
-take a look at the the genimage.cfg file in the board directory.
--- a/board/atmel/sama5d27_som1_ek_mmc/genimage.cfg
+++ b/board/atmel/sama5d27_som1_ek_mmc/genimage.cfg
@@ -1,32 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D2 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d27_som1_ek.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}
--- a/board/atmel/sama5d27_wlsom1_ek_mmc/genimage.cfg
+++ b/board/atmel/sama5d27_wlsom1_ek_mmc/genimage.cfg
@@ -1,32 +0,0 @@
-# Image for SD card boot on Microchip SAMA5D27 WLSOM1 EK
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d27_wlsom1_ek.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}
--- a/board/atmel/sama5d2_xplained_mmc/genimage.cfg
+++ b/board/atmel/sama5d2_xplained_mmc/genimage.cfg
@@ -1,32 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D2 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d2_xplained.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Peter Korsgaard	9f0610c188	Update for 2015.11.1 Signed-off-by: Peter Korsgaard <peter@korsgaard.com>	2015-12-05 23:05:32 +01:00
Gustavo Zacarias	c76f557eef	libpng: security bump to version 1.6.20 Fixes: CVE-2015-8126 - incorrect implementation of png_set_PLTE() that uses png_ptr not info_ptr, that left png_set_PLTE() open to this vuln. (fix in previous release was incomplete) Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <peter@korsgaard.com> (cherry picked from commit `371e2f7f3c`)	2015-12-04 22:02:01 +01:00
Gustavo Zacarias	c0c568ddd6	openssl: security bump to version 1.0.2e Fixes: CVE-2015-3193 - BN_mod_exp may produce incorrect results on x86_64 CVE-2015-3194 - Certificate verify crash with missing PSS parameter CVE-2015-3195 - X509_ATTRIBUTE memory leak Enable IDEA as well since otherwise the build breaks (always great upstream) - it's no longer patent encumbered. [Peter: correct sha256] Signed-off-by: Gustavo Zacarias <gustavo.zacarias@free-electrons.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com> (cherry picked from commit `e9fb14ecef`)	2015-12-04 22:01:15 +01:00
Gustavo Zacarias	45c566ea5d	dropbear: bump to version 2015.71 Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <peter@korsgaard.com> (cherry picked from commit `c2505381d0`)	2015-12-04 21:59:54 +01:00
Arnout Vandecappelle (Essensium/Mind)	be26df751b	busybox: add another upstream patch to fix (g)unzip 0002-unzip.patch was added in `69516e0` to fix a segmentation fault in the gunzip applet. However, it introduced a new issue that made the unzipping of some files fail. Add an upstream patch that fixes this new issue. Fixes #8501. Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Cc: Jason Rush <rush0033@hotmail.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com> (cherry picked from commit `63fdab6b4f`)	2015-12-03 00:02:02 +01:00
Yann E. MORIN	fa047bb052	package/gawk: do not use readeline or mpfr in host variant gawk has an optional dependency on mpfr (and thus gmp) and readline, and will probe for them. If they are present, they are used; if they are missing, that's not an error. mpfr (and gmp) is used for "BIGNUM" support on gawk; readline is used by the gawk debugger. However, mpfr (bringing gmp) are also host-packages in Buildroot, but in the standard build order (i.e. a plain 'make'), they are built after gawk. Ditto readline (from ncurses). If the user has the development files for gmp and mpfr, then gawk is linked to them. Ditto readline. Now, further on in the build, we build gmp and mpfr (for gcci or guile), so we install them in the host dir. Ditto readline (for gdb, ncurses itself and a few other packages...) But because we forcibly set an RPATH tag on all our host binaries, our host gawk will now dynamically link with our versions, when it was in fact built against the host ones. This did not seem to cause any harm so far, but is far from ideal. Since we do not really need BIGNUM or the debugger in our host gawk, we just forcibly disable them and configure gawk without readline or mpfr (there's no switch for gmp, but it's not a direct dependency, it comes just with mpfr). [Adjust comment as suggested by Thomas/Yann] Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Peter Korsgaard <jacmet@uclibc.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com> (cherry picked from commit `fc08a57305`)	2015-12-03 00:01:52 +01:00
Yann E. MORIN	0da6f8f518	support/check-host-rpath: remove trailing '/' in host dir Despite the comment saying so, the trailing '/' in the host directory is not removed. Note however that it is properly removed from extracted RPATH tags. This is not visible when the host directory is our default $(O)/host location, but breaks for user-supplied external host directory, when the user leaves a trailing slash in the path. Fix that. Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Peter Korsgaard <jacmet@uclibc.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com> (cherry picked from commit `f42e262199`)	2015-12-03 00:01:31 +01:00