Update for 2015.08.1

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>

.defconfig

@@ -15,9 +15,11 @@ BR2_i386=y
 # BR2_nios2 is not set
 # BR2_powerpc is not set
 # BR2_sh is not set
+# BR2_sh64 is not set
 # BR2_sparc is not set
 # BR2_sparc64 is not set
 # BR2_x86_64 is not set
+# BR2_x86_i386 is not set
 # BR2_x86_i486 is not set
 # BR2_x86_i586 is not set
 BR2_x86_i686=y

.gitlab-ci.yml

@@ -1,257 +0,0 @@
-# Configuration for Gitlab-CI.
-# Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
-# The .gitlab-ci.yml file is generated from .gitlab-ci.yml.in.
-# It needs to be regenerated every time a defconfig is added, using
-# "make .gitlab-ci.yml".
-
-image: buildroot/base
-
-.defconfig_script: &defconfig_script
-    - echo 'Configure Buildroot'
-    - make ${CI_BUILD_NAME}
-    - echo 'Build buildroot'
-    - |
-        make > >(tee build.log |grep '>>>') 2>&1 || {
-            echo 'Failed build last output'
-            tail -200 build.log
-            exit 1
-        }
-
-check-gitlab-ci.yml:
-    script:
-        - mv .gitlab-ci.yml .gitlab-ci.yml.orig
-        - make .gitlab-ci.yml
-        - diff -u .gitlab-ci.yml.orig .gitlab-ci.yml
-
-check-DEVELOPERS:
-    # get-developers should print just "No action specified"; if it prints
-    # anything else, it's a parse error.
-    # The initial ! is removed by YAML so we need to quote it.
-    script:
-        - "! utils/get-developers | grep -v 'No action specified'"
-
-.defconfig: &defconfig
-    # Running the defconfigs for every push is too much, so limit to
-    # explicit triggers through the API.
-    only:
-        - triggers
-        - tags
-    script: *defconfig_script
-    artifacts:
-        when: always
-        expire_in: 2 weeks
-        paths:
-            - build.log
-            - output/images/
-            - output/build/build-time.log
-            - output/build/packages-file-list.txt
-
-.runtime_test: &runtime_test
-    # Keep build directories so the rootfs can be an artifact of the job. The
-    # runner will clean up those files for us.
-    # Multiply every emulator timeout by 10 to avoid sporadic failures in
-    # elastic runners.
-    script: ./support/testing/run-tests -o test-output/ -d test-dl/ -k --timeout-multiplier 10 ${CI_BUILD_NAME}
-    artifacts:
-        when: always
-        expire_in: 2 weeks
-        paths:
-            - test-output/*.log
-            - test-output/*/images/*
-acmesystems_aria_g25_128mb_defconfig: *defconfig
-acmesystems_aria_g25_256mb_defconfig: *defconfig
-acmesystems_arietta_g25_128mb_defconfig: *defconfig
-acmesystems_arietta_g25_256mb_defconfig: *defconfig
-arcturus_ucp1020_defconfig: *defconfig
-arm_foundationv8_defconfig: *defconfig
-arm_juno_defconfig: *defconfig
-armadeus_apf27_defconfig: *defconfig
-armadeus_apf28_defconfig: *defconfig
-armadeus_apf51_defconfig: *defconfig
-at91sam9260eknf_defconfig: *defconfig
-at91sam9g20dfc_defconfig: *defconfig
-at91sam9g45m10ek_defconfig: *defconfig
-at91sam9rlek_defconfig: *defconfig
-at91sam9x5ek_defconfig: *defconfig
-at91sam9x5ek_dev_defconfig: *defconfig
-at91sam9x5ek_mmc_defconfig: *defconfig
-at91sam9x5ek_mmc_dev_defconfig: *defconfig
-atmel_sama5d2_xplained_mmc_defconfig: *defconfig
-atmel_sama5d2_xplained_mmc_dev_defconfig: *defconfig
-atmel_sama5d3_xplained_defconfig: *defconfig
-atmel_sama5d3_xplained_dev_defconfig: *defconfig
-atmel_sama5d3_xplained_mmc_defconfig: *defconfig
-atmel_sama5d3_xplained_mmc_dev_defconfig: *defconfig
-atmel_sama5d3xek_defconfig: *defconfig
-atmel_sama5d4_xplained_defconfig: *defconfig
-atmel_sama5d4_xplained_dev_defconfig: *defconfig
-atmel_sama5d4_xplained_mmc_defconfig: *defconfig
-atmel_sama5d4_xplained_mmc_dev_defconfig: *defconfig
-bananapro_defconfig: *defconfig
-beagleboardx15_defconfig: *defconfig
-beaglebone_defconfig: *defconfig
-beaglebone_qt5_defconfig: *defconfig
-chromebook_snow_defconfig: *defconfig
-ci20_defconfig: *defconfig
-ci40_defconfig: *defconfig
-csky_gx6605s_defconfig: *defconfig
-cubieboard2_defconfig: *defconfig
-engicam_imx6qdl_icore_defconfig: *defconfig
-engicam_imx6qdl_icore_rqs_defconfig: *defconfig
-engicam_imx6ul_geam_defconfig: *defconfig
-engicam_imx6ul_isiot_defconfig: *defconfig
-firefly_rk3288_defconfig: *defconfig
-firefly_rk3288_demo_defconfig: *defconfig
-freescale_imx28evk_defconfig: *defconfig
-freescale_imx31_3stack_defconfig: *defconfig
-freescale_imx6dlsabreauto_defconfig: *defconfig
-freescale_imx6dlsabresd_defconfig: *defconfig
-freescale_imx6qsabreauto_defconfig: *defconfig
-freescale_imx6qsabresd_defconfig: *defconfig
-freescale_imx6sololiteevk_defconfig: *defconfig
-freescale_imx6sxsabresd_defconfig: *defconfig
-freescale_imx6ulevk_defconfig: *defconfig
-freescale_imx7dsabresd_defconfig: *defconfig
-freescale_mpc8315erdb_defconfig: *defconfig
-freescale_p1010rdb_pa_defconfig: *defconfig
-galileo_defconfig: *defconfig
-gdb_bfin_bf512_defconfig: *defconfig
-grinn_chiliboard_defconfig: *defconfig
-grinn_liteboard_defconfig: *defconfig
-imx23evk_defconfig: *defconfig
-imx6q-sabresd_defconfig: *defconfig
-imx6ulpico_defconfig: *defconfig
-lego_ev3_defconfig: *defconfig
-linksprite_pcduino_defconfig: *defconfig
-minnowboard_max-graphical_defconfig: *defconfig
-minnowboard_max_defconfig: *defconfig
-mx25pdk_defconfig: *defconfig
-mx51evk_defconfig: *defconfig
-mx53loco_defconfig: *defconfig
-mx6cubox_defconfig: *defconfig
-mx6sx_udoo_neo_defconfig: *defconfig
-mx6udoo_defconfig: *defconfig
-nanopi_m1_defconfig: *defconfig
-nanopi_m1_plus_defconfig: *defconfig
-nanopi_neo_defconfig: *defconfig
-nexbox_a95x_defconfig: *defconfig
-nitrogen6sx_defconfig: *defconfig
-nitrogen6x_defconfig: *defconfig
-nitrogen7_defconfig: *defconfig
-odroidc2_defconfig: *defconfig
-olimex_a13_olinuxino_defconfig: *defconfig
-olimex_a20_olinuxino_lime2_defconfig: *defconfig
-olimex_a20_olinuxino_lime_defconfig: *defconfig
-olimex_a20_olinuxino_lime_mali_defconfig: *defconfig
-olimex_a20_olinuxino_micro_defconfig: *defconfig
-olimex_imx233_olinuxino_defconfig: *defconfig
-openblocks_a6_defconfig: *defconfig
-orangepi_one_defconfig: *defconfig
-orangepi_pc_defconfig: *defconfig
-orangepi_plus_defconfig: *defconfig
-orangepi_zero_defconfig: *defconfig
-pandaboard_defconfig: *defconfig
-pc_x86_64_bios_defconfig: *defconfig
-pc_x86_64_efi_defconfig: *defconfig
-qemu_aarch64_virt_defconfig: *defconfig
-qemu_arm_versatile_defconfig: *defconfig
-qemu_arm_versatile_nommu_defconfig: *defconfig
-qemu_arm_vexpress_defconfig: *defconfig
-qemu_m68k_mcf5208_defconfig: *defconfig
-qemu_m68k_q800_defconfig: *defconfig
-qemu_microblazebe_mmu_defconfig: *defconfig
-qemu_microblazeel_mmu_defconfig: *defconfig
-qemu_mips32r2_malta_defconfig: *defconfig
-qemu_mips32r2el_malta_defconfig: *defconfig
-qemu_mips32r6_malta_defconfig: *defconfig
-qemu_mips32r6el_malta_defconfig: *defconfig
-qemu_mips64_malta_defconfig: *defconfig
-qemu_mips64el_malta_defconfig: *defconfig
-qemu_mips64r6_malta_defconfig: *defconfig
-qemu_mips64r6el_malta_defconfig: *defconfig
-qemu_nios2_10m50_defconfig: *defconfig
-qemu_or1k_defconfig: *defconfig
-qemu_ppc64_pseries_defconfig: *defconfig
-qemu_ppc_g3beige_defconfig: *defconfig
-qemu_ppc_mpc8544ds_defconfig: *defconfig
-qemu_ppc_virtex_ml507_defconfig: *defconfig
-qemu_sh4_r2d_defconfig: *defconfig
-qemu_sh4eb_r2d_defconfig: *defconfig
-qemu_sparc64_sun4u_defconfig: *defconfig
-qemu_sparc_ss10_defconfig: *defconfig
-qemu_x86_64_defconfig: *defconfig
-qemu_x86_defconfig: *defconfig
-qemu_xtensa_lx60_defconfig: *defconfig
-qemu_xtensa_lx60_nommu_defconfig: *defconfig
-raspberrypi0_defconfig: *defconfig
-raspberrypi2_defconfig: *defconfig
-raspberrypi3_64_defconfig: *defconfig
-raspberrypi3_defconfig: *defconfig
-raspberrypi_defconfig: *defconfig
-riotboard_defconfig: *defconfig
-roseapplepi_defconfig: *defconfig
-s6lx9_microboard_defconfig: *defconfig
-sheevaplug_defconfig: *defconfig
-snps_aarch64_vdk_defconfig: *defconfig
-snps_arc700_axs101_defconfig: *defconfig
-snps_archs38_axs103_defconfig: *defconfig
-snps_archs38_haps_defconfig: *defconfig
-snps_archs38_vdk_defconfig: *defconfig
-socrates_cyclone5_defconfig: *defconfig
-stm32f429_disco_defconfig: *defconfig
-stm32f469_disco_defconfig: *defconfig
-telit_evk_pro3_defconfig: *defconfig
-toradex_apalis_imx6_defconfig: *defconfig
-ts4800_defconfig: *defconfig
-ts4900_defconfig: *defconfig
-ts5x00_defconfig: *defconfig
-wandboard_defconfig: *defconfig
-warp7_defconfig: *defconfig
-warpboard_defconfig: *defconfig
-zynq_microzed_defconfig: *defconfig
-zynq_zc706_defconfig: *defconfig
-zynq_zed_defconfig: *defconfig
-zynq_zybo_defconfig: *defconfig
-tests.core.test_post_scripts.TestPostScripts: *runtime_test
-tests.core.test_rootfs_overlay.TestRootfsOverlay: *runtime_test
-tests.core.test_timezone.TestGlibcAllTimezone: *runtime_test
-tests.core.test_timezone.TestGlibcNonDefaultLimitedTimezone: *runtime_test
-tests.core.test_timezone.TestNoTimezone: *runtime_test
-tests.fs.test_ext.TestExt2: *runtime_test
-tests.fs.test_ext.TestExt2r1: *runtime_test
-tests.fs.test_ext.TestExt3: *runtime_test
-tests.fs.test_ext.TestExt4: *runtime_test
-tests.fs.test_iso9660.TestIso9660Grub2External: *runtime_test
-tests.fs.test_iso9660.TestIso9660Grub2Internal: *runtime_test
-tests.fs.test_iso9660.TestIso9660GrubExternal: *runtime_test
-tests.fs.test_iso9660.TestIso9660GrubInternal: *runtime_test
-tests.fs.test_iso9660.TestIso9660SyslinuxExternal: *runtime_test
-tests.fs.test_iso9660.TestIso9660SyslinuxInternal: *runtime_test
-tests.fs.test_jffs2.TestJffs2: *runtime_test
-tests.fs.test_squashfs.TestSquashfs: *runtime_test
-tests.fs.test_ubi.TestUbi: *runtime_test
-tests.fs.test_yaffs2.TestYaffs2: *runtime_test
-tests.init.test_busybox.TestInitSystemBusyboxRo: *runtime_test
-tests.init.test_busybox.TestInitSystemBusyboxRoNet: *runtime_test
-tests.init.test_busybox.TestInitSystemBusyboxRw: *runtime_test
-tests.init.test_busybox.TestInitSystemBusyboxRwNet: *runtime_test
-tests.init.test_none.TestInitSystemNone: *runtime_test
-tests.init.test_systemd.TestInitSystemSystemdRoFull: *runtime_test
-tests.init.test_systemd.TestInitSystemSystemdRoIfupdown: *runtime_test
-tests.init.test_systemd.TestInitSystemSystemdRoNetworkd: *runtime_test
-tests.init.test_systemd.TestInitSystemSystemdRwFull: *runtime_test
-tests.init.test_systemd.TestInitSystemSystemdRwIfupdown: *runtime_test
-tests.init.test_systemd.TestInitSystemSystemdRwNetworkd: *runtime_test
-tests.package.test_dropbear.TestDropbear: *runtime_test
-tests.package.test_ipython.TestIPythonPy2: *runtime_test
-tests.package.test_ipython.TestIPythonPy3: *runtime_test
-tests.package.test_python.TestPython2: *runtime_test
-tests.package.test_python.TestPython3: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainBuildrootMusl: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainBuildrootuClibc: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainCCache: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainCtngMusl: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainLinaroArm: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainSourceryArmv4: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainSourceryArmv5: *runtime_test
-tests.toolchain.test_external.TestExternalToolchainSourceryArmv7: *runtime_test

.gitlab-ci.yml.in

@@ -1,60 +0,0 @@
-# Configuration for Gitlab-CI.
-# Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
-# The .gitlab-ci.yml file is generated from .gitlab-ci.yml.in.
-# It needs to be regenerated every time a defconfig is added, using
-# "make .gitlab-ci.yml".
-
-image: buildroot/base
-
-.defconfig_script: &defconfig_script
-    - echo 'Configure Buildroot'
-    - make ${CI_BUILD_NAME}
-    - echo 'Build buildroot'
-    - |
-        make > >(tee build.log |grep '>>>') 2>&1 || {
-            echo 'Failed build last output'
-            tail -200 build.log
-            exit 1
-        }
-
-check-gitlab-ci.yml:
-    script:
-        - mv .gitlab-ci.yml .gitlab-ci.yml.orig
-        - make .gitlab-ci.yml
-        - diff -u .gitlab-ci.yml.orig .gitlab-ci.yml
-
-check-DEVELOPERS:
-    # get-developers should print just "No action specified"; if it prints
-    # anything else, it's a parse error.
-    # The initial ! is removed by YAML so we need to quote it.
-    script:
-        - "! utils/get-developers | grep -v 'No action specified'"
-
-.defconfig: &defconfig
-    # Running the defconfigs for every push is too much, so limit to
-    # explicit triggers through the API.
-    only:
-        - triggers
-        - tags
-    script: *defconfig_script
-    artifacts:
-        when: always
-        expire_in: 2 weeks
-        paths:
-            - build.log
-            - output/images/
-            - output/build/build-time.log
-            - output/build/packages-file-list.txt
-
-.runtime_test: &runtime_test
-    # Keep build directories so the rootfs can be an artifact of the job. The
-    # runner will clean up those files for us.
-    # Multiply every emulator timeout by 10 to avoid sporadic failures in
-    # elastic runners.
-    script: ./support/testing/run-tests -o test-output/ -d test-dl/ -k --timeout-multiplier 10 ${CI_BUILD_NAME}
-    artifacts:
-        when: always
-        expire_in: 2 weeks
-        paths:
-            - test-output/*.log
-            - test-output/*/images/*

COPYING

@@ -1,19 +1,3 @@
-With the exceptions below, Buildroot is distributed under the terms of
-the GNU General Public License, reproduced below; either version 2 of
-the License, or (at your option) any later version.
-
-Some files in Buildroot contain a different license statement. Those
-files are licensed under the license contained in the file itself.
-
-Buildroot also bundles patch files, which are applied to the sources
-of the various packages. Those patches are not covered by the license
-of Buildroot. Instead, they are covered by the license of the software
-to which the patches are applied. When said software is available
-under multiple licenses, the Buildroot patches are only provided under
-the publicly accessible licenses.
-
------------------------------------------------------------------
-
 		    GNU GENERAL PUBLIC LICENSE
 		       Version 2, June 1991
 

Config.in

@@ -14,53 +14,9 @@ config BR2_HOSTARCH
 	string
 	option env="HOSTARCH"
 
-config BR2_BUILD_DIR
+config BR2_EXTERNAL
 	string
-	option env="BUILD_DIR"
-
-# Hidden config symbols for packages to check system gcc version
-config BR2_HOST_GCC_VERSION
-	string
-	option env="HOST_GCC_VERSION"
-
-config BR2_HOST_GCC_AT_LEAST_4_5
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 5"
-
-config BR2_HOST_GCC_AT_LEAST_4_6
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 6"
-	select BR2_HOST_GCC_AT_LEAST_4_5
-
-config BR2_HOST_GCC_AT_LEAST_4_7
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 7"
-	select BR2_HOST_GCC_AT_LEAST_4_6
-
-config BR2_HOST_GCC_AT_LEAST_4_8
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 8"
-	select BR2_HOST_GCC_AT_LEAST_4_7
-
-config BR2_HOST_GCC_AT_LEAST_4_9
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 9"
-	select BR2_HOST_GCC_AT_LEAST_4_8
-
-config BR2_HOST_GCC_AT_LEAST_5
-	bool
-	default y if BR2_HOST_GCC_VERSION = "5"
-	select BR2_HOST_GCC_AT_LEAST_4_9
-
-config BR2_HOST_GCC_AT_LEAST_6
-	bool
-	default y if BR2_HOST_GCC_VERSION = "6"
-	select BR2_HOST_GCC_AT_LEAST_5
-
-config BR2_HOST_GCC_AT_LEAST_7
-	bool
-	default y if BR2_HOST_GCC_VERSION = "7"
-	select BR2_HOST_GCC_AT_LEAST_6
+	option env="BR2_EXTERNAL"
 
 # Hidden boolean selected by packages in need of Java in order to build
 # (example: xbmc)
@@ -89,11 +45,6 @@ config BR2_HOSTARCH_NEEDS_IA32_LIBS
 config BR2_HOSTARCH_NEEDS_IA32_COMPILER
 	bool
 
-# Hidden boolean selected by packages that need the host to have an
-# UTF8 locale.
-config BR2_NEEDS_HOST_UTF8_LOCALE
-	bool
-
 source "arch/Config.in"
 
 menu "Build options"
@@ -140,9 +91,9 @@ config BR2_ZCAT
 	string "zcat command"
 	default "gzip -d -c"
 	help
-	  Command to be used to extract a gzip'ed file to stdout. zcat
-	  is identical to gunzip -c except that the former may not be
-	  available on your system.
+	  Command to be used to extract a gzip'ed file to stdout.
+	  zcat is identical to gunzip -c except that the former may
+	  not be available on your system.
 	  Default is "gzip -d -c"
 	  Other possible values include "gunzip -c" or "zcat".
 
@@ -163,13 +114,6 @@ config BR2_XZCAT
 	  Command to be used to extract a xz'ed file to stdout.
 	  Default is "xzcat"
 
-config BR2_LZCAT
-	string "lzcat command"
-	default "lzip -d -c"
-	help
-	  Command to be used to extract a lzip'ed file to stdout.
-	  Default is "lzip -d -c"
-
 config BR2_TAR_OPTIONS
 	string "Tar options"
 	default ""
@@ -189,8 +133,8 @@ config BR2_DEFCONFIG
 	default BR2_DEFCONFIG_FROM_ENV if BR2_DEFCONFIG_FROM_ENV != ""
 	default "$(CONFIG_DIR)/defconfig"
 	help
-	  When running 'make savedefconfig', the defconfig file will be
-	  saved in this location.
+	  When running 'make savedefconfig', the defconfig file will be saved
+	  in this location.
 
 config BR2_DL_DIR
 	string "Download dir"
@@ -198,8 +142,7 @@ config BR2_DL_DIR
 	help
 	  Directory to store all the source files that we need to fetch.
 	  If the Linux shell environment has defined the BR2_DL_DIR
-	  environment variable, then this overrides this configuration
-	  item.
+	  environment variable, then this overrides this configuration item.
 
 	  The default is $(TOPDIR)/dl
 
@@ -207,9 +150,9 @@ config BR2_HOST_DIR
 	string "Host dir"
 	default "$(BASE_DIR)/host"
 	help
-	  Directory to store all the binary files that are built for the
-	  host. This includes the cross compilation toolchain when
-	  building the internal buildroot toolchain.
+	  Directory to store all the binary files that are built for the host.
+	  This includes the cross compilation toolchain when building the
+	  internal buildroot toolchain.
 
 	  The default is $(BASE_DIR)/host
 
@@ -219,13 +162,11 @@ config BR2_PRIMARY_SITE
 	string "Primary download site"
 	default ""
 	help
-	  Primary site to download from. If this option is set then
-	  buildroot will try to download package source first from this
-	  site and try the default if the file is not found.
-	  Valid URIs are:
-	    - URIs recognized by $(WGET)
-	    - local URIs of the form file://absolutepath
-	    - scp URIs of the form scp://[user@]host:path.
+	  Primary site to download from. If this option is set then buildroot
+	  will try to download package source first from this site and try the
+	  default if the file is not found.
+	  Valid URIs are URIs recognized by $(WGET) and scp URIs of the form
+	  scp://[user@]host:path.
 
 config BR2_PRIMARY_SITE_ONLY
 	bool "Only allow downloads from primary download site"
@@ -234,11 +175,11 @@ config BR2_PRIMARY_SITE_ONLY
 	  If this option is enabled, downloads will only be attempted
 	  from the primary download site. Other locations, like the
 	  package's official download location or the backup download
-	  site, will not be considered. Therefore, if the package is not
-	  present on the primary site, the download fails.
+	  site, will not be considered. Therefore, if the package is
+	  not present on the primary site, the download fails.
 
-	  This is useful for project developers who want to ensure that
-	  the project can be built even if the upstream tarball
+	  This is useful for project developers who want to ensure
+	  that the project can be built even if the upstream tarball
 	  locations disappear.
 
 if !BR2_PRIMARY_SITE_ONLY
@@ -247,36 +188,32 @@ config BR2_BACKUP_SITE
 	string "Backup download site"
 	default "http://sources.buildroot.net"
 	help
-	  Backup site to download from. If this option is set then
-	  buildroot will fall back to download package sources from here
-	  if the normal location fails.
+	  Backup site to download from. If this option is set then buildroot
+	  will fall back to download package sources from here if the
+	  normal location fails.
 
 config BR2_KERNEL_MIRROR
 	string "Kernel.org mirror"
-	default "https://cdn.kernel.org/pub"
+	default "https://www.kernel.org/pub"
 	help
-	  kernel.org is mirrored on a number of servers around the
-	  world. The following allows you to select your preferred
-	  mirror. By default, a CDN is used, which automatically
-	  redirects to a mirror geographically close to you.
+	  kernel.org is mirrored on a number of servers around the world.
+	  The following allows you to select your preferred mirror.
 
-	  Have a look on the kernel.org site for a list of mirrors, then
-	  enter the URL to the base directory. Examples:
+	  Have a look on the kernel.org site for a list of mirrors, then enter
+	  the URL to the base directory.  Examples:
 
 	     http://www.XX.kernel.org/pub (XX = country code)
 	     http://mirror.aarnet.edu.au/pub/ftp.kernel.org
 
 config BR2_GNU_MIRROR
 	string "GNU Software mirror"
-	default "http://ftpmirror.gnu.org"
+	default "http://ftp.gnu.org/pub/gnu"
 	help
-	  GNU has multiple software mirrors scattered around the
-	  world. The following allows you to select your preferred
-	  mirror. By default, a generic address is used, which
-	  automatically selects an up-to-date and local mirror.
+	  GNU has multiple software mirrors scattered around the world.
+	  The following allows you to select your preferred mirror.
 
-	  Have a look on the gnu.org site for a list of mirrors, then
-	  enter the URL to the base directory. Examples:
+	  Have a look on the gnu.org site for a list of mirrors, then enter
+	  the URL to the base directory.  Examples:
 
 	     http://ftp.gnu.org/pub/gnu
 	     http://mirror.aarnet.edu.au/pub/gnu
@@ -293,8 +230,8 @@ config BR2_CPAN_MIRROR
 	string "CPAN mirror (Perl packages)"
 	default "http://cpan.metacpan.org"
 	help
-	  CPAN (Comprehensive Perl Archive Network) is a repository of
-	  Perl packages. It has multiple software mirrors scattered
+	  CPAN (Comprehensive Perl Archive Network) is a repository
+	  of Perl packages. It has multiple software mirrors scattered
 	  around the world. This option allows you to select a mirror.
 
 	  The list of mirrors is available at:
@@ -308,22 +245,24 @@ config BR2_JLEVEL
 	int "Number of jobs to run simultaneously (0 for auto)"
 	default "0"
 	help
-	  Number of jobs to run simultaneously. If 0, determine
-	  automatically according to number of CPUs on the host system.
+	  Number of jobs to run simultaneously.  If 0, determine
+	  automatically according to number of CPUs on the host
+	  system.
 
 config BR2_CCACHE
 	bool "Enable compiler cache"
 	help
-	  This option will enable the use of ccache, a compiler cache.
-	  It will cache the result of previous builds to speed up future
-	  builds. By default, the cache is stored in
+	  This option will enable the use of ccache, a compiler
+	  cache. It will cache the result of previous builds to speed
+	  up future builds. By default, the cache is stored in
 	  $HOME/.buildroot-ccache.
 
 	  Note that Buildroot does not try to invalidate the cache
-	  contents when the compiler changes in an incompatible way.
-	  Therefore, if you make a change to the compiler version and/or
-	  configuration, you are responsible for purging the ccache
-	  cache by removing the $HOME/.buildroot-ccache directory.
+	  contents when the compiler changes in an incompatible
+	  way. Therefore, if you make a change to the compiler version
+	  and/or configuration, you are responsible for purging the
+	  ccache cache by removing the $HOME/.buildroot-ccache
+	  directory.
 
 if BR2_CCACHE
 
@@ -336,46 +275,42 @@ config BR2_CCACHE_DIR
 config BR2_CCACHE_INITIAL_SETUP
 	string "Compiler cache initial setup"
 	help
-	  Initial ccache settings to apply, such as --max-files or
-	  --max-size.
+	  Initial ccache settings to apply, such as --max-files or --max-size.
 
-	  For example, if your project is known to require more space
-	  than the default max cache size, then you might want to
-	  increase the cache size to a suitable amount using the -M
-	  (--max-size) option.
+	  For example, if your project is known to require more space than the
+	  default max cache size, then you might want to increase the cache size
+	  to a suitable amount using the -M (--max-size) option.
 
-	  The string you specify here is passed verbatim to ccache.
-	  Refer to ccache documentation for more details.
+	  The string you specify here is passed verbatim to ccache.  Refer to
+	  ccache documentation for more details.
 
-	  These initial settings are applied after ccache has been
-	  compiled.
+	  These initial settings are applied after ccache has been compiled.
 
-config BR2_CCACHE_USE_BASEDIR
-	bool "Use relative paths"
-	default y
+endif
+
+config BR2_DEPRECATED
+	bool "Show options and packages that are deprecated or obsolete"
 	help
-	  Allow ccache to convert absolute paths within the output
-	  directory into relative paths.
+	  This option shows outdated/obsolete versions of packages and
+	  options that are otherwise hidden.
 
-	  During the build, many -I include directives are given with an
-	  absolute path. These absolute paths end up in the hashes that
-	  are computed by ccache. Therefore, when you build from a
-	  different directory, the hash will be different and the cached
-	  object will not be used.
+if BR2_DEPRECATED
 
-	  To improve cache performance, set this option to y. This
-	  allows ccache to rewrite absolute paths within the output
-	  directory into relative paths. Note that only paths within the
-	  output directory will be rewritten; therefore, if you change
-	  BR2_HOST_DIR to point outside the output directory and
-	  subsequently move it to a different location, this will lead
-	  to cache misses.
+config BR2_DEPRECATED_SINCE_2014_08
+	bool
+	default y
 
-	  This option has as a result that the debug information in the
-	  object files also has only relative paths. Therefore, make
-	  sure you cd to the build directory before starting gdb. See
-	  the section "COMPILING IN DIFFERENT DIRECTORIES" in the ccache
-	  manual for more information.
+config BR2_DEPRECATED_SINCE_2015_02
+	bool
+	default y
+
+config BR2_DEPRECATED_SINCE_2015_05
+	bool
+	default y
+
+config BR2_DEPRECATED_SINCE_2015_08
+	bool
+	default y
 
 endif
 
@@ -399,11 +334,11 @@ choice
 config BR2_DEBUG_1
 	bool "debug level 1"
 	help
-	  Debug level 1 produces minimal information, enough for making
-	  backtraces in parts of the program that you don't plan to
-	  debug. This includes descriptions of functions and external
-	  variables, but no information about local variables and no
-	  line numbers.
+	  Debug level 1 produces minimal information, enough
+	  for making backtraces in parts of the program that
+	  you don't plan to debug. This includes descriptions
+	  of functions and external variables, but no information
+	  about local variables and no line numbers.
 
 config BR2_DEBUG_2
 	bool "debug level 2"
@@ -413,41 +348,51 @@ config BR2_DEBUG_2
 config BR2_DEBUG_3
 	bool "debug level 3"
 	help
-	  Level 3 includes extra information, such as all the macro
-	  definitions present in the program. Some debuggers support
-	  macro expansion when you use -g3.
+	  Level 3 includes extra information, such as all the
+	  macro definitions present in the program. Some debuggers
+	  support macro expansion when you use -g3.
 endchoice
 endif
 
+choice
+	prompt "strip command for binaries on target"
+	default BR2_STRIP_strip
+
 config BR2_STRIP_strip
-	bool "strip target binaries"
+	bool "strip"
 	depends on !BR2_PACKAGE_HOST_ELF2FLT
-	default y
 	help
 	  Binaries and libraries in the target filesystem will be
-	  stripped using the normal 'strip' command. This allows to save
-	  space, mainly by removing debugging symbols. Debugging symbols
-	  on the target are needed for native debugging, but not when
-	  remote debugging is used.
+	  stripped using the normal 'strip' command. This allows to
+	  save space, mainly by removing debugging symbols. Debugging
+	  symbols on the target are needed for native debugging, but
+	  not when remote debugging is used.
+
+config BR2_STRIP_none
+	bool "none"
+	help
+	  Do not strip binaries and libraries in the target
+	  filesystem.
+endchoice
 
 config BR2_STRIP_EXCLUDE_FILES
 	string "executables that should not be stripped"
-	depends on BR2_STRIP_strip
+	depends on !BR2_STRIP_none
 	default ""
 	help
-	  You may specify a space-separated list of binaries and
-	  libraries here that should not be stripped on the target.
+	  You may specify a space-separated list of binaries and libraries
+	  here that should not be stripped on the target.
 
 config BR2_STRIP_EXCLUDE_DIRS
 	string "directories that should be skipped when stripping"
-	depends on BR2_STRIP_strip
+	depends on !BR2_STRIP_none
 	default ""
 	help
-	  You may specify a space-separated list of directories that
-	  should be skipped when stripping. Binaries and libraries in
-	  these directories will not be touched. The directories should
-	  be specified relative to the target directory, without leading
-	  slash.
+	  You may specify a space-separated list of directories that should
+	  be skipped when stripping. Binaries and libraries in these
+	  directories will not be touched.
+	  The directories should be specified relative to the target directory,
+	  without leading slash.
 
 choice
 	prompt "gcc optimization level"
@@ -463,67 +408,54 @@ config BR2_OPTIMIZE_0
 config BR2_OPTIMIZE_1
 	bool "optimization level 1"
 	help
-	  Optimize. Optimizing compilation takes somewhat more time, and
-	  a lot more memory for a large function. With -O, the compiler
-	  tries to reduce code size and execution time, without
-	  performing any optimizations that take a great deal of
-	  compilation time. -O turns on the following optimization
+	  Optimize. Optimizing compilation takes somewhat more time,
+	  and a lot more memory for a large function. With -O, the
+	  compiler tries to reduce code size and execution time,
+	  without performing any optimizations that take a great deal
+	  of compilation time. -O turns on the following optimization
 	  flags: -fdefer-pop -fdelayed-branch -fguess-branch-probability
 	  -fcprop-registers -floop-optimize -fif-conversion
 	  -fif-conversion2 -ftree-ccp -ftree-dce -ftree-dominator-opts
 	  -ftree-dse -ftree-ter -ftree-lrs -ftree-sra -ftree-copyrename
-	  -ftree-fre -ftree-ch -funit-at-a-time -fmerge-constants. -O
-	  also turns on -fomit-frame-pointer on machines where doing so
-	  does not interfere with debugging.
+	  -ftree-fre -ftree-ch -funit-at-a-time -fmerge-constants
+	  -O also turns on -fomit-frame-pointer on machines where doing
+	  so does not interfere with debugging.
 
 config BR2_OPTIMIZE_2
 	bool "optimization level 2"
 	help
-	  Optimize even more. GCC performs nearly all supported
-	  optimizations that do not involve a space-speed tradeoff. The
-	  compiler does not perform loop unrolling or function inlining
-	  when you specify -O2. As compared to -O, this option increases
-	  both compilation time and the performance of the generated
-	  code. -O2 turns on all optimization flags specified by -O. It
-	  also turns on the following optimization flags:
-	  -fthread-jumps -fcrossjumping -foptimize-sibling-calls
+	  Optimize even more. GCC performs nearly all supported optimizations
+	  that do not involve a space-speed tradeoff. The compiler does not
+	  perform loop unrolling or function inlining when you specify -O2.
+	  As compared to -O, this option increases both compilation time and
+	  the performance of the generated code. -O2 turns on all optimization
+	  flags specified by -O. It also turns on the following optimization
+	  flags: -fthread-jumps -fcrossjumping -foptimize-sibling-calls
 	  -fcse-follow-jumps -fcse-skip-blocks -fgcse  -fgcse-lm
-	  -fexpensive-optimizations -fstrength-reduce
-	  -frerun-cse-after-loop -frerun-loop-opt -fcaller-saves
-	  -fpeephole2 -fschedule-insns -fschedule-insns2
-	  -fsched-interblock -fsched-spec -fregmove -fstrict-aliasing
-	  -fdelete-null-pointer-checks -freorder-blocks
-	  -freorder-functions -falign-functions -falign-jumps
-	  -falign-loops -falign-labels -ftree-vrp -ftree-pre. Please
-	  note the warning under -fgcse about invoking -O2 on programs
+	  -fexpensive-optimizations -fstrength-reduce -frerun-cse-after-loop
+	  -frerun-loop-opt -fcaller-saves -fpeephole2 -fschedule-insns
+	  -fschedule-insns2 -fsched-interblock -fsched-spec -fregmove
+	  -fstrict-aliasing -fdelete-null-pointer-checks -freorder-blocks
+	  -freorder-functions -falign-functions -falign-jumps -falign-loops
+	  -falign-labels -ftree-vrp -ftree-pre
+	  Please note the warning under -fgcse about invoking -O2 on programs
 	  that use computed gotos.
 
 config BR2_OPTIMIZE_3
 	bool "optimization level 3"
 	help
-	  Optimize yet more. -O3 turns on all optimizations specified by
-	  -O2 and also turns on the -finline-functions, -funswitch-loops
-	  and -fgcse-after-reload options.
-
-config BR2_OPTIMIZE_G
-	bool "optimize for debugging"
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8
-	help
-	  Optimize for debugging. This enables optimizations that do not
-	  interfere with debugging. It should be the optimization level
-	  of choice for the standard edit-compile-debug cycle, offering
-	  a reasonable level of optimization while maintaining fast
-	  compilation and a good debugging experience.
+	  Optimize yet more. -O3 turns on all optimizations specified by -O2
+	  and also turns on the -finline-functions, -funswitch-loops and
+	  -fgcse-after-reload options.
 
 config BR2_OPTIMIZE_S
 	bool "optimize for size"
 	help
-	  Optimize for size. -Os enables all -O2 optimizations that do
-	  not typically increase code size. It also performs further
-	  optimizations designed to reduce code size. -Os disables the
-	  following optimization flags: -falign-functions -falign-jumps
-	  -falign-loops -falign-labels -freorder-blocks
-	  -freorder-blocks-and-partition -fprefetch-loop-arrays
+	  Optimize for size. -Os enables all -O2 optimizations that do not
+	  typically increase code size. It also performs further optimizations
+	  designed to reduce code size. -Os disables the following optimization
+	  flags: -falign-functions -falign-jumps -falign-loops -falign-labels
+	  -freorder-blocks -freorder-blocks-and-partition -fprefetch-loop-arrays
 	  -ftree-vect-loop-version
 
 endchoice
@@ -532,20 +464,16 @@ config BR2_GOOGLE_BREAKPAD_ENABLE
 	bool "Enable google-breakpad support"
 	select BR2_PACKAGE_GOOGLE_BREAKPAD
 	depends on BR2_INSTALL_LIBSTDCPP
-	depends on BR2_HOST_GCC_AT_LEAST_4_8 # C++11
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8 # C++11
-	depends on BR2_USE_WCHAR
-	depends on BR2_TOOLCHAIN_HAS_THREADS
-	depends on (BR2_TOOLCHAIN_USES_GLIBC || BR2_TOOLCHAIN_USES_UCLIBC)
+	depends on BR2_TOOLCHAIN_USES_GLIBC
 	depends on BR2_PACKAGE_GOOGLE_BREAKPAD_ARCH_SUPPORTS
 	help
-	  This option will enable the use of google breakpad, a library
-	  and tool suite that allows you to distribute an application to
-	  users with compiler-provided debugging information removed,
-	  record crashes in compact "minidump" files, send them back to
-	  your server and produce C and C++ stack traces from these
-	  minidumps. Breakpad can also write minidumps on request for
-	  programs that have not crashed.
+	  This option will enable the use of google breakpad, a
+	  library and tool suite that allows you to distribute an
+	  application to users with compiler-provided debugging
+	  information removed, record crashes in compact "minidump"
+	  files, send them back to your server and produce C and C++
+	  stack traces from these minidumps.  Breakpad can also write
+	  minidumps on request for programs that have not crashed.
 
 if BR2_GOOGLE_BREAKPAD_ENABLE
 
@@ -565,59 +493,21 @@ config BR2_GOOGLE_BREAKPAD_INCLUDE_FILES
 
 endif
 
-choice
+config BR2_ENABLE_SSP
 	bool "build code with Stack Smashing Protection"
-	default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
 	depends on BR2_TOOLCHAIN_HAS_SSP
 	help
-	  Enable stack smashing protection support using GCC's
-	  -fstack-protector option family.
+	  Enable stack smashing protection support using GCCs
+	  -fstack-protector-all option.
 
-	  See
-	  http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
+	  See http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
 	  for details.
 
-	  Note that this requires the toolchain to have SSP support.
-	  This is always the case for glibc and eglibc toolchain, but is
-	  optional in uClibc toolchains.
+	  Note that this requires the toolchain to have SSP
+	  support. This is always the case for glibc and eglibc
+	  toolchain, but is optional in uClibc toolchains.
 
-config BR2_SSP_NONE
-	bool "None"
-	help
-	  Disable stack-smashing protection.
-
-config BR2_SSP_REGULAR
-	bool "-fstack-protector"
-	help
-	  Emit extra code to check for buffer overflows, such as stack
-	  smashing attacks. This is done by adding a guard variable to
-	  functions with vulnerable objects. This includes functions
-	  that call alloca, and functions with buffers larger than 8
-	  bytes. The guards are initialized when a function is entered
-	  and then checked when the function exits. If a guard check
-	  fails, an error message is printed and the program exits.
-
-config BR2_SSP_STRONG
-	bool "-fstack-protector-strong"
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
-	help
-	  Like -fstack-protector but includes additional functions to be
-	  protected - those that have local array definitions, or have
-	  references to local frame addresses.
-
-comment "Stack Smashing Protection strong needs a toolchain w/ gcc >= 4.9"
-	depends on !BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
-
-config BR2_SSP_ALL
-	bool "-fstack-protector-all"
-	help
-	  Like -fstack-protector except that all functions are
-	  protected. This option might have a significant performance
-	  impact on the compiled binaries.
-
-endchoice
-
-comment "Stack Smashing Protection needs a toolchain w/ SSP"
+comment "enabling Stack Smashing Protection requires support in the toolchain"
 	depends on !BR2_TOOLCHAIN_HAS_SSP
 
 choice
@@ -627,19 +517,20 @@ choice
 	help
 	  Select the type of libraries you want to use on the target.
 
-	  The default is to build dynamic libraries and use those on the
-	  target filesystem, except when the architecture and/or the
-	  selected binary format does not support shared libraries.
+	  The default is to build dynamic libraries and use those on
+	  the target filesystem, except when the architecture and/or
+	  the selected binary format does not support shared
+	  libraries.
 
 config BR2_STATIC_LIBS
 	bool "static only"
 	help
-	  Build and use only static libraries. No shared libraries will
-	  be installed on the target. This potentially increases your
-	  code size and should only be used if you know what you are
-	  doing. Note that some packages may not be available when this
-	  option is enabled, due to their need for dynamic library
-	  support.
+	  Build and use only static libraries. No shared libraries
+	  will be instaled on the target. This potentially increases
+	  your code size and should only be used if you know what you
+	  are doing. Note that some packages may not be available when
+	  this option is enabled, due to their need for dynamic
+	  library support.
 
 config BR2_SHARED_LIBS
 	bool "shared only"
@@ -665,66 +556,47 @@ config BR2_PACKAGE_OVERRIDE_FILE
 	default "$(CONFIG_DIR)/local.mk"
 	help
 	  A package override file is a short makefile that contains
-	  variable definitions of the form <pkg>_OVERRIDE_SRCDIR, which
-	  allows to tell Buildroot to use an existing directory as the
-	  source directory for a particular package. See the Buildroot
-	  documentation for more details on this feature.
+	  variable definitions of the form <pkg>_OVERRIDE_SRCDIR,
+	  which allows to tell Buildroot to use an existing directory
+	  as the source directory for a particular package. See the
+	  Buildroot documentation for more details on this feature.
 
 config BR2_GLOBAL_PATCH_DIR
 	string "global patch directories"
 	help
-	  You may specify a space separated list of one or more
-	  directories containing global package patches. For a specific
-	  version <packageversion> of a specific package <packagename>,
-	  patches are applied as follows:
+	  You may specify a space separated list of one or more directories
+	  containing global package patches. For a specific version
+	  <packageversion> of a specific package <packagename>, patches are
+	  applied as follows:
 
-	  First, the default Buildroot patch set for the package is
-	  applied from the package's directory in Buildroot.
+	  First, the default Buildroot patch set for the package is applied
+	  from the package's directory in Buildroot.
 
 	  Then for every directory - <global-patch-dir> - that exists in
 	  BR2_GLOBAL_PATCH_DIR, if the directory
-	  <global-patch-dir>/<packagename>/<packageversion>/ exists,
-	  then all *.patch files in this directory will be applied.
+	  <global-patch-dir>/<packagename>/<packageversion>/ exists, then all
+	  *.patch files in this directory will be applied.
 
-	  Otherwise, if the directory <global-patch-dir>/<packagename>
-	  exists, then all *.patch files in the directory will be
-	  applied.
+	  Otherwise, if the directory <global-patch-dir>/<packagename> exists,
+	  then all *.patch files in the directory will be applied.
 
 menu "Advanced"
 
 config BR2_COMPILER_PARANOID_UNSAFE_PATH
 	bool "paranoid check of library/header paths"
-	default y
 	help
 	  By default, when this option is disabled, when the Buildroot
-	  cross-compiler will encounter an unsafe library or header path
-	  (such as /usr/include, or /usr/lib), the compiler will display
-	  a warning.
+	  cross-compiler will encounter an unsafe library or header
+	  path (such as /usr/include, or /usr/lib), the compiler will
+	  display a warning.
 
-	  By enabling this option, this warning is turned into an error,
-	  which will completely abort the build when such unsafe paths
-	  are encountered.
+	  By enabling this option, this warning is turned into an
+	  error, which will completely abort the build when such
+	  unsafe paths are encountered.
 
 	  Note that this mechanism is available for both the internal
-	  toolchain (through the toolchain wrapper and binutils patches)
-	  and external toolchain backends (through the toolchain wrapper).
-
-config BR2_REPRODUCIBLE
-	bool "Make the build reproducible (experimental)"
-	help
-	  This option will remove all sources of non-reproducibility
-	  from the build process. For a given Buildroot configuration,
-	  this allows to generate exactly identical binaries from one
-	  build to the other, including on different machines.
-
-	  The current implementation is restricted to builds with the
-	  same output directory. Many (absolute) paths are recorded in
-	  intermediary files, and it is very likely that some of these
-	  paths leak into the target rootfs. If you build with the
-	  same O=... path, however, the result is identical.
-
-	  This is labeled as an experimental feature, as not all
-	  packages behave properly to ensure reproducibility.
+	  toolchain (through gcc and binutils patches) and external
+	  toolchain backends (through the external toolchain wrapper).
 
 endmenu
 
@@ -746,4 +618,9 @@ source "package/Config.in.host"
 
 source "Config.in.legacy"
 
-source "$BR2_BUILD_DIR/.br2-external.in"
+menu "User-provided options"
+	depends on BR2_EXTERNAL != "support/dummy-external"
+
+source "$BR2_EXTERNAL/Config.in"
+
+endmenu

Makefile.legacy

@@ -4,6 +4,9 @@
 # This file contains placeholders to detect backward-compatibility problems.
 # When a buildroot "API" feature is being deprecated, a rule should be added
 # here that issues an error when the old feature is used.
+#
+# This file is not included if BR2_DEPRECATED is selected, so it is possible
+# to bypass the errors (although that's usually a bad idea).
 
 ifeq ($(BR2_LEGACY),y)
 $(error "You have legacy configuration in your .config! Please check your configuration.")

README

@@ -21,6 +21,3 @@ Buildroot comes with a basic configuration for a number of boards. Run
 Please feed suggestions, bug reports, insults, and bribes back to the
 buildroot mailing list: buildroot@buildroot.org
 You can also find us on #buildroot on Freenode IRC.
-
-If you would like to contribute patches, please read
-https://buildroot.org/manual.html#submitting-patches

arch/Config.in

@@ -85,14 +85,6 @@ config BR2_bfin
 	  http://www.analog.com/
 	  http://en.wikipedia.org/wiki/Blackfin
 
-config BR2_csky
-	bool "csky"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  csky is processor IP from china.
-	  http://www.c-sky.com/
-	  http://www.github.com/c-sky
-
 config BR2_i386
 	bool "i386"
 	select BR2_ARCH_HAS_MMU_MANDATORY
@@ -102,7 +94,8 @@ config BR2_i386
 
 config BR2_m68k
 	bool "m68k"
-	# MMU support is set by the subarchitecture file, arch/Config.in.m68k
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	depends on BROKEN # ice in uclibc / inet_ntoa_r
 	help
 	  Motorola 68000 family microprocessor
 	  http://en.wikipedia.org/wiki/M68k
@@ -167,13 +160,6 @@ config BR2_nios2
 	  http://www.altera.com/
 	  http://en.wikipedia.org/wiki/Nios_II
 
-config BR2_or1k
-	bool "OpenRISC"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  OpenRISC is a free and open processor for embedded system.
-	  http://openrisc.io
-
 config BR2_powerpc
 	bool "PowerPC"
 	select BR2_ARCH_HAS_MMU_MANDATORY
@@ -212,18 +198,18 @@ config BR2_sh
 	  http://www.hitachi.com/
 	  http://en.wikipedia.org/wiki/SuperH
 
-config BR2_sparc
-	bool "SPARC"
+config BR2_sh64
+	bool "SuperH64"
+	depends on BR2_DEPRECATED_SINCE_2015_05
 	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
-	  SPARC (from Scalable Processor Architecture) is a RISC instruction
-	  set architecture (ISA) developed by Sun Microsystems.
-	  http://www.oracle.com/sun
-	  http://en.wikipedia.org/wiki/Sparc
+	  SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
+	  instruction set architecture (ISA) developed by Hitachi.
+	  http://www.hitachi.com/
+	  http://en.wikipedia.org/wiki/SuperH
 
-config BR2_sparc64
-	bool "SPARC64"
-	select BR2_ARCH_IS_64
+config BR2_sparc
+	bool "SPARC"
 	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  SPARC (from Scalable Processor Architecture) is a RISC instruction
@@ -264,12 +250,6 @@ config BR2_GCC_TARGET_ARCH
 config BR2_GCC_TARGET_ABI
 	string
 
-config BR2_GCC_TARGET_NAN
-	string
-
-config BR2_GCC_TARGET_FP32_MODE
-	string
-
 config BR2_GCC_TARGET_CPU
 	string
 
@@ -294,16 +274,14 @@ config BR2_GCC_TARGET_FLOAT_ABI
 config BR2_GCC_TARGET_MODE
 	string
 
+# If the architecture has atomic operations, select this:
+config BR2_ARCH_HAS_ATOMICS
+	bool
+
 # Must be selected by binary formats that support shared libraries.
 config BR2_BINFMT_SUPPORTS_SHARED
 	bool
 
-# Must match the name of the architecture from readelf point of view,
-# i.e the "Machine:" field of readelf output. See get_machine_name()
-# in binutils/readelf.c for the list of possible values.
-config BR2_READELF_ARCH_NAME
-	string
-
 # Set up target binary format
 choice
 	prompt "Target Binary Format"
@@ -353,19 +331,12 @@ config BR2_BINFMT_FLAT_ONE
 
 config BR2_BINFMT_FLAT_SEP_DATA
 	bool "Separate data and code region"
-	# this FLAT binary type technically exists on m68k, but fails
-	# to build numerous packages: due to architecture limitation,
-	# big functions cannot be built in this mode. They cause build
-	# failures such as "Tried to convert PC relative branch to
-	# absolute jump" or "error: value -yyyyy out of range".
-	depends on BR2_bfin
 	help
 	  Allow for the data and text segments to be separated and placed in
 	  different regions of memory.
 
 config BR2_BINFMT_FLAT_SHARED
 	bool "Shared binary"
-	depends on BR2_m68k || BR2_bfin
 	# Even though this really generates shared binaries, there is no libdl
 	# and dlopen() cannot be used. So packages that require shared
 	# libraries cannot be built. Therefore, we don't select
@@ -381,18 +352,18 @@ if BR2_arcle || BR2_arceb
 source "arch/Config.in.arc"
 endif
 
-if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
+if BR2_arm || BR2_armeb
 source "arch/Config.in.arm"
 endif
 
+if BR2_aarch64 || BR2_aarch64_be
+source "arch/Config.in.aarch64"
+endif
+
 if BR2_bfin
 source "arch/Config.in.bfin"
 endif
 
-if BR2_csky
-source "arch/Config.in.csky"
-endif
-
 if BR2_m68k
 source "arch/Config.in.m68k"
 endif
@@ -409,19 +380,15 @@ if BR2_nios2
 source "arch/Config.in.nios2"
 endif
 
-if BR2_or1k
-source "arch/Config.in.or1k"
-endif
-
 if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
 source "arch/Config.in.powerpc"
 endif
 
-if BR2_sh
+if BR2_sh || BR2_sh64
 source "arch/Config.in.sh"
 endif
 
-if BR2_sparc || BR2_sparc64
+if BR2_sparc
 source "arch/Config.in.sparc"
 endif
 

arch/Config.in.aarch64

@@ -0,0 +1,10 @@
+config BR2_ARCH
+	default "aarch64"	if BR2_aarch64
+	default "aarch64_be"	if BR2_aarch64_be
+
+config BR2_ENDIAN
+	default "LITTLE" if BR2_aarch64
+	default "BIG"	 if BR2_aarch64_be
+
+config BR2_ARCH_HAS_ATOMICS
+	default y

arch/Config.in.arc

@@ -21,6 +21,9 @@ config BR2_ARC_ATOMIC_EXT
 	bool "Atomic extension (LLOCK/SCOND instructions)"
 	default y if BR2_arc770d || BR2_archs38
 
+config BR2_ARCH_HAS_ATOMICS
+	default y if BR2_ARC_ATOMIC_EXT
+
 config BR2_ARCH
 	default "arc"	if BR2_arcle
 	default "arceb"	if BR2_arceb
@@ -38,10 +41,6 @@ config BR2_GCC_TARGET_CPU
 	default "arc700" if BR2_arc770d
 	default "archs"	 if BR2_archs38
 
-config BR2_READELF_ARCH_NAME
-	default "ARCompact"	if BR2_arc750d || BR2_arc770d
-	default "ARCv2"		if BR2_archs38
-
 choice
 	prompt "MMU Page Size"
 	default BR2_ARC_PAGE_SIZE_8K

arch/Config.in.arm

@@ -31,10 +31,6 @@ config BR2_ARM_CPU_HAS_VFPV4
 	bool
 	select BR2_ARM_CPU_HAS_VFPV3
 
-config BR2_ARM_CPU_HAS_FP_ARMV8
-	bool
-	select BR2_ARM_CPU_HAS_VFPV4
-
 config BR2_ARM_CPU_HAS_ARM
 	bool
 
@@ -56,14 +52,9 @@ config BR2_ARM_CPU_ARMV6
 config BR2_ARM_CPU_ARMV7A
 	bool
 
-config BR2_ARM_CPU_ARMV7M
-	bool
-
-config BR2_ARM_CPU_ARMV8
-	bool
-
 choice
 	prompt "Target Architecture Variant"
+	depends on BR2_arm || BR2_armeb
 	default BR2_arm926t
 	help
 	  Specific CPU variant to use
@@ -74,14 +65,12 @@ config BR2_arm920t
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm922t
 	bool "arm922t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm926t
 	bool "arm926t"
 	select BR2_ARM_CPU_HAS_ARM
@@ -89,14 +78,12 @@ config BR2_arm926t
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1136j_s
 	bool "arm1136j-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1136jf_s
 	bool "arm1136jf-s"
 	select BR2_ARM_CPU_HAS_ARM
@@ -104,14 +91,12 @@ config BR2_arm1136jf_s
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
 	select BR2_ARM_CPU_HAS_ARM
@@ -119,15 +104,6 @@ config BR2_arm1176jzf_s
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_arm11mpcore
-	bool "mpcore"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a5
 	bool "cortex-A5"
 	select BR2_ARM_CPU_HAS_ARM
@@ -136,7 +112,6 @@ config BR2_cortex_a5
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a7
 	bool "cortex-A7"
 	select BR2_ARM_CPU_HAS_ARM
@@ -145,7 +120,6 @@ config BR2_cortex_a7
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a8
 	bool "cortex-A8"
 	select BR2_ARM_CPU_HAS_ARM
@@ -154,7 +128,6 @@ config BR2_cortex_a8
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a9
 	bool "cortex-A9"
 	select BR2_ARM_CPU_HAS_ARM
@@ -163,7 +136,6 @@ config BR2_cortex_a9
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a12
 	bool "cortex-A12"
 	select BR2_ARM_CPU_HAS_ARM
@@ -172,7 +144,6 @@ config BR2_cortex_a12
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a15
 	bool "cortex-A15"
 	select BR2_ARM_CPU_HAS_ARM
@@ -181,142 +152,42 @@ config BR2_cortex_a15
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_cortex_a15_a7
-	bool "cortex-A15/A7 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_cortex_a17
-	bool "cortex-A17"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_cortex_a17_a7
-	bool "cortex-A17/A7 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_cortex_a53
-	bool "cortex-A53"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a57
-	bool "cortex-A57"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a57_a53
-	bool "cortex-A57/A53 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a72
-	bool "cortex-A72"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a72_a53
-	bool "cortex-A72/A53 big.LITTLE"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_m3
 	bool "cortex-M3"
+	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7M
-	depends on !BR2_ARCH_IS_64
-config BR2_cortex_m4
-	bool "cortex-M4"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7M
-	depends on !BR2_ARCH_IS_64
 config BR2_fa526
 	bool "fa526/626"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_pj4
 	bool "pj4"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_strongarm
 	bool "strongarm sa110/sa1100"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_xscale
 	bool "xscale"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_iwmmxt
 	bool "iwmmxt"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 endchoice
 
-config BR2_ARM_ENABLE_NEON
-	bool "Enable NEON SIMD extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_NEON
-	select BR2_ARM_CPU_HAS_NEON
-	help
-	  For some CPU cores, the NEON SIMD extension is optional.
-	  Select this option if you are certain your particular
-	  implementation has NEON support and you want to use it.
-
-config BR2_ARM_ENABLE_VFP
-	bool "Enable VFP extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
-	select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	help
-	  For some CPU cores, the VFP extension is optional. Select
-	  this option if you are certain your particular
-	  implementation has VFP support and you want to use it.
-
 choice
 	prompt "Target ABI"
 	depends on BR2_arm || BR2_armeb
-	default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 	default BR2_ARM_EABI
 	help
 	  Application Binary Interface to use. The Application Binary
@@ -350,7 +221,7 @@ config BR2_ARM_EABI
 
 config BR2_ARM_EABIHF
 	bool "EABIhf"
-	depends on BR2_ARM_CPU_HAS_VFPV2
+	depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
 	help
 	  The EABIhf is an extension of EABI which supports the 'hard'
 	  floating point model. This model uses the floating point
@@ -368,9 +239,18 @@ config BR2_ARM_EABIHF
 
 endchoice
 
+config BR2_ARM_ENABLE_NEON
+	bool "Enable NEON SIMD extension support"
+	depends on BR2_ARM_CPU_MAYBE_HAS_NEON
+	select BR2_ARM_CPU_HAS_NEON
+	help
+	  For some CPU cores, the NEON SIMD extension is optional.
+	  Select this option if you are certain your particular
+	  implementation has NEON support and you want to use it.
+
 choice
 	prompt "Floating point strategy"
-	default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
+	depends on BR2_ARM_EABI || BR2_ARM_EABIHF
 	default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 	default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 	default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
@@ -388,7 +268,7 @@ config BR2_ARM_SOFT_FLOAT
 
 config BR2_ARM_FPU_VFPV2
 	bool "VFPv2"
-	depends on BR2_ARM_CPU_HAS_VFPV2
+	depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	help
 	  This option allows to use the VFPv2 floating point unit, as
 	  available in some ARMv5 processors (ARM926EJ-S) and some
@@ -401,7 +281,7 @@ config BR2_ARM_FPU_VFPV2
 
 config BR2_ARM_FPU_VFPV3
 	bool "VFPv3"
-	depends on BR2_ARM_CPU_HAS_VFPV3
+	depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	help
 	  This option allows to use the VFPv3 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{8, 9}). This
@@ -417,7 +297,7 @@ config BR2_ARM_FPU_VFPV3
 
 config BR2_ARM_FPU_VFPV3D16
 	bool "VFPv3-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV3
+	depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	help
 	  This option allows to use the VFPv3 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{8, 9}). This
@@ -432,7 +312,7 @@ config BR2_ARM_FPU_VFPV3D16
 
 config BR2_ARM_FPU_VFPV4
 	bool "VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	help
 	  This option allows to use the VFPv4 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
@@ -447,7 +327,7 @@ config BR2_ARM_FPU_VFPV4
 
 config BR2_ARM_FPU_VFPV4D16
 	bool "VFPv4-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	help
 	  This option allows to use the VFPv4 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
@@ -472,7 +352,7 @@ config BR2_ARM_FPU_NEON
 
 config BR2_ARM_FPU_NEON_VFPV4
 	bool "NEON/VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	depends on BR2_ARM_CPU_HAS_NEON
 	help
 	  This option allows to use both the VFPv4 and the NEON SIMD
@@ -481,25 +361,10 @@ config BR2_ARM_FPU_NEON_VFPV4
 	  example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 	  NEON is optional.
 
-config BR2_ARM_FPU_FP_ARMV8
-	bool "FP-ARMv8"
-	depends on BR2_ARM_CPU_HAS_FP_ARMV8
-	help
-	  This option allows to use the ARMv8 floating point unit.
-
-config BR2_ARM_FPU_NEON_FP_ARMV8
-	bool "NEON/FP-ARMv8"
-	depends on BR2_ARM_CPU_HAS_FP_ARMV8
-	depends on BR2_ARM_CPU_HAS_NEON
-	help
-	  This option allows to use both the ARMv8 floating point unit
-	  and the NEON SIMD unit for floating point operations.
-
 endchoice
 
 choice
 	prompt "ARM instruction set"
-	depends on BR2_arm || BR2_armeb
 
 config BR2_ARM_INSTRUCTIONS_ARM
 	bool "ARM"
@@ -511,18 +376,12 @@ config BR2_ARM_INSTRUCTIONS_ARM
 config BR2_ARM_INSTRUCTIONS_THUMB
 	bool "Thumb"
 	depends on BR2_ARM_CPU_HAS_THUMB
-	# Thumb-1 and VFP are not compatible
-	depends on BR2_ARM_SOFT_FLOAT
 	help
 	  This option instructions the compiler to generate Thumb
 	  instructions, which allows to mix 16 bits instructions and
 	  32 bits instructions. This generally provides a much smaller
 	  compiled binary size.
 
-comment "Thumb1 is not compatible with VFP"
-	depends on BR2_ARM_CPU_HAS_THUMB
-	depends on !BR2_ARM_SOFT_FLOAT
-
 config BR2_ARM_INSTRUCTIONS_THUMB2
 	bool "Thumb2"
 	depends on BR2_ARM_CPU_HAS_THUMB2
@@ -535,14 +394,15 @@ config BR2_ARM_INSTRUCTIONS_THUMB2
 endchoice
 
 config BR2_ARCH
-	default "arm"		if BR2_arm
-	default "armeb"		if BR2_armeb
-	default "aarch64"	if BR2_aarch64
-	default "aarch64_be"	if BR2_aarch64_be
+	default "arm"	if BR2_arm
+	default "armeb"	if BR2_armeb
 
 config BR2_ENDIAN
-	default "LITTLE" if (BR2_arm || BR2_aarch64)
-	default "BIG"	 if (BR2_armeb || BR2_aarch64_be)
+	default "LITTLE" if BR2_arm
+	default "BIG"	 if BR2_armeb
+
+config BR2_ARCH_HAS_ATOMICS
+	default y
 
 config BR2_GCC_TARGET_CPU
 	default "arm920t"	if BR2_arm920t
@@ -552,45 +412,30 @@ config BR2_GCC_TARGET_CPU
 	default "arm1136jf-s"	if BR2_arm1136jf_s
 	default "arm1176jz-s"	if BR2_arm1176jz_s
 	default "arm1176jzf-s"	if BR2_arm1176jzf_s
-	default "mpcore"	if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
-	default "mpcorenovfp"	if BR2_arm11mpcore
 	default "cortex-a5"	if BR2_cortex_a5
 	default "cortex-a7"	if BR2_cortex_a7
 	default "cortex-a8"	if BR2_cortex_a8
 	default "cortex-a9"	if BR2_cortex_a9
 	default "cortex-a12"	if BR2_cortex_a12
 	default "cortex-a15"	if BR2_cortex_a15
-	default "cortex-a15.cortex-a7"	if BR2_cortex_a15_a7
-	default "cortex-a17"	if BR2_cortex_a17
-	default "cortex-a17.cortex-a7"	if BR2_cortex_a17_a7
 	default "cortex-m3"	if BR2_cortex_m3
-	default "cortex-m4"	if BR2_cortex_m4
 	default "fa526"		if BR2_fa526
 	default "marvell-pj4"	if BR2_pj4
 	default "strongarm"	if BR2_strongarm
 	default "xscale"	if BR2_xscale
 	default "iwmmxt"	if BR2_iwmmxt
-	default "cortex-a53"	if BR2_cortex_a53
-	default "cortex-a57"	if BR2_cortex_a57
-	default "cortex-a57.cortex-a53"	if BR2_cortex_a57_a53
-	default "cortex-a72"	if BR2_cortex_a72
-	default "cortex-a72.cortex-a53"	if BR2_cortex_a72_a53
 
 config BR2_GCC_TARGET_ABI
-	default "aapcs-linux"	if BR2_arm || BR2_armeb
-	default "lp64"		if BR2_aarch64 || BR2_aarch64_be
+	default "aapcs-linux"
 
 config BR2_GCC_TARGET_FPU
-	depends on BR2_arm || BR2_armeb
 	default "vfp"		if BR2_ARM_FPU_VFPV2
 	default "vfpv3"		if BR2_ARM_FPU_VFPV3
-	default "vfpv3-d16"	if BR2_ARM_FPU_VFPV3D16
-	default "vfpv4"		if BR2_ARM_FPU_VFPV4
-	default "vfpv4-d16"	if BR2_ARM_FPU_VFPV4D16
-	default "neon"		if BR2_ARM_FPU_NEON
-	default "neon-vfpv4"	if BR2_ARM_FPU_NEON_VFPV4
-	default "fp-armv8"	if BR2_ARM_FPU_FP_ARMV8
-	default "neon-fp-armv8"	if BR2_ARM_FPU_NEON_FP_ARMV8
+	default "vfpv3-d16" 	if BR2_ARM_FPU_VFPV3D16
+	default "vfpv4" 	if BR2_ARM_FPU_VFPV4
+	default "vfpv4-d16" 	if BR2_ARM_FPU_VFPV4D16
+	default "neon" 		if BR2_ARM_FPU_NEON
+	default "neon-vfpv4" 	if BR2_ARM_FPU_NEON_VFPV4
 
 config BR2_GCC_TARGET_FLOAT_ABI
 	default "soft"		if BR2_ARM_SOFT_FLOAT
@@ -600,7 +445,3 @@ config BR2_GCC_TARGET_FLOAT_ABI
 config BR2_GCC_TARGET_MODE
 	default "arm"		if BR2_ARM_INSTRUCTIONS_ARM
 	default "thumb"		if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
-
-config BR2_READELF_ARCH_NAME
-	default "ARM"		if BR2_arm || BR2_armeb
-	default "AArch64"	if BR2_aarch64 || BR2_aarch64_be

arch/Config.in.bfin

@@ -1,7 +1,7 @@
 choice
 	prompt "Target CPU"
 	depends on BR2_bfin
-	default BR2_bf532
+	default BR2_bf609
 	help
 	  Specify target CPU
 config BR2_bf606
@@ -68,6 +68,9 @@ config BR2_ARCH
 config BR2_ENDIAN
 	default "LITTLE"
 
+config BR2_ARCH_HAS_ATOMICS
+	default y
+
 config BR2_GCC_TARGET_CPU
 	default bf606		if BR2_bf606
 	default bf607		if BR2_bf607
@@ -105,6 +108,3 @@ config BR2_GCC_TARGET_CPU_REVISION
 	  value of the -mcpu option. For example, if the selected CPU is
 	  bf609, and then selected CPU revision is "0.0", then gcc will
 	  receive the -mcpu=bf609-0.0 option.
-
-config BR2_READELF_ARCH_NAME
-	default "Analog Devices Blackfin"

arch/Config.in.csky

@@ -1,48 +0,0 @@
-choice
-	prompt "Target Architecture Variant"
-	default BR2_ck610
-	help
-	  Specific CPU variant to use
-
-config BR2_ck610
-	bool "ck610"
-
-config BR2_ck807
-	bool "ck807"
-
-config BR2_ck810
-	bool "ck810"
-
-endchoice
-
-config BR2_CSKY_FPU
-	bool "Enable FPU coprocessor"
-	depends on BR2_ck810 || BR2_ck807
-	help
-	  You can say N here if your C-SKY CPU doesn't have a
-	  Floating-Point Coprocessor or if you don't need FPU support
-	  for your user-space programs.
-
-config BR2_CSKY_DSP
-	bool "Enable DSP enhanced instructions"
-	depends on BR2_ck810 || BR2_ck807
-
-config BR2_ARCH
-	default "csky"
-
-config BR2_ENDIAN
-	default "LITTLE"
-
-config BR2_GCC_TARGET_CPU
-	default "ck610"		if (BR2_ck610 && !BR2_CSKY_FPU && !BR2_CSKY_DSP)
-	default "ck807"		if (BR2_ck807 && !BR2_CSKY_FPU && !BR2_CSKY_DSP)
-	default "ck807e"	if (BR2_ck807 && !BR2_CSKY_FPU &&  BR2_CSKY_DSP)
-	default "ck807f"	if (BR2_ck807 &&  BR2_CSKY_FPU && !BR2_CSKY_DSP)
-	default "ck807ef"	if (BR2_ck807 &&  BR2_CSKY_FPU &&  BR2_CSKY_DSP)
-	default "ck810"		if (BR2_ck810 && !BR2_CSKY_FPU && !BR2_CSKY_DSP)
-	default "ck810e"	if (BR2_ck810 && !BR2_CSKY_FPU &&  BR2_CSKY_DSP)
-	default "ck810f"	if (BR2_ck810 &&  BR2_CSKY_FPU && !BR2_CSKY_DSP)
-	default "ck810ef"	if (BR2_ck810 &&  BR2_CSKY_FPU &&  BR2_CSKY_DSP)
-
-config BR2_READELF_ARCH_NAME
-	default "CSKY"

arch/Config.in.m68k

@@ -4,37 +4,13 @@ config BR2_ARCH
 config BR2_ENDIAN
 	default "BIG"
 
-# symbols used to distinguish between m68k and coldfire
-# for gcc multilib
-config BR2_m68k_m68k
-	bool
+config BR2_ARCH_HAS_ATOMICS
+	default y
 
-config BR2_m68k_cf
-	bool
-
-# coldfire variants will be added later
-choice
-	prompt "Target CPU"
-	depends on BR2_m68k
-	default BR2_m68k_68040
-	help
-	  Specific CPU variant to use
-
-config BR2_m68k_68040
-	bool "68040"
-	select BR2_m68k_m68k
-	select BR2_ARCH_HAS_MMU_MANDATORY
-
-config BR2_m68k_cf5208
-	bool "5208"
-	select BR2_m68k_cf
-	select BR2_SOFT_FLOAT
-
-endchoice
-
-config BR2_GCC_TARGET_CPU
+config BR2_GCC_TARGET_ARCH
+	default "68000"		if BR2_m68k_68000
+	default "68010"		if BR2_m68k_68010
+	default "68020"		if BR2_m68k_68020
+	default "68030"		if BR2_m68k_68030
 	default "68040"		if BR2_m68k_68040
-	default "5208"		if BR2_m68k_cf5208
-
-config BR2_READELF_ARCH_NAME
-	default "MC68000"
+	default "68060"		if BR2_m68k_68060

arch/Config.in.microblaze

@@ -6,9 +6,9 @@ config BR2_ENDIAN
 	default "LITTLE" if BR2_microblazeel
 	default "BIG"	 if BR2_microblazebe
 
-config BR2_READELF_ARCH_NAME
-	default "Xilinx MicroBlaze"
-
 config BR2_microblaze
 	bool
 	default y if BR2_microblazeel || BR2_microblazebe
+
+config BR2_ARCH_HAS_ATOMICS
+	default y

arch/Config.in.mips

@@ -1,27 +1,3 @@
-# mips default CPU ISAs
-config BR2_MIPS_CPU_MIPS32
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS32R2
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS32R5
-	bool
-config BR2_MIPS_CPU_MIPS32R6
-	bool
-	select BR2_MIPS_NAN_2008
-config BR2_MIPS_CPU_MIPS64
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS64R2
-	bool
-	select BR2_MIPS_NAN_LEGACY
-config BR2_MIPS_CPU_MIPS64R5
-	bool
-config BR2_MIPS_CPU_MIPS64R6
-	bool
-	select BR2_MIPS_NAN_2008
-
 choice
 	prompt "Target Architecture Variant"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
@@ -30,80 +6,21 @@ choice
 	help
 	  Specific CPU variant to use
 
-	  64bit cabable: 64, 64r2, 64r5, 64r6
-	  non-64bit capable: 32, 32r2, 32r5, 32r6
+	  64bit cabable: 3, 4, 64, 64r2
+	  non-64bit capable: 1, 2, 32, 32r2
 
 config BR2_mips_32
-	bool "Generic MIPS32"
+	bool "mips 32"
 	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32
 config BR2_mips_32r2
-	bool "Generic MIPS32R2"
+	bool "mips 32r2"
 	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_32r5
-	bool "Generic MIPS32R5"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-config BR2_mips_32r6
-	bool "Generic MIPS32R6"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R6
-config BR2_mips_interaptiv
-	bool "interAptiv"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5150
-	bool "M5150"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-	select BR2_MIPS_NAN_2008
-config BR2_mips_m6250
-	bool "M6250"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R6
-config BR2_mips_p5600
-	bool "P5600"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-	select BR2_MIPS_NAN_2008
-config BR2_mips_xburst
-	bool "XBurst"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-	help
-	  The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
-	  bug in the FPU that can generate incorrect results in
-	  certain cases. The problem shows up when you have several
-	  fused madd instructions in sequence with dependant
-	  operands. This requires the -mno-fused-madd compiler option
-	  to be used in order to prevent emitting these instructions.
-
-	  See http://www.ingenic.com/en/?xburst.html
 config BR2_mips_64
-	bool "Generic MIPS64"
+	bool "mips 64"
 	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64
 config BR2_mips_64r2
-	bool "Generic MIPS64R2"
+	bool "mips 64r2"
 	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R2
-config BR2_mips_64r5
-	bool "Generic MIPS64R5"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R5
-config BR2_mips_64r6
-	bool "Generic MIPS64R6"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
-config BR2_mips_i6400
-	bool "I6400"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
-config BR2_mips_p6600
-	bool "P6600"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
 endchoice
 
 
@@ -134,64 +51,6 @@ config BR2_MIPS_SOFT_FLOAT
 	  floating point functions, then everything will need to be
 	  compiled with soft floating point support (-msoft-float).
 
-choice
-	prompt "FP mode"
-	depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
-	default BR2_MIPS_FP32_MODE_XX if BR2_TOOLCHAIN_HAS_MFPXX_OPTION
-	help
-	  MIPS32 supports different FP modes (32,xx,64). Information about FP
-	  modes can be found here:
-	  https://sourceware.org/binutils/docs/as/MIPS-Options.html
-	  https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
-
-config BR2_MIPS_FP32_MODE_32
-	bool "32"
-	depends on !BR2_MIPS_CPU_MIPS32R6
-
-config BR2_MIPS_FP32_MODE_XX
-	bool "xx"
-	depends on BR2_TOOLCHAIN_HAS_MFPXX_OPTION
-
-config BR2_MIPS_FP32_MODE_64
-	bool "64"
-	depends on !BR2_MIPS_CPU_MIPS32
-endchoice
-
-config BR2_GCC_TARGET_FP32_MODE
-	default "32"	if BR2_MIPS_FP32_MODE_32
-	default "xx"	if BR2_MIPS_FP32_MODE_XX
-	default "64"	if BR2_MIPS_FP32_MODE_64
-
-config BR2_MIPS_NAN_LEGACY
-	bool
-
-config BR2_MIPS_NAN_2008
-	bool
-
-choice
-	prompt "Target NaN"
-	depends on BR2_TOOLCHAIN_HAS_MNAN_OPTION
-	depends on BR2_mips_32r5 || BR2_mips_64r5
-	default BR2_MIPS_ENABLE_NAN_2008
-	help
-	  MIPS supports two different NaN encodings, legacy and 2008.
-	  Information about MIPS NaN encodings can be found here:
-	  https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
-
-config BR2_MIPS_ENABLE_NAN_LEGACY
-	bool "legacy"
-	select BR2_MIPS_NAN_LEGACY
-
-config BR2_MIPS_ENABLE_NAN_2008
-	bool "2008"
-	depends on !BR2_MIPS_SOFT_FLOAT
-	select BR2_MIPS_NAN_2008
-endchoice
-
-config BR2_GCC_TARGET_NAN
-	default "legacy"	if BR2_MIPS_NAN_LEGACY
-	default "2008"		if BR2_MIPS_NAN_2008
-
 config BR2_ARCH
 	default "mips"		if BR2_mips
 	default "mipsel"	if BR2_mipsel
@@ -200,24 +59,20 @@ config BR2_ARCH
 
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_mipsel || BR2_mips64el
-	default "BIG"		if BR2_mips || BR2_mips64
+	default "BIG" 	    	if BR2_mips || BR2_mips64
+
+config BR2_ARCH_HAS_ATOMICS
+	default y
 
 config BR2_GCC_TARGET_ARCH
+	default "mips1"		if BR2_mips_1
+	default "mips2"		if BR2_mips_2
+	default "mips3"		if BR2_mips_3
+	default "mips4"		if BR2_mips_4
 	default "mips32"	if BR2_mips_32
 	default "mips32r2"	if BR2_mips_32r2
-	default "mips32r5"	if BR2_mips_32r5
-	default "mips32r6"	if BR2_mips_32r6
-	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5101"		if BR2_mips_m5150
-	default "m6201"		if BR2_mips_m6250
-	default "p5600"		if BR2_mips_p5600
-	default "mips32r2"	if BR2_mips_xburst
 	default "mips64"	if BR2_mips_64
 	default "mips64r2"	if BR2_mips_64r2
-	default "mips64r5"	if BR2_mips_64r5
-	default "mips64r6"	if BR2_mips_64r6
-	default "i6400"		if BR2_mips_i6400
-	default "p6600"		if BR2_mips_p6600
 
 config BR2_MIPS_OABI32
 	bool
@@ -227,6 +82,3 @@ config BR2_GCC_TARGET_ABI
 	default "32"		if BR2_MIPS_OABI32
 	default "n32"		if BR2_MIPS_NABI32
 	default "64"		if BR2_MIPS_NABI64
-
-config BR2_READELF_ARCH_NAME
-	default "MIPS R3000"

arch/Config.in.nios2

@@ -4,5 +4,5 @@ config BR2_ARCH
 config BR2_ENDIAN
 	default "LITTLE"
 
-config BR2_READELF_ARCH_NAME
-	default "Altera Nios II"
+config BR2_ARCH_HAS_ATOMICS
+	default y

arch/Config.in.or1k

@@ -1,8 +0,0 @@
-config BR2_ARCH
-	default "or1k"
-
-config BR2_ENDIAN
-	default "BIG"
-
-config BR2_READELF_ARCH_NAME
-	default "OpenRISC 1000"

arch/Config.in.powerpc

@@ -164,6 +164,9 @@ config BR2_ENDIAN
 	default "BIG"    if BR2_powerpc || BR2_powerpc64
 	default "LITTLE" if BR2_powerpc64le
 
+config BR2_ARCH_HAS_ATOMICS
+	default y
+
 config BR2_GCC_TARGET_CPU
 	default "401"		if BR2_powerpc_401
 	default "403"		if BR2_powerpc_403
@@ -197,8 +200,6 @@ config BR2_GCC_TARGET_CPU
 	default "e300c2"	if BR2_powerpc_e300c2
 	default "e300c3"	if BR2_powerpc_e300c3
 	default "e500mc"	if BR2_powerpc_e500mc
-	default "e5500"		if BR2_powerpc_e5500
-	default "e6500"		if BR2_powerpc_e6500
 	default "power4"	if BR2_powerpc_power4
 	default "power5"	if BR2_powerpc_power5
 	default "power6"	if BR2_powerpc_power6
@@ -212,7 +213,3 @@ config BR2_GCC_TARGET_ABI
 	default "no-spe"		if BR2_PPC_ABI_no-spe
 	default "ibmlongdouble"		if BR2_PPC_ABI_ibmlongdouble
 	default "ieeelongdouble"	if BR2_PPC_ABI_ieeelongdouble
-
-config BR2_READELF_ARCH_NAME
-	default "PowerPC"	if BR2_powerpc
-	default "PowerPC64"	if BR2_powerpc64 || BR2_powerpc64le

arch/Config.in.sh

@@ -23,10 +23,11 @@ config BR2_ARCH
 	default "sh4eb"		if BR2_sh4eb
 	default "sh4a"		if BR2_sh4a
 	default "sh4aeb"	if BR2_sh4aeb
+	default "sh64"		if BR2_sh64
 
 config BR2_ENDIAN
-	default "LITTLE"	if BR2_sh4 || BR2_sh4a
+	default "LITTLE"	if BR2_sh4 || BR2_sh4a || BR2_sh64
 	default "BIG"		if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb
 
-config BR2_READELF_ARCH_NAME
-	default "Renesas / SuperH SH"
+config BR2_ARCH_HAS_ATOMICS
+	default y

arch/Config.in.sparc

@@ -1,25 +1,18 @@
 choice
 	prompt "Target Architecture Variant"
-	depends on BR2_sparc || BR2_sparc64
-	default BR2_sparc_v8 if BR2_sparc
-	default BR2_sparc_v9 if BR2_sparc64
+	depends on BR2_sparc
+	default BR2_sparc_v8
 	help
 	  Specific CPU variant to use
 
 config BR2_sparc_v8
 	bool "v8"
-	depends on BR2_sparc
 config BR2_sparc_leon3
 	bool "leon3"
-	depends on BR2_sparc
-config BR2_sparc_v9
-	bool "v9"
-	depends on BR2_sparc64
 endchoice
 
 config BR2_ARCH
 	default "sparc"	if BR2_sparc
-	default "sparc64" if BR2_sparc64
 
 config BR2_ENDIAN
 	default "BIG"
@@ -27,8 +20,3 @@ config BR2_ENDIAN
 config BR2_GCC_TARGET_CPU
 	default "leon3"		if BR2_sparc_leon3
 	default "v8"		if BR2_sparc_v8
-	default "ultrasparc"	if BR2_sparc_v9
-
-config BR2_READELF_ARCH_NAME
-	default "Sparc"		if BR2_sparc
-	default "Sparc v9"	if BR2_sparc64

arch/Config.in.x86

@@ -25,23 +25,15 @@ choice
 	help
 	  Specific CPU variant to use
 
+config BR2_x86_i386
+	bool "i386"
+	depends on !BR2_x86_64
 config BR2_x86_i486
 	bool "i486"
 	depends on !BR2_x86_64
 config BR2_x86_i586
 	bool "i586"
 	depends on !BR2_x86_64
-config BR2_x86_x1000
-	bool "x1000"
-	depends on !BR2_x86_64
-	help
-	  The Intel X1000 is a Pentium class microprocessor in the
-	  Quark (sub-Atom) Product Line. The X1000 has a bug on the
-	  lock prefix requiring that prefix must be stripped at build
-	  time.
-
-	  See https://en.wikipedia.org/wiki/Intel_Quark
-
 config BR2_x86_i686
 	bool "i686"
 	depends on !BR2_x86_64
@@ -207,9 +199,9 @@ config BR2_x86_winchip2
 endchoice
 
 config BR2_ARCH
+	default "i386"		if BR2_x86_i386
 	default "i486"		if BR2_x86_i486
 	default "i586"		if BR2_x86_i586
-	default "i586"		if BR2_x86_x1000
 	default "i586"		if BR2_x86_pentium_mmx
 	default "i586"		if BR2_x86_geode
 	default "i586"		if BR2_x86_c3
@@ -226,8 +218,6 @@ config BR2_ARCH
 	default "i686"		if BR2_x86_nocona && BR2_i386
 	default "i686"		if BR2_x86_core2 && BR2_i386
 	default "i686"		if BR2_x86_corei7 && BR2_i386
-	default "i686"		if BR2_x86_corei7_avx && BR2_i386
-	default "i686"		if BR2_x86_corei7_avx2 && BR2_i386
 	default "i686"		if BR2_x86_atom && BR2_i386
 	default "i686"		if BR2_x86_opteron && BR2_i386
 	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
@@ -243,10 +233,13 @@ config BR2_ARCH
 config BR2_ENDIAN
 	default "LITTLE"
 
+config BR2_ARCH_HAS_ATOMICS
+	default y if !BR2_x86_i386
+
 config BR2_GCC_TARGET_ARCH
+	default "i386"		if BR2_x86_i386
 	default "i486"		if BR2_x86_i486
 	default "i586"		if BR2_x86_i586
-	default "i586"		if BR2_x86_x1000
 	default "pentium-mmx"	if BR2_x86_pentium_mmx
 	default "i686"		if BR2_x86_i686
 	default "pentiumpro"	if BR2_x86_pentiumpro
@@ -275,7 +268,3 @@ config BR2_GCC_TARGET_ARCH
 	default "c3"		if BR2_x86_c3
 	default "c3-2"		if BR2_x86_c32
 	default "geode"		if BR2_x86_geode
-
-config BR2_READELF_ARCH_NAME
-	default "Intel 80386"			if BR2_i386
-	default "Advanced Micro Devices X86-64" if BR2_x86_64

arch/Config.in.xtensa

@@ -2,32 +2,39 @@ choice
 	prompt "Target Architecture Variant"
 	depends on BR2_xtensa
 	default BR2_xtensa_fsf
-
 config BR2_XTENSA_CUSTOM
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	bool "Custom Xtensa processor configuration"
-
 config BR2_xtensa_fsf
 	select BR2_ARCH_HAS_MMU_MANDATORY
 	bool "fsf - Default configuration"
-
 endchoice
 
-config BR2_XTENSA_OVERLAY_FILE
-	string "Overlay file for custom configuration"
+config BR2_XTENSA_CUSTOM_NAME
+	string "Custom Xtensa processor configuration name"
 	depends on BR2_XTENSA_CUSTOM
+	default ""
 	help
-	  Enter the path to the overlay tarball for a custom processor
-	  configuration.
+	  Name given to a custom Xtensa processor configuration.
 
+config BR2_XTENSA_CORE_NAME
+	string
+	default BR2_XTENSA_CUSTOM_NAME	if BR2_XTENSA_CUSTOM
+	default ""			if BR2_xtensa_fsf
+
+config BR2_XTENSA_OVERLAY_DIR
+	string "Overlay directory for custom configuration"
+	depends on BR2_XTENSA_CUSTOM
+	default ""
+	help
+	  Provide the directory path that contains the overlay file
+	  for a custom processor configuration. The path is relative
+	  to the top directory of buildroot.
 	  These overlay files are tar packages with updated configuration
 	  files for various toolchain packages and Xtensa processor
 	  configurations. They are provided by the processor vendor or
 	  directly from Tensilica.
 
-	  The path can be either absolute, or relative to the top directory
-	  of buildroot.
-
 choice
 	prompt "Target Architecture Endianness"
 	depends on BR2_XTENSA_CUSTOM
@@ -48,5 +55,5 @@ config BR2_ENDIAN
 config BR2_ARCH
 	default "xtensa"	if BR2_xtensa
 
-config BR2_READELF_ARCH_NAME
-	default "Tensilica Xtensa Processor"
+config BR2_ARCH_HAS_ATOMICS
+	default y

arch/arch.mk.xtensa

@@ -1,36 +0,0 @@
-################################################################################
-# This variable can be used by packages that need to extract the overlay.
-#
-# ARCH_XTENSA_OVERLAY_FILE is the path to the overlay tarball; empty if not
-#                          using any overlay
-#
-# Example:
-#   ifneq ($(ARCH_XTENSA_OVERLAY_FILE),)
-#       tar xf $(ARCH_XTENSA_OVERLAY_FILE) -C $(@D) --strip-components=1 gcc
-#   endif
-################################################################################
-BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
-ifneq ($(filter http://% https://% ftp://% scp://%,$(BR_ARCH_XTENSA_OVERLAY_FILE)),)
-ARCH_XTENSA_OVERLAY_URL = $(BR_ARCH_XTENSA_OVERLAY_FILE)
-ARCH_XTENSA_OVERLAY_FILE = $(DL_DIR)/$(notdir $(BR_ARCH_XTENSA_OVERLAY_FILE))
-# Do not check that file, we can't know its hash
-BR_NO_CHECK_HASH_FOR += $(notdir $(ARCH_XTENSA_OVERLAY_URL))
-else
-ARCH_XTENSA_OVERLAY_FILE = $(BR_ARCH_XTENSA_OVERLAY_FILE)
-endif
-
-################################################################################
-# arch-xtensa-overlay-extract -- extract an extensa overlay
-#
-# argument 1 is the path in which to extract
-# argument 2 is the component to extract, one of: gcc, binutils, gdb, linux,
-#            u-boot
-#
-# Example:
-#   $(call arch-xtensa-overlay-extract,/path/to/overlay.tar,$(@D),gcc)
-################################################################################
-define arch-xtensa-overlay-extract
-	$(call suitable-extractor,$(ARCH_XTENSA_OVERLAY_FILE)) \
-		$(ARCH_XTENSA_OVERLAY_FILE) | \
-	$(TAR) --strip-components=1 -C $(1) $(TAR_OPTIONS) - $(2)
-endef

board/acmesystems/aria-g25/genimage.cfg

@@ -1,35 +0,0 @@
-# Minimal SD card image for the Acmesystems Aria G25
-
-image boot.vfat {
-	vfat {
-		file zImage {
-			image = "zImage"
-		}
-
-		file at91-ariag25.dtb {
-			image = "at91-ariag25.dtb"
-		}
-
-		file boot.bin {
-			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.8.6.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/acmesystems/aria-g25/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage  \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/acmesystems/aria-g25/readme.txt

@@ -1,44 +1,51 @@
-Acme Systems Aria G25
-
 Build instructions
 ==================
 
-To build an image for the Aria G25 choose the configuration
-corresponding to the Aria variant.
+As a regular user configure and then build:
 
-For 128MB RAM variant type:
-
-$ make acmesystems_aria_g25_128mb_defconfig
-
-else for 256MB RAM variant type:
-
-$ make acmesystems_aria_g25_256mb_defconfig
-
-To customize the configuration choosed type:
-
-$ make menuconfig
-
-When you are ready to start building Buildroot type:
+$ make acmesystems_aria_g25_128mb_defconfig (128MB RAM variant)
+  or...
+$ make acmesystems_aria_g25_256mb_defconfig (256MB RAM variant)
 
 $ make
 
-How to write the microSD card
-=============================
+Writing to the MicroSD card
+===========================
 
-Once the build process is finished you will have an image called
-"sdcard.img" in the output/images/ directory.
+Assuming your Aria G25 baseboard has a MicroSD socket, for example with
+the Terra baseboard, you'll need a blank MicroSD (obviously) initialized
+in a particular way to be able to boot from it.
 
-Write the bootable SD card image "sdcard.img" onto an SD card with
-"dd" command:
+Assuming the card is seen as /dev/sdb in your PC/laptop/other device
+you'll need to run the following commands as root or via sudo.
 
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
+Make sure all of the card partitions are unmounted before starting.
 
-Assuming your Aria G25 baseboard has a MicroSD socket, for example
-with the Terra baseboard, insert the microSD card into the baseboard
-slot and power it.
+First we'll need to create two partitions:
 
-To get the kernel log messages you can use a DPI cable
-(http://www.acmesystems.it/DPI)
+# sfdisk -uM /dev/sdb <<EOF
+,32,6
+;
+EOF
+
+Then we'll need to create the empty filesystems:
+
+# mkdosfs -n SD_BOOT /dev/sdb1
+# mkfs.ext4 -L SD_ROOT /dev/sdb2
+
+We'll populate the first partition (boot) with the relevant files:
+
+# mount /dev/sdb1 /mnt
+# cp output/images/at91bootstrap.bin /mnt/BOOT.BIN
+# cp output/images/zImage /mnt
+# cp output/images/at91-ariag25.dtb /mnt
+# umount /mnt
+
+And the root filesystem afterwards:
+
+# mount /dev/sdb2 /mnt
+# tar -C /mnt output/images/rootfs.tar
+# umount /mnt
+
+You're done, insert the MicroSD card in the slot and enjoy.
 
-You can find additional informations, tutorials and a very
-comprehensive documentation on http://www.acmesystems.it/aria.

board/acmesystems/arietta-g25/genimage.cfg

@@ -1,35 +0,0 @@
-# Minimal SD card image for the Acmesystems Arietta G25
-
-image boot.vfat {
-	vfat {
-		file zImage {
-			image = "zImage"
-		}
-		
-		file acme-arietta.dtb {
-			image = "at91-ariettag25.dtb"
-		}
-		
-		file boot.bin {
-			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.8.6.bin"
-		} 
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/acmesystems/arietta-g25/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage  \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/acmesystems/arietta-g25/readme.txt

@@ -1,49 +0,0 @@
-Acme Systems Arietta G25
-
-Intro
-=====
-
-This default configuration will allow you to start experimenting with the
-buildroot environment for the Arietta G25. With the current configuration
-it will bring-up the board, and allow access through the serial console.
-
-You can find additional informations, tutorials and a very comprehensive
-documentation on http://www.acmesystems.it/arietta.
-
-Build instructions
-==================
-
-To build an image for the Arietta G25 choose the configuration
-corresponding to the Arietta variant.
-
-For 128MB RAM variant type:
-
-$ make acmesystems_arietta_g25_128mb_defconfig
-
-else for 256MB RAM variant type:
-
-$ make acmesystems_arietta_g25_256mb_defconfig
-
-To customize the configuration chosen type:
-
-$ make menuconfig
-
-When you are ready to start building Buildroot type:
-
-$ make
-
-How to write the microSD card
-=============================
-
-Once the build process is finished you will have an image called "sdcard.img"
-in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an SD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Insert the microSD card into the Arietta slot and power it.
-
-The image just built is fairly basic and the only output
-you will get is on serial console, please consider to use a DPI
-cable (http://www.acmesystems.it/DPI)

board/altera/post-image.sh

@@ -0,0 +1,8 @@
+#!/bin/sh
+# post-image.sh for SoCkit/SoCDK
+# 2014, "Roman Diouskine" <roman.diouskine@savoirfairelinux.com>
+# 2014, "Sebastien Bourdelin" <sebastien.bourdelin@savoirfairelinux.com>
+
+# create a DTB file copy with the name expected by the u-boot config
+# Name of the DTB is passed as the second argument to the script.
+cp -af $BINARIES_DIR/${2}.dtb  $BINARIES_DIR/socfpga.dtb

board/altera/readme.txt

@@ -0,0 +1,162 @@
+SoCkit
+
+Intro
+=====
+
+This is the buildroot board support for the Arrow SoCkit Evaluation Board
+and the Altera Cyclone 5 Development Board.
+
+A good source of information is :
+http://www.rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard
+
+How it works
+============
+
+Boot process :
+--------------
+
+In summary, the bootloader has multiple stages, an hardcoded boot routine is
+loaded from an on-chip ROM.
+
+  - That first stage is scanning the SD card's partition table to find
+    partition having the 0xA2 type.
+  - This partition is expected to contain a boot image on its first 60 Kb,
+    because u-boot is bigger, we must fill it with a preloader (u-boot-spl)
+    which will load the u-boot image.
+  - Then the u-boot image will load the Linux kernel.
+
+A good source of information for the boot process is :
+http://xillybus.com/tutorials/u-boot-image-altera-soc
+
+Note for the SPL :
+The SPL generated by the u-boot from Rocketboards doesn't seems to work,
+therefore we provide a patch for {uboot-PKG}/board/altera/socfpga_cyclone5/*
+based on the files generated with the Altera example design.
+
+For more information about this files please look at :
+http://www.rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization#Common_Source_Code
+
+How to build it
+===============
+
+Configure Buildroot
+-------------------
+
+The altera_sockit_defconfig configuration is a minimal configuration with
+all that is required to bring the SoCkit :
+
+  $ make altera_sockit_defconfig
+
+and for the SoC Development Board :
+
+  $ make altera_sockdk_defconfig
+
+Build everything
+----------------
+
+Note: you will need to have access to the network, since Buildroot will
+download the packages' sources.
+
+  $ make
+
+Result of the build
+-------------------
+
+After building, you should obtain this tree:
+
+    output/images/
+    ├── rootfs.ext2
+    ├── rootfs.ext3 -> rootfs.ext2
+    ├── rootfs.tar
+    ├── socfpga_cyclone5_sockit.dtb or socfpga_cyclone5_socdk.dtb
+    ├── socfpga.dtb
+    ├── u-boot.img
+    ├── u-boot-spl.bin
+    └── uImage
+
+
+Signing the Preloader
+---------------------
+
+*** BEWARE ****
+The u-boot-spl.bin must be signed using the Altera's tool "mkpimage".
+This tool comes as a part of the Altera development environnment (SoC EDS).
+A fork of this tool have been done by Maxime Hadjinlian and can be found here :
+https://github.com/maximeh/mkpimage
+
+Remember that without signing the u-boot-spl.bin, the board will not boot !!!
+
+  $ mkpimage u-boot-spl.bin -o u-boot-spl-signed.bin
+
+Prepare your SDcard
+===================
+
+A good source of information for the partitioning process is :
+http://www.rocketboards.org/foswiki/view/Projects/SoCKitLinaroLinuxDesktop#Partition_the_SD_Card
+
+Create the SDcard partition table
+----------------------------------
+
+Determine the device associated to the SD card :
+
+  $ cat /proc/partitions
+
+let's assume it is /dev/mmcblk0 :
+
+  $ sudo fdisk /dev/mmcblk0
+
+Delete all previous partitions with 'd' then create the new partition table,
+using these options, pressing enter after each one:
+
+  * n p 1 9000000 +20480K t 1 b
+  * n p 2 4096 +4496384K t 83
+  * n p 3 2048 +1024K t 3 a2
+
+Using the 'p' option, the SD card's partition must look like this :
+
+Device         Boot     Start       End  Blocks  Id System
+/dev/mmcblk0p1        9000000   9041919   20960   b W95 FAT32
+/dev/mmcblk0p2           4096   8996863 4496384  83 Linux
+/dev/mmcblk0p3           2048      4095    1024  a2 Unknown
+
+Then write the partition table using 'w' and exit.
+
+Make partition one a DOS partition :
+
+  $ sudo mkdosfs /dev/mmcblk0p1
+
+Install the binaries to the SDcard
+----------------------------------
+
+Remember your binaries are located in output/images/, go inside that directory :
+
+  $ cd output/images
+
+The partition with type a2 is the partition scan by the first bootloader stage
+in the SoCkit ROM to find the next bootloader stage so we must write the signed
+preloader and the u-boot binaries in that partition :
+
+  $ sudo dd if=u-boot-spl-signed.bin of=/dev/mmcblk0p3 bs=64k seek=0
+  $ sudo dd if=u-boot.img of=/dev/mmcblk0p3 bs=64k seek=4
+
+Copy the Linux kernel and its Device tree :
+
+  $ sudo mkdir /mnt/sdcard
+  $ sudo mount /dev/mmcblk0p1 /mnt/sdcard
+  $ sudo cp socfpga.dtb uImage /mnt/sdcard
+  $ sudo umount /mnt/sdcard
+
+Copy the rootfs :
+
+  $ sudo dd if=rootfs.ext2 of=/dev/mmcblk0p2 bs=64k
+  $ sudo sync
+
+It's Done!
+
+Finish
+======
+
+Eject your SDcard, insert it in your SoCkit, and power it up.
+
+if you want a serial console, you can plug a micro B USB cable on the USB-UART
+port, the serial port config to used is 57600/8-N-1.

board/altera/sockit/uboot-sockit-preloader-sample-design.patch

@@ -0,0 +1,820 @@
+From c70f2ebb350da20af1a0ed4b7960b8e5a1952713 Mon Sep 17 00:00:00 2001
+From: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
+Date: Thu, 20 Feb 2014 11:51:31 -0500
+Subject: [PATCH] board: add to sockit a working preloader design
+
+---
+ board/altera/socfpga_cyclone5/build.h              |   2 +-
+ board/altera/socfpga_cyclone5/iocsr_config.c       | 314 ++++++++++-----------
+ board/altera/socfpga_cyclone5/pinmux_config.c      |  32 +--
+ board/altera/socfpga_cyclone5/pinmux_config.h      |   8 +-
+ board/altera/socfpga_cyclone5/sdram/sdram_config.h |  14 +-
+ .../altera/socfpga_cyclone5/sdram/sequencer_auto.h |  16 +-
+ .../sdram/sequencer_auto_ac_init.c                 |  16 +-
+ .../socfpga_cyclone5/sdram/sequencer_defines.h     |  34 +--
+ 8 files changed, 218 insertions(+), 218 deletions(-)
+
+diff --git a/board/altera/socfpga_cyclone5/build.h b/board/altera/socfpga_cyclone5/build.h
+index e5d9c3c..a369015 100644
+--- a/board/altera/socfpga_cyclone5/build.h
++++ b/board/altera/socfpga_cyclone5/build.h
+@@ -29,7 +29,7 @@
+  * Handoff files must provide user option whether to
+  * enable watchdog during preloader execution phase
+  */
+-#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(0)
++#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(1)
+ 
+ /*
+  * Handoff files must provide user option whether to enable
+diff --git a/board/altera/socfpga_cyclone5/iocsr_config.c b/board/altera/socfpga_cyclone5/iocsr_config.c
+index fa663e1..90fc154 100644
+--- a/board/altera/socfpga_cyclone5/iocsr_config.c
++++ b/board/altera/socfpga_cyclone5/iocsr_config.c
+@@ -7,113 +7,113 @@ const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
+ 	0xC0000000,
+ 	0x0000003F,
+ 	0x00008000,
+-	0x00020080,
+-	0x08020000,
+-	0x08000000,
+-	0x00018020,
++	0x00060180,
++	0x18060000,
++	0x18000000,
++	0x00018060,
+ 	0x00000000,
+ 	0x00004000,
+-	0x00010040,
+-	0x04010000,
+-	0x04000000,
+-	0x00000010,
+-	0x00004010,
++	0x000300C0,
++	0x0C030000,
++	0x0C000000,
++	0x00000030,
++	0x0000C030,
+ 	0x00002000,
+-	0x00020000,
+-	0x02008000,
+-	0x02000000,
+-	0x00000008,
+-	0x00002008,
++	0x00018060,
++	0x06018000,
++	0x06000000,
++	0x00000018,
++	0x00006018,
+ 	0x00001000,
+ };
+ 
+ const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = {
+-	0x000C0300,
+-	0x10040000,
+-	0x100000C0,
+-	0x00000040,
+-	0x00010040,
++	0x00100000,
++	0x300C0000,
++	0x300000C0,
++	0x000000C0,
++	0x000300C0,
+ 	0x00008000,
+ 	0x00080000,
+-	0x18060000,
+-	0x18000000,
+-	0x00000060,
+-	0x00018060,
++	0x20000000,
++	0x00000000,
++	0x00000080,
++	0x00020000,
+ 	0x00004000,
+-	0x00010040,
++	0x000300C0,
+ 	0x10000000,
+-	0x04000000,
+-	0x00000010,
+-	0x00004010,
++	0x0C000000,
++	0x00000030,
++	0x0000C030,
+ 	0x00002000,
+-	0x06008020,
+-	0x02008000,
++	0x06018060,
++	0x06018000,
+ 	0x01FE0000,
+ 	0xF8000000,
+ 	0x00000007,
+ 	0x00001000,
+-	0x00004010,
+-	0x01004000,
+-	0x01000000,
+-	0x00003004,
+-	0x00001004,
++	0x0000C030,
++	0x0300C000,
++	0x03000000,
++	0x0000300C,
++	0x0000300C,
+ 	0x00000800,
+ 	0x00000000,
+ 	0x00000000,
+-	0x00800000,
+-	0x00000002,
++	0x01800000,
++	0x00000006,
+ 	0x00002000,
+ 	0x00000400,
+ 	0x00000000,
+-	0x00401000,
++	0x00C03000,
+ 	0x00000003,
+ 	0x00000000,
+ 	0x00000000,
+ 	0x00000200,
+-	0x00600802,
++	0x00601806,
+ 	0x00000000,
+-	0x80200000,
+-	0x80000600,
+-	0x00000200,
++	0x80600000,
++	0x80000601,
++	0x00000601,
+ 	0x00000100,
+-	0x00300401,
+-	0xC0100400,
+-	0x40100000,
+-	0x40000300,
+-	0x000C0100,
++	0x00300C03,
++	0xC0300C00,
++	0xC0300000,
++	0xC0000300,
++	0x000C0300,
+ 	0x00000080,
+ };
+ 
+ const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = {
+-	0x80040100,
++	0x300C0300,
+ 	0x00000000,
+ 	0x0FF00000,
+ 	0x00000000,
+-	0x0C010040,
++	0x0C0300C0,
+ 	0x00008000,
+-	0x18020080,
+-	0x00000000,
+-	0x08000000,
+-	0x00040020,
+-	0x06018060,
++	0x18060180,
++	0x18060000,
++	0x18000000,
++	0x00018060,
++	0x00018060,
+ 	0x00004000,
+-	0x0C010040,
+-	0x04010000,
++	0x000300C0,
++	0x0C030000,
+ 	0x00000030,
+ 	0x00000000,
+-	0x03004010,
++	0x0300C030,
+ 	0x00002000,
+-	0x06008020,
+-	0x02008000,
+-	0x02000018,
+-	0x00006008,
+-	0x01802008,
++	0x00018060,
++	0x06018000,
++	0x06000000,
++	0x00000018,
++	0x00006018,
+ 	0x00001000,
+-	0x03004010,
+-	0x01004000,
+-	0x0100000C,
+-	0x00003004,
+-	0x00C01004,
++	0x0000C030,
++	0x00000000,
++	0x03000000,
++	0x0000000C,
++	0x00C0300C,
+ 	0x00000800,
+ };
+ 
+@@ -170,14 +170,14 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xA0000034,
+ 	0x0D000001,
+ 	0x6068030C,
+-	0xC7034018,
+-	0x0E381A01,
++	0xCF034059,
++	0x1E781A03,
+ 	0x8030C0D0,
+-	0x34018606,
+-	0x01A01C70,
++	0x34059606,
++	0x01A03CF0,
+ 	0x0C0D0000,
+-	0x18606803,
+-	0x01C70340,
++	0x59606803,
++	0x03CF0340,
+ 	0xD000001A,
+ 	0x068030C0,
+ 	0x10040000,
+@@ -244,15 +244,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xA0000034,
+ 	0x0D000001,
+ 	0x6068030C,
+-	0xC7034018,
+-	0x0E381A01,
++	0xCF034059,
++	0x1E781A03,
+ 	0x8030C0D0,
+-	0x34018606,
++	0x34059606,
+ 	0x01A00000,
+ 	0x0C0D0000,
+-	0x18606803,
+-	0x01C70340,
+-	0xD00E381A,
++	0x59606803,
++	0x03CF0340,
++	0xD01E781A,
+ 	0x068030C0,
+ 	0x10040000,
+ 	0x00200000,
+@@ -273,7 +273,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
++	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -301,7 +301,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
++	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00010040,
+@@ -321,15 +321,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
++	0xF5DE791E,
++	0x0356D348,
+ 	0x821A0000,
+ 	0x0000D000,
+ 	0x01860680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
++	0x48F5DE79,
++	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -347,7 +347,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
++	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -375,7 +375,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
++	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00015000,
+@@ -395,15 +395,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
+-	0x821A00C3,
++	0xF5DE791E,
++	0x0356D348,
++	0x821A02CB,
+ 	0x0000D000,
+ 	0x00000680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
++	0x48F5DE79,
++	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -421,7 +421,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
++	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -449,7 +449,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
++	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00010040,
+@@ -469,15 +469,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
++	0xF5DE791E,
++	0x0356D348,
+ 	0x821A0000,
+ 	0x0000D000,
+ 	0x00000680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
++	0x48F5DE79,
++	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -495,7 +495,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0xAA0D4000,
+-	0x01C3A808,
++	0x01C3A810,
+ 	0xAA0D4000,
+ 	0x01C3A810,
+ 	0x00040100,
+@@ -523,7 +523,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x2A835000,
+-	0x0070EA02,
++	0x0070EA04,
+ 	0x2A835000,
+ 	0x0070EA04,
+ 	0x00010040,
+@@ -543,15 +543,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x14864000,
+ 	0x69A47A05,
+ 	0xCBCF23D7,
+-	0xF41E791E,
+-	0x034ED348,
++	0xF5DE791E,
++	0x0356D348,
+ 	0x821A0000,
+ 	0x0000D000,
+ 	0x00000680,
+ 	0xD769A47A,
+ 	0x1ECBCF23,
+-	0x48F41E79,
+-	0x00034ED3,
++	0x48F5DE79,
++	0x000356D3,
+ 	0x00080200,
+ 	0x00001000,
+ 	0x00080200,
+@@ -567,80 +567,80 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
+ 	0x04000002,
+ 	0x00820000,
+ 	0x00489000,
+-	0x001A1A1A,
+-	0x085506A0,
+-	0x0000E1D4,
+-	0x045506A0,
+-	0x0000E1D4,
+-	0x085506A0,
+-	0x8000E1D4,
++	0x801A1A1A,
++	0x00000200,
++	0x80000004,
++	0x00000200,
++	0x80000004,
++	0x00000200,
++	0x80000004,
+ 	0x00000200,
+ 	0x00000004,
+-	0x04000000,
+-	0x00000009,
+-	0x00002410,
++	0x00040000,
++	0x10000000,
++	0x00000000,
+ 	0x00000040,
+-	0x41000000,
+-	0x00002082,
+-	0x00000350,
+-	0x000000DA,
++	0x00010000,
++	0x40002000,
++	0x00000100,
++	0x40000002,
++	0x00000100,
++	0x40000002,
+ 	0x00000100,
+ 	0x40000002,
+ 	0x00000100,
+ 	0x00000002,
+-	0x042A8350,
+-	0x000070EA,
+-	0x86000000,
+-	0x08000004,
++	0x00020000,
++	0x08000000,
+ 	0x00000000,
+-	0x00482000,
+-	0x21800000,
+-	0x00101061,
+-	0x021541A8,
+-	0x00003875,
+-	0x011541A8,
+-	0x00003875,
+-	0x021541A8,
+-	0x20003875,
++	0x00000020,
++	0x00008000,
++	0x20001000,
++	0x00000080,
++	0x20000001,
++	0x00000080,
++	0x20000001,
++	0x00000080,
++	0x20000001,
+ 	0x00000080,
+ 	0x00000001,
+-	0x41000000,
+-	0x00000002,
+-	0x00FF0904,
++	0x00010000,
++	0x04000000,
++	0x00FF0000,
+ 	0x00000000,
+-	0x90400000,
+-	0x00000820,
++	0x00004000,
++	0x00000800,
+ 	0x80000001,
+-	0x38D612AF,
+-	0x86F8E38E,
+-	0x0A0A78B4,
+-	0x000D020A,
++	0x00041419,
++	0x40000000,
++	0x04000816,
++	0x000D0000,
+ 	0x00006800,
+-	0x028A4320,
+-	0xEBB4D23D,
+-	0x8F65E791,
+-	0xA47A0F3C,
+-	0x0001A769,
+-	0x00410D00,
++	0x00000340,
++	0xD000001A,
++	0x06800000,
++	0x00340000,
++	0x0001A000,
++	0x00000D00,
+ 	0x40000068,
+-	0x3D000003,
+-	0x91EBB4D2,
+-	0x3C8F65E7,
+-	0x69A47A0F,
+-	0x000001A7,
++	0x1A000003,
++	0x00D00000,
++	0x00068000,
++	0x00003400,
++	0x000001A0,
++	0x00000401,
++	0x00000008,
+ 	0x00000401,
+ 	0x00000008,
+ 	0x00000401,
+ 	0x00000008,
+-	0x00000540,
+-	0x000003A8,
+-	0x10AA0D40,
+-	0x8001C3A8,
++	0x00000401,
++	0x80000008,
+ 	0x0000007F,
++	0x20000000,
+ 	0x00000000,
+-	0x00004060,
+-	0xE1208000,
++	0xE0000080,
+ 	0x0000001F,
+-	0x00004100,
++	0x00004000,
+ };
+ 
+diff --git a/board/altera/socfpga_cyclone5/pinmux_config.c b/board/altera/socfpga_cyclone5/pinmux_config.c
+index 730067e..cfd74cd 100644
+--- a/board/altera/socfpga_cyclone5/pinmux_config.c
++++ b/board/altera/socfpga_cyclone5/pinmux_config.c
+@@ -23,7 +23,7 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+ 	0, /* EMACIO18 */
+ 	0, /* EMACIO19 */
+ 	3, /* FLASHIO0 */
+-	3, /* FLASHIO1 */
++	0, /* FLASHIO1 */
+ 	3, /* FLASHIO2 */
+ 	3, /* FLASHIO3 */
+ 	0, /* FLASHIO4 */
+@@ -34,25 +34,25 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+ 	3, /* FLASHIO9 */
+ 	3, /* FLASHIO10 */
+ 	3, /* FLASHIO11 */
+-	3, /* GENERALIO0 */
+-	3, /* GENERALIO1 */
+-	3, /* GENERALIO2 */
+-	3, /* GENERALIO3 */
+-	3, /* GENERALIO4 */
+-	3, /* GENERALIO5 */
+-	3, /* GENERALIO6 */
+-	3, /* GENERALIO7 */
+-	3, /* GENERALIO8 */
++	0, /* GENERALIO0 */
++	1, /* GENERALIO1 */
++	1, /* GENERALIO2 */
++	1, /* GENERALIO3 */
++	1, /* GENERALIO4 */
++	0, /* GENERALIO5 */
++	0, /* GENERALIO6 */
++	0, /* GENERALIO7 */
++	0, /* GENERALIO8 */
+ 	3, /* GENERALIO9 */
+ 	3, /* GENERALIO10 */
+ 	3, /* GENERALIO11 */
+ 	3, /* GENERALIO12 */
+-	2, /* GENERALIO13 */
+-	2, /* GENERALIO14 */
+-	3, /* GENERALIO15 */
+-	3, /* GENERALIO16 */
+-	2, /* GENERALIO17 */
+-	2, /* GENERALIO18 */
++	0, /* GENERALIO13 */
++	0, /* GENERALIO14 */
++	1, /* GENERALIO15 */
++	1, /* GENERALIO16 */
++	1, /* GENERALIO17 */
++	1, /* GENERALIO18 */
+ 	0, /* GENERALIO19 */
+ 	0, /* GENERALIO20 */
+ 	0, /* GENERALIO21 */
+diff --git a/board/altera/socfpga_cyclone5/pinmux_config.h b/board/altera/socfpga_cyclone5/pinmux_config.h
+index fb483ab..64c750a 100644
+--- a/board/altera/socfpga_cyclone5/pinmux_config.h
++++ b/board/altera/socfpga_cyclone5/pinmux_config.h
+@@ -11,15 +11,15 @@
+ #define CONFIG_HPS_UART0 (1)
+ #define CONFIG_HPS_UART1 (0)
+ #define CONFIG_HPS_TRACE (0)
+-#define CONFIG_HPS_I2C0 (1)
+-#define CONFIG_HPS_I2C1 (0)
++#define CONFIG_HPS_I2C0 (0)
++#define CONFIG_HPS_I2C1 (1)
+ #define CONFIG_HPS_I2C2 (0)
+ #define CONFIG_HPS_I2C3 (0)
+ #define CONFIG_HPS_SPIM0 (1)
+-#define CONFIG_HPS_SPIM1 (0)
++#define CONFIG_HPS_SPIM1 (1)
+ #define CONFIG_HPS_SPIS0 (0)
+ #define CONFIG_HPS_SPIS1 (0)
+-#define CONFIG_HPS_CAN0 (1)
++#define CONFIG_HPS_CAN0 (0)
+ #define CONFIG_HPS_CAN1 (0)
+ 
+ #define CONFIG_HPS_SDMMC_BUSWIDTH (4)
+diff --git a/board/altera/socfpga_cyclone5/sdram/sdram_config.h b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
+index b90d6f3..dd027ef 100755
+--- a/board/altera/socfpga_cyclone5/sdram/sdram_config.h
++++ b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
+@@ -4,16 +4,16 @@
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE			(2)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL			(8)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER		(0)
+-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(1)
+-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(1)
++#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(0)
++#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(0)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN		(1)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT		(10)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN			(0)
+ #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS			(0)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(6)
++#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(8)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL			(0)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(7)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(4)
++#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(11)
++#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(3)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW			(12)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC			(104)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI		(3120)
+@@ -21,7 +21,7 @@
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP		(6)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR		(6)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR		(4)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(4)
++#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(3)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS			(14)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC			(20)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD			(4)
+@@ -33,7 +33,7 @@
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS		(15)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS		(3)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS			(1)
+-#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(40)
++#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(32)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH		(8)
+ #define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN			(0)
+ #define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL			(2)
+diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
+index e8c5484..919676d 100644
+--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
++++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
+@@ -34,7 +34,7 @@
+ #define __RW_MGR_ac_read_en 0x21
+ #define __RW_MGR_ac_mrs3_mirr 0x0C
+ #define __RW_MGR_ac_mrs2 0x05
+-#define __RW_MGR_CONTENT_ac_mrs1 0x10090044
++#define __RW_MGR_CONTENT_ac_mrs1 0x10090006
+ #define __RW_MGR_CONTENT_ac_mrs3 0x100B0000
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata_wl_1 0x18980000
+ #define __RW_MGR_CONTENT_ac_act_1 0x106B0000
+@@ -46,8 +46,8 @@
+ #define __RW_MGR_CONTENT_ac_init_reset_0_cke_0 0x20700000
+ #define __RW_MGR_CONTENT_ac_read_bank_0_1_norden 0x10580008
+ #define __RW_MGR_CONTENT_ac_pre_all 0x10280400
+-#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080431
+-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080530
++#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080471
++#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080570
+ #define __RW_MGR_CONTENT_ac_read_bank_0_0 0x13580000
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_1 0x1C980008
+ #define __RW_MGR_CONTENT_ac_read_bank_0_1 0x13580008
+@@ -55,21 +55,21 @@
+ #define __RW_MGR_CONTENT_ac_write_bank_1_col_1 0x1C9B0008
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_0 0x1C980000
+ #define __RW_MGR_CONTENT_ac_read_bank_1_0 0x135B0000
+-#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0024
++#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0006
+ #define __RW_MGR_CONTENT_ac_read_bank_1_1 0x135B0008
+ #define __RW_MGR_CONTENT_ac_des_odt_1 0x38780000
+-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804C8
++#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804E8
+ #define __RW_MGR_CONTENT_ac_zqcl 0x10380400
+ #define __RW_MGR_CONTENT_ac_write_predata 0x38F80000
+-#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080449
++#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080469
+ #define __RW_MGR_CONTENT_ac_ref 0x10480000
+ #define __RW_MGR_CONTENT_ac_nop 0x30780000
+ #define __RW_MGR_CONTENT_ac_rdimm 0x10780000
+-#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090010
++#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090218
+ #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata 0x18180000
+ #define __RW_MGR_CONTENT_ac_read_en 0x33780000
+ #define __RW_MGR_CONTENT_ac_mrs3_mirr 0x100B0000
+-#define __RW_MGR_CONTENT_ac_mrs2 0x100A0008
++#define __RW_MGR_CONTENT_ac_mrs2 0x100A0218
+ 
+ #define __RW_MGR_READ_B2B_WAIT2 0x6A
+ #define __RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x31
+diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
+index e16efa1..20b4ca1 100644
+--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
++++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
+@@ -6,16 +6,16 @@ const alt_u32 ac_rom_init[36] =
+ {
+ 	0x20700000,
+ 	0x20780000,
+-	0x10080431,
+-	0x10080530,
+-	0x10090044,
+-	0x100a0008,
++	0x10080471,
++	0x10080570,
++	0x10090006,
++	0x100a0218,
+ 	0x100b0000,
+ 	0x10380400,
+-	0x10080449,
+-	0x100804c8,
+-	0x100a0024,
+-	0x10090010,
++	0x10080469,
++	0x100804e8,
++	0x100a0006,
++	0x10090218,
+ 	0x100b0000,
+ 	0x30780000,
+ 	0x38780000,
+diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
+index 52faf3f..b85b85c 100644
+--- a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
++++ b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
+@@ -1,28 +1,28 @@
+ #ifndef _SEQUENCER_DEFINES_H_
+ #define _SEQUENCER_DEFINES_H_
+ 
+-#define AC_ROM_MR1_MIRR 0000000100100
++#define AC_ROM_MR1_MIRR 0000000000110
+ #define AC_ROM_MR1_OCD_ENABLE
+-#define AC_ROM_MR2_MIRR 0000000010000
++#define AC_ROM_MR2_MIRR 0001000011000
+ #define AC_ROM_MR3_MIRR 0000000000000
+ #define AC_ROM_MR0_CALIB
+-#define AC_ROM_MR0_DLL_RESET_MIRR 0010011001000
+-#define AC_ROM_MR0_DLL_RESET 0010100110000
+-#define AC_ROM_MR0_MIRR 0010001001001
+-#define AC_ROM_MR0 0010000110001
+-#define AC_ROM_MR1 0000001000100
+-#define AC_ROM_MR2 0000000001000
++#define AC_ROM_MR0_DLL_RESET_MIRR 0010011101000
++#define AC_ROM_MR0_DLL_RESET 0010101110000
++#define AC_ROM_MR0_MIRR 0010001101001
++#define AC_ROM_MR0 0010001110001
++#define AC_ROM_MR1 0000000000110
++#define AC_ROM_MR2 0001000011000
+ #define AC_ROM_MR3 0000000000000
+ #define AFI_CLK_FREQ 401
+ #define AFI_RATE_RATIO 1
+ #define ARRIAVGZ 0
+ #define ARRIAV 0
+-#define AVL_CLK_FREQ 67
++#define AVL_CLK_FREQ 81
+ #define BFM_MODE 0
+ #define BURST2 0
+ #define CALIBRATE_BIT_SLIPS 0
+-#define CALIB_LFIFO_OFFSET 7
+-#define CALIB_VFIFO_OFFSET 5
++#define CALIB_LFIFO_OFFSET 11
++#define CALIB_VFIFO_OFFSET 9
+ #define CYCLONEV 1
+ #define DDR2 0
+ #define DDR3 1
+@@ -89,20 +89,20 @@
+ #define RW_MGR_MEM_CHIP_SELECT_WIDTH 1
+ #define RW_MGR_MEM_CLK_EN_WIDTH 1
+ #define RW_MGR_MEM_CONTROL_WIDTH 1
+-#define RW_MGR_MEM_DATA_MASK_WIDTH 5
+-#define RW_MGR_MEM_DATA_WIDTH 40
++#define RW_MGR_MEM_DATA_MASK_WIDTH 4
++#define RW_MGR_MEM_DATA_WIDTH 32
+ #define RW_MGR_MEM_DQ_PER_READ_DQS 8
+ #define RW_MGR_MEM_DQ_PER_WRITE_DQS 8
+-#define RW_MGR_MEM_IF_READ_DQS_WIDTH 5
+-#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 5
++#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4
++#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4
+ #define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
+ #define RW_MGR_MEM_NUMBER_OF_RANKS 1
+ #define RW_MGR_MEM_ODT_WIDTH 1
+ #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
+ #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1
+ #define RW_MGR_MR0_BL 1
+-#define RW_MGR_MR0_CAS_LATENCY 3
+-#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 5
++#define RW_MGR_MR0_CAS_LATENCY 7
++#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4
+ #define RW_MGR_WRITE_TO_DEBUG_READ 1.0
+ #define SKEW_CALIBRATION 0
+ #define STATIC_FULL_CALIBRATION 1
+-- 
+1.9.0
+

board/altera/socrates_cyclone5/boot-env.txt

@@ -1,8 +0,0 @@
-linux_load_address=0x100000
-linux_dtb_load_address=0x100
-linux_dtb=socfpga_cyclone5_socrates.dtb
-linux_load=mmc rescan; fatload mmc 0:1 ${linux_load_address} zImage; fatload mmc 0:1 ${linux_dtb_load_address} ${linux_dtb}
-bootargs=console=ttyS0,115200 root=/dev/mmcblk0p3 ro rootwait
-source_env=fatload mmc 0:1 0x2000000 boot.scr; source 0x2000000
-bootcmd=run linux_load; bootz ${linux_load_address} - ${linux_dtb_load_address}
-bootdelay=1

board/altera/socrates_cyclone5/genimage.cfg

@@ -1,58 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"socfpga_cyclone5_socrates.dtb"
-		}
-	}
-	size = 8M
-}
-
-image uboot.img {
-	hdimage {
-		partition-table = "no"
-	}
-
-	partition spl {
-		in-partition-table = "no"
-		image = "u-boot-spl.bin.crc"
-		offset = 0
-		size = 64k
-	}
-
-	partition uboot-full {
-		in-partition-table = "no"
-		image = "u-boot.img"
-		offset = 256k
-	}
-
-	size = 1M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition uboot-env {
-		in-partition-table = "no"
-		image = "uboot-env.bin"
-		offset = 17408 # 512 * 34 -> just after gpt
-	}
-
-	partition boot {
-		partition-type = 0xc
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition uboot {
-		partition-type = 0xa2
-		image = "uboot.img"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext2"
-		size = 500M
-	}
-}

board/altera/socrates_cyclone5/readme.txt

@@ -1,52 +0,0 @@
-EBV SoCrates Evaluation Board
-
-Intro
-=====
-
-More information about this board can be found here:
-https://rocketboards.org/foswiki/Documentation/EBVSoCratesEvaluationBoard
-
-Build
-=====
-
-First, load socrates config for buildroot
-
-    make socrates_cyclone5_defconfig
-
-Build everything
-
-    make
-
-Following files will be generated in output/images
-
-.
-├── boot.vfat
-├── rootfs.ext2
-├── rootfs.ext4 -> rootfs.ext2
-├── rootfs.tar
-├── sdcard.img
-├── socfpga_cyclone5_socrates.dtb
-├── u-boot-spl.bin
-├── u-boot-spl.bin.crc
-├── u-boot.bin
-├── u-boot.img
-├── uboot-env.bin
-├── uboot.img
-└── zImage
-
-
-Creating bootable SD card
-=========================
-
-Simply invoke
-
-dd if=output/images/sdcard.img of=/dev/sdX
-
-Where X is your SD card device (not partition)
-
-Booting
-=======
-
-Pins 6:8 on P18 selector is used to determine boot device. To boot socrates from
-sdcard set these pins to value 0x5 (101b). Remaining pins are used to determine
-how to configure FPGA and are not associated with booting into Linux kernel.

board/arcturus/ppc-ucp1020/configs/linux-4.1.x.config

@@ -1,269 +0,0 @@
-CONFIG_PPC_85xx=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_CROSS_COMPILE="powerpc-linux-"
-CONFIG_LOCALVERSION="-ANI-uCP1020-64EE512"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="uCP1020-64EE512"
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_AUDIT=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_LOG_CPU_MAX_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_RD_BZIP2 is not set
-# CONFIG_RD_LZMA is not set
-# CONFIG_RD_XZ is not set
-# CONFIG_RD_LZO is not set
-# CONFIG_RD_LZ4 is not set
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
-# CONFIG_EFI_PARTITION is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_UCP1020_SOM=y
-CONFIG_HIGHMEM=y
-CONFIG_PREEMPT=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_MATH_EMULATION=y
-CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y
-CONFIG_SWIOTLB=y
-# CONFIG_COMPACTION is not set
-CONFIG_PCI=y
-CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIEAER is not set
-# CONFIG_PCIEASPM is not set
-CONFIG_PCI_MSI=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_BRIDGE_NETFILTER=y
-CONFIG_NF_CONNTRACK=y
-CONFIG_NF_CONNTRACK_FTP=y
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
-CONFIG_NETFILTER_XT_TARGET_MARK=y
-CONFIG_NETFILTER_XT_MATCH_COMMENT=y
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
-CONFIG_NETFILTER_XT_MATCH_HELPER=y
-CONFIG_NETFILTER_XT_MATCH_MARK=y
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
-CONFIG_NETFILTER_XT_MATCH_STATE=y
-CONFIG_NF_CONNTRACK_IPV4=y
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_IP_NF_FILTER=y
-CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_NAT=y
-CONFIG_IP_NF_TARGET_MASQUERADE=y
-CONFIG_IP_NF_TARGET_NETMAP=y
-CONFIG_IP_NF_TARGET_REDIRECT=y
-CONFIG_IP_NF_MANGLE=y
-CONFIG_BRIDGE=y
-CONFIG_VLAN_8021Q=y
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_HTB=y
-CONFIG_CFG80211=y
-# CONFIG_CFG80211_DEFAULT_PS is not set
-CONFIG_MAC80211=y
-# CONFIG_MAC80211_RC_MINSTREL is not set
-CONFIG_UEVENT_HELPER_PATH="/bin/hotplug"
-CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_FTL=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_MTD_NAND_FSL_UPM=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NET_VENDOR_ADAPTEC is not set
-# CONFIG_NET_VENDOR_AGERE is not set
-# CONFIG_NET_VENDOR_ALTEON is not set
-# CONFIG_NET_VENDOR_AMD is not set
-# CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_VENDOR_ATHEROS is not set
-# CONFIG_NET_CADENCE is not set
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_BROCADE is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CISCO is not set
-# CONFIG_NET_VENDOR_DEC is not set
-# CONFIG_NET_VENDOR_DLINK is not set
-# CONFIG_NET_VENDOR_EMULEX is not set
-# CONFIG_NET_VENDOR_EXAR is not set
-CONFIG_GIANFAR=y
-# CONFIG_NET_VENDOR_HP is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MELLANOX is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_MYRI is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_NVIDIA is not set
-# CONFIG_NET_VENDOR_OKI is not set
-# CONFIG_NET_PACKET_ENGINE is not set
-# CONFIG_NET_VENDOR_QLOGIC is not set
-# CONFIG_NET_VENDOR_QUALCOMM is not set
-# CONFIG_NET_VENDOR_REALTEK is not set
-# CONFIG_NET_VENDOR_RDC is not set
-# CONFIG_NET_VENDOR_ROCKER is not set
-# CONFIG_NET_VENDOR_SAMSUNG is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SILAN is not set
-# CONFIG_NET_VENDOR_SIS is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_SUN is not set
-# CONFIG_NET_VENDOR_TEHUTI is not set
-# CONFIG_NET_VENDOR_TI is not set
-# CONFIG_NET_VENDOR_VIA is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-# CONFIG_NET_VENDOR_XILINX is not set
-CONFIG_MICREL_PHY=y
-CONFIG_IWLWIFI=m
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO_LIBPS2=y
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_NOZOMI=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_NVRAM=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MPC=y
-CONFIG_SPI=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_FSL_ESPI=y
-CONFIG_SPI_SPIDEV=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_MPC8XXX=y
-CONFIG_SENSORS_LM90=y
-CONFIG_THERMAL=y
-CONFIG_WATCHDOG=y
-CONFIG_BOOKE_WDT=y
-CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=36
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_MEDIA_CONTROLLER=y
-CONFIG_VIDEO_V4L2_SUBDEV_API=y
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=y
-CONFIG_USB_GSPCA=y
-CONFIG_USB_PWC=y
-CONFIG_USB_ZR364XX=y
-CONFIG_USB_STKWEBCAM=y
-CONFIG_VIDEO_EM28XX=y
-CONFIG_VIDEO_EM28XX_V4L2=y
-# CONFIG_HID is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_FSL=y
-CONFIG_USB_ACM=y
-CONFIG_USB_WDM=y
-CONFIG_USB_TMC=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_MDC800=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
-CONFIG_DMADEVICES=y
-CONFIG_FSL_DMA=y
-CONFIG_ASYNC_TX_DMA=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=y
-CONFIG_XFS_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_NTFS_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_NFSD=y
-CONFIG_CIFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRC_ITU_T=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_RCU_CPU_STALL_TIMEOUT=60
-# CONFIG_RCU_CPU_STALL_INFO is not set
-# CONFIG_FTRACE is not set
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_PCBC=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA1_PPC=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_TALITOS=y

board/arcturus/ppc-ucp1020/patches/linux/0001-Arcturus-uCP1020-BSP-support.patch

@@ -1,462 +0,0 @@
-From a243628639e12a4bd0a737eac78a12ed240cd137 Mon Sep 17 00:00:00 2001
-From: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Date: Mon, 18 Jul 2016 10:40:16 -0400
-Subject: [PATCH] Arcturus uCP1020 BSP support
-
-The uCP1020 product family (ucp1020) is an Arcturus Networks Inc.
-System on Modules product featuring a NXP QorIQ P1020 CPU,
-optionally populated with 1 or 2 Gig-Ethernet PHYs,
-DDR3, NOR Flash, eMMC NAND Flash and/or SPI Flash.
-
-Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Signed-off-by: Michael Durrant <arcsupport@arcturusnetworks.com>
----
- arch/powerpc/boot/dts/ucp1020.dts         |  87 ++++++++++++
- arch/powerpc/boot/dts/ucp1020.dtsi        | 211 ++++++++++++++++++++++++++++++
- arch/powerpc/platforms/85xx/Kconfig       |   7 +
- arch/powerpc/platforms/85xx/Makefile      |   1 +
- arch/powerpc/platforms/85xx/ucp1020_som.c |  92 +++++++++++++
- 5 files changed, 398 insertions(+)
- create mode 100644 arch/powerpc/boot/dts/ucp1020.dts
- create mode 100644 arch/powerpc/boot/dts/ucp1020.dtsi
- create mode 100644 arch/powerpc/platforms/85xx/ucp1020_som.c
-
-diff --git a/arch/powerpc/boot/dts/ucp1020.dts b/arch/powerpc/boot/dts/ucp1020.dts
-new file mode 100644
-index 0000000..291e70a
---- /dev/null
-+++ b/arch/powerpc/boot/dts/ucp1020.dts
-@@ -0,0 +1,87 @@
-+/*
-+ * uCP1020 Tree Source (32-bit address map)
-+ *
-+ * Copyright 2013-2016 Arcturus Networks Inc.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Freescale Semiconductor nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ *
-+ * ALTERNATIVELY, this software may be distributed under the terms of the
-+ * GNU General Public License ("GPL") as published by the Free Software
-+ * Foundation, either version 2 of that License or (at your option) any
-+ * later version.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
-+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+/include/ "fsl/p1020si-pre.dtsi"
-+/ {
-+	model = "arcturus,uCP1020";
-+	compatible = "arcturus,uCP1020";
-+
-+	memory {
-+		device_type = "memory";
-+	};
-+
-+	lbc: localbus@ffe05000 {
-+		reg = <0 0xffe05000 0 0x1000>;
-+
-+		/* NOR Flash */
-+		ranges = <0x0 0x0 0x0 0xec000000 0x04000000>;
-+	};
-+
-+	soc: soc@ffe00000 {
-+		ranges = <0x0 0x0 0xffe00000 0x100000>;
-+	};
-+
-+	pci0: pcie@ffe09000 {
-+		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-+			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-+		reg = <0 0xffe09000 0 0x1000>;
-+		pcie@0 {
-+			ranges = <0x2000000 0x0 0xa0000000
-+				  0x2000000 0x0 0xa0000000
-+				  0x0 0x20000000
-+
-+				  0x1000000 0x0 0x0
-+				  0x1000000 0x0 0x0
-+				  0x0 0x100000>;
-+		};
-+	};
-+
-+	pci1: pcie@ffe0a000 {
-+		reg = <0 0xffe0a000 0 0x1000>;
-+		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-+			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-+		pcie@0 {
-+			ranges = <0x2000000 0x0 0x80000000
-+				  0x2000000 0x0 0x80000000
-+				  0x0 0x20000000
-+
-+				  0x1000000 0x0 0x0
-+				  0x1000000 0x0 0x0
-+				  0x0 0x100000>;
-+		};
-+	};
-+};
-+
-+/include/ "ucp1020.dtsi"
-+/include/ "fsl/p1020si-post.dtsi"
-diff --git a/arch/powerpc/boot/dts/ucp1020.dtsi b/arch/powerpc/boot/dts/ucp1020.dtsi
-new file mode 100644
-index 0000000..7cff949
---- /dev/null
-+++ b/arch/powerpc/boot/dts/ucp1020.dtsi
-@@ -0,0 +1,211 @@
-+/*
-+ * uCP1020 Device Tree Source stub (no addresses or top-level ranges)
-+ *
-+ * Copyright 2013-2016 Arcturus Networks Inc.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Freescale Semiconductor nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ *
-+ * ALTERNATIVELY, this software may be distributed under the terms of the
-+ * GNU General Public License ("GPL") as published by the Free Software
-+ * Foundation, either version 2 of that License or (at your option) any
-+ * later version.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
-+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+&lbc {
-+	nor@0,0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "cfi-flash";
-+		reg = <0x0 0x0 0x04000000>;
-+		bank-width = <2>;
-+		device-width = <1>;
-+
-+		partition@100000 {
-+			/* 7MB - PART 0 */
-+			reg = <0x00100000 0x00700000>;
-+			label = "0";
-+		};
-+
-+		partition@800000 {
-+			/* 32MB - PART 1 */
-+			reg = <0x0800000 0x02000000>;
-+			label = "1";
-+		};
-+
-+		partition@2800000 {
-+			/* 8MB - PART 2 */
-+			reg = <0x02800000 0x00800000>;
-+			label = "2";
-+		};
-+
-+		partition@3000000 {
-+			/* (16MB - 512K) - PART 3 JFFS 2 */
-+			reg = <0x03000000 0x00f80000>;
-+			label = "3";
-+		};
-+
-+		partition@0 {
-+			/* 512KB - bootloader[u-boot, uCbootloader] */
-+			reg = <0x0 0x00080000>;
-+			label = "BOOT_SPI";
-+		};
-+
-+		partition@3f80000 {
-+			/* 512KB - bootloade NOR r[u-boot, uCbootloader] */
-+			reg = <0x03f80000 0x00080000>;
-+			label = "B";
-+		};
-+
-+		partition@80000 {
-+			/* 256KB - bootloaders environment (uCenv) */
-+			reg = <0x00080000 0x00040000>;
-+	
-+			label = "E";
-+		};
-+
-+		partition@C0000 {
-+			/* 256KB - bootloaders environment (u-boot) */
-+			reg = <0x000C0000 0x00040000>;
-+			label = "UENV";
-+		};
-+	};
-+};
-+
-+&soc {
-+	i2c@3000 {
-+		spoc@14 {
-+			compatible = "conexant,cx2070x";
-+			reg = <0x14>;
-+		};
-+	};
-+
-+	i2c@3100 {
-+			dtt@4C {
-+				compatible = "national,lm90";
-+				reg = <0x4C>;
-+			};
-+	};
-+
-+	spi@7000 {
-+		flash@0 {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			compatible = "winbond,w25q80bl";
-+			reg = <0>;
-+			spi-max-frequency = <40000000>; /* input clock */
-+
-+			partition@0 {
-+				label = "SPI MBR";
-+				reg = <0x00000000 0x00002000>;
-+				read-only;
-+			};
-+			partition@2000 {
-+				label = "SPI ENV";
-+				reg = <0x00002000 0x00006000>;
-+				read-only;
-+			};
-+			partition@8000 {
-+				label = "SPI FS";
-+				reg = <0x00008000 0x000F8000>;
-+			};
-+		};
-+		flash@3 {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			compatible = "spansion,s25fl008k";
-+			reg = <3>;
-+			spi-max-frequency = <40000000>; /* input clock */
-+			partition@0 {
-+				label = "SPI USER";
-+				reg = <0x00000000 0x00100000>;
-+			};
-+		};
-+	};
-+
-+	usb@22000 {
-+		phy_type = "ulpi";
-+		dr_mode = "host";
-+	};
-+
-+	mdio@24000 {
-+		phy0: ethernet-phy@4 {
-+			interrupt-parent = <&mpic>;
-+			interrupts = <4 1>;
-+			reg = <0x04>;
-+		};
-+
-+		phy1: ethernet-phy@6 {
-+			interrupt-parent = <&mpic>;
-+			interrupts = <8 1>;
-+			reg = <0x6>;
-+		};
-+	};
-+
-+	enet0: ethernet@b0000 {
-+		phy-handle = <&phy0>;
-+		phy-connection-type = "rgmii-id";
-+	};
-+
-+	enet1: ethernet@b1000 {
-+		status = "disabled";
-+	};
-+
-+	enet2: ethernet@b2000 {
-+		phy-handle = <&phy1>;
-+		phy-connection-type = "rgmii-id";
-+	};
-+
-+	gpio0: gpio@f000 {
-+		compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
-+		reg = <0xf000 0x1000>;
-+		interrupts = <47 2>;
-+		interrupt-parent = <&mpic>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+	};
-+
-+	gpio-leds {
-+		compatible = "gpio-leds";
-+		gpio5 {
-+			label = "led1";		/* LED15 */
-+			gpios = <&gpio0 5 0>;
-+		};
-+		gpio12 {
-+			label = "led2";		/* LED16 */
-+			gpios = <&gpio0 12 0>;
-+		};
-+		gpio13 {
-+			label = "led3";		/* LED17 */
-+			gpios = <&gpio0 13 0>;
-+		};
-+		gpio7 {
-+			label = "led4";		/* LED18 */
-+			gpios = <&gpio0 7 0>;
-+		};
-+		gpio6 {
-+			label = "led5";		/* LED19 */
-+			gpios = <&gpio0 6 0>;
-+		};
-+	};
-+};
-diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
-index 2fb4b24..81a944f 100644
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -241,6 +241,13 @@ config SGY_CTS1000
- 	help
- 	  Enable this to support functionality in Servergy's CTS-1000 systems.
- 
-+config UCP1020_SOM
-+	bool "Arcturus uCP1020 Rev.1.3 System on Module"
-+	select DEFAULT_UIMAGE
-+	help
-+	  This option enables support for the Arcturus Networks Inc. 
-+	  uCP1020 System on Module.
-+
- config MVME2500
- 	bool "Artesyn MVME2500"
- 	select DEFAULT_UIMAGE
-diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
-index 1fe7fb9..84f2b9a 100644
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -31,4 +31,5 @@ obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
- obj-$(CONFIG_GE_IMP3A)	  += ge_imp3a.o
- obj-$(CONFIG_PPC_QEMU_E500) += qemu_e500.o
- obj-$(CONFIG_SGY_CTS1000) += sgy_cts1000.o
-+obj-$(CONFIG_UCP1020_SOM) += ucp1020_som.o
- obj-$(CONFIG_MVME2500)	  += mvme2500.o
-diff --git a/arch/powerpc/platforms/85xx/ucp1020_som.c b/arch/powerpc/platforms/85xx/ucp1020_som.c
-new file mode 100644
-index 0000000..777e8ad
---- /dev/null
-+++ b/arch/powerpc/platforms/85xx/ucp1020_som.c
-@@ -0,0 +1,92 @@
-+/*
-+ * Arcturus Networks Inc. uCP1020 module Setup
-+ *
-+ * Copyright 2014-2016 Arcturus Networks Inc.
-+ *
-+ * by Oleksandr G Zhadan & Michael Durrant (www.ArcturusNetworks.com)
-+ *
-+ * This program is free software; you can redistribute  it and/or modify it
-+ * under  the terms of  the GNU General  Public License as published by the
-+ * Free Software Foundation;  either version 2 of the  License, or (at your
-+ * option) any later version.
-+ */
-+
-+#include <linux/stddef.h>
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/kdev_t.h>
-+#include <linux/delay.h>
-+#include <linux/seq_file.h>
-+#include <linux/interrupt.h>
-+#include <linux/of_platform.h>
-+
-+#include <asm/time.h>
-+#include <asm/machdep.h>
-+#include <asm/pci-bridge.h>
-+#include <mm/mmu_decl.h>
-+#include <asm/prom.h>
-+#include <asm/udbg.h>
-+#include <asm/mpic.h>
-+#include <asm/fsl_guts.h>
-+
-+#include <sysdev/fsl_soc.h>
-+#include <sysdev/fsl_pci.h>
-+#include "smp.h"
-+
-+#include "mpc85xx.h"
-+
-+void __init ucp1020_som_pic_init(void)
-+{
-+	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
-+	  MPIC_SINGLE_DEST_CPU,
-+	  0, 256, " OpenPIC  ");
-+
-+	BUG_ON(mpic == NULL);
-+
-+	mpic_init(mpic);
-+}
-+
-+/*
-+ * Setup the architecture
-+ */
-+static void __init ucp1020_som_setup_arch(void)
-+{
-+	if (ppc_md.progress)
-+		ppc_md.progress("uCP1020_SoM_setup_arch()", 0);
-+
-+	mpc85xx_smp_init();
-+
-+	fsl_pci_assign_primary();
-+	pr_info("\n\t%s (http://www.arcturusnetworks.com)\n", ppc_md.name);
-+}
-+
-+machine_arch_initcall(ucp1020, mpc85xx_common_publish_devices);
-+machine_arch_initcall(ucp1020, swiotlb_setup_bus_notifier);
-+
-+/*
-+ * Called very early, device-tree isn't unflattened
-+ */
-+static int __init ucp1020_probe(void)
-+{
-+	unsigned long root = of_get_flat_dt_root();
-+
-+	if (of_flat_dt_is_compatible(root, "arcturus,uCP1020"))
-+		return 1;
-+	return 0;
-+}
-+
-+define_machine(ucp1020) {
-+	.name			= "uCP1020 SoM - Arcturus Networks Inc.",
-+	.probe			= ucp1020_probe,
-+	.setup_arch		= ucp1020_som_setup_arch,
-+	.init_IRQ		= ucp1020_som_pic_init,
-+#ifdef CONFIG_PCI
-+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
-+#endif
-+	.get_irq		= mpic_get_irq,
-+	.restart		= fsl_rstcr_restart,
-+	.calibrate_decr		= generic_calibrate_decr,
-+#ifdef DEBUG 
-+	.progress		= udbg_progress,
-+#endif
-+};
--- 
-2.1.4
-

board/arcturus/ppc-ucp1020/patches/linux/0002-p1020-esdhc-controller-reserved-bit.patch

@@ -1,28 +0,0 @@
-From 4c74fd1266287deca0c1ff091071c5b8558b9735 Mon Sep 17 00:00:00 2001
-From: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Date: Mon, 18 Jul 2016 10:45:41 -0400
-Subject: [PATCH 1/1] p1020 esdhc controller reserved bit
-
-Prevent SDHCI core from writing reserved bits, where
-p1020 reserved bit is SDHCI_CTRL_HISPD, not 0x01(SDHCI_CTRL_LED).
-
-Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Signed-off-by: Michael Durrant <arcsupport@arcturusnetworks.com>
----
- drivers/mmc/host/sdhci-esdhc.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
-index a870c42..b45de0a 100644
---- a/drivers/mmc/host/sdhci-esdhc.h
-+++ b/drivers/mmc/host/sdhci-esdhc.h
-@@ -45,6 +45,6 @@
- #define ESDHC_DMA_SYSCTL	0x40c
- #define ESDHC_DMA_SNOOP		0x00000040
- 
--#define ESDHC_HOST_CONTROL_RES	0x01
-+#define ESDHC_HOST_CONTROL_RES	(SDHCI_CTRL_HISPD)
- 
- #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
--- 
-2.1.4

board/arcturus/ppc-ucp1020/patches/linux/0003-powerpc-ptrace-Fix-out-of-bounds-array-access-warning.patch

@@ -1,53 +0,0 @@
-From 35b7ce4f8f290794d3b89db7461e8c568b5defa1 Mon Sep 17 00:00:00 2001
-From: Khem Raj <raj.khem@gmail.com>
-Date: Mon, 25 Apr 2016 09:19:17 -0700
-Subject: powerpc/ptrace: Fix out of bounds array access warning
-
-commit 1e407ee3b21f981140491d5b8a36422979ca246f upstream.
-
-gcc-6 correctly warns about a out of bounds access
-
-arch/powerpc/kernel/ptrace.c:407:24: warning: index 32 denotes an offset greater than size of 'u64[32][1] {aka long long unsigned int[32][1]}' [-Warray-bounds]
-        offsetof(struct thread_fp_state, fpr[32][0]));
-                        ^
-
-check the end of array instead of beginning of next element to fix this
-
-Signed-off-by: Khem Raj <raj.khem@gmail.com>
-Cc: Kees Cook <keescook@chromium.org>
-Cc: Michael Ellerman <mpe@ellerman.id.au>
-Cc: Segher Boessenkool <segher@kernel.crashing.org>
-Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
-Acked-by: Olof Johansson <olof@lixom.net>
-Cc: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
----
- arch/powerpc/kernel/ptrace.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
-index f21897b..93f200f 100644
---- a/arch/powerpc/kernel/ptrace.c
-+++ b/arch/powerpc/kernel/ptrace.c
-@@ -376,7 +376,7 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
- 
- #else
- 	BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
--		     offsetof(struct thread_fp_state, fpr[32][0]));
-+		     offsetof(struct thread_fp_state, fpr[32]));
- 
- 	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
- 				   &target->thread.fp_state, 0, -1);
-@@ -404,7 +404,7 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
- 	return 0;
- #else
- 	BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
--		     offsetof(struct thread_fp_state, fpr[32][0]));
-+		     offsetof(struct thread_fp_state, fpr[32]));
- 
- 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
- 				  &target->thread.fp_state, 0, -1);
--- 
-cgit v1.1

board/arcturus/ppc-ucp1020/readme.txt

@@ -1,73 +0,0 @@
-Arcturus uCP1020 SoM
-====================
-
-This tutorial describes how to use the predefined Buildroot
-configuration for the Arcturus uCP1020 SoM platform.
-
-Additional information about this module can be found at
-<www.arcturusnetworks.com/products/ucp1020>
-
-Building
---------
-
-  make arcturus_ucp1020_defconfig
-  make
-
-Result of the build
--------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.jffs2
-    +-- rootfs.tar
-    +-- u-boot.bin
-    +-- ucp1020.dtb
-    +-- uImage
-
-Flashing
---------
-
-You'll need to program the files created by buildroot into the NOR flash.
-
-1. Program the new U-Boot binary (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    B$ tftp u-boot.bin
-    B$ protect off 0xeff80000 +$filesize
-    B$ erase 0xeff80000 +$filesize
-    B$ cp.b $loadaddr 0xeff80000 $filesize
-
-2. Program the kernel
-
-    B$ tftp uImage
-    B$ erase 0xec140000 +$filesize
-    B$ cp.b $loadaddr 0xec140000 $filesize
-
-3. Program the DTB
-
-    B$ tftp ucp1020.dtb
-    B$ erase 0xec100000 +$filesize
-    B$ cp.b $loadaddr 0xec100000 $filesize
-
-4. Program the jffs2 root filesystem
-
-    B$ tftp rootfs.jffs2
-    B$ erase 0xec800000 0xee8fffff
-    B$ cp.b $loadaddr 0xec800000 $filesize
-
-5. Booting your new system
-
-    B$ setenv norboot 'setenv bootargs root=/dev/mtdblock1 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xec140000 - 0xec100000'
-
-    If you want to set this boot option as default:
-
-    B$ setenv bootcmd 'run norboot'
-    B$ saveenv
-
-    ...or for a single boot:
-
-    B$ run norboot
-
-Good Luck !

board/arm/foundation-v8/readme.txt

@@ -3,14 +3,14 @@ ARM software simulator of the AArch64 architecture.
 
 First, one has to download the AArch64 software simulator from:
 
-  https://silver.arm.com/download/download.tm?pv=2663527
+  https://silver.arm.com/download/download.tm?pv=1509509
 
 Then, use the arm_foundationv8_defconfig configuration to build your
 Buildroot system.
 
 Finally, boot your system with:
 
- ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-4.7/Foundation_Platform \
+ ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/Foundation_v8 \
     --image output/images/linux-system.axf \
     --block-device output/images/rootfs.ext2 \
     --network=nat

board/arm/juno/linux-juno-defconfig

@@ -1,169 +0,0 @@
-CONFIG_SMP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_FHANDLE=y
-CONFIG_AUDIT=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MEMCG=y
-CONFIG_MEMCG_SWAP=y
-CONFIG_MEMCG_KMEM=y
-CONFIG_CGROUP_HUGETLB=y
-CONFIG_SCHED_AUTOGROUP=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_PROFILING=y
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_ARCH_VEXPRESS=y
-CONFIG_PCI=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_HOST_GENERIC=y
-CONFIG_PCIEPORTBUS=y
-CONFIG_HOTPLUG_PCI_PCIE=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_NR_CPUS=6
-CONFIG_PREEMPT=y
-CONFIG_KSM=y
-CONFIG_TRANSPARENT_HUGEPAGE=y
-CONFIG_CMA=y
-CONFIG_CMDLINE="console=ttyAMA0"
-CONFIG_COMPAT=y
-CONFIG_CPU_IDLE=y
-CONFIG_ARM_CPUIDLE=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
-CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
-CONFIG_ARM_DT_BL_CPUFREQ=y
-CONFIG_ARM_SCPI_CPUFREQ=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_BPF_JIT=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_AHCI_XGENE=y
-CONFIG_PATA_PLATFORM=y
-CONFIG_PATA_OF_PLATFORM=y
-CONFIG_NETDEVICES=y
-CONFIG_TUN=y
-CONFIG_SKY2=y
-CONFIG_SMC91X=y
-CONFIG_SMSC911X=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SERIAL_XILINX_PS_UART=y
-CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_I2C_SLAVE=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_PTP_1588_CLOCK=m
-CONFIG_GPIO_PL061=y
-CONFIG_GPIO_XGENE=y
-CONFIG_POWER_RESET_XGENE=y
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_VEXPRESS=m
-CONFIG_DRM=y
-CONFIG_DRM_I2C_NXP_TDA998X=y
-CONFIG_DRM_ARM=y
-CONFIG_DRM_HDLCD=y
-CONFIG_DRM_VIRTUAL_HDLCD=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_HCD_PLATFORM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_ISP1760=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_ULPI=y
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SPI=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_EFI=y
-CONFIG_RTC_DRV_PL030=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_DMADEVICES=y
-CONFIG_PL330_DMA=y
-CONFIG_COMMON_CLK_SCPI=y
-CONFIG_ARM_TIMER_SP804=y
-CONFIG_MAILBOX=y
-CONFIG_ARM_MHU=y
-CONFIG_PHY_XGENE=y
-CONFIG_ARM_SCPI_PROTOCOL=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
-CONFIG_QUOTA=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_CUSE=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_HUGETLBFS=y
-CONFIG_EFIVAR_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_KVM=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOCKUP_DETECTOR=y
-CONFIG_SECURITY=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
-CONFIG_ARM64_CRYPTO=y
-CONFIG_CRYPTO_SHA1_ARM64_CE=y
-CONFIG_CRYPTO_SHA2_ARM64_CE=y
-CONFIG_CRYPTO_GHASH_ARM64_CE=y
-CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
-CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SOC=y
-CONFIG_SND_SIMPLE_CARD=y
-CONFIG_SND_DESIGNWARE_I2S=y
-CONFIG_CMA=y
-CONFIG_CMA_SIZE_MBYTES=64

board/arm/juno/readme.txt

@@ -1,134 +0,0 @@
-ARM Juno r1/r0
-
-Intro
-=====
-
-These instructions apply to all models of the ARM Juno:
-  - Juno r0 (does not support PCIe)
-  - Juno r1 (supports PCIe)
-  - Juno r2 (Big Cluster with A72)
-
-Buildroot will generate the kernel image, device tree blob, bootloader binaries
-and a minimal root filesystem.
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-Configuring Buildroot is pretty simple, just execute:
-
-  $ make arm_juno_defconfig
-
-Build the rootfs, kernel and DTB
---------------------------------
-
-Note: you will need to have access to the network, since Buildroot will
-download the packages' sources.
-
-You may now build your rootfs with:
-
-  $ make
-
-(This may take a while)
-
-Result of the build
--------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.tar
-    +-- juno.dtb (if Juno r0 is used)
-    +-- juno-r1.dtb (if Juno r1 is used)
-    +-- juno-r2.dtb (if Juno r2 is used)
-    +-- Image
-    +-- bl1.bin
-    +-- bl2.bin
-    +-- bl2u.bin
-    +-- bl31.bin
-    +-- fip.bin
-    +-- scp-fw.bin
-    +-- u-boot.bin
-
-Preparing your rootfs
-======================
-
-Format your pen drive as a ext3 filesystem by executing:
-
-   $ mkfs.ext3 /dev/<your device>
-
-Preparing your rootfs
-======================
-
-Format your pen drive as a ext3 filesystem by executing:
-
-   $ mkfs.ext3 /dev/<your device>
-
-Installing your rootfs
-======================
-
-After mounting the pen drive please execute the following:
-
-   $ sudo tar -xvf output/images/rootfs.tar -C <pen drive mount path>
-
-When completed make sure to unmount the device:
-
-   $ umount <pen drive mount path>
-
-Insert the pen drive in one of the ARM Juno' USB type A connectors.
-
-Configure *.dtb in the boot configuration for Juno r0
-=====================================================
-
-SITE1/HBI0262B/images.txt
-.....
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x00C00000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno.dtb     ;Image File Name
-NOR3NAME: board.dtb              ;Specify Image name to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Configure *.dtb in the boot configuration for Juno r1
-=====================================================
-
-SITE1/HBI0262C/images.txt
-......
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x00C00000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno-r1.dtb  ;Image File Name
-NOR3NAME: board.dtb              ;Specify target filename to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Configure *.dtb in the boot configuration for Juno r2
-=====================================================
-
-SITE1/HBI0262D/images.txt
-......
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x02000000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno-r2.dtb  ;Image File Name
-NOR3NAME: board.dtb              ;Specify target filename to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Installing kernel image and DTB
-===============================
-
-1. Connect to the ARM Juno UART0 and execute USB_ON in the terminal
-2. Connect a USB cable between your PC and ARM Juno USB type B connector
-   A mass storage device should appear in your desktop.
-3. Open the software/ folder
-4. Copy the 'Image' file to software/
-5. Copy the 'juno-r1.dtb' (r1), 'juno.dtb' (r0) or juno-r2.dtb (r2) file to software/
-6. Copy the bootloader binaries (bl1.bin and fip.bin) to software/
-7. Press the red button in the front pannel of ARM Juno
-
-At this time, the board will erase the Flash entry for each new item and
-replace it with the lastest ones.

board/armadeus/apf27/linux-3.18.config

@@ -0,0 +1,224 @@
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_CGROUPS=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MXC=y
+CONFIG_MACH_IMX27_DT=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_PM_DEBUG=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_MCP251X=m
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+# CONFIG_MTD_CFI_I2 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_UBI=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_SMSC_PHY=y
+CONFIG_RTL8187=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RTL8192CU=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=m
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_W1=y
+CONFIG_W1_MASTER_MXC=y
+CONFIG_W1_SLAVE_THERM=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_PWC=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=m
+CONFIG_VIDEO_MX2=m
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+# CONFIG_DVB_AU8522_V4L is not set
+# CONFIG_DVB_TUNER_DIB0070 is not set
+# CONFIG_DVB_TUNER_DIB0090 is not set
+CONFIG_FB=y
+# CONFIG_FB_MX3 is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=m
+CONFIG_SND=m
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_IMX_SOC=m
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_DEBUG=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_HID=m
+CONFIG_MMC=y
+CONFIG_MMC_MXC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1374=y
+CONFIG_RTC_DRV_MXC=m
+CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
+CONFIG_IMX_DMA=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_IIO=y
+CONFIG_MAX1027=y
+CONFIG_MAX5821=y
+CONFIG_PWM=y
+CONFIG_PWM_IMX=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=m
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y

board/armadeus/apf27/linux-4.12.config

@@ -1,216 +0,0 @@
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MACH_IMX27_DT=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_CAN=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-CONFIG_SMSC_PHY=y
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT2500USB=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RTL8187=m
-CONFIG_RTL8192CU=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_IMX=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_W1=y
-CONFIG_W1_MASTER_MXC=y
-CONFIG_W1_SLAVE_THERM=y
-CONFIG_WATCHDOG=y
-CONFIG_IMX2_WDT=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_USB_PWC=m
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_SOC_CAMERA=m
-# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-CONFIG_FB=y
-# CONFIG_FB_MX3 is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_MXC=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_LEDS_TRIGGER_TRANSIENT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1374=y
-CONFIG_RTC_DRV_MXC=m
-CONFIG_DMADEVICES=y
-CONFIG_IMX_DMA=y
-CONFIG_IMX_SDMA=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_IIO=y
-CONFIG_MAX1027=y
-CONFIG_MAX5821=y
-CONFIG_PWM=y
-CONFIG_PWM_IMX=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=m
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y

board/armadeus/apf28/linux-3.12.config

@@ -0,0 +1,185 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MXS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_IDLE=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_FLEXCAN=m
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RC_PID=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER=m
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
+# CONFIG_M25PXX_USE_FAST_READ is not set
+CONFIG_MTD_SST25L=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+CONFIG_RTL8187=m
+CONFIG_RT2X00=m
+CONFIG_RT73USB=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=m
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_MXS_AUART=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MXS=y
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_MXS=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_HWMON=m
+CONFIG_WATCHDOG=y
+CONFIG_STMP3XXX_RTC_WATCHDOG=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_FB=y
+CONFIG_FB_MXS=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_MXS_PHY=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_ETH=m
+CONFIG_MMC=y
+CONFIG_MMC_MXS=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_STMP=y
+CONFIG_DMADEVICES=y
+CONFIG_MXS_DMA=y
+CONFIG_STAGING=y
+CONFIG_MXS_LRADC=y
+CONFIG_IIO=y
+CONFIG_PWM=y
+CONFIG_PWM_MXS=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_FS=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set

board/armadeus/apf28/linux-4.4.config

@@ -1,185 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_IDLE=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_FLEXCAN=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_M25P80=y
-# CONFIG_M25PXX_USE_FAST_READ is not set
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPMI_NAND=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_RTL8187=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_MXS_AUART=y
-CONFIG_TTY_PRINTK=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MXS=y
-CONFIG_SPI=y
-CONFIG_SPI_BITBANG=m
-CONFIG_SPI_MXS=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_HWMON=m
-CONFIG_WATCHDOG=y
-CONFIG_STMP3XXX_RTC_WATCHDOG=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_FB=y
-CONFIG_FB_MXS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_MXS_PHY=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_MXS=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_STMP=y
-CONFIG_DMADEVICES=y
-CONFIG_MXS_DMA=y
-CONFIG_STAGING=y
-CONFIG_MXS_LRADC=y
-CONFIG_IIO=y
-CONFIG_PWM=y
-CONFIG_PWM_MXS=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y

board/armadeus/apf51/linux-3.12.config

@@ -0,0 +1,266 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_MXC=y
+CONFIG_MXC_IRQ_PRIOR=y
+CONFIG_MACH_IMX51_DT=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_IMX=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_MCP251X=m
+CONFIG_BT=m
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RC_PID=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER=m
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_UBI=y
+CONFIG_MISC_DEVICES=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_SMSC_PHY=y
+CONFIG_NET_ETHERNET=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_RTL8187=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_RT2X00=m
+CONFIG_RT73USB=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_IMX=m
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_WM831X=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=m
+CONFIG_INPUT_WM831X_ON=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_WM831X=m
+CONFIG_POWER_SUPPLY=m
+CONFIG_WM831X_BACKUP=m
+CONFIG_WM831X_POWER=m
+CONFIG_HWMON=m
+CONFIG_SENSORS_AS1531=m
+CONFIG_SENSORS_WM831X=m
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WM831X_WATCHDOG=m
+CONFIG_IMX2_WDT=y
+CONFIG_MFD_WM831X_I2C=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MFD_IMX_IPU_V3=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_VIDEO_DEV=m
+# CONFIG_RC_CORE is not set
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+CONFIG_VIDEO_VIVI=m
+CONFIG_USB_VIDEO_CLASS=m
+# CONFIG_RADIO_ADAPTERS is not set
+CONFIG_FB=y
+CONFIG_FB_MX5=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
+CONFIG_SND=m
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_IMX_SOC=m
+CONFIG_SND_SOC_APF51_DEV_WM8960=m
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_WHITELIST is not set
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_PHY=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_GPIO_VBUS=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_DEBUG_FS=y
+CONFIG_USB_ETH=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_G_HID=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_MMC_SPI=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_WM831X_STATUS=m
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_MXC=y
+CONFIG_RTC_DRV_WM831X=y
+CONFIG_STAGING=y
+CONFIG_IIO=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_CMODE_NONE=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_FS=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set

board/armadeus/apf51/linux-4.4.config

@@ -1,278 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MXC_IRQ_PRIOR=y
-CONFIG_SOC_IMX51=y
-CONFIG_ARM_THUMBEE=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_IMX=y
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_SUSPEND is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_MISC_DEVICES=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_RTL8187=m
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=m
-CONFIG_KEYBOARD_IMX=m
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_WM831X=y
-CONFIG_TOUCHSCREEN_MC13XXX=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_MC13783_PWRBUTTON=m
-CONFIG_INPUT_UINPUT=m
-CONFIG_INPUT_WM831X_ON=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_WM831X=m
-CONFIG_POWER_SUPPLY=y
-CONFIG_WM831X_BACKUP=m
-CONFIG_WM831X_POWER=m
-CONFIG_HWMON=m
-CONFIG_SENSORS_AS1531=m
-CONFIG_SENSORS_MC13783_ADC=m
-CONFIG_SENSORS_WM831X=m
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WM831X_WATCHDOG=m
-CONFIG_IMX2_WDT=y
-CONFIG_MFD_MC13XXX_I2C=y
-CONFIG_MFD_WM831X_I2C=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_MC13892=m
-CONFIG_IMX_IPUV3_CORE=y
-CONFIG_DRM=y
-CONFIG_MFD_IMX_IPU_V3=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_VIDEO_DEV=m
-# CONFIG_RC_CORE is not set
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5761 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_XC2028 is not set
-# CONFIG_MEDIA_TUNER_XC5000 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_MEDIA_TUNER_MAX2165 is not set
-# CONFIG_MEDIA_TUNER_TDA18218 is not set
-CONFIG_VIDEO_VIVI=m
-CONFIG_USB_VIDEO_CLASS=m
-# CONFIG_RADIO_ADAPTERS is not set
-CONFIG_FB=y
-CONFIG_FB_MX5=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_SND_SOC_APF51_DEV_WM8960=m
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_OTG=y
-# CONFIG_USB_OTG_WHITELIST is not set
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_PHY=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_GPIO_VBUS=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ETH=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_MMC_SPI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_WM831X_STATUS=m
-CONFIG_LEDS_MC13783=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_MXC=y
-CONFIG_RTC_DRV_WM831X=y
-CONFIG_RTC_DRV_MC13XXX=m
-CONFIG_STAGING=y
-CONFIG_DRM_IMX=y
-CONFIG_DRM_IMX_FB_HELPER=y
-CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
-CONFIG_DRM_IMX_TVE=y
-CONFIG_DRM_IMX_IPUV3=y
-CONFIG_IIO=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_EXT4_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set

board/armadeus/readme.txt

@@ -1,84 +0,0 @@
-Introduction
-============
-
-Armadeus APFxx are Systems On Module (SOM) based on Freescale/NXP i.MX
-processors associated with an FPGA (except on APF28). Non volatile
-data are stored in on-module NOR or NAND Flash, depending on the
-model. These SOM can be used on Armadeus development boards or with
-custom docking boards.
-
-Supported platforms
-===================
-
-Buildroot currently supports the following Armadeus platforms with the
-associated defconfigs:
-
- * APF27 SOM + devt board    -> armadeus_apf27_defconfig
- * APF51 SOM + devt board    -> armadeus_apf51_defconfig
- * APF28 SOM + devt board    -> armadeus_apf28_defconfig
-
-Vanilla Linux versions are preferred to Freescale's one in these
-configurations.
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-Let's say you own an APFxx SOM with it's corresponding development
-board, all you have to do is:
-
-  $ make armadeus_apfxx_defconfig
-
-where "apfxx" is the version of your SOM.
-
-Launch build
-------------
-
-  $ make
-
-Result of the build
--------------------
-
-When the build is finished, you will end up with:
-
-    output/images/
-    ├── imx**-apfxxdev.dtb	[1]
-    ├── rootfs.tar
-    ├── rootfs.ubi
-    ├── rootfs.ubifs
-    └── uImage
-
-[1] Only if the kernel version used uses a Device Tree.
-
-Building U-Boot is currently not supported in these configurations.
-
-Installation
-============
-
-You will require a serial connection to the board and a TFTP server on
-your Host PC. Assuming your server is configured for exporting
-/tftpboot/ directory, you will have to copy the generated images to
-it:
-
-  $ cp output/images/uImage /tftpboot/apfxx-linux.bin
-  $ cp output/images/*.dtb /tftpboot/
-  $ cp output/images/rootfs.ubi /tftpboot/apfxx-rootfs.ubi
-
-where "apfxx" is the version of your SOM, as used with _defconfigs.
-
-Then on your serial terminal, all you have to do is:
-
-* interrupt the boot process and access U-Boot console by pressing any
-  key when booting,
-* configure board and server IP addresses with "ipaddr" and "serverip"
-  environment variables,
-* if you want to update kernel:
-  BIOS > run update_kernel
-* if you want to update device tree:
-  BIOS > run update_dtb
-* if you want to update rootfs:
-  BIOS > run update_rootfs
-
-That's it !

board/atmel/at91sam9260ek/linux-3.9.config

@@ -0,0 +1,98 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9260=y
+CONFIG_ARCH_AT91SAM9260_SAM9XE=y
+CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_MACH_CAM60=y
+CONFIG_MACH_SAM9_L9260=y
+CONFIG_MACH_AFEB9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_MACH_CPU9260=y
+CONFIG_MACH_FLEXIBITY=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_GPIO=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_AT91SAM9X_WATCHDOG=y
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DEBUG=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91SAM9=y
+CONFIG_EXT2_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y

board/atmel/at91sam9x5ek_mmc/genimage.cfg

@@ -1,39 +0,0 @@
-# Image for SD card boot on Atmel at91sam9x5ek boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91sam9g15ek.dtb",
-			"at91sam9g25ek.dtb",
-			"at91sam9g35ek.dtb",
-			"at91sam9x25ek.dtb",
-			"at91sam9x35ek.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-
-		file uboot.env {
-			image = "uboot-env.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/atmel/at91sam9x5ek_mmc/post-image.sh

@@ -1,20 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-echo --rootpath "${TARGET_DIR}"
-echo --tmppath "${GENIMAGE_TMP}"
-echo --inputpath "${BINARIES_DIR}"
-echo --outputpath "${BINARIES_DIR}"
-echo --config "${GENIMAGE_CFG}"
-
-genimage                               \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/atmel/at91sam9x5ek_mmc/uboot-env.txt

@@ -1,7 +0,0 @@
-bootargs=console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait video=Unknown-1:800x480-16
-bootcmd=fatload mmc 0:1 0x21000000 at91sam9g35ek.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
-bootdelay=1
-ethact=gmac0
-stderr=serial
-stdin=serial
-stdout=serial

board/atmel/flasher.sh

@@ -1,4 +1,4 @@
-#!/usr/bin/env bash
+#!/bin/bash
 
 BUILDIR=$1
 TTY=$2

board/atmel/readme.txt

@@ -1,6 +1,10 @@
-This document explains how to set up a basic Buildroot system on various
-Atmel boards. Additional details can also be found on the Linux4SAM website:
-http://www.at91.com/linux4sam/bin/view/Linux4SAM/
+Flashing the NAND using SAM-BA
+==============================
+
+This document explains how to flash a basic Buildroot system on various
+Atmel boards. Additional details can
+also be found on the Linux4SAM website, in particular here:
+http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted
 
 This guide covers the following configurations:
  - at91sam9g45m10ek_defconfig
@@ -10,49 +14,20 @@ This guide covers the following configurations:
  - atmel_sama5d3xek_defconfig (sama5d31, sama5d33, sama5d34, sama5d35,
    sama5d36)
  - atmel_sama5d3_xplained_defconfig
- - atmel_sama5d3_xplained_dev_defconfig
- - atmel_sama5d3_xplained_mmc_defconfig
- - atmel_sama5d3_xplained_mmc_dev_defconfig
+ - atmel_sama5d4ek_defconfig
  - atmel_sama5d4_xplained_defconfig
- - atmel_sama5d4_xplained_dev_defconfig
- - atmel_sama5d4_xplained_mmc_defconfig
- - atmel_sama5d4_xplained_mmc_dev_defconfig
- - atmel_sama5d2_xplained_mmc_defconfig
- - atmel_sama5d2_xplained_mmc_dev_defconfig
 
 These configurations will use AT91Bootstrap, u-boot and a linux kernel from
-the git trees maintained by Atmel.
+the git trees maintained by Atmel. They also build u-boot SPL when
+available, it can replace AT91Bootstrap.
 
-The configurations labeled as 'dev' provide a development rootfs with tools to
-tests the features of the SoC:
-- ALSA tools to test audio
-- FFMPEG to record video from the ISI/ISC
-- I2C, SPI, CAN, etc. tools
-- modetest for LCD screens, HDMI
-- Wilc1000 firmware for the Atmel Wireless sdio module
-- SSH for convenience
-- GDB/GDB server for debug
 
 Configuring and building Buildroot
-==================================
-
-For most configurations listed above, the Buildroot configuration
-assumes the system will be flashed on NAND. In this case, after
-building Buildroot, follow the instructions in the "Flashing the NAND
-using SAM-BA" section below.
-
-For the Xplained boards, an alternative Buildroot configuration is
-provided to boot from an SD card. Those configurations are labeled as
-'mmc'. In this case, after building Buildroot, follow the instructions
-in the "Preparing the SD card" section.
-
-To configure and build Buildroot, run:
+----------------------------------
 
   make <board>_defconfig
   make
 
-Flashing the NAND using SAM-BA
-==============================
 
 Flashing the board
 ------------------
@@ -130,44 +105,3 @@ board/atmel/flasher.sh /tmp/atmel_sama5d3_xplained/ /dev/ttyACM0 sama5d3_xplaine
 
 Reboot, the system should boot up to the buildroot login invite.
 
-Preparing the SD card
-=====================
-
-An image named sdcard.img is automatically generated. With this image,
-you no longer have to care about the creation of the partition and
-copying files to the SD card.
-
-You need at least a 1GB SD card. All the data on the SD card will be
-lost. To copy the image on the SD card:
-
-/!\ Caution be sure to do it on the right mmcblk device /!\
-
-dd if=output/images/sdcard.img of=/dev/mmcblk0
-
-Insert your SD card in your Xplained board, and enjoy. The default
-U-Boot environment will load properly the kernel and Device Tree blob
-from the first partition of the SD card, so everything works
-automatically.
-
-By default a 16MB FAT partition is created. It contains at91bootstrap,
-u-boot, the kernel image and all dtb variants for your board. The dtb
-used is the basic one:
-
-U-Boot> print
-[...]
-bootcmd=fatload mmc 1:1 0x21000000 at91-sama5d2_xplained.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
-[...]
-
-If you want to use a variant such as the _pda7 one, you will have to
-update your u-boot environment:
-
-U-Boot> setenv bootcmd 'fatload mmc 1:1 0x21000000 at91-sama5d2_xplained_pda7.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000'
-U-Boot> save
-Saving Environment to FAT...
-writing uboot.env
-done
-
-A 512MB ext4 partition is also created to store the rootfs generated.
-
-If you want to customize the size of the partitions and their content,
-take a look at the the genimage.cfg file in the board directory.

board/atmel/sama5d2_xplained_mmc/genimage.cfg

@@ -1,34 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D2 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d2_xplained.dtb",
-			"at91-sama5d2_xplained_pda4.dtb",
-			"at91-sama5d2_xplained_pda7.dtb",
-			"at91-sama5d2_xplained_pda7b.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/atmel/sama5d2_xplained_mmc/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                               \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/atmel/sama5d3_xplained_mmc/genimage.cfg

@@ -1,34 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D3 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d3_xplained.dtb",
-			"at91-sama5d3_xplained_pda4.dtb",
-			"at91-sama5d3_xplained_pda7.dtb",
-			"at91-sama5d3_xplained_pda7b.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/atmel/sama5d3_xplained_mmc/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                               \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/atmel/sama5d4_xplained_mmc/genimage.cfg

@@ -1,35 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D4 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d4_xplained.dtb",
-			"at91-sama5d4_xplained_hdmi.dtb",
-			"at91-sama5d4_xplained_pda4.dtb",
-			"at91-sama5d4_xplained_pda7.dtb",
-			"at91-sama5d4_xplained_pda7b.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/atmel/sama5d4_xplained_mmc/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                               \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/atmel/xplained/readme.txt

@@ -0,0 +1,73 @@
+Atmel SAMA5D3 Xplained board
+============================
+
+This document explains how to set up a basic Buildroot system on the
+Atmel SAMA5D3 Xplained board, whose main site is
+http://www.atmel.com/tools/ATSAMA5D3-XPLD.aspx. Additional details can
+also be found on the http://www.at91.com/linux4sam/bin/view/Linux4SAM/
+web site.
+
+Note that the default Buildroot configuration is prepared to boot from
+an SD card: the first stage bootloader, second stage bootloader,
+kernel image and root filesystem are all located on the SD card. Some
+adjustments in the bootloader configuration will be needed to boot
+from NAND flash, see board/atmel/nandflash.txt
+
+Configuring and building Buildroot
+----------------------------------
+
+  make atmel_sama5d3_xplained_mmc_defconfig
+  make
+
+Preparing the SD card
+---------------------
+
+The SD card must be partitioned with at least two partitions: one
+FAT16 partition for the bootloaders, kernel image and Device Tree
+blob, and one ext4 partition for the root filesystem. To partition the
+SD card:
+
+sudo sfdisk -uM /dev/mmcblk0 <<EOF
+,64,6
+;
+EOF
+
+This creates a 64 MB partition for the FAT16 filesystem (type 6) and
+uses the rest for the ext4 filesystem used for the root filesystem.
+
+Then, format both partitions:
+
+sudo mkfs.msdos -n boot /dev/mmcblk0p1
+sudo mkfs.ext4 -L rootfs -O ^huge_file /dev/mmcblk0p2
+
+ Note: the -O ^huge_file option is needed to avoid enabling the huge
+ files features of ext4 (to support files larges than 2 TB), which
+ needs the kernel option CONFIG_LBDAF to be enabled.
+
+Mount both partitions (if not done automatically by your system):
+
+sudo mount /dev/mmcblk0p1 /media/boot
+sudo mount /dev/mmcblk0p2 /media/rootfs
+
+Copy the bootloaders, kernel image and Device Tree blob to the first
+partition:
+
+cp output/images/uboot-spl.bin /media/boot/boot.bin
+cp output/images/u-boot.img /media/boot/u-boot.img
+cp output/images/zImage /media/boot/zImage
+cp output/images/at91-sama5d3_xplained.dtb /media/boot/at91-sama5d3_xplained.dtb
+
+Extract the root filesystem to the second partition:
+
+sudo tar -C /media/rootfs -xf output/images/rootfs.tar
+
+Unmount both partitions:
+
+sudo umount /media/boot
+sudo umount /media/rootfs
+
+Insert your SD card in your Xplained board, and enjoy. The default
+U-Boot environment will properly load the kernel and Device Tree blob
+from the first partition of the SD card, so everything works
+automatically.
+

board/avnet/zedboard/readme.txt

@@ -0,0 +1,64 @@
+This is the buildroot board support for the Avnet Zedboard. The Zedboard is
+a development board based on the Xilinx Zynq-7000 based All-Programmable
+System-On-Chip.
+
+Zedboard information including schematics, reference designs, and manuals are
+available from http://www.zedboard.org .
+
+Steps to create a working system for Zedboard:
+
+1) make zedboard_defconfig
+2) make
+3) copy files BOOT.BIN, u-boot-dtb.img, rootfs.cpio.uboot,
+	uImage, zynq-zed.dtb into your SD card
+4) boot your Zedboard
+
+The expected output:
+
+ U-Boot SPL 2015.07 (Jul 22 2015 - 12:01:55)
+ mmc boot
+ reading system.dtb
+ spl_load_image_fat_os: error reading image system.dtb, err - -1
+ reading u-boot-dtb.img
+ reading u-boot-dtb.img
+
+ U-Boot 2015.07 (Jul 22 2015 - 12:01:55 +0200)
+
+ Model: Zynq ZED Board
+ I2C:   ready
+ DRAM:  ECC disabled 512 MiB
+ MMC:   zynq_sdhci: 0
+ Using default environment
+ ...
+
+When using an older U-Boot then 2015.07, a working ps7_init.c
+file is required to be installed into the U-Boot directory
+structure. From 2015.07, the major Zynq-based boards are
+supported without any manual intervention.
+
+Resulting system
+----------------
+A FAT32 partition should be created at the beginning of the SD Card
+and the following files should be installed:
+	/BOOT.BIN
+	/zynq-zed.dtb
+	/uImage
+	/rootfs-cpio.uboot
+	/u-boot-dtb.img
+
+
+All needed files can be taken from output/images/
+
+BOOT.BIN, uImage and u-boot-dtb.img are direct copies of the same files
+available on output/images/
+
+There is a patch attached that redefines the U-Boot's environment
+to work with Buildroot out-of-the-box.
+
+You can alter the booting procedure by creating a file uEnv.txt
+in the root of the SD card. It is a plain text file in format
+<key>=<value> one per line:
+
+kernel_image=myimage
+modeboot=myboot
+myboot=...

board/avnet/zedboard/uboot/0001-zynq-Create-zedboard-specific-U-Boot-environment.patch

@@ -0,0 +1,46 @@
+From a4c0058967a551385da5e16d2787d9f704cab225 Mon Sep 17 00:00:00 2001
+From: Jan Viktorin <viktorin@rehivetech.com>
+Date: Thu, 18 Jun 2015 16:26:02 +0200
+Subject: [PATCH 2/2] zynq: Create zedboard-specific U-Boot environment
+
+---
+ include/configs/zynq_zed.h | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h
+index 946de95..2400a88 100644
+--- a/include/configs/zynq_zed.h
++++ b/include/configs/zynq_zed.h
+@@ -24,4 +24,29 @@
+
+ #include <configs/zynq-common.h>
+
++#undef CONFIG_EXTRA_ENV_SETTINGS
++#define CONFIG_EXTRA_ENV_SETTINGS \
++	"envload=mmc info && if fatload mmc 0 0x1000 uEnv.txt;"\
++	" then echo Importing uEnv.txt; env import -t 0x1000"  \
++	" $filesize; fi;\0"                                    \
++	"bootcmd=run $modeboot\0"                              \
++	"modeboot=sdboot\0"                                    \
++	"baudrate=115200\0"                                    \
++	"bootenv=uEnv.txt\0"                                   \
++	"devicetree_image=zynq-zed.dtb\0"                      \
++	"kernel_image=uImage\0"                                \
++	"ramdisk_image=rootfs.cpio.uboot\0"                    \
++	"fpga_image=system.bit\0"                              \
++	"sdboot=echo Booting from SD...;"                      \
++	" run envload; run fpgaboot;"                          \
++	" fatload mmc 0 0x1000000 ${kernel_image}"             \
++	" && fatload mmc 0 0x2000000 ${ramdisk_image}"         \
++	" && fatload mmc 0 0x3000000 ${devicetree_image}"      \
++	" && bootm 0x1000000 0x2000000 0x3000000\0"            \
++	"fpgaboot=if fatload mmc 0 0x1000000 ${fpga_image};"   \
++	" then echo Booting FPGA from ${fpga_image};"          \
++	" fpga info 0 && fpga loadb 0 0x1000000 $filesize;"    \
++	" else echo FPGA image ${fpga_image} was not found,"   \
++	" skipping...; fi;\0"
++
+ #endif /* __CONFIG_ZYNQ_ZED_H */
+--
+2.4.3
+

board/beagleboardx15/genimage.cfg

@@ -1,26 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"MLO",
-			"u-boot.img"
-		}
-	}
-	size = 4M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		partition-type = 0xC
-		bootable = "true"
-                image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/beagleboardx15/post-image.sh

@@ -1,15 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-    --rootpath "${TARGET_DIR}" \
-    --tmppath "${GENIMAGE_TMP}" \
-    --inputpath "${BINARIES_DIR}" \
-    --outputpath "${BINARIES_DIR}" \
-    --config "${GENIMAGE_CFG}"

board/beagleboardx15/readme.txt

@@ -1,49 +0,0 @@
-BeagleBoard X15
-
-Intro
-=====
-This config currently supports the beagleboard x15,
-and generates a barebone image.
-
-The image must be flashed to a SD card to be used.
-
-How to build it
-===============
-
-  $ make beagleboardx15_defconfig
-
-Then you can edit the build options using
-
-  $ make menuconfig
-
-Compile all and build a sdcard image:
-
-  $ make
-
-Result of the build
--------------------
-
-After building, you should get a tree like this:
-
-  output/images/
-  ├── am57xx-beagle-x15.dtb
-  ├── am57xx-beagle-x15-revb1.dtb
-  ├── boot.vfat
-  ├── MLO
-  ├── rootfs.ext2
-  ├── rootfs.ext4
-  ├── rootfs.tar
-  ├── sdcard.img
-  ├── u-boot.img
-  ├── u-boot-spl.bin
-  └── zImage
-
-How to write the microSD card
-=============================
-
-Once the build process is finished you will have an image called "sdcard.img"
-in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an SD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX

board/beaglebone/genimage.cfg

@@ -1,33 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"MLO",
-			"u-boot.img",
-			"zImage",
-			"uEnv.txt",
-			"am335x-evm.dtb",
-			"am335x-evmsk.dtb",
-			"am335x-bone.dtb",
-			"am335x-boneblack.dtb",
-			"am335x-bonegreen.dtb",
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		partition-type = 0xC
-		bootable = "true"
-                image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/beaglebone/genimage_linux41.cfg

@@ -1,32 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"MLO",
-			"u-boot.img",
-			"zImage",
-			"uEnv.txt",
-			"am335x-evm.dtb",
-			"am335x-evmsk.dtb",
-			"am335x-bone.dtb",
-			"am335x-boneblack.dtb",
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		partition-type = 0xC
-		bootable = "true"
-                image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/beaglebone/linux-3.12.config

@@ -0,0 +1,251 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_OMAP_RESET_CLOCKS=y
+CONFIG_OMAP_MUX_DEBUG=y
+CONFIG_ARCH_OMAP3=y
+CONFIG_ARCH_OMAP4=y
+CONFIG_SOC_AM43XX=y
+# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
+# CONFIG_SOC_TI81XX is not set
+# CONFIG_MACH_OMAP3_BEAGLE is not set
+# CONFIG_MACH_DEVKIT8000 is not set
+# CONFIG_MACH_OMAP_LDP is not set
+# CONFIG_MACH_OMAP3530_LV_SOM is not set
+# CONFIG_MACH_OMAP3_TORPEDO is not set
+# CONFIG_MACH_OVERO is not set
+# CONFIG_MACH_OMAP3EVM is not set
+# CONFIG_MACH_OMAP3_PANDORA is not set
+# CONFIG_MACH_TOUCHBOOK is not set
+# CONFIG_MACH_OMAP_3430SDP is not set
+# CONFIG_MACH_NOKIA_RM680 is not set
+# CONFIG_MACH_NOKIA_RX51 is not set
+# CONFIG_MACH_OMAP_ZOOM2 is not set
+# CONFIG_MACH_OMAP_ZOOM3 is not set
+# CONFIG_MACH_CM_T35 is not set
+# CONFIG_MACH_CM_T3517 is not set
+# CONFIG_MACH_IGEP0020 is not set
+# CONFIG_MACH_IGEP0030 is not set
+# CONFIG_MACH_SBC3530 is not set
+# CONFIG_MACH_OMAP_3630SDP is not set
+CONFIG_ARM_THUMBEE=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
+CONFIG_KEXEC=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_GENERIC_CPUFREQ_CPU0=y
+# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
+CONFIG_FPE_NWFPE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_BINFMT_MISC=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_DEBUG=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_OMAP_OCP2SCP=y
+CONFIG_CONNECTOR=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=16384
+CONFIG_CROSSBAR=y
+CONFIG_EEPROM_93CX6=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_MD=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_TI_CPSW=y
+CONFIG_TI_CPTS=y
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_AT803X_PHY=y
+CONFIG_SMSC_PHY=y
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=32
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_OMAP=y
+CONFIG_SERIAL_OMAP_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_OMAP=y
+CONFIG_SPI=y
+CONFIG_SPI_OMAP24XX=y
+CONFIG_SPI_TI_QSPI=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_W1=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
+CONFIG_TI_SOC_THERMAL=y
+CONFIG_TI_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_OMAP_WATCHDOG=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MFD_TPS65217=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_PBIAS=y
+CONFIG_REGULATOR_TPS65023=y
+CONFIG_REGULATOR_TPS6507X=y
+CONFIG_REGULATOR_TPS65217=y
+CONFIG_REGULATOR_TIAVSCLASS0=y
+CONFIG_FB=y
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FB_DA8XX=y
+CONFIG_FB_DA8XX_TDA998X=y
+CONFIG_OMAP2_DSS=y
+CONFIG_OMAP2_DSS_SDI=y
+CONFIG_OMAP2_DSS_DSI=y
+CONFIG_FB_OMAP2=y
+CONFIG_DISPLAY_CONNECTOR_HDMI=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_OMAP2PLUS=m
+CONFIG_USB_MUSB_DSPS=m
+CONFIG_USB_TI_CPPI41_DMA=y
+CONFIG_USB_STORAGE=y
+CONFIG_AM335X_PHY_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG=y
+CONFIG_USB_GADGET_DEBUG_FS=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_OMAP=y
+CONFIG_MMC_OMAP_HS=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_OMAP=y
+CONFIG_DMADEVICES=y
+CONFIG_TI_EDMA=y
+CONFIG_DMA_OMAP=y
+CONFIG_TI_CPPI41=y
+CONFIG_COMMON_CLK_DEBUG=y
+CONFIG_OMAP_USB2=y
+CONFIG_OMAP_PIPE3=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V2=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_SCHEDSTATS=y
+CONFIG_TIMER_STATS=y
+CONFIG_PROVE_LOCKING=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_LZO=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+CONFIG_CRC_CCITT=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=y
+CONFIG_AVERAGE=y

board/beaglebone/linux-4.1-sgx.fragment

@@ -1,12 +0,0 @@
-CONFIG_PREEMPT=y
-CONFIG_PREEMPT_COUNT=y
-CONFIG_OMAP2_DSS_INIT=y
-CONFIG_OMAP_DSS_BASE=y
-CONFIG_OMAP2_DSS=y
-CONFIG_OMAP2_DSS_DPI=y
-CONFIG_DRM_OMAP=y
-CONFIG_DRM_OMAP_NUM_CRTCS=2
-CONFIG_DRM_OMAP_WB_M2M=y
-CONFIG_DRM_TILCDC=y
-CONFIG_DRM_I2C_NXP_TDA998X=y
-CONFIG_DRM=y

board/beaglebone/patches/linux/0001-keep-jtag-clock-alive-for-debugger.patch

@@ -1,16 +0,0 @@
-This patch keeps the debugSS clock alive, it clocks the JTAG macro and enables
-access to the SoC via JTAG after the kernel booted.
-
-Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
----
-diff -Naur linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
---- linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c	2015-10-02 17:30:56.000000000 +0200
-+++ linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c	2016-08-15 11:28:55.017617612 +0200
-@@ -208,6 +208,7 @@
- 	.name		= "debugss",
- 	.class		= &am33xx_debugss_hwmod_class,
- 	.clkdm_name	= "l3_aon_clkdm",
-+	.flags		= (HWMOD_INIT_NO_IDLE|HWMOD_INIT_NO_RESET), /* keep debugSS clock alive for JTAG */
- 	.main_clk	= "trace_clk_div_ck",
- 	.prcm		= {
- 		.omap4	= {

board/beaglebone/patches/linux/linux-0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch

@@ -0,0 +1,34 @@
+From 29885f2f3d700341d322274db6ad085e601c0994 Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto@antoniou-consulting.com>
+Date: Fri, 4 Jan 2013 00:32:33 +0200
+Subject: [PATCH 3/3] arm: Export cache flush management symbols when
+ !MULTI_CACHE
+
+When compiling a kernel without CONFIG_MULTI_CACHE enabled the
+dma access functions end up not being exported. Fix it.
+
+Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
+---
+ arch/arm/kernel/setup.c |    9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
+index da1d1aa..dcb678c 100644
+--- a/arch/arm/kernel/setup.c
++++ b/arch/arm/kernel/setup.c
+@@ -923,3 +923,12 @@ const struct seq_operations cpuinfo_op = {
+ 	.stop	= c_stop,
+ 	.show	= c_show
+ };
++
++/* export the cache management functions */
++#ifndef MULTI_CACHE
++
++EXPORT_SYMBOL(__glue(_CACHE,_dma_map_area));
++EXPORT_SYMBOL(__glue(_CACHE,_dma_unmap_area));
++EXPORT_SYMBOL(__glue(_CACHE,_dma_flush_range));
++
++#endif
+-- 
+1.7.10.4
+

board/beaglebone/post-image.sh

@@ -1,29 +1,6 @@
 #!/bin/sh
-# post-image.sh for CircuitCo BeagleBone and TI am335x-evm
+# post-image.sh for BeagleBone
 # 2014, Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
-# 2016, Lothar Felten <lothar.felten@gmail.com>
-
-BOARD_DIR="$(dirname $0)"
 
 # copy the uEnv.txt to the output/images directory
 cp board/beaglebone/uEnv.txt $BINARIES_DIR/uEnv.txt
-
-# the 4.1 kernel does not provide a dtb for beaglebone green, so we
-# use a different genimage config if am335x-bonegreen.dtb is not
-# built:
-if [ -e ${BINARIES_DIR}/am335x-bonegreen.dtb ] ; then
-	GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-else
-	GENIMAGE_CFG="${BOARD_DIR}/genimage_linux41.cfg"
-fi
-
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-    --rootpath "${TARGET_DIR}" \
-    --tmppath "${GENIMAGE_TMP}" \
-    --inputpath "${BINARIES_DIR}" \
-    --outputpath "${BINARIES_DIR}" \
-    --config "${GENIMAGE_CFG}"

board/beaglebone/readme.txt

@@ -1,52 +1,62 @@
-CircuitCo BeagleBone
-Texas Instuments AM335x Evaluation Module (TMDXEVM3358)
+BeagleBone
 
-Description
-===========
-
-This configuration will build a complete image for the beaglebone and
-the TI AM335x-EVM, the board type is identified by the on-board
-EEPROM. The configuration is based on the
-ti-processor-sdk-02.00.00.00. Device tree blobs for beaglebone
-variants and the evm-sk are built too.
-
-For Qt5 support support use the beaglebone_qt5_defconfig.
+Intro
+=====
+To be able to use BeagleBone board with the images generated by
+Buildroot, you have to prepare the SDCard.
 
 How to build it
 ===============
 
-Select the default configuration for the target:
-$ make beaglebone_defconfig
+  $ make beaglebone_defconfig
 
-Optional: modify the configuration:
-$ make menuconfig
+Then you can edit the build options using
 
-Build:
-$ make
+  $ make menuconfig
+
+Compile all and build rootfs image:
+
+  $ make
 
 Result of the build
+-------------------
+
+After building, you should get a tree like this:
+
+  output/images/
+  ├── am335x-boneblack.dtb
+  ├── am335x-bone.dtb
+  ├── MLO
+  ├── rootfs.ext2
+  ├── u-boot.img
+  ├── uEnv.txt
+  └── zImage
+
+
+Prepare your SDCard
 ===================
-output/images/
-├── am335x-boneblack.dtb
-├── am335x-bone.dtb
-├── am335x-evm.dtb
-├── am335x-evmsk.dtb
-├── boot.vfat
-├── MLO
-├── rootfs.ext2
-├── rootfs.tar
-├── sdcard.img
-├── u-boot.img
-├── uEnv.txt
-└── zImage
 
-To copy the image file to the sdcard use dd:
-$ dd if=output/images/sdcard.img of=/dev/XXX
+You need to prepare first partition in fat32 and marked as bootable,
+and second where you will write rootfs.
 
-Tested hardware
-===============
-am335x-evm (rev. 1.1A)
-beagleboneblack (rev. A5A)
-beaglebone (rev. A6)
+Copy the files to boot partition
 
-2016, Lothar Felten <lothar.felten@gmail.com>
+  $ cp MLO u-boot.img zImage uEnv.txt *.dtb /media/zzzzz
+
+where /media/zzzzz is the mount point.
+Then you need to write the rootfs image onto SDCard:
+
+  # dd if=rootfs.ext2 of=/dev/xxxxx
+
+where /dev/xxxxx is the second partition. Use:
+
+  # fdisk -l
+
+to check for correct one.
+
+Finish
+======
+
+Unmount all mounted SDCard partitions and insert the card to BeagleBone.
+Hold the "BOOT" button and apply power. Then release the "BOOT" button.
+The output is available on the serial console.

board/beaglebone/uEnv.txt

@@ -1,4 +1,3 @@
 bootpart=0:1
 bootdir=
-bootargs=console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
-uenvcmd=run loadimage;run loadfdt;printenv bootargs;bootz ${loadaddr} - ${fdtaddr};
+uenvcmd=run loadimage;run loadramdisk;run findfdt;run loadfdt;run ramboot

board/boundarydevices/common/6x_bootscript.txt

@@ -1,131 +0,0 @@
-setenv bootargs ''
-
-if itest.s x6SX == "x${cpu}" || itest.s x7D == "x${cpu}"; then
-	a_script=0x80800000
-	a_zImage=0x80800000
-	a_fdt=0x83000000
-	m4=''
-	if itest.s "x1" == "x$m4enabled" ; then
-		run m4boot;
-		m4='-m4';
-	fi
-else
-	a_script=0x10800000
-	a_zImage=0x10800000
-	a_fdt=0x13000000
-fi
-
-setenv initrd_high 0xffffffff
-if itest.s "x" == "x${dtbname}" ; then
-	if itest.s x6SOLO == "x${cpu}" ; then
-		dtbname=imx6dl-${board}.dtb;
-	elif itest.s x6DL == "x${cpu}" ; then
-		dtbname=imx6dl-${board}.dtb;
-	elif itest.s x6QP == "x${cpu}" ; then
-		dtbname=imx6qp-${board}.dtb;
-	elif itest.s x6SX == "x${cpu}" ; then
-		dtbname=imx6sx-${board}${m4}.dtb;
-	elif itest.s x7D == "x${cpu}" ; then
-		dtbname=imx7d-${board}${m4}.dtb;
-	else
-		dtbname=imx6q-${board}.dtb;
-	fi
-fi
-
-if load ${dtype} ${disk}:1 ${a_script} uEnv.txt ; then
-    env import -t ${a_script} ${filesize}
-fi
-
-if itest.s x == x${bootdir} ; then
-	bootdir=/boot/
-fi
-
-if itest.s x${bootpart} == x ; then
-	bootpart=1
-fi
-
-if load ${dtype} ${disk}:${bootpart} ${a_fdt} ${bootdir}${dtbname} ; then
-	fdt addr ${a_fdt}
-	setenv fdt_high 0xffffffff
-else
-	echo "!!!! Error loading ${bootdir}${dtbname}";
-	exit;
-fi
-
-cmd_xxx_present=
-fdt resize
-if itest.s "x" != "x${cmd_custom}" ; then
-	run cmd_custom
-	cmd_xxx_present=1;
-fi
-
-if itest.s "x" != "x${cmd_hdmi}" ; then
-	run cmd_hdmi
-	cmd_xxx_present=1;
-	if itest.s x == x${allow_noncea} ; then
-		setenv bootargs ${bootargs} mxc_hdmi.only_cea=1;
-		echo "only CEA modes allowed on HDMI port";
-	else
-		setenv bootargs ${bootargs} mxc_hdmi.only_cea=0;
-		echo "non-CEA modes allowed on HDMI, audio may be affected";
-	fi
-fi
-
-if itest.s "x" != "x${cmd_lcd}" ; then
-	run cmd_lcd
-	cmd_xxx_present=1;
-fi
-if itest.s "x" != "x${cmd_lvds}" ; then
-	run cmd_lvds
-	cmd_xxx_present=1;
-fi
-if itest.s "x" != "x${cmd_lvds2}" ; then
-	run cmd_lvds2
-	cmd_xxx_present=1;
-fi
-
-if itest.s "x" == "x${cmd_xxx_present}" ; then
-	echo "!!!!!!!!!!!!!!!!"
-	echo "warning: your u-boot may be outdated, please upgrade"
-	echo "!!!!!!!!!!!!!!!!"
-fi
-
-setenv bootargs "${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc"
-
-if test "sata" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
-elif test "usb" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
-else
-	setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bootpart}"
-fi
-
-if itest.s "x" != "x${disable_giga}" ; then
-	setenv bootargs ${bootargs} fec.disable_giga=1
-fi
-
-if itest.s "x" != "x${wlmac}" ; then
-	setenv bootargs ${bootargs} wlcore.mac=${wlmac}
-	setenv bootargs ${bootargs} wlan.mac=${wlmac}
-fi
-
-if itest.s "x" != "x${gpumem}" ; then
-	setenv bootargs ${bootargs} galcore.contiguousSize=${gpumem}
-fi
-
-if itest.s "x" != "x${cma}" ; then
-	setenv bootargs ${bootargs} cma=${cma}
-fi
-
-if itest.s "x" != "x${show_fdt}" ; then
-	fdt print /
-fi
-
-if itest.s "x" != "x${show_env}" ; then
-	printenv
-fi
-
-if load ${dtype} ${disk}:${bootpart} ${a_zImage} ${bootdir}/zImage ; then
-	bootz ${a_zImage} - ${a_fdt}
-fi
-echo "Error loading kernel image"

board/boundarydevices/common/6x_upgrade.txt

@@ -1,69 +0,0 @@
-if itest.s a$uboot_defconfig == a; then
-        echo "Please set uboot_defconfig to the appropriate value"
-        exit
-fi
-
-offset=0x400
-a_uImage1=0x12000000
-a_uImage2=0x12400000
-
-if itest.s x6SX == "x${cpu}" || itest.s x7D == "x${cpu}"; then
-	a_uImage1=0x82000000
-	a_uImage2=0x82400000
-fi
-
-setenv stdout serial,vga
-echo "check U-Boot" ;
-
-if load ${dtype} ${disk}:1 ${a_uImage1} u-boot.$uboot_defconfig ; then
-else
-	echo "No U-Boot image found on SD card" ;
-	exit
-fi
-echo "read $filesize bytes from SD card" ;
-if sf probe || sf probe || sf probe 1 27000000 || sf probe 1 27000000 ; then
-	echo "probed SPI ROM" ;
-else
-	echo "Error initializing EEPROM" ;
-	exit
-fi ;
-if sf read ${a_uImage2} $offset $filesize ; then
-else
-	echo "Error reading boot loader from EEPROM" ;
-	exit
-fi
-if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
-	echo "------- U-Boot versions match" ;
-	exit
-fi
-echo "Need U-Boot upgrade" ;
-echo "Program in 5 seconds" ;
-for n in 5 4 3 2 1 ; do
-	echo $n ;
-	sleep 1 ;
-done
-echo "erasing" ;
-sf erase 0 0xC0000 ;
-
-# two steps to prevent bricking
-echo "programming" ;
-setexpr a1 ${a_uImage1} + 0x400
-setexpr o1 ${offset} + 0x400
-setexpr s1 ${filesize} - 0x400
-sf write ${a1} ${o1} ${s1} ;
-sf write ${a_uImage1} $offset 0x400 ;
-
-echo "verifying" ;
-if sf read ${a_uImage2} $offset $filesize ; then
-else
-	echo "Error re-reading EEPROM" ;
-	exit
-fi
-if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
-else
-	echo "Read verification error" ;
-	exit
-fi
-while echo "---- U-Boot upgraded. reset" ; do
-	sleep 120
-done

board/boundarydevices/common/genimage.cfg

@@ -1,18 +0,0 @@
-# Minimal SD card image for Boundary Devices platforms
-#
-# It does not need a boot section for a bootloader since it is booted
-# from its NOR flash memory.
-#
-# To update the bootloader, execute the following from U-Boot prompt:
-# => run upgradeu
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/boundarydevices/common/post-build.sh

@@ -1,20 +0,0 @@
-#!/bin/sh
-# post-build fixups
-# for further details, see
-#
-#  http://boundarydevices.com/u-boot-on-i-mx6/
-#
-
-BOARD_DIR="$(dirname $0)"
-
-# bd u-boot looks for bootscript here
-$HOST_DIR/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
--n "boot script" -d $BOARD_DIR/6x_bootscript.txt $TARGET_DIR/6x_bootscript
-
-# u-boot / update script for bd upgradeu command
-if [ -e $BINARIES_DIR/u-boot.imx ];
-then
-    install -D -m 0644 $BINARIES_DIR/u-boot.imx $TARGET_DIR/u-boot.imx
-    $HOST_DIR/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
-    -n "upgrade script" -d $BOARD_DIR/6x_upgrade.txt $TARGET_DIR/6x_upgrade
-fi

board/boundarydevices/common/post-image.sh

@@ -1,16 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                           \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"
-
-exit $?

board/boundarydevices/common/readme.txt

@@ -1,30 +0,0 @@
-Buildroot for Boundary Devices platforms:
-
-https://boundarydevices.com/product-category/popular-sbc-and-som-modules/
-
-Here is the list of targeted platforms per defconfig:
-
-- nitrogen6x_defconfig
-  - BD-SL-i.MX6 (SABRE-Lite)
-  - Nitrogen6X
-  - Nitrogen6_Lite
-  - Nitrogen6_MAX
-  - Nitrogen6_VM
-  - Nitrogen6_SOM
-  - Nitrogen6_SOMv2
-
-- nitrogen6sx_defconfig
-  - Nitrogen6_SoloX
-
-- nitrogen7_defconfig
-  - Nitrogen7
-
-To install, simply copy the image to a uSD card:
-
-$ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Where 'sdX' is the device node of the uSD partition.
-
-To upgrade u-boot, cancel autoboot and type:
-
-> run upgradeu

board/boundarydevices/nitrogen6x/6x_bootscript.txt

@@ -0,0 +1,186 @@
+setenv bootargs ''
+
+if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then
+    env import -t 10800000 $filesize
+fi
+
+if itest.s "x" == "x$dtbname" ; then
+	dtbname="imx6";
+	if itest.s x6SOLO == "x$cpu" ; then
+		dtbname=${dtbname}dl-;
+	elif itest.s x6DL == "x$cpu" ; then
+		dtbname=${dtbname}dl-;
+	else
+		dtbname=${dtbname}q-;
+	fi
+	if itest.s x == "x$board" ; then
+		board=sabrelite
+	fi
+	dtbname=${dtbname}${board}.dtb;
+fi
+
+if itest.s x == x${bootdir} ; then
+	bootdir=/boot/
+fi
+
+setenv fdt_addr 0x12000000
+if ${fs}load ${dtype} ${disk}:1 $fdt_addr ${bootdir}$dtbname ; then
+	fdt addr $fdt_addr
+	setenv fdt_high 0xffffffff
+else
+	echo "!!!! Error loading ${bootdir}$dtbname";
+	exit;
+fi
+
+# ------------------- HDMI detection
+i2c dev 1 ;
+if i2c probe 0x50 ; then
+	echo "------ have HDMI monitor";
+	if itest.s x == x$allow_noncea ; then
+		setenv bootargs $bootargs mxc_hdmi.only_cea=1;
+		echo "only CEA modes allowed on HDMI port";
+	else
+		setenv bootargs $bootargs mxc_hdmi.only_cea=0;
+		echo "non-CEA modes allowed on HDMI, audio may be affected";
+	fi
+else
+	fdt rm hdmi_display
+	echo "------ no HDMI monitor";
+fi
+
+# ------------------- LVDS detection
+if itest.s "x" != "x$lvds_1080p" ; then
+	echo "----- 1080P dual channel LVDS";
+	fdt rm okaya1024x600
+	fdt rm lg1280x800
+	fdt rm hannstar;
+	fdt set ldb split-mode 1
+	fdt set lvds_display interface_pix_fmt "RGB24"
+	fdt set ldb/lvds-channel@0 fsl,data-width <24>
+else
+	fdt rm ldb split-mode
+	fdt rm lvds1080p
+
+	# -------- LVDS0 (bottom on Nitrogen6_Max)
+	setenv have_lvds
+	i2c dev 2
+	if i2c probe 0x04 ; then
+		echo "------ have Freescale display";
+		setenv have_lvds 1
+	else
+		echo "------ no Freescale display";
+		fdt rm hannstar;
+	fi
+
+	if i2c probe 0x38 ; then
+		if itest.s "xLDB-WXGA" == "x$panel"; then
+			screenres=1280,800
+			fdt rm okaya1024x600
+		else
+			screenres=1024,600
+			fdt rm lg1280x800
+		fi
+		setenv have_lvds 1
+		setenv bootargs $bootargs ft5x06_ts.screenres=$screenres
+		if itest.s "x" -ne "x$calibration" ; then
+			setenv bootargs $bootargs ft5x06_ts.calibration=$calibration
+		fi
+	else
+		echo "------ no ft5x06 touch controller";
+		fdt rm okaya1024x600
+		fdt rm lg1280x800
+	fi
+
+	if itest.s "x" == "x$have_lvds"; then
+		fdt rm lvds_display;
+	fi
+
+	# -------- LVDS1 (top on Nitrogen6_Max)
+	if itest.s "xhannstar" == "x$lvds1_panel" ; then
+		echo "configure LVDS1 for Hannstar panel"
+		fdt rm okaya1024x600_2;
+		fdt rm lg1280x800_2;
+		fdt set lvds_display_2 status okay
+	elif itest.s "xokaya1024x600" == "x$lvds1_panel" ; then
+		echo "configure LVDS1 for 1024x600 panel"
+		fdt rm hannstar_2;
+		fdt rm lg1280x800_2;
+		fdt set lvds_display_2 status okay
+	elif itest.s "xlg1280x800" == "x$lvds1_panel" ; then
+		echo "configure LVDS1 for 1280x800 panel"
+		fdt rm hannstar_2;
+		fdt rm okaya1024x600_2;
+		fdt set lvds_display_2 status okay
+	else
+		fdt rm lvds_display_2 ; # ignore errors on boards != 6_max
+	fi
+fi
+
+# ------------------- LCD detection
+setenv have_lcd '';
+if i2c probe 0x48 ; then
+	setenv have_lcd 1;
+	echo "------- found TSC2004 touch controller";
+	if itest.s "x" -eq "x$tsc_calibration" ; then
+		setenv bootargs $bootargs tsc2004.calibration=-67247,-764,272499173,324,69283,-8653010,65536
+	else
+		setenv bootargs $bootargs tsc2004.calibration=$tsc_calibration
+	fi
+elif i2c probe 0x4d ; then
+	setenv have_lcd 1;
+	echo "------- found AR1020 touch controller";
+fi
+
+if itest.s "x" != "x$ignore_lcd" ; then
+	echo "------ ignoring LCD display";
+	setenv have_lcd '';
+fi
+
+if itest.s "x" != "x$have_lcd" ; then
+	echo "----- found LCD display";
+else
+	fdt rm lcd_display;
+fi
+
+setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait"
+
+if itest.s x$bootpart == x ; then
+	bootpart=1
+fi
+
+if test "sata" = "${dtype}" ; then
+	setenv bootargs "$bootargs root=/dev/sda$bootpart" ;
+else
+        if test "usb" = "${dtype}" ; then
+                setenv bootargs "$bootargs root=/dev/sda$bootpart" ;
+        elif itest 0 -eq ${disk}; then
+                setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ;
+        else
+                setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ;
+        fi
+fi
+
+if itest.s "x" != "x${disable_giga}" ; then
+	setenv bootargs $bootargs fec.disable_giga=1
+fi
+
+if itest.s "x" != "x$wlmac" ; then
+	setenv bootargs $bootargs wlcore.mac=$wlmac
+fi
+
+if itest.s "x" != "x$gpumem" ; then
+	setenv bootargs $bootargs galcore.contiguousSize=$gpumem
+fi
+
+if itest.s "x" != "x$show_fdt" ; then
+	fdt print /
+fi
+
+if itest.s "x" != "x$show_env" ; then
+	printenv
+fi
+
+if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then
+	bootm 10800000 - $fdt_addr
+fi
+echo "Error loading kernel image"

board/boundarydevices/nitrogen6x/6x_upgrade.txt

@@ -0,0 +1,49 @@
+if itest.s a$bootfile == a; then
+        bootfile=u-boot.imx
+fi
+
+setenv stdout serial,vga
+echo "check U-Boot" ;
+setenv offset 0x400
+if ${fs}load ${dtype} ${disk}:1 12000000 $bootfile || ${fs}load ${dtype} ${disk}:1 12000000 u-boot.nopadding ; then
+      echo "read $filesize bytes from SD card" ;
+      if sf probe || sf probe || \
+	 sf probe 1 27000000 || sf probe 1 27000000 ; then
+	   echo "probed SPI ROM" ;
+	   if sf read 0x12400000 $offset $filesize ; then
+	       if cmp.b 0x12000000 0x12400000 $filesize ; then
+		   echo "------- U-Boot versions match" ;
+	       else
+		   echo "Need U-Boot upgrade" ;
+		   echo "Program in 5 seconds" ;
+		   for n in 5 4 3 2 1 ; do
+			echo $n ;
+			sleep 1 ;
+		   done
+		   echo "erasing" ;
+		   sf erase 0 0xC0000 ;
+		   # two steps to prevent bricking
+		   echo "programming" ;
+		   sf write 0x12000000 $offset $filesize ;
+		   echo "verifying" ;
+		   if sf read 0x12400000 $offset $filesize ; then
+		       if cmp.b 0x12000000 0x12400000 $filesize ; then
+			   while echo "---- U-Boot upgraded. reset" ; do
+				sleep 120
+			   done
+		       else
+			   echo "Read verification error" ;
+		       fi
+		   else
+			echo "Error re-reading EEPROM" ;
+		   fi
+	       fi
+	   else
+	       echo "Error reading boot loader from EEPROM" ;
+	   fi
+      else
+	   echo "Error initializing EEPROM" ;
+      fi ;
+else
+     echo "No U-Boot image found on SD card" ;
+fi

board/boundarydevices/nitrogen6x/post-build.sh

@@ -0,0 +1,20 @@
+#!/bin/sh
+# post-build fixups
+# for further details, see
+#
+#  http://boundarydevices.com/u-boot-on-i-mx6/
+#
+
+BOARD_DIR="$(dirname $0)"
+
+# bd u-boot looks for bootscript here
+$HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
+-n "boot script" -d $BOARD_DIR/6x_bootscript.txt $TARGET_DIR/6x_bootscript
+
+# u-boot / update script for bd upgradeu command
+if [ -e $BINARIES_DIR/u-boot.imx ];
+then
+    install -D -m 0644 $BINARIES_DIR/u-boot.imx $TARGET_DIR/u-boot.imx
+    $HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
+    -n "upgrade script" -d $BOARD_DIR/6x_upgrade.txt $TARGET_DIR/6x_upgrade
+fi

board/boundarydevices/nitrogen6x/readme.txt

@@ -0,0 +1,13 @@
+Buildroot for Boundary Devices Nitrogen6X:
+
+http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/
+
+To install, simply write rootfs.ext2 to the first partition of a uSD card:
+
+sudo dd if=output/images/rootfs.ext2 of=/dev/sdX1
+
+Where 'sdX1' is the device node of the uSD partition.
+
+To upgrade u-boot, cancel autoboot and type:
+
+run upgradeu

board/calao/qil-a9260/at91bootstrap-1.16-qil-a9260.patch

@@ -0,0 +1,603 @@
+From a3e08beea8bf5e96e1237eef4a82f4a2fdd5286b Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Thu, 19 Jul 2012 14:19:59 +0200
+Subject: [PATCH] Add support for the Calao-systems QIL-A9260
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/qil_a9260/nandflash/Makefile    |  122 ++++++++++++++
+ board/qil_a9260/nandflash/qil-a9260.h |  109 ++++++++++++
+ board/qil_a9260/qil_a9260.c           |  298 +++++++++++++++++++++++++++++++++
+ crt0_gnu.S                            |    7 +
+ include/part.h                        |    6 +-
+ 5 files changed, 541 insertions(+), 1 deletions(-)
+ create mode 100644 board/qil_a9260/nandflash/Makefile
+ create mode 100644 board/qil_a9260/nandflash/qil-a9260.h
+ create mode 100644 board/qil_a9260/qil_a9260.c
+
+diff --git a/board/qil_a9260/nandflash/Makefile b/board/qil_a9260/nandflash/Makefile
+new file mode 100644
+index 0000000..209a25f
+--- /dev/null
++++ b/board/qil_a9260/nandflash/Makefile
+@@ -0,0 +1,122 @@
++# TODO: set this appropriately for your local toolchain
++ifndef ERASE_FCT
++ERASE_FCT=rm -f
++endif
++ifndef CROSS_COMPILE
++CROSS_COMPILE=arm-elf-
++endif
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for QIL-A9260
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9260
++# Board name (case sensitive!!!)
++BOARD=qil_a9260
++# Link Address and Top_of_Memory
++LINK_ADDR=0x200000
++TOP_OF_MEMORY=0x301000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++
++
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	$(ERASE_FCT) *.o *.bin *.elf *.map
+diff --git a/board/qil_a9260/nandflash/qil-a9260.h b/board/qil_a9260/nandflash/qil-a9260.h
+new file mode 100644
+index 0000000..c87002e
+--- /dev/null
++++ b/board/qil_a9260/nandflash/qil-a9260.h
+@@ -0,0 +1,109 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : qil-a9260.h
++ * Object              :
++ * Creation            : GH July 19th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _QIL_A9260_H
++#define _QIL_A9260_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(180000000/2)
++#define PLL_LOCK_TIMEOUT	1000000
++
++#define PLLA_SETTINGS	0x20593F06
++#define PLLB_SETTINGS	0x10483F0E
++
++/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
++#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
++#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
++#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
++
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
++
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
++/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(1 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(1 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(3 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
++#define AT91C_SM_NRD_PULSE	(3 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(5 << 0)
++#define AT91C_SM_NRD_CYCLE	(5 << 16)
++#define AT91C_SM_TDF	        (2 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
++#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
++
++#define MACH_TYPE       	0x6AF		/* QIL-A9260 */
++#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++
++#define CFG_HW_INIT
++#define CFG_SDRAM
++
++#endif	/* _QIL_A9260_H */
+diff --git a/board/qil_a9260/qil_a9260.c b/board/qil_a9260/qil_a9260.c
+new file mode 100644
+index 0000000..ae122e7
+--- /dev/null
++++ b/board/qil_a9260/qil_a9260.c
+@@ -0,0 +1,298 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaiimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : qil_a9260.c
++ * Object              :
++ * Creation            : GH July 19th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++#ifdef CFG_DATAFLASH
++#include "../../include/dataflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++#ifdef CFG_HW_INIT
++/*----------------------------------------------------------------------------*/
++/* \fn    hw_init							      */
++/* \brief This function performs very low level HW initialization	      */
++/* This function is invoked as soon as possible during the c_startup	      */
++/* The bss segment must be initialized					      */
++/*----------------------------------------------------------------------------*/
++void hw_init(void)
++{
++	unsigned int cp15;
++	
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA = 2 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure CP15 */
++	cp15 = get_cp15();
++	cp15 |= I_CACHE;
++	set_cp15(cp15);
++
++	/* Configure the PIO controller */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI Slave Slot Cycle to 64 */
++	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_2 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_2 |
++				AT91C_SDRAMC_TRC_7 |
++				AT91C_SDRAMC_TRP_2 |
++				AT91C_SDRAMC_TRCD_2 |
++				AT91C_SDRAMC_TRAS_5 |
++				AT91C_SDRAMC_TXSR_8,		/* Control Register */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
++
++
++#endif /* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++#ifdef CFG_SDRAM
++/*------------------------------------------------------------------------------*/
++/* \fn    sdramc_hw_init							*/
++/* \brief This function performs SDRAMC HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++/*	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++*/
++	/* Configure the SDRAMC PIO controller to output PCK0 */
++/*	pio_setup(sdramc_pio); */
++
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
++
++}
++#endif /* CFG_SDRAM */
++
++#ifdef CFG_DATAFLASH
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_recovery								*/
++/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++void df_recovery(AT91PS_DF pDf)
++{
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase DataFlash Page 0*/
++	if ( !pio_get_value(AT91C_PIN_PB(10)) )
++		df_page_erase(pDf, 0);
++#endif
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_hw_init								*/
++/* \brief This function performs DataFlash HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void df_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc df_pio[] = {
++		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	pio_setup(df_pio);
++}
++#endif /* CFG_DATAFLASH */
++
++
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery						*/
++/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PB(10)) )
++		AT91F_NandEraseBlock0();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(nand_pio);
++	
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++
++#endif /* #ifdef CFG_NANDFLASH */
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..002feef 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,13 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
++
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/include/part.h b/include/part.h
+index ba5985a..bbd33fe 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -35,7 +35,11 @@
+ 
+ #ifdef AT91SAM9260
+ #include "AT91SAM9260_inc.h"
+-#include "at91sam9260ek.h"
++	#ifdef at91sam9260ek
++	#include "at91sam9260ek.h"
++	#elif qil_a9260
++	#include "qil-a9260.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91SAM9XE
+-- 
+1.5.6.3
+

board/calao/qil-a9260/barebox-2012.07.0-qil-a9260.patch

@@ -0,0 +1,36 @@
+From d076aa6182dc6df6bb311e60bbddb03573b9483b Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Fri, 3 Aug 2012 11:25:49 +0200
+Subject: [PATCH] Enable pull-up on Rx serial ports for the CALAO MB-QIL-A9260
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ arch/arm/boards/qil-a9260/init.c |    6 ++++++
+ 1 files changed, 6 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/boards/qil-a9260/init.c b/arch/arm/boards/qil-a9260/init.c
+index 305d733..b43cace 100644
+--- a/arch/arm/boards/qil-a9260/init.c
++++ b/arch/arm/boards/qil-a9260/init.c
+@@ -196,11 +196,17 @@ device_initcall(qil_a9260_devices_init);
+ static int qil_a9260_console_init(void)
+ {
+ 	at91_register_uart(0, 0);
++	at91_set_A_periph(AT91_PIN_PB14, 1);    /* Enable pull-up on DRXD */
++
+ 	at91_register_uart(1, ATMEL_UART_CTS | ATMEL_UART_RTS
+ 			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+ 			   | ATMEL_UART_RI);
++
+ 	at91_register_uart(2, ATMEL_UART_CTS | ATMEL_UART_RTS);
++	at91_set_A_periph(AT91_PIN_PB7, 1);	/* Enable pull-up on RXD1 */
++
+ 	at91_register_uart(3, ATMEL_UART_CTS | ATMEL_UART_RTS);
++	at91_set_A_periph(AT91_PIN_PB9, 1);	/* Enable pull-up on RXD2 */
+ 
+ 	return 0;
+ }
+-- 
+1.5.6.3
+

board/calao/qil-a9260/linux-3.4.7.config

@@ -0,0 +1,111 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_AT91_SLOW_CLOCK=y
+CONFIG_AT91_EARLY_USART0=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS1,115200"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_MMC=y
+CONFIG_MMC_AT91=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M41T94=y
+CONFIG_EXT2_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y

board/calao/qil-a9260/linux-3.4.7.patch

@@ -0,0 +1,27 @@
+From fe6432a9728b62bce3db73c5a4efe026018fd495 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Fri, 3 Aug 2012 16:45:37 +0200
+Subject: [PATCH] QIL-A9260: rtc modalias m41t48 renamed to rtc-m41t48
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ arch/arm/mach-at91/board-qil-a9260.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
+index bf351e2..c0df05c 100644
+--- a/arch/arm/mach-at91/board-qil-a9260.c
++++ b/arch/arm/mach-at91/board-qil-a9260.c
+@@ -78,7 +78,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
+ static struct spi_board_info ek_spi_devices[] = {
+ #if defined(CONFIG_RTC_DRV_M41T94)
+ 	{	/* M41T94 RTC */
+-		.modalias	= "m41t94",
++		.modalias	= "rtc-m41t94",
+ 		.chip_select	= 0,
+ 		.max_speed_hz	= 1 * 1000 * 1000,
+ 		.bus_num	= 0,
+-- 
+1.5.6.3
+

board/calao/snowball/linux-3.4.patch

@@ -0,0 +1,45 @@
+From 3d1a9b44b9dcd2c0f5d54c09596c96c0524d8340 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Tue, 13 Nov 2012 11:47:41 +0100
+Subject: [PATCH] trace-debug[stm]: Fix for BT/WLAN instability
+
+Pins under mop500_ske_pins array are used for different
+functionalities in snowball. Ex: GPIO161 pin configured
+for keypad here must stay configured as GPIO alternate
+function for operating PMU_EN pin of BT/WLAN chip in snowball.
+So forbid configuring these pins, for snowball
+
+Signed-off-by: Rajanikanth H.V <rajanikanth.hv@stericsson.com>
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ arch/arm/mach-ux500/board-mop500-stm.c |    7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-ux500/board-mop500-stm.c b/arch/arm/mach-ux500/board-mop500-stm.c
+index 1bef2a0..532fb9e 100644
+--- a/arch/arm/mach-ux500/board-mop500-stm.c
++++ b/arch/arm/mach-ux500/board-mop500-stm.c
+@@ -121,7 +121,9 @@ static int stm_ste_disable_ape_on_mipi60(void)
+ 	if (retval)
+ 		STM_ERR("Failed to disable MIPI60\n");
+ 	else {
+-		retval = nmk_config_pins(ARRAY_AND_SIZE(mop500_ske_pins));
++		if (!machine_is_snowball())
++			retval = nmk_config_pins(
++				ARRAY_AND_SIZE(mop500_ske_pins));
+ 		if (retval)
+ 			STM_ERR("Failed to enable SKE gpio\n");
+ 	}
+@@ -314,7 +316,8 @@ static int stm_ste_connection(enum stm_connection_type con_type)
+ 		/* Enable altC3 on GPIO70-74 (STMMOD) and GPIO75-76 (UARTMOD) */
+ 		prcmu_enable_stm_mod_uart();
+ 		/* Enable APE on MIPI60 */
+-		retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
++		if (!machine_is_snowball())
++			retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
+ 		if (retval)
+ 			STM_ERR("Failed to disable SKE GPIO\n");
+ 		else {
+-- 
+1.7.9.5
+

board/calao/tny-a9g20-lpw/at91bootstrap-1.16-tny-a9g20-lpw.patch

@@ -0,0 +1,551 @@
+From 53bd82b122f4530a98cba45795832820bb1d0b45 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Mon, 13 Aug 2012 11:26:10 +0200
+Subject: [PATCH] Add support for the Calao-systems TNY-A9G20-LPW
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/tny_a9g20_lpw/nandflash/Makefile        |  121 ++++++++++++
+ board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h |  114 ++++++++++++
+ board/tny_a9g20_lpw/tny_a9g20_lpw.c           |  243 +++++++++++++++++++++++++
+ crt0_gnu.S                                    |    6 +
+ include/part.h                                |    6 +-
+ 5 files changed, 489 insertions(+), 1 deletion(-)
+ create mode 100644 board/tny_a9g20_lpw/nandflash/Makefile
+ create mode 100644 board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
+ create mode 100644 board/tny_a9g20_lpw/tny_a9g20_lpw.c
+
+diff --git a/board/tny_a9g20_lpw/nandflash/Makefile b/board/tny_a9g20_lpw/nandflash/Makefile
+new file mode 100644
+index 0000000..7efbea7
+--- /dev/null
++++ b/board/tny_a9g20_lpw/nandflash/Makefile
+@@ -0,0 +1,121 @@
++# TODO: set this appropriately for your local toolchain
++ifndef ERASE_FCT
++ERASE_FCT=rm -f
++endif
++ifndef CROSS_COMPILE
++CROSS_COMPILE=arm-elf-
++endif
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for AT91SAM9260EK
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9G20
++# Board name (case sensitive!!!)
++BOARD=tny_a9g20_lpw
++# Link Address and Top_of_Memory
++LINK_ADDR=0x200000
++TOP_OF_MEMORY=0x301000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++
++
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	$(ERASE_FCT) *.o *.bin *.elf *.map
+diff --git a/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
+new file mode 100644
+index 0000000..b1f8a1d
+--- /dev/null
++++ b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
+@@ -0,0 +1,114 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2008, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : tny-a9g20-lpw.h
++ * Object              :
++ * Creation            : GH August 13th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _TNY_A9G20_LPW_H
++#define _TNY_A9G20_LPW_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(100000000)
++#define PLL_LOCK_TIMEOUT	1000000
++
++/* set PLLA to 800Mhz from MAINCK= 12Mhz MULA=199 (0xC7+1= 200), DIVA=0x03 (Fplla=12Mhz x [(199+1)/3]=800Mhz) */
++#define PLLA_SETTINGS   0x20C73F03
++#define PLLB_SETTINGS   0x100F3F02
++
++/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
++/* LP-SDRAM (fmax=100Mhz) PDIV=0 => PRESCALER CLK=PCLK; */
++/* MDIV = 2 => PRESCALER CLK / 4 = MCLK=100Mhz */
++/* PRESCALER CLK = PLLA (800Mhz) / 2 (PRES=1) = 400Mhz */
++#define MCKR_SETTINGS           0x0204 
++#define MCKR_CSS_SETTINGS       (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
++#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
++
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
++
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 100000000.*/
++/* Please refer to SMC section in AT91SAM9 datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(1 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(1 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(3 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
++#define AT91C_SM_NRD_PULSE	(3 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(5 << 0)
++#define AT91C_SM_NRD_CYCLE	(5 << 16)
++
++#define AT91C_SM_TDF	        (2 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 		0x20000			/* Image Address in NandFlash */
++#define	IMG_SIZE		0x40000			/* Image Size in NandFlash */
++
++#define MACH_TYPE		0x80B			/* TNY-A9G20 */
++#define JUMP_ADDR		0x23F00000		/* Final Jump Address */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++
++#define	CFG_SDRAM
++#define	CFG_HW_INIT
++
++#endif	/* _TNY_A9G20_LPW_H */
+diff --git a/board/tny_a9g20_lpw/tny_a9g20_lpw.c b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
+new file mode 100644
+index 0000000..cef9055
+--- /dev/null
++++ b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
+@@ -0,0 +1,243 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2008, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : tny_a9g20_lpw.c
++ * Object              :
++ * Creation            : GH August 13th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++#ifdef CFG_HW_INIT
++/*----------------------------------------------------------------------------*/
++/* \fn    hw_init							      */
++/* \brief This function performs very low level HW initialization	      */
++/* This function is invoked as soon as possible during the c_startup	      */
++/* The bss segment must be initialized					      */
++/*----------------------------------------------------------------------------*/
++void hw_init(void)
++{
++	unsigned int cp15;
++	
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++	writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA/2 = 3 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure CP15 */
++	cp15 = get_cp15();
++	cp15 |= I_CACHE;
++	set_cp15(cp15);
++
++	/* Configure the PIO controller */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI Slave Slot Cycle to 64 */
++	writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix (slow slew rate enabled and LPSDRAM memory voltage = 1.8V) */
++	writel(((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<17)) & ~0x00010000, AT91C_BASE_CCFG + CCFG_EBICSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_3 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_2 |
++				AT91C_SDRAMC_TRC_7 |
++				AT91C_SDRAMC_TRP_2 |
++				AT91C_SDRAMC_TRCD_2 |
++				AT91C_SDRAMC_TRAS_5 |
++				AT91C_SDRAMC_TXSR_8,		/* Control Register */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++                                AT91C_SDRAMC_MD_LOW_POWER_SDRAM); /* SDRAM (low power)   */
++
++#endif /* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++#ifdef CFG_SDRAM
++/*------------------------------------------------------------------------------*/
++/* \fn    sdramc_hw_init							*/
++/* \brief This function performs SDRAMC HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++/*	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++*/
++	/* Configure the SDRAMC PIO controller to output PCK0 */
++/*	pio_setup(sdramc_pio); */
++
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
++
++}
++#endif /* CFG_SDRAM */
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery						*/
++/* \brief This function erases NandFlash Block 0 if BP4 is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc bp4_pio[] = {
++		{"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(bp4_pio);
++	
++	/* If BP4 is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PA(31)) )
++		AT91F_NandEraseBlock0();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(nand_pio);
++	
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++#endif /* #ifdef CFG_NANDFLASH */
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..c6cd49d 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,12 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/include/part.h b/include/part.h
+index ba5985a..ab79af1 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -46,7 +46,11 @@
+ 
+ #ifdef AT91SAM9G20
+ #include "AT91SAM9260_inc.h"
+-#include "at91sam9g20ek.h"
++	#ifdef at91sam9g20ek
++	#include "at91sam9g20ek.h"
++	#elif tny_a9g20_lpw
++	#include "tny-a9g20-lpw.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91SAM9261
+-- 
+1.7.9.5
+

board/calao/tny-a9g20-lpw/linux-3.9.config

@@ -0,0 +1,187 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_SOC_AT91SAM9260=y
+CONFIG_SOC_AT91SAM9263=y
+CONFIG_SOC_AT91SAM9G45=y
+CONFIG_SOC_AT91SAM9X5=y
+CONFIG_SOC_AT91SAM9N12=y
+CONFIG_MACH_AT91SAM_DT=y
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_TIMER_HZ=128
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_UACCESS_WITH_MEMCPY=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_KEXEC=y
+CONFIG_AUTO_ZRELADDR=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+CONFIG_IPV6_SIT_6RD=y
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_GLUEBI=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_ATMEL_PWM=y
+CONFIG_ATMEL_TCLIB=y
+CONFIG_EEPROM_93CX6=m
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_DAVICOM_PHY=y
+CONFIG_MICREL_PHY=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=4
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_AT91SAM9X_WATCHDOG=y
+CONFIG_SSB=m
+CONFIG_FB=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_ATMEL=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_ACORN_8x8=y
+CONFIG_FONT_MINI_4x6=y
+CONFIG_LOGO=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_AT91=m
+CONFIG_USB_ETH=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_ACM_MS=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_MMC=y
+CONFIG_MMC_ATMELMCI=y
+CONFIG_MMC_SPI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91RM9200=y
+CONFIG_RTC_DRV_AT91SAM9=y
+CONFIG_DMADEVICES=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_STRIP_ASM_SYMS=y
+CONFIG_DEBUG_FS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+# CONFIG_CRYPTO_HW is not set
+CONFIG_CRC_CCITT=m
+CONFIG_AVERAGE=y

board/calao/usb-a9260/at91bootstrap-1.16-usb-a9260.patch

@@ -0,0 +1,603 @@
+From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Tue, 2 Oct 2012 09:19:15 +0200
+Subject: [PATCH] Add support for the USB-A9260
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/usb_a9260/nandflash/Makefile    |  122 ++++++++++++++
+ board/usb_a9260/nandflash/usb-a9260.h |  109 ++++++++++++
+ board/usb_a9260/usb_a9260.c           |  298 +++++++++++++++++++++++++++++++++
+ crt0_gnu.S                            |    7 +
+ include/part.h                        |    6 +-
+ 5 files changed, 541 insertions(+), 1 deletion(-)
+ create mode 100644 board/usb_a9260/nandflash/Makefile
+ create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
+ create mode 100644 board/usb_a9260/usb_a9260.c
+
+diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
+new file mode 100644
+index 0000000..02f4b50
+--- /dev/null
++++ b/board/usb_a9260/nandflash/Makefile
+@@ -0,0 +1,122 @@
++# TODO: set this appropriately for your local toolchain
++ifndef ERASE_FCT
++ERASE_FCT=rm -f
++endif
++ifndef CROSS_COMPILE
++CROSS_COMPILE=arm-elf-
++endif
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for USB-A9260
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9260
++# Board name (case sensitive!!!)
++BOARD=usb_a9260
++# Link Address and Top_of_Memory
++LINK_ADDR=0x200000
++TOP_OF_MEMORY=0x301000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++
++
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	$(ERASE_FCT) *.o *.bin *.elf *.map
+diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
+new file mode 100644
+index 0000000..2aaf759
+--- /dev/null
++++ b/board/usb_a9260/nandflash/usb-a9260.h
+@@ -0,0 +1,109 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb-a9260.h
++ * Object              :
++ * Creation            : GH Oct 1th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _USB_A9260_H
++#define _USB_A9260_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(180000000/2)
++#define PLL_LOCK_TIMEOUT	1000000
++
++#define PLLA_SETTINGS	0x20593F06
++#define PLLB_SETTINGS	0x10483F0E
++
++/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
++#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
++#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
++#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
++
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
++
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
++/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(1 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(1 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(3 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
++#define AT91C_SM_NRD_PULSE	(3 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(5 << 0)
++#define AT91C_SM_NRD_CYCLE	(5 << 16)
++#define AT91C_SM_TDF	        (2 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
++#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
++
++#define MACH_TYPE       	0x6AD		/* USB-A9260 */
++#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++
++#define CFG_HW_INIT
++#define CFG_SDRAM
++
++#endif	/* _USB_A9260_H */
+diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
+new file mode 100644
+index 0000000..de30f0b
+--- /dev/null
++++ b/board/usb_a9260/usb_a9260.c
+@@ -0,0 +1,298 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaiimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb_a9260.c
++ * Object              :
++ * Creation            : GH Oct 1th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++#ifdef CFG_DATAFLASH
++#include "../../include/dataflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++#ifdef CFG_HW_INIT
++/*----------------------------------------------------------------------------*/
++/* \fn    hw_init							      */
++/* \brief This function performs very low level HW initialization	      */
++/* This function is invoked as soon as possible during the c_startup	      */
++/* The bss segment must be initialized					      */
++/*----------------------------------------------------------------------------*/
++void hw_init(void)
++{
++	unsigned int cp15;
++	
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA = 2 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure CP15 */
++	cp15 = get_cp15();
++	cp15 |= I_CACHE;
++	set_cp15(cp15);
++
++	/* Configure the PIO controller */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI Slave Slot Cycle to 64 */
++	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_2 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_2 |
++				AT91C_SDRAMC_TRC_7 |
++				AT91C_SDRAMC_TRP_2 |
++				AT91C_SDRAMC_TRCD_2 |
++				AT91C_SDRAMC_TRAS_5 |
++				AT91C_SDRAMC_TXSR_8,		/* Control Register */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
++
++
++#endif /* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++#ifdef CFG_SDRAM
++/*------------------------------------------------------------------------------*/
++/* \fn    sdramc_hw_init							*/
++/* \brief This function performs SDRAMC HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++/*	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++*/
++	/* Configure the SDRAMC PIO controller to output PCK0 */
++/*	pio_setup(sdramc_pio); */
++
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
++
++}
++#endif /* CFG_SDRAM */
++
++#ifdef CFG_DATAFLASH
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_recovery								*/
++/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++void df_recovery(AT91PS_DF pDf)
++{
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase DataFlash Page 0*/
++	if ( !pio_get_value(AT91C_PIN_PB(10)) )
++		df_page_erase(pDf, 0);
++#endif
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_hw_init								*/
++/* \brief This function performs DataFlash HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void df_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc df_pio[] = {
++		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	pio_setup(df_pio);
++}
++#endif /* CFG_DATAFLASH */
++
++
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery						*/
++/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PB(10)) )
++		AT91F_NandEraseBlock0();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(nand_pio);
++	
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++
++#endif /* #ifdef CFG_NANDFLASH */
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..002feef 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,13 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
++
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/include/part.h b/include/part.h
+index ba5985a..212789f 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -35,7 +35,11 @@
+ 
+ #ifdef AT91SAM9260
+ #include "AT91SAM9260_inc.h"
+-#include "at91sam9260ek.h"
++	#ifdef at91sam9260ek
++	#include "at91sam9260ek.h"
++	#elif usb_a9260
++	#include "usb-a9260.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91SAM9XE
+-- 
+1.7.9.5
+