Makefile: release: create tarball from current branch, not master

To support stable bugfix releases.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>

.defconfig

@@ -6,6 +6,7 @@ BR2_HAVE_DOT_CONFIG=y
 # BR2_alpha is not set
 # BR2_arm is not set
 # BR2_armeb is not set
+# BR2_avr32 is not set
 # BR2_cris is not set
 # BR2_ia64 is not set
 BR2_i386=y
@@ -15,9 +16,11 @@ BR2_i386=y
 # BR2_nios2 is not set
 # BR2_powerpc is not set
 # BR2_sh is not set
+# BR2_sh64 is not set
 # BR2_sparc is not set
 # BR2_sparc64 is not set
 # BR2_x86_64 is not set
+# BR2_x86_i386 is not set
 # BR2_x86_i486 is not set
 # BR2_x86_i586 is not set
 BR2_x86_i686=y

COPYING

@@ -1,19 +1,3 @@
-With the exceptions below, Buildroot is distributed under the terms of
-the GNU General Public License, reproduced below; either version 2 of
-the License, or (at your option) any later version.
-
-Some files in Buildroot contain a different license statement. Those
-files are licensed under the license contained in the file itself.
-
-Buildroot also bundles patch files, which are applied to the sources
-of the various packages. Those patches are not covered by the license
-of Buildroot. Instead, they are covered by the license of the software
-to which the patches are applied. When said software is available
-under multiple licenses, the Buildroot patches are only provided under
-the publicly accessible licenses.
-
------------------------------------------------------------------
-
 		    GNU GENERAL PUBLIC LICENSE
 		       Version 2, June 1991
 

Config.in

@@ -14,76 +14,12 @@ config BR2_HOSTARCH
 	string
 	option env="HOSTARCH"
 
-config BR2_BUILD_DIR
-	string
-	option env="BUILD_DIR"
-
-# Hidden config symbols for packages to check system gcc version
-config BR2_HOST_GCC_VERSION
-	string
-	option env="HOST_GCC_VERSION"
-
-config BR2_HOST_GCC_AT_LEAST_4_5
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 5"
-
-config BR2_HOST_GCC_AT_LEAST_4_6
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 6"
-	select BR2_HOST_GCC_AT_LEAST_4_5
-
-config BR2_HOST_GCC_AT_LEAST_4_7
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 7"
-	select BR2_HOST_GCC_AT_LEAST_4_6
-
-config BR2_HOST_GCC_AT_LEAST_4_8
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 8"
-	select BR2_HOST_GCC_AT_LEAST_4_7
-
-config BR2_HOST_GCC_AT_LEAST_4_9
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 9"
-	select BR2_HOST_GCC_AT_LEAST_4_8
-
-config BR2_HOST_GCC_AT_LEAST_5
-	bool
-	default y if BR2_HOST_GCC_VERSION = "5"
-	select BR2_HOST_GCC_AT_LEAST_4_9
-
-config BR2_HOST_GCC_AT_LEAST_6
-	bool
-	default y if BR2_HOST_GCC_VERSION = "6"
-	select BR2_HOST_GCC_AT_LEAST_5
-
-# Hidden boolean selected by packages in need of Java in order to build
-# (example: xbmc)
-config BR2_NEEDS_HOST_JAVA
-	bool
-
-# Hidden boolean selected by packages in need of javac in order to build
-# (example: classpath)
-config BR2_NEEDS_HOST_JAVAC
-	bool
-
-# Hidden boolean selected by packages in need of jar in order to build
-# (example: classpath)
-config BR2_NEEDS_HOST_JAR
-	bool
-
 # Hidden boolean selected by pre-built packages for x86, when they
 # need to run on x86-64 machines (example: pre-built external
 # toolchains, binary tools like SAM-BA, etc.).
 config BR2_HOSTARCH_NEEDS_IA32_LIBS
 	bool
 
-# Hidden boolean selected by packages that need to build 32 bits
-# binaries with the host compiler, even on 64 bits build machines (e.g
-# bootloaders).
-config BR2_HOSTARCH_NEEDS_IA32_COMPILER
-	bool
-
 source "arch/Config.in"
 
 menu "Build options"
@@ -106,10 +42,6 @@ config BR2_GIT
 	string "Git command"
 	default "git"
 
-config BR2_CVS
-	string "CVS command"
-	default "cvs"
-
 config BR2_LOCALFILES
 	string "Local files retrieval command"
 	default "cp"
@@ -130,9 +62,9 @@ config BR2_ZCAT
 	string "zcat command"
 	default "gzip -d -c"
 	help
-	  Command to be used to extract a gzip'ed file to stdout. zcat
-	  is identical to gunzip -c except that the former may not be
-	  available on your system.
+	  Command to be used to extract a gzip'ed file to stdout.
+	  zcat is identical to gunzip -c except that the former may
+	  not be available on your system.
 	  Default is "gzip -d -c"
 	  Other possible values include "gunzip -c" or "zcat".
 
@@ -172,17 +104,16 @@ config BR2_DEFCONFIG
 	default BR2_DEFCONFIG_FROM_ENV if BR2_DEFCONFIG_FROM_ENV != ""
 	default "$(CONFIG_DIR)/defconfig"
 	help
-	  When running 'make savedefconfig', the defconfig file will be
-	  saved in this location.
+	  When running 'make savedefconfig', the defconfig file will be saved
+	  in this location.
 
 config BR2_DL_DIR
 	string "Download dir"
 	default "$(TOPDIR)/dl"
 	help
 	  Directory to store all the source files that we need to fetch.
-	  If the Linux shell environment has defined the BR2_DL_DIR
-	  environment variable, then this overrides this configuration
-	  item.
+	  If the Linux shell environment has defined the BUILDROOT_DL_DIR
+	  environment variable, then this overrides this configuration item.
 
 	  The default is $(TOPDIR)/dl
 
@@ -190,9 +121,9 @@ config BR2_HOST_DIR
 	string "Host dir"
 	default "$(BASE_DIR)/host"
 	help
-	  Directory to store all the binary files that are built for the
-	  host. This includes the cross compilation toolchain when
-	  building the internal buildroot toolchain.
+	  Directory to store all the binary files that are built for the host.
+	  This includes the cross compilation toolchain when building the
+	  internal buildroot toolchain.
 
 	  The default is $(BASE_DIR)/host
 
@@ -202,13 +133,13 @@ config BR2_PRIMARY_SITE
 	string "Primary download site"
 	default ""
 	help
-	  Primary site to download from. If this option is set then
-	  buildroot will try to download package source first from this
-	  site and try the default if the file is not found.
-	  Valid URIs are:
-	    - URIs recognized by $(WGET)
-	    - local URIs of the form file://absolutepath
-	    - scp URIs of the form scp://[user@]host:path.
+	  Primary site to download from. If this option is set then buildroot
+	  will try to download package source first from this site and try the
+	  default if the file is not found.
+	  Valid URIs are URIs recognized by $(WGET) and scp URIs of the form
+	  scp://[user@]host:path.
+	  NOTE: This works for all packages using the central package
+	  infrastructure (generic, autotools, cmake, ...)
 
 config BR2_PRIMARY_SITE_ONLY
 	bool "Only allow downloads from primary download site"
@@ -217,71 +148,58 @@ config BR2_PRIMARY_SITE_ONLY
 	  If this option is enabled, downloads will only be attempted
 	  from the primary download site. Other locations, like the
 	  package's official download location or the backup download
-	  site, will not be considered. Therefore, if the package is not
-	  present on the primary site, the download fails.
+	  site, will not be considered. Therefore, if the package is
+	  not present on the primary site, the download fails.
 
-	  This is useful for project developers who want to ensure that
-	  the project can be built even if the upstream tarball
+	  This is useful for project developers who want to ensure
+	  that the project can be built even if the upstream tarball
 	  locations disappear.
 
 if !BR2_PRIMARY_SITE_ONLY
 
 config BR2_BACKUP_SITE
 	string "Backup download site"
-	default "http://sources.buildroot.net"
+	default "http://sources.buildroot.net/"
 	help
-	  Backup site to download from. If this option is set then
-	  buildroot will fall back to download package sources from here
-	  if the normal location fails.
+	  Backup site to download from. If this option is set then buildroot
+	  will fall back to download package sources from here if the
+	  normal location fails.
 
 config BR2_KERNEL_MIRROR
 	string "Kernel.org mirror"
-	default "https://cdn.kernel.org/pub"
+	default "http://www.kernel.org/pub/"
 	help
-	  kernel.org is mirrored on a number of servers around the
-	  world. The following allows you to select your preferred
-	  mirror. By default, a CDN is used, which automatically
-	  redirects to a mirror geographically close to you.
+	  kernel.org is mirrored on a number of servers around the world.
+	  The following allows you to select your preferred mirror.
 
-	  Have a look on the kernel.org site for a list of mirrors, then
-	  enter the URL to the base directory. Examples:
+	  Have a look on the kernel.org site for a list of mirrors, then enter
+	  the URL to the base directory.  Examples:
 
 	     http://www.XX.kernel.org/pub (XX = country code)
 	     http://mirror.aarnet.edu.au/pub/ftp.kernel.org
 
 config BR2_GNU_MIRROR
 	string "GNU Software mirror"
-	default "http://ftpmirror.gnu.org"
+	default "http://ftp.gnu.org/pub/gnu"
 	help
-	  GNU has multiple software mirrors scattered around the
-	  world. The following allows you to select your preferred
-	  mirror. By default, a generic address is used, which
-	  automatically selects an up-to-date and local mirror.
+	  GNU has multiple software mirrors scattered around the world.
+	  The following allows you to select your preferred mirror.
 
-	  Have a look on the gnu.org site for a list of mirrors, then
-	  enter the URL to the base directory. Examples:
+	  Have a look on the gnu.org site for a list of mirrors, then enter
+	  the URL to the base directory.  Examples:
 
 	     http://ftp.gnu.org/pub/gnu
 	     http://mirror.aarnet.edu.au/pub/gnu
 
-config BR2_LUAROCKS_MIRROR
-	string "LuaRocks mirror"
-	default "http://rocks.moonscript.org"
+config BR2_DEBIAN_MIRROR
+	string "Debian Software mirror"
+	default "http://ftp.debian.org"
 	help
-	  LuaRocks repository.
+	  Debian has multiple software mirrors scattered around the world.
+	  The following allows you to select your preferred mirror.
 
-	  See http://luarocks.org
-
-config BR2_CPAN_MIRROR
-	string "CPAN mirror (Perl packages)"
-	default "http://cpan.metacpan.org"
-	help
-	  CPAN (Comprehensive Perl Archive Network) is a repository of
-	  Perl packages. It has multiple software mirrors scattered
-	  around the world. This option allows you to select a mirror.
-
-	  The list of mirrors is available at:
-	  http://search.cpan.org/mirror
+	  Usually, just add your country code like XX here:
+	  http://ftp.XX.debian.org
 
 endif
 
@@ -291,76 +209,36 @@ config BR2_JLEVEL
 	int "Number of jobs to run simultaneously (0 for auto)"
 	default "0"
 	help
-	  Number of jobs to run simultaneously. If 0, determine
-	  automatically according to number of CPUs on the host system.
+	  Number of jobs to run simultaneously.  If 0, determine
+	  automatically according to number of CPUs on the host
+	  system.
 
 config BR2_CCACHE
 	bool "Enable compiler cache"
 	help
-	  This option will enable the use of ccache, a compiler cache.
-	  It will cache the result of previous builds to speed up future
-	  builds. By default, the cache is stored in
+	  This option will enable the use of ccache, a compiler
+	  cache. It will cache the result of previous builds to speed
+	  up future builds. The cache is stored in
 	  $HOME/.buildroot-ccache.
 
 	  Note that Buildroot does not try to invalidate the cache
-	  contents when the compiler changes in an incompatible way.
-	  Therefore, if you make a change to the compiler version and/or
-	  configuration, you are responsible for purging the ccache
-	  cache by removing the $HOME/.buildroot-ccache directory.
-
-if BR2_CCACHE
+	  contents when the compiler changes in an incompatible
+	  way. Therefore, if you make a change to the compiler version
+	  and/or configuration, you are responsible for purging the
+	  ccache cache by removing the $HOME/.buildroot-ccache
+	  directory.
 
 config BR2_CCACHE_DIR
 	string "Compiler cache location"
+	depends on BR2_CCACHE
 	default "$(HOME)/.buildroot-ccache"
 	help
 	  Where ccache should store cached files.
 
-config BR2_CCACHE_INITIAL_SETUP
-	string "Compiler cache initial setup"
+config BR2_DEPRECATED
+	bool "Show packages that are deprecated or obsolete"
 	help
-	  Initial ccache settings to apply, such as --max-files or
-	  --max-size.
-
-	  For example, if your project is known to require more space
-	  than the default max cache size, then you might want to
-	  increase the cache size to a suitable amount using the -M
-	  (--max-size) option.
-
-	  The string you specify here is passed verbatim to ccache.
-	  Refer to ccache documentation for more details.
-
-	  These initial settings are applied after ccache has been
-	  compiled.
-
-config BR2_CCACHE_USE_BASEDIR
-	bool "Use relative paths"
-	default y
-	help
-	  Allow ccache to convert absolute paths within the output
-	  directory into relative paths.
-
-	  During the build, many -I include directives are given with an
-	  absolute path. These absolute paths end up in the hashes that
-	  are computed by ccache. Therefore, when you build from a
-	  different directory, the hash will be different and the cached
-	  object will not be used.
-
-	  To improve cache performance, set this option to y. This
-	  allows ccache to rewrite absolute paths within the output
-	  directory into relative paths. Note that only paths within the
-	  output directory will be rewritten; therefore, if you change
-	  BR2_HOST_DIR to point outside the output directory and
-	  subsequently move it to a different location, this will lead
-	  to cache misses.
-
-	  This option has as a result that the debug information in the
-	  object files also has only relative paths. Therefore, make
-	  sure you cd to the build directory before starting gdb. See
-	  the section "COMPILING IN DIFFERENT DIRECTORIES" in the ccache
-	  manual for more information.
-
-endif
+	  This option hides outdated/obsolete versions of packages.
 
 config BR2_ENABLE_DEBUG
 	bool "build packages with debugging symbols"
@@ -382,11 +260,11 @@ choice
 config BR2_DEBUG_1
 	bool "debug level 1"
 	help
-	  Debug level 1 produces minimal information, enough for making
-	  backtraces in parts of the program that you don't plan to
-	  debug. This includes descriptions of functions and external
-	  variables, but no information about local variables and no
-	  line numbers.
+	  Debug level 1 produces minimal information, enough
+	  for making backtraces in parts of the program that
+	  you don't plan to debug. This includes descriptions
+	  of functions and external variables, but no information
+	  about local variables and no line numbers.
 
 config BR2_DEBUG_2
 	bool "debug level 2"
@@ -396,9 +274,9 @@ config BR2_DEBUG_2
 config BR2_DEBUG_3
 	bool "debug level 3"
 	help
-	  Level 3 includes extra information, such as all the macro
-	  definitions present in the program. Some debuggers support
-	  macro expansion when you use -g3.
+	  Level 3 includes extra information, such as all the
+	  macro definitions present in the program. Some debuggers
+	  support macro expansion when you use -g3.
 endchoice
 endif
 
@@ -411,15 +289,28 @@ config BR2_STRIP_strip
 	depends on !BR2_PACKAGE_HOST_ELF2FLT
 	help
 	  Binaries and libraries in the target filesystem will be
-	  stripped using the normal 'strip' command. This allows to save
-	  space, mainly by removing debugging symbols. Debugging symbols
-	  on the target are needed for native debugging, but not when
-	  remote debugging is used.
+	  stripped using the normal 'strip' command. This allows to
+	  save space, mainly by removing debugging symbols. Debugging
+	  symbols on the target are needed for native debugging, but
+	  not when remote debugging is used.
+
+config BR2_STRIP_sstrip
+	bool "sstrip"
+	select BR2_PACKAGE_SSTRIP_HOST
+	depends on !BR2_PACKAGE_HOST_ELF2FLT
+	help
+	  Binaries and libraries in the target filesystem will be
+	  stripped using the 'sstrip' command, which strips a little
+	  bit more than the traditional 'strip' command. This allows to
+	  save space, mainly by removing debugging symbols. Debugging
+	  symbols on the target are needed for native debugging, but
+	  not when remote debugging is used.
 
 config BR2_STRIP_none
 	bool "none"
 	help
-	  Do not strip binaries and libraries in the target filesystem.
+	  Do not strip binaries and libraries in the target
+	  filesystem.
 endchoice
 
 config BR2_STRIP_EXCLUDE_FILES
@@ -427,19 +318,19 @@ config BR2_STRIP_EXCLUDE_FILES
 	depends on !BR2_STRIP_none
 	default ""
 	help
-	  You may specify a space-separated list of binaries and
-	  libraries here that should not be stripped on the target.
+	  You may specify a space-separated list of binaries and libraries
+	  here that should not be stripped on the target.
 
 config BR2_STRIP_EXCLUDE_DIRS
 	string "directories that should be skipped when stripping"
 	depends on !BR2_STRIP_none
 	default ""
 	help
-	  You may specify a space-separated list of directories that
-	  should be skipped when stripping. Binaries and libraries in
-	  these directories will not be touched. The directories should
-	  be specified relative to the target directory, without leading
-	  slash.
+	  You may specify a space-separated list of directories that should
+	  be skipped when stripping. Binaries and libraries in these
+	  directories will not be touched.
+	  The directories should be specified relative to the target directory,
+	  without leading slash.
 
 choice
 	prompt "gcc optimization level"
@@ -455,262 +346,103 @@ config BR2_OPTIMIZE_0
 config BR2_OPTIMIZE_1
 	bool "optimization level 1"
 	help
-	  Optimize. Optimizing compilation takes somewhat more time, and
-	  a lot more memory for a large function. With -O, the compiler
-	  tries to reduce code size and execution time, without
-	  performing any optimizations that take a great deal of
-	  compilation time. -O turns on the following optimization
+	  Optimize. Optimizing compilation takes somewhat more time,
+	  and a lot more memory for a large function. With -O, the
+	  compiler tries to reduce code size and execution time,
+	  without performing any optimizations that take a great deal
+	  of compilation time. -O turns on the following optimization
 	  flags: -fdefer-pop -fdelayed-branch -fguess-branch-probability
 	  -fcprop-registers -floop-optimize -fif-conversion
 	  -fif-conversion2 -ftree-ccp -ftree-dce -ftree-dominator-opts
 	  -ftree-dse -ftree-ter -ftree-lrs -ftree-sra -ftree-copyrename
-	  -ftree-fre -ftree-ch -funit-at-a-time -fmerge-constants. -O
-	  also turns on -fomit-frame-pointer on machines where doing so
-	  does not interfere with debugging.
+	  -ftree-fre -ftree-ch -funit-at-a-time -fmerge-constants
+	  -O also turns on -fomit-frame-pointer on machines where doing
+	  so does not interfere with debugging.
 
 config BR2_OPTIMIZE_2
 	bool "optimization level 2"
 	help
-	  Optimize even more. GCC performs nearly all supported
-	  optimizations that do not involve a space-speed tradeoff. The
-	  compiler does not perform loop unrolling or function inlining
-	  when you specify -O2. As compared to -O, this option increases
-	  both compilation time and the performance of the generated
-	  code. -O2 turns on all optimization flags specified by -O. It
-	  also turns on the following optimization flags:
-	  -fthread-jumps -fcrossjumping -foptimize-sibling-calls
+	  Optimize even more. GCC performs nearly all supported optimizations
+	  that do not involve a space-speed tradeoff. The compiler does not
+	  perform loop unrolling or function inlining when you specify -O2.
+	  As compared to -O, this option increases both compilation time and
+	  the performance of the generated code. -O2 turns on all optimization
+	  flags specified by -O. It also turns on the following optimization
+	  flags: -fthread-jumps -fcrossjumping -foptimize-sibling-calls
 	  -fcse-follow-jumps -fcse-skip-blocks -fgcse  -fgcse-lm
-	  -fexpensive-optimizations -fstrength-reduce
-	  -frerun-cse-after-loop -frerun-loop-opt -fcaller-saves
-	  -fpeephole2 -fschedule-insns -fschedule-insns2
-	  -fsched-interblock -fsched-spec -fregmove -fstrict-aliasing
-	  -fdelete-null-pointer-checks -freorder-blocks
-	  -freorder-functions -falign-functions -falign-jumps
-	  -falign-loops -falign-labels -ftree-vrp -ftree-pre. Please
-	  note the warning under -fgcse about invoking -O2 on programs
+	  -fexpensive-optimizations -fstrength-reduce -frerun-cse-after-loop
+	  -frerun-loop-opt -fcaller-saves -fpeephole2 -fschedule-insns
+	  -fschedule-insns2 -fsched-interblock -fsched-spec -fregmove
+	  -fstrict-aliasing -fdelete-null-pointer-checks -freorder-blocks
+	  -freorder-functions -falign-functions -falign-jumps -falign-loops
+	  -falign-labels -ftree-vrp -ftree-pre
+	  Please note the warning under -fgcse about invoking -O2 on programs
 	  that use computed gotos.
 
 config BR2_OPTIMIZE_3
 	bool "optimization level 3"
 	help
-	  Optimize yet more. -O3 turns on all optimizations specified by
-	  -O2 and also turns on the -finline-functions, -funswitch-loops
-	  and -fgcse-after-reload options.
-
-config BR2_OPTIMIZE_G
-	bool "optimize for debugging"
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8
-	help
-	  Optimize for debugging. This enables optimizations that do not
-	  interfere with debugging. It should be the optimization level
-	  of choice for the standard edit-compile-debug cycle, offering
-	  a reasonable level of optimization while maintaining fast
-	  compilation and a good debugging experience.
+	  Optimize yet more. -O3 turns on all optimizations specified by -O2
+	  and also turns on the -finline-functions, -funswitch-loops and
+	  -fgcse-after-reload options.
 
 config BR2_OPTIMIZE_S
 	bool "optimize for size"
 	help
-	  Optimize for size. -Os enables all -O2 optimizations that do
-	  not typically increase code size. It also performs further
-	  optimizations designed to reduce code size. -Os disables the
-	  following optimization flags: -falign-functions -falign-jumps
-	  -falign-loops -falign-labels -freorder-blocks
-	  -freorder-blocks-and-partition -fprefetch-loop-arrays
+	  Optimize for size. -Os enables all -O2 optimizations that do not
+	  typically increase code size. It also performs further optimizations
+	  designed to reduce code size. -Os disables the following optimization
+	  flags: -falign-functions -falign-jumps -falign-loops -falign-labels
+	  -freorder-blocks -freorder-blocks-and-partition -fprefetch-loop-arrays
 	  -ftree-vect-loop-version
 
 endchoice
 
-config BR2_GOOGLE_BREAKPAD_ENABLE
-	bool "Enable google-breakpad support"
-	select BR2_PACKAGE_GOOGLE_BREAKPAD
-	depends on BR2_INSTALL_LIBSTDCPP
-	depends on BR2_USE_WCHAR
-	depends on BR2_TOOLCHAIN_HAS_THREADS
-	depends on (BR2_TOOLCHAIN_USES_GLIBC || BR2_TOOLCHAIN_USES_UCLIBC)
-	depends on BR2_PACKAGE_GOOGLE_BREAKPAD_ARCH_SUPPORTS
+config BR2_PREFER_STATIC_LIB
+	bool "prefer static libraries"
 	help
-	  This option will enable the use of google breakpad, a library
-	  and tool suite that allows you to distribute an application to
-	  users with compiler-provided debugging information removed,
-	  record crashes in compact "minidump" files, send them back to
-	  your server and produce C and C++ stack traces from these
-	  minidumps. Breakpad can also write minidumps on request for
-	  programs that have not crashed.
+	  Where possible, build and use static libraries for the target.
+	  This potentially increases your code size and should only be
+	  used if you know what you do.
+	  The default is to build dynamic libraries and use those on
+	  the target filesystem.
 
-if BR2_GOOGLE_BREAKPAD_ENABLE
+	  WARNING: This is highly experimental at the moment.
 
-config BR2_GOOGLE_BREAKPAD_INCLUDE_FILES
-	string "List of executables and libraries to extract symbols from"
-	default ""
+config BR2_HAVE_DOCUMENTATION
+	bool "documentation on the target"
+	# We no longer want to support a toolchain on the target
+	depends on BR2_DEPRECATED
 	help
-	  You may specify a space-separated list of binaries and
-	  libraries with full paths relative to $(TARGET_DIR) of which
-	  debug symbols will be dumped for further use with google
-	  breakpad.
-
-	  A directory structure that can be used by minidump-stackwalk
-	  will be created at:
-
-	  $(STAGING_DIR)/usr/share/google-breakpad-symbols
-
-endif
-
-choice
-	bool "build code with Stack Smashing Protection"
-	default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
-	depends on BR2_TOOLCHAIN_HAS_SSP
-	help
-	  Enable stack smashing protection support using GCC's
-	  -fstack-protector option family.
-
-	  See
-	  http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
-	  for details.
-
-	  Note that this requires the toolchain to have SSP support.
-	  This is always the case for glibc and eglibc toolchain, but is
-	  optional in uClibc toolchains.
-
-config BR2_SSP_NONE
-	bool "None"
-	help
-	  Disable stack-smashing protection.
-
-config BR2_SSP_REGULAR
-	bool "-fstack-protector"
-	help
-	  Emit extra code to check for buffer overflows, such as stack
-	  smashing attacks. This is done by adding a guard variable to
-	  functions with vulnerable objects. This includes functions
-	  that call alloca, and functions with buffers larger than 8
-	  bytes. The guards are initialized when a function is entered
-	  and then checked when the function exits. If a guard check
-	  fails, an error message is printed and the program exits.
-
-config BR2_SSP_STRONG
-	bool "-fstack-protector-strong"
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
-	help
-	  Like -fstack-protector but includes additional functions to be
-	  protected - those that have local array definitions, or have
-	  references to local frame addresses.
-
-comment "Stack Smashing Protection strong needs a toolchain w/ gcc >= 4.9"
-	depends on !BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
-
-config BR2_SSP_ALL
-	bool "-fstack-protector-all"
-	help
-	  Like -fstack-protector except that all functions are
-	  protected. This option might have a significant performance
-	  impact on the compiled binaries.
-
-endchoice
-
-comment "Stack Smashing Protection needs a toolchain w/ SSP"
-	depends on !BR2_TOOLCHAIN_HAS_SSP
-
-choice
-	bool "libraries"
-	default BR2_SHARED_LIBS if BR2_BINFMT_SUPPORTS_SHARED
-	default BR2_STATIC_LIBS if !BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  Select the type of libraries you want to use on the target.
-
-	  The default is to build dynamic libraries and use those on the
-	  target filesystem, except when the architecture and/or the
-	  selected binary format does not support shared libraries.
-
-config BR2_STATIC_LIBS
-	bool "static only"
-	help
-	  Build and use only static libraries. No shared libraries will
-	  be installed on the target. This potentially increases your
-	  code size and should only be used if you know what you are
-	  doing. Note that some packages may not be available when this
-	  option is enabled, due to their need for dynamic library
-	  support.
-
-config BR2_SHARED_LIBS
-	bool "shared only"
-	depends on BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  Build and use only shared libraries. This is the recommended
-	  solution as it saves space and build time.
-
-config BR2_SHARED_STATIC_LIBS
-	bool "both static and shared"
-	depends on BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  Build both shared and static libraries, but link executables
-	  dynamically. While building both shared and static libraries
-	  take more time and more disk space, having static libraries
-	  may be useful to link some of the applications statically.
-
-endchoice
-
+	  Install the documentation, including manual pages and info
+	  pages, on the target.
+	  If you say n here, your target will not contain any
+	  documentation.
 
 config BR2_PACKAGE_OVERRIDE_FILE
 	string "location of a package override file"
-	default "$(CONFIG_DIR)/local.mk"
+	default "$(TOPDIR)/local.mk"
 	help
 	  A package override file is a short makefile that contains
-	  variable definitions of the form <pkg>_OVERRIDE_SRCDIR, which
-	  allows to tell Buildroot to use an existing directory as the
-	  source directory for a particular package. See the Buildroot
-	  documentation for more details on this feature.
+	  variable definitions of the form <pkg>_OVERRIDE_SRCDIR,
+	  which allows to tell Buildroot to use an existing directory
+	  as the source directory for a particular package. See the
+	  Buildroot documentation for more details on this feature.
 
 config BR2_GLOBAL_PATCH_DIR
-	string "global patch directories"
+	string "global patch directory"
 	help
-	  You may specify a space separated list of one or more
-	  directories containing global package patches. For a specific
-	  version <packageversion> of a specific package <packagename>,
-	  patches are applied as follows:
+	  You may specify a directory containing global package patches.
+	  For a specific version <packageversion> of a specific package
+	  <packagename>, patches are applied as follows.
 
-	  First, the default Buildroot patch set for the package is
-	  applied from the package's directory in Buildroot.
+	  First, the default Buildroot patch set for the package is applied.
 
-	  Then for every directory - <global-patch-dir> - that exists in
-	  BR2_GLOBAL_PATCH_DIR, if the directory
-	  <global-patch-dir>/<packagename>/<packageversion>/ exists,
-	  then all *.patch files in this directory will be applied.
+	  If the directory $(BR2_GLOBAL_PATCH_DIR)/<packagename>/<packageversion>
+	  exists, then all *.patch files in the directory will be applied.
 
-	  Otherwise, if the directory <global-patch-dir>/<packagename>
-	  exists, then all *.patch files in the directory will be
-	  applied.
-
-menu "Advanced"
-
-config BR2_COMPILER_PARANOID_UNSAFE_PATH
-	bool "paranoid check of library/header paths"
-	default y
-	help
-	  By default, when this option is disabled, when the Buildroot
-	  cross-compiler will encounter an unsafe library or header path
-	  (such as /usr/include, or /usr/lib), the compiler will display
-	  a warning.
-
-	  By enabling this option, this warning is turned into an error,
-	  which will completely abort the build when such unsafe paths
-	  are encountered.
-
-	  Note that this mechanism is available for both the internal
-	  toolchain (through the toolchain wrapper and binutils patches)
-	  and external toolchain backends (through the toolchain wrapper).
-
-config BR2_REPRODUCIBLE
-	bool "Make the build reproducible (experimental)"
-	help
-	  This option will remove all sources of non-reproducibility
-	  from the build process. For a given Buildroot configuration,
-	  this allows to generate exactly identical binaries from one
-	  build to the other, including on different machines.
-
-	  This is labeled as an experimental feature, as not all
-	  packages behave properly to ensure reproducibility.
-
-endmenu
+	  Otherwise, if the directory $(BR2_GLOBAL_PATCH_DIR)/<packagename> exists,
+	  then all *.patch files in the directory will be applied.
 
 endmenu
 
@@ -729,5 +461,3 @@ source "boot/Config.in"
 source "package/Config.in.host"
 
 source "Config.in.legacy"
-
-source "$BR2_BUILD_DIR/.br2-external.in"

Makefile.legacy

@@ -4,43 +4,14 @@
 # This file contains placeholders to detect backward-compatibility problems.
 # When a buildroot "API" feature is being deprecated, a rule should be added
 # here that issues an error when the old feature is used.
+#
+# This file is not included if BR2_DEPRECATED is selected, so it is possible
+# to bypass the errors (although that's usually a bad idea).
 
 ifeq ($(BR2_LEGACY),y)
 $(error "You have legacy configuration in your .config! Please check your configuration.")
 endif
 
-#
-# Legacy options from 2014.02
-#
-
-# The BUILDROOT_DL_DIR environment variable was renamed by BR2_DL_DIR. We
-# want to detect someone using the old variable, _except_ if also the new
-# variable was set. By the time we get here, however, we no longer have
-# access to the BR2_DL_DIR environment variable (because it has been overridden
-# by the .config inclusion). However, the environment variable (if defined) was
-# saved in DL_DIR, so we can use that.
-ifneq ($(BUILDROOT_DL_DIR),)
-ifneq ($(BUILDROOT_DL_DIR),$(DL_DIR))
-$(error "The BUILDROOT_DL_DIR environment variable was renamed to BR2_DL_DIR.")
-endif
-endif
-
-# If a script is using the deprecated BUILDROOT_CONFIG, make sure it fails.
-# Add some directories in front just in case someone used dirname on it.
-BUILDROOT_CONFIG_FAKE = /tmp/deprecated/The-BUILDROOT_CONFIG-environment-variable-was-renamed-to-BR2_CONFIG
-
-# Similar to above for BUILDROOT_CONFIG, but here we have no .config equivalent.
-ifneq ($(BUILDROOT_CONFIG),)
-ifneq ($(BUILDROOT_CONFIG),$(BR2_CONFIG))
-ifneq ($(BUILDROOT_CONFIG),$(BUILDROOT_CONFIG_FAKE))
-$(error "The BUILDROOT_CONFIG environment variable was renamed to BR2_CONFIG.")
-endif
-endif
-endif
-
-BUILDROOT_CONFIG = $(BUILDROOT_CONFIG_FAKE)
-export BUILDROOT_CONFIG
-
 #
 # Legacy options from 2012.08
 #

README

@@ -1,26 +0,0 @@
-Buildroot is a simple, efficient and easy-to-use tool to generate embedded
-Linux systems through cross-compilation.
-
-The documentation can be found in docs/manual. You can generate a text
-document with 'make manual-text' and read output/docs/manual/manual.text.
-Online documentation can be found at http://buildroot.org/docs.html
-
-To build and use the buildroot stuff, do the following:
-
-1) run 'make menuconfig'
-2) select the target architecture and the packages you wish to compile
-3) run 'make'
-4) wait while it compiles
-5) find the kernel, bootloader, root filesystem, etc. in output/images
-
-You do not need to be root to build or run buildroot.  Have fun!
-
-Buildroot comes with a basic configuration for a number of boards. Run
-'make list-defconfigs' to view the list of provided configurations.
-
-Please feed suggestions, bug reports, insults, and bribes back to the
-buildroot mailing list: buildroot@buildroot.org
-You can also find us on #buildroot on Freenode IRC.
-
-If you would like to contribute patches, please read
-https://buildroot.org/manual.html#submitting-patches

arch/Config.in

@@ -1,23 +1,9 @@
-menu "Target options"
-
 config BR2_ARCH_IS_64
 	bool
 
-config BR2_KERNEL_64_USERLAND_32
-	bool
-
 config BR2_SOFT_FLOAT
 	bool
 
-config BR2_ARCH_HAS_MMU_MANDATORY
-	bool
-
-config BR2_ARCH_HAS_MMU_OPTIONAL
-	bool
-
-config BR2_ARCH_HAS_FDPIC_SUPPORT
-	bool
-
 choice
 	prompt "Target Architecture"
 	default BR2_i386
@@ -26,7 +12,6 @@ choice
 
 config BR2_arcle
 	bool "ARC (little endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
 	  that can be used from deeply embedded to high performance host
@@ -34,7 +19,6 @@ config BR2_arcle
 
 config BR2_arceb
 	bool "ARC (big endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
 	  that can be used from deeply embedded to high performance host
@@ -42,7 +26,6 @@ config BR2_arceb
 
 config BR2_arm
 	bool "ARM (little endian)"
-	# MMU support is set by the subarchitecture file, arch/Config.in.arm
 	help
 	  ARM is a 32-bit reduced instruction set computer (RISC) instruction
 	  set architecture (ISA) developed by ARM Holdings. Little endian.
@@ -51,7 +34,6 @@ config BR2_arm
 
 config BR2_armeb
 	bool "ARM (big endian)"
-	# MMU support is set by the subarchitecture file, arch/Config.in.arm
 	help
 	  ARM is a 32-bit reduced instruction set computer (RISC) instruction
 	  set architecture (ISA) developed by ARM Holdings. Big endian.
@@ -59,26 +41,24 @@ config BR2_armeb
 	  http://en.wikipedia.org/wiki/ARM
 
 config BR2_aarch64
-	bool "AArch64 (little endian)"
+	bool "AArch64"
 	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
 	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
 	  http://en.wikipedia.org/wiki/ARM
 
-config BR2_aarch64_be
-	bool "AArch64 (big endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
+config BR2_avr32
+	bool "AVR32"
+	select BR2_SOFT_FLOAT
 	help
-	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
-	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
-	  http://en.wikipedia.org/wiki/ARM
+	  The AVR32 is a 32-bit RISC microprocessor architecture designed by
+	  Atmel.
+	  http://www.atmel.com/
+	  http://en.wikipedia.org/wiki/Avr32
 
 config BR2_bfin
 	bool "Blackfin"
-	select BR2_ARCH_HAS_FDPIC_SUPPORT
 	help
 	  The Blackfin is a family of 16 or 32-bit microprocessors developed,
 	  manufactured and marketed by Analog Devices.
@@ -87,21 +67,19 @@ config BR2_bfin
 
 config BR2_i386
 	bool "i386"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Intel i386 architecture compatible microprocessor
 	  http://en.wikipedia.org/wiki/I386
 
 config BR2_m68k
 	bool "m68k"
-	# MMU support is set by the subarchitecture file, arch/Config.in.m68k
+	depends on BROKEN # ice in uclibc / inet_ntoa_r
 	help
 	  Motorola 68000 family microprocessor
 	  http://en.wikipedia.org/wiki/M68k
 
 config BR2_microblazeel
 	bool "Microblaze AXI (little endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
 	  based architecture (little endian)
@@ -110,7 +88,6 @@ config BR2_microblazeel
 
 config BR2_microblazebe
 	bool "Microblaze non-AXI (big endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
 	  based architecture (non-AXI, big endian)
@@ -119,7 +96,6 @@ config BR2_microblazebe
 
 config BR2_mips
 	bool "MIPS (big endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
 	  http://www.mips.com/
@@ -127,7 +103,6 @@ config BR2_mips
 
 config BR2_mipsel
 	bool "MIPS (little endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
 	  http://www.mips.com/
@@ -136,7 +111,6 @@ config BR2_mipsel
 config BR2_mips64
 	bool "MIPS64 (big endian)"
 	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
 	  http://www.mips.com/
@@ -145,71 +119,36 @@ config BR2_mips64
 config BR2_mips64el
 	bool "MIPS64 (little endian)"
 	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
 	  http://www.mips.com/
 	  http://en.wikipedia.org/wiki/MIPS_Technologies
 
-config BR2_nios2
-	bool "Nios II"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Nios II is a soft core processor from Altera Corporation.
-	  http://www.altera.com/
-	  http://en.wikipedia.org/wiki/Nios_II
-
 config BR2_powerpc
 	bool "PowerPC"
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
-	  Big endian.
-	  http://www.power.org/
-	  http://en.wikipedia.org/wiki/Powerpc
-
-config BR2_powerpc64
-	bool "PowerPC64 (big endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
-	  Big endian.
-	  http://www.power.org/
-	  http://en.wikipedia.org/wiki/Powerpc
-
-config BR2_powerpc64le
-	bool "PowerPC64 (little endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
-	  Little endian.
 	  http://www.power.org/
 	  http://en.wikipedia.org/wiki/Powerpc
 
 config BR2_sh
 	bool "SuperH"
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 	help
 	  SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
 	  instruction set architecture (ISA) developed by Hitachi.
 	  http://www.hitachi.com/
 	  http://en.wikipedia.org/wiki/SuperH
 
+config BR2_sh64
+	bool "SuperH64"
+	help
+	  SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
+	  instruction set architecture (ISA) developed by Hitachi.
+	  http://www.hitachi.com/
+	  http://en.wikipedia.org/wiki/SuperH
+
 config BR2_sparc
 	bool "SPARC"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  SPARC (from Scalable Processor Architecture) is a RISC instruction
-	  set architecture (ISA) developed by Sun Microsystems.
-	  http://www.oracle.com/sun
-	  http://en.wikipedia.org/wiki/Sparc
-
-config BR2_sparc64
-	bool "SPARC64"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  SPARC (from Scalable Processor Architecture) is a RISC instruction
 	  set architecture (ISA) developed by Sun Microsystems.
@@ -219,7 +158,6 @@ config BR2_sparc64
 config BR2_x86_64
 	bool "x86_64"
 	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  x86-64 is an extension of the x86 instruction set (Intel i386
 	  architecture compatible microprocessor).
@@ -227,7 +165,6 @@ config BR2_x86_64
 
 config BR2_xtensa
 	bool "Xtensa"
-	# MMU support is set by the subarchitecture file, arch/Config.in.xtensa
 	help
 	  Xtensa is a Tensilica processor IP architecture.
 	  http://en.wikipedia.org/wiki/Xtensa
@@ -243,6 +180,9 @@ config BR2_ARCH
 config BR2_ENDIAN
 	string
 
+config BR2_GCC_TARGET_TUNE
+	string
+
 config BR2_GCC_TARGET_ARCH
 	string
 
@@ -273,21 +213,15 @@ config BR2_GCC_TARGET_FLOAT_ABI
 config BR2_GCC_TARGET_MODE
 	string
 
-# Must be selected by binary formats that support shared libraries.
-config BR2_BINFMT_SUPPORTS_SHARED
-	bool
-
 # Set up target binary format
 choice
 	prompt "Target Binary Format"
-	default BR2_BINFMT_ELF if BR2_USE_MMU
-	default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
-	default BR2_BINFMT_FLAT
+	depends on BR2_bfin || BR2_m68k
+	default BR2_BINFMT_FDPIC
 
 config BR2_BINFMT_ELF
 	bool "ELF"
-	depends on BR2_USE_MMU
-	select BR2_BINFMT_SUPPORTS_SHARED
+	depends on !BR2_bfin && !BR2_m68k
 	help
 	  ELF (Executable and Linkable Format) is a format for libraries and
 	  executables used across different architectures and operating
@@ -295,8 +229,7 @@ config BR2_BINFMT_ELF
 
 config BR2_BINFMT_FDPIC
 	bool "FDPIC"
-	depends on BR2_ARCH_HAS_FDPIC_SUPPORT
-	select BR2_BINFMT_SUPPORTS_SHARED
+	depends on BR2_bfin || BR2_m68k
 	help
 	  ELF FDPIC binaries are based on ELF, but allow the individual load
 	  segments of a binary to be located in memory independently of each
@@ -305,7 +238,8 @@ config BR2_BINFMT_FDPIC
 
 config BR2_BINFMT_FLAT
 	bool "FLAT"
-	depends on !BR2_USE_MMU
+	depends on BR2_bfin || BR2_m68k
+	select BR2_PREFER_STATIC_LIB
 	help
 	  FLAT binary is a relatively simple and lightweight executable format
 	  based on the original a.out format. It is widely used in environment
@@ -326,25 +260,14 @@ config BR2_BINFMT_FLAT_ONE
 
 config BR2_BINFMT_FLAT_SEP_DATA
 	bool "Separate data and code region"
-	# this FLAT binary type technically exists on m68k, but fails
-	# to build numerous packages: due to architecture limitation,
-	# big functions cannot be built in this mode. They cause build
-	# failures such as "Tried to convert PC relative branch to
-	# absolute jump" or "error: value -yyyyy out of range".
-	depends on BR2_bfin
+	depends on BR2_bfin || BR2_m68k
 	help
 	  Allow for the data and text segments to be separated and placed in
 	  different regions of memory.
 
 config BR2_BINFMT_FLAT_SHARED
 	bool "Shared binary"
-	depends on BR2_m68k || BR2_bfin
-	# Even though this really generates shared binaries, there is no libdl
-	# and dlopen() cannot be used. So packages that require shared
-	# libraries cannot be built. Therefore, we don't select
-	# BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
-	# Although this adds -static to the compilation, that's not a problem
-	# because the -mid-shared-library option overrides it.
+	depends on BR2_bfin || BR2_m68k
 	help
 	  Allow to load and link indiviual FLAT binaries at run time.
 
@@ -358,10 +281,14 @@ if BR2_arm || BR2_armeb
 source "arch/Config.in.arm"
 endif
 
-if BR2_aarch64 || BR2_aarch64_be
+if BR2_aarch64
 source "arch/Config.in.aarch64"
 endif
 
+if BR2_avr32
+source "arch/Config.in.avr32"
+endif
+
 if BR2_bfin
 source "arch/Config.in.bfin"
 endif
@@ -378,19 +305,15 @@ if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
 source "arch/Config.in.mips"
 endif
 
-if BR2_nios2
-source "arch/Config.in.nios2"
-endif
-
-if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
+if BR2_powerpc
 source "arch/Config.in.powerpc"
 endif
 
-if BR2_sh
+if BR2_sh || BR2_sh64
 source "arch/Config.in.sh"
 endif
 
-if BR2_sparc || BR2_sparc64
+if BR2_sparc
 source "arch/Config.in.sparc"
 endif
 
@@ -401,5 +324,3 @@ endif
 if BR2_xtensa
 source "arch/Config.in.xtensa"
 endif
-
-endmenu # Target options

arch/Config.in.aarch64

@@ -1,7 +1,5 @@
 config BR2_ARCH
 	default "aarch64"	if BR2_aarch64
-	default "aarch64_be"	if BR2_aarch64_be
 
 config BR2_ENDIAN
-	default "LITTLE" if BR2_aarch64
-	default "BIG"	 if BR2_aarch64_be
+	default "LITTLE"

arch/Config.in.arc

@@ -1,26 +1,3 @@
-choice
-	prompt "Target CPU"
-	depends on BR2_arc
-	default BR2_arc770d
-	help
-	    Specific CPU to use
-
-config BR2_arc750d
-	bool "ARC 750D"
-
-config BR2_arc770d
-	bool "ARC 770D"
-
-config BR2_archs38
-	bool "ARC HS38"
-
-endchoice
-
-# Choice of atomic instructions presence
-config BR2_ARC_ATOMIC_EXT
-	bool "Atomic extension (LLOCK/SCOND instructions)"
-	default y if BR2_arc770d || BR2_archs38
-
 config BR2_ARCH
 	default "arc"	if BR2_arcle
 	default "arceb"	if BR2_arceb
@@ -34,44 +11,8 @@ config BR2_ENDIAN
 	default "BIG"	 if BR2_arceb
 
 config BR2_GCC_TARGET_CPU
-	default "arc700" if BR2_arc750d
-	default "arc700" if BR2_arc770d
-	default "archs"	 if BR2_archs38
+	default "arc700"
 
-choice
-	prompt "MMU Page Size"
-	default BR2_ARC_PAGE_SIZE_8K
-	help
-	  MMU starting from version 3 (found in ARC 770) and now
-	  version 4 (found in ARC HS38) allows the selection of the
-	  page size during ASIC design creation.
-
-	  The following options are available for MMU v3 and v4: 4kB,
-	  8kB and 16 kB.
-
-	  The default is 8 kB (that really matches the only page size
-	  in MMU v2).  It is important to build a toolchain with page
-	  size matching the hardware configuration. Otherwise
-	  user-space applications will fail at runtime.
-
-config BR2_ARC_PAGE_SIZE_4K
-	bool "4KB"
-	depends on BR2_arc770d || BR2_archs38
-
-config BR2_ARC_PAGE_SIZE_8K
-	bool "8KB"
-	help
-	  This is the one and only option available for MMUv2 and
-	  default value for MMU v3 and v4.
-
-config BR2_ARC_PAGE_SIZE_16K
-	bool "16KB"
-	depends on BR2_arc770d || BR2_archs38
-
-endchoice
-
-config BR2_ARC_PAGE_SIZE
+config BR2_ARC_SITE
 	string
-	default "4K" if BR2_ARC_PAGE_SIZE_4K
-	default "8K" if BR2_ARC_PAGE_SIZE_8K
-	default "16K" if BR2_ARC_PAGE_SIZE_16K
+	default "http://www.synopsys.com/apps/arc-developer/"

arch/Config.in.arm

@@ -31,30 +31,12 @@ config BR2_ARM_CPU_HAS_VFPV4
 	bool
 	select BR2_ARM_CPU_HAS_VFPV3
 
-config BR2_ARM_CPU_HAS_ARM
-	bool
-
 config BR2_ARM_CPU_HAS_THUMB
 	bool
 
 config BR2_ARM_CPU_HAS_THUMB2
 	bool
 
-config BR2_ARM_CPU_ARMV4
-	bool
-
-config BR2_ARM_CPU_ARMV5
-	bool
-
-config BR2_ARM_CPU_ARMV6
-	bool
-
-config BR2_ARM_CPU_ARMV7A
-	bool
-
-config BR2_ARM_CPU_ARMV7M
-	bool
-
 choice
 	prompt "Target Architecture Variant"
 	depends on BR2_arm || BR2_armeb
@@ -62,175 +44,86 @@ choice
 	help
 	  Specific CPU variant to use
 
+config BR2_arm7tdmi
+	bool "arm7tdmi"
+	select BR2_ARM_CPU_HAS_THUMB
+config BR2_arm720t
+	bool "arm720t"
+	select BR2_ARM_CPU_HAS_THUMB
 config BR2_arm920t
 	bool "arm920t"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm922t
 	bool "arm922t"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm926t
 	bool "arm926t"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm1136j_s
-	bool "arm1136j-s"
-	select BR2_ARM_CPU_HAS_ARM
+config BR2_arm10t
+	bool "arm10t"
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm1136jf_s
-	bool "arm1136jf-s"
-	select BR2_ARM_CPU_HAS_ARM
+config BR2_arm1136jf_s_r0
+	bool "arm1136jf_s rev0"
+	select BR2_ARM_CPU_HAS_VFPV2
+	select BR2_ARM_CPU_HAS_THUMB
+config BR2_arm1136jf_s_r1
+	bool "arm1136jf_s rev1"
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm11mpcore
-	bool "mpcore"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a5
 	bool "cortex-A5"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_NEON
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a7
 	bool "cortex-A7"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_NEON
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a8
 	bool "cortex-A8"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_NEON
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a9
 	bool "cortex-A9"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_NEON
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a12
-	bool "cortex-A12"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a15
 	bool "cortex-A15"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_NEON
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a17
-	bool "cortex-A17"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_m3
-	bool "cortex-M3"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7M
-config BR2_cortex_m4
-	bool "cortex-M4"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7M
 config BR2_fa526
 	bool "fa526/626"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_pj4
 	bool "pj4"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_strongarm
 	bool "strongarm sa110/sa1100"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_xscale
 	bool "xscale"
-	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_iwmmxt
 	bool "iwmmxt"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 endchoice
 
-config BR2_ARM_ENABLE_NEON
-	bool "Enable NEON SIMD extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_NEON
-	select BR2_ARM_CPU_HAS_NEON
-	help
-	  For some CPU cores, the NEON SIMD extension is optional.
-	  Select this option if you are certain your particular
-	  implementation has NEON support and you want to use it.
-
-config BR2_ARM_ENABLE_VFP
-	bool "Enable VFP extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
-	select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	help
-	  For some CPU cores, the VFP extension is optional. Select
-	  this option if you are certain your particular
-	  implementation has VFP support and you want to use it.
+config BR2_arm1136jf_s
+	bool
+	default BR2_arm1136jf_s_r0 || BR2_arm1136jf_s_r1
 
 choice
 	prompt "Target ABI"
 	depends on BR2_arm || BR2_armeb
-	default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 	default BR2_ARM_EABI
 	help
 	  Application Binary Interface to use. The Application Binary
@@ -264,7 +157,7 @@ config BR2_ARM_EABI
 
 config BR2_ARM_EABIHF
 	bool "EABIhf"
-	depends on BR2_ARM_CPU_HAS_VFPV2
+	depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
 	help
 	  The EABIhf is an extension of EABI which supports the 'hard'
 	  floating point model. This model uses the floating point
@@ -282,6 +175,15 @@ config BR2_ARM_EABIHF
 
 endchoice
 
+config BR2_ARM_ENABLE_NEON
+	bool "Enable NEON SIMD extension support"
+	depends on BR2_ARM_CPU_MAYBE_HAS_NEON
+	select BR2_ARM_CPU_HAS_NEON
+	help
+	  For some CPU cores, the NEON SIMD extension is optional.
+	  Select this option if you are certain your particular
+	  implementation has NEON support and you want to use it.
+
 choice
 	prompt "Floating point strategy"
 	depends on BR2_ARM_EABI || BR2_ARM_EABIHF
@@ -302,7 +204,7 @@ config BR2_ARM_SOFT_FLOAT
 
 config BR2_ARM_FPU_VFPV2
 	bool "VFPv2"
-	depends on BR2_ARM_CPU_HAS_VFPV2
+	depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	help
 	  This option allows to use the VFPv2 floating point unit, as
 	  available in some ARMv5 processors (ARM926EJ-S) and some
@@ -315,7 +217,7 @@ config BR2_ARM_FPU_VFPV2
 
 config BR2_ARM_FPU_VFPV3
 	bool "VFPv3"
-	depends on BR2_ARM_CPU_HAS_VFPV3
+	depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	help
 	  This option allows to use the VFPv3 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{8, 9}). This
@@ -331,7 +233,7 @@ config BR2_ARM_FPU_VFPV3
 
 config BR2_ARM_FPU_VFPV3D16
 	bool "VFPv3-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV3
+	depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	help
 	  This option allows to use the VFPv3 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{8, 9}). This
@@ -346,7 +248,7 @@ config BR2_ARM_FPU_VFPV3D16
 
 config BR2_ARM_FPU_VFPV4
 	bool "VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	help
 	  This option allows to use the VFPv4 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
@@ -361,7 +263,7 @@ config BR2_ARM_FPU_VFPV4
 
 config BR2_ARM_FPU_VFPV4D16
 	bool "VFPv4-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	help
 	  This option allows to use the VFPv4 floating point unit, as
 	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
@@ -386,7 +288,7 @@ config BR2_ARM_FPU_NEON
 
 config BR2_ARM_FPU_NEON_VFPV4
 	bool "NEON/VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
+	depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	depends on BR2_ARM_CPU_HAS_NEON
 	help
 	  This option allows to use both the VFPv4 and the NEON SIMD
@@ -399,10 +301,10 @@ endchoice
 
 choice
 	prompt "ARM instruction set"
+	depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
 
-config BR2_ARM_INSTRUCTIONS_ARM
+config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
 	bool "ARM"
-	depends on BR2_ARM_CPU_HAS_ARM
 	help
 	  This option instructs the compiler to generate regular ARM
 	  instructions, that are all 32 bits wide.
@@ -410,18 +312,12 @@ config BR2_ARM_INSTRUCTIONS_ARM
 config BR2_ARM_INSTRUCTIONS_THUMB
 	bool "Thumb"
 	depends on BR2_ARM_CPU_HAS_THUMB
-	# Thumb-1 and VFP are not compatible
-	depends on BR2_ARM_SOFT_FLOAT
 	help
 	  This option instructions the compiler to generate Thumb
 	  instructions, which allows to mix 16 bits instructions and
 	  32 bits instructions. This generally provides a much smaller
 	  compiled binary size.
 
-comment "Thumb1 is not compatible with VFP"
-	depends on BR2_ARM_CPU_HAS_THUMB
-	depends on !BR2_ARM_SOFT_FLOAT
-
 config BR2_ARM_INSTRUCTIONS_THUMB2
 	bool "Thumb2"
 	depends on BR2_ARM_CPU_HAS_THUMB2
@@ -433,6 +329,10 @@ config BR2_ARM_INSTRUCTIONS_THUMB2
 
 endchoice
 
+config BR2_ARM_INSTRUCTIONS_ARM
+	def_bool y
+	depends on !(BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2)
+
 config BR2_ARCH
 	default "arm"	if BR2_arm
 	default "armeb"	if BR2_armeb
@@ -441,7 +341,11 @@ config BR2_ENDIAN
 	default "LITTLE" if BR2_arm
 	default "BIG"	 if BR2_armeb
 
-config BR2_GCC_TARGET_CPU
+config BR2_GCC_TARGET_TUNE
+	default "arm7tdmi"	if BR2_arm7tdmi
+	default "arm7tdmi"	if BR2_arm720t
+	default "arm7tdmi"	if BR2_arm740t
+	default "arm920"	if BR2_arm920
 	default "arm920t"	if BR2_arm920t
 	default "arm922t"	if BR2_arm922t
 	default "arm926ej-s"	if BR2_arm926t
@@ -449,23 +353,39 @@ config BR2_GCC_TARGET_CPU
 	default "arm1136jf-s"	if BR2_arm1136jf_s
 	default "arm1176jz-s"	if BR2_arm1176jz_s
 	default "arm1176jzf-s"	if BR2_arm1176jzf_s
-	default "mpcore"	if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
-	default "mpcorenovfp"	if BR2_arm11mpcore
 	default "cortex-a5"	if BR2_cortex_a5
 	default "cortex-a7"	if BR2_cortex_a7
 	default "cortex-a8"	if BR2_cortex_a8
 	default "cortex-a9"	if BR2_cortex_a9
-	default "cortex-a12"	if BR2_cortex_a12
 	default "cortex-a15"	if BR2_cortex_a15
-	default "cortex-a17"	if BR2_cortex_a17
-	default "cortex-m3"	if BR2_cortex_m3
-	default "cortex-m4"	if BR2_cortex_m4
 	default "fa526"		if BR2_fa526
 	default "marvell-pj4"	if BR2_pj4
 	default "strongarm"	if BR2_strongarm
 	default "xscale"	if BR2_xscale
 	default "iwmmxt"	if BR2_iwmmxt
 
+config BR2_GCC_TARGET_ARCH
+	default "armv4t"	if BR2_arm7tdmi
+	default "armv4t"	if BR2_arm720t
+	default "armv4t"	if BR2_arm920t
+	default "armv4t"	if BR2_arm922t
+	default "armv5te"	if BR2_arm926t
+	default "armv5t"	if BR2_arm10t
+	default "armv6j"	if BR2_arm1136jf_s_r0
+	default "armv6k"	if BR2_arm1136jf_s_r1
+	default "armv6zk"	if BR2_arm1176jz_s
+	default "armv6zk"	if BR2_arm1176jzf_s
+	default "armv7-a"	if BR2_cortex_a5
+	default "armv7-a"	if BR2_cortex_a7
+	default "armv7-a"	if BR2_cortex_a8
+	default "armv7-a"	if BR2_cortex_a9
+	default "armv7-a"	if BR2_cortex_a15
+	default "armv4"		if BR2_fa526
+	default "armv7-a"	if BR2_pj4
+	default "armv4"		if BR2_strongarm
+	default "armv5te"	if BR2_xscale
+	default "iwmmxt"	if BR2_iwmmxt
+
 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"
 

arch/Config.in.avr32

@@ -0,0 +1,5 @@
+config BR2_ARCH
+	default "avr32"
+
+config BR2_ENDIAN
+	default "BIG"

arch/Config.in.bfin

@@ -1,7 +1,7 @@
 choice
 	prompt "Target CPU"
 	depends on BR2_bfin
-	default BR2_bf532
+	default BR2_bf609
 	help
 	  Specify target CPU
 config BR2_bf606

arch/Config.in.m68k

@@ -4,34 +4,18 @@ config BR2_ARCH
 config BR2_ENDIAN
 	default "BIG"
 
-# symbols used to distinguish between m68k and coldfire
-# for gcc multilib
-config BR2_m68k_m68k
-	bool
-
-config BR2_m68k_cf
-	bool
-
-# coldfire variants will be added later
-choice
-	prompt "Target CPU"
-	depends on BR2_m68k
-	default BR2_m68k_68040
-	help
-	  Specific CPU variant to use
-
-config BR2_m68k_68040
-	bool "68040"
-	select BR2_m68k_m68k
-	select BR2_ARCH_HAS_MMU_MANDATORY
-
-config BR2_m68k_cf5208
-	bool "5208"
-	select BR2_m68k_cf
-	select BR2_SOFT_FLOAT
-
-endchoice
-
-config BR2_GCC_TARGET_CPU
+config BR2_GCC_TARGET_TUNE
+	default "68000"		if BR2_m68k_68000
+	default "68010"		if BR2_m68k_68010
+	default "68020"		if BR2_m68k_68020
+	default "68030"		if BR2_m68k_68030
 	default "68040"		if BR2_m68k_68040
-	default "5208"		if BR2_m68k_cf5208
+	default "68060"		if BR2_m68k_68060
+
+config BR2_GCC_TARGET_ARCH
+	default "68000"		if BR2_m68k_68000
+	default "68010"		if BR2_m68k_68010
+	default "68020"		if BR2_m68k_68020
+	default "68030"		if BR2_m68k_68030
+	default "68040"		if BR2_m68k_68040
+	default "68060"		if BR2_m68k_68060

arch/Config.in.microblaze

@@ -1,6 +1,5 @@
 config BR2_ARCH
-	default "microblazeel"  if BR2_microblazeel
-	default "microblaze"    if BR2_microblazebe
+	default "microblaze"
 
 config BR2_ENDIAN
 	default "LITTLE" if BR2_microblazeel

arch/Config.in.mips

@@ -1,116 +1,52 @@
-# mips default CPU ISAs
-config BR2_MIPS_CPU_MIPS32
-	bool
-config BR2_MIPS_CPU_MIPS32R2
-	bool
-config BR2_MIPS_CPU_MIPS32R5
-	bool
-config BR2_MIPS_CPU_MIPS32R6
-	bool
-config BR2_MIPS_CPU_MIPS64
-	bool
-config BR2_MIPS_CPU_MIPS64R2
-	bool
-config BR2_MIPS_CPU_MIPS64R5
-	bool
-config BR2_MIPS_CPU_MIPS64R6
-	bool
-
 choice
 	prompt "Target Architecture Variant"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
-	default BR2_mips_32 if BR2_mips || BR2_mipsel
+	default BR2_mips_3 if BR2_mips
+	default BR2_mips_1 if BR2_mipsel
 	default BR2_mips_64 if BR2_mips64 || BR2_mips64el
 	help
 	  Specific CPU variant to use
 
-	  64bit cabable: 64, 64r2, 64r5, 64r6
-	  non-64bit capable: 32, 32r2, 32r5, 32r6
+	  64bit cabable: 3, 4, 64, 64r2
+	  non-64bit capable: 1, 2, 32, 32r2
 
+config BR2_mips_1
+	bool "mips I (generic)"
+	depends on !BR2_ARCH_IS_64
+config BR2_mips_2
+	bool "mips II"
+	depends on !BR2_ARCH_IS_64
+config BR2_mips_3
+	bool "mips III"
+config BR2_mips_4
+	bool "mips IV"
 config BR2_mips_32
-	bool "Generic MIPS32"
+	bool "mips 32"
 	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32
 config BR2_mips_32r2
-	bool "Generic MIPS32R2"
+	bool "mips 32r2"
 	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_32r5
-	bool "Generic MIPS32R5"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-config BR2_mips_32r6
-	bool "Generic MIPS32R6"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R6
-config BR2_mips_interaptiv
-	bool "interAptiv"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5150
-	bool "M5150"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-config BR2_mips_m6250
-	bool "M6250"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R6
-config BR2_mips_p5600
-	bool "P5600"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
-config BR2_mips_xburst
-	bool "XBurst"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R2
-	help
-	  The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
-	  bug in the FPU that can generate incorrect results in
-	  certain cases. The problem shows up when you have several
-	  fused madd instructions in sequence with dependant
-	  operands. This requires the -mno-fused-madd compiler option
-	  to be used in order to prevent emitting these instructions.
-
-	  See http://www.ingenic.com/en/?xburst.html
 config BR2_mips_64
-	bool "Generic MIPS64"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64
+	bool "mips 64"
 config BR2_mips_64r2
-	bool "Generic MIPS64R2"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R2
-config BR2_mips_64r5
-	bool "Generic MIPS64R5"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R5
-config BR2_mips_64r6
-	bool "Generic MIPS64R6"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
-config BR2_mips_i6400
-	bool "I6400"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
-config BR2_mips_p6600
-	bool "P6600"
-	depends on BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS64R6
+	bool "mips 64r2"
 endchoice
 
 
 choice
 	prompt "Target ABI"
-	depends on BR2_mips64 || BR2_mips64el
-	default BR2_MIPS_NABI32
+	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
+	default BR2_MIPS_OABI32 if !BR2_ARCH_IS_64
+	default BR2_MIPS_NABI32 if BR2_ARCH_IS_64
 
 	help
 	  Application Binary Interface to use
 
+config BR2_MIPS_OABI32
+	bool "o32"
 config BR2_MIPS_NABI32
 	bool "n32"
 	depends on BR2_ARCH_IS_64
-	select BR2_KERNEL_64_USERLAND_32
 config BR2_MIPS_NABI64
 	bool "n64"
 	depends on BR2_ARCH_IS_64
@@ -136,26 +72,15 @@ config BR2_ENDIAN
 	default "LITTLE"	if BR2_mipsel || BR2_mips64el
 	default "BIG" 	    	if BR2_mips || BR2_mips64
 
-config BR2_GCC_TARGET_ARCH
+config BR2_GCC_TARGET_TUNE
+	default "mips1"		if BR2_mips_1
+	default "mips2"		if BR2_mips_2
+	default "mips3"		if BR2_mips_3
+	default "mips4"		if BR2_mips_4
 	default "mips32"	if BR2_mips_32
 	default "mips32r2"	if BR2_mips_32r2
-	default "mips32r5"	if BR2_mips_32r5
-	default "mips32r6"	if BR2_mips_32r6
-	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5101"		if BR2_mips_m5150
-	default "m6201"		if BR2_mips_m6250
-	default "p5600"		if BR2_mips_p5600
-	default "mips32r2"	if BR2_mips_xburst
 	default "mips64"	if BR2_mips_64
 	default "mips64r2"	if BR2_mips_64r2
-	default "mips64r5"	if BR2_mips_64r5
-	default "mips64r6"	if BR2_mips_64r6
-	default "i6400"		if BR2_mips_i6400
-	default "p6600"		if BR2_mips_p6600
-
-config BR2_MIPS_OABI32
-	bool
-	default y		if BR2_mips || BR2_mipsel
 
 config BR2_GCC_TARGET_ABI
 	default "32"		if BR2_MIPS_OABI32

arch/Config.in.nios2

@@ -1,5 +0,0 @@
-config BR2_ARCH
-	default "nios2"
-
-config BR2_ENDIAN
-	default "LITTLE"

arch/Config.in.powerpc

@@ -1,11 +1,6 @@
-config BR2_POWERPC_CPU_HAS_ALTIVEC
-	bool
-
-config BR2_POWERPC_CPU_HAS_SPE
-	bool
-
 choice
 	prompt "Target Architecture Variant"
+	depends on BR2_powerpc
 	default BR2_generic_powerpc
 	help
 	  Specific CPU variant to use
@@ -13,137 +8,84 @@ config BR2_generic_powerpc
 	bool "generic"
 config BR2_powerpc_401
 	bool "401"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_403
 	bool "403"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405
 	bool "405"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405fp
 	bool "405 with FPU"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440
 	bool "440"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440fp
 	bool "440 with FPU"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464
 	bool "464"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464fp
 	bool "464 with FPU"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476
 	bool "476"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476fp
 	bool "476 with FPU"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_505
 	bool "505"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_601
 	bool "601"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_602
 	bool "602"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603
 	bool "603"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603e
 	bool "603e"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604
 	bool "604"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604e
 	bool "604e"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_620
 	bool "620"
 config BR2_powerpc_630
 	bool "630"
 config BR2_powerpc_740
 	bool "740"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_7400
 	bool "7400"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_7450
 	bool "7450"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_750
 	bool "750"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_821
 	bool "821"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_823
 	bool "823"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_860
 	bool "860"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_970
 	bool "970"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_8540
 	bool "8540 / e500v1"
-	depends on !BR2_ARCH_IS_64
-	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_8548
 	bool "8548 / e500v2"
-	depends on !BR2_ARCH_IS_64
-	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_e300c2
 	bool "e300c2"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e300c3
 	bool "e300c3"
-	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e500mc
 	bool "e500mc"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_e5500
-	bool "e5500"
-	depends on !BR2_powerpc64le
-config BR2_powerpc_e6500
-	bool "e6500"
-	depends on !BR2_powerpc64le
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-config BR2_powerpc_power4
-	bool "power4"
-config BR2_powerpc_power5
-	bool "power5"
-config BR2_powerpc_power6
-	bool "power6"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-config BR2_powerpc_power7
-	bool "power7"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-config BR2_powerpc_power8
-	bool "power8"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
 endchoice
 
 choice
 	prompt "Target ABI"
-	default BR2_powerpc_SPE if BR2_POWERPC_CPU_HAS_SPE
+	depends on BR2_powerpc
+	default BR2_powerpc_SPE if BR2_powerpc_8540 || BR2_powerpc_8548
 	default BR2_powerpc_CLASSIC
 	help
 	  Application Binary Interface to use
 
 config BR2_powerpc_CLASSIC
 	bool "Classic"
-	depends on !BR2_POWERPC_CPU_HAS_SPE
+	depends on !(BR2_powerpc_8540 || BR2_powerpc_8548)
 config BR2_powerpc_SPE
 	bool "SPE"
-	depends on BR2_POWERPC_CPU_HAS_SPE
+	depends on BR2_powerpc_8540 || BR2_powerpc_8548
 endchoice
 
 config BR2_POWERPC_SOFT_FLOAT
@@ -157,14 +99,11 @@ config BR2_POWERPC_SOFT_FLOAT
 
 config BR2_ARCH
 	default "powerpc"	if BR2_powerpc
-	default "powerpc64"	if BR2_powerpc64
-	default "powerpc64le"	if BR2_powerpc64le
 
 config BR2_ENDIAN
-	default "BIG"    if BR2_powerpc || BR2_powerpc64
-	default "LITTLE" if BR2_powerpc64le
+	default "BIG"
 
-config BR2_GCC_TARGET_CPU
+config BR2_GCC_TARGET_TUNE
 	default "401"		if BR2_powerpc_401
 	default "403"		if BR2_powerpc_403
 	default "405"		if BR2_powerpc_405
@@ -197,13 +136,6 @@ config BR2_GCC_TARGET_CPU
 	default "e300c2"	if BR2_powerpc_e300c2
 	default "e300c3"	if BR2_powerpc_e300c3
 	default "e500mc"	if BR2_powerpc_e500mc
-	default "e5500"		if BR2_powerpc_e5500
-	default "e6500"		if BR2_powerpc_e6500
-	default "power4"	if BR2_powerpc_power4
-	default "power5"	if BR2_powerpc_power5
-	default "power6"	if BR2_powerpc_power6
-	default "power7"	if BR2_powerpc_power7
-	default "power8"	if BR2_powerpc_power8
 
 config BR2_GCC_TARGET_ABI
 	default "altivec"		if BR2_PPC_ABI_altivec

arch/Config.in.sh

@@ -5,8 +5,14 @@ choice
 	help
 	  Specific CPU variant to use
 
+config BR2_sh2
+	bool "sh2 (SH2 big endian)"
 config BR2_sh2a
 	bool "sh2a (SH2A big endian)"
+config BR2_sh3
+	bool "sh3 (SH3 little endian)"
+config BR2_sh3eb
+	bool "sh3eb (SH3 big endian)"
 config BR2_sh4
 	bool "sh4 (SH4 little endian)"
 config BR2_sh4eb
@@ -18,12 +24,18 @@ config BR2_sh4aeb
 endchoice
 
 config BR2_ARCH
+	default "sh2"		if BR2_sh2
 	default "sh2a"		if BR2_sh2a
+	default "sh3"		if BR2_sh3
+	default "sh3eb"		if BR2_sh3eb
 	default "sh4"		if BR2_sh4
 	default "sh4eb"		if BR2_sh4eb
 	default "sh4a"		if BR2_sh4a
 	default "sh4aeb"	if BR2_sh4aeb
+	default "sh64"		if BR2_sh64
 
 config BR2_ENDIAN
-	default "LITTLE"	if BR2_sh4 || BR2_sh4a
-	default "BIG"		if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb
+	default "LITTLE"	if BR2_sh3 || BR2_sh4 || BR2_sh4a || \
+				   BR2_x86_64 || BR2_sh64
+	default "BIG"		if BR2_sh2 || BR2_sh2a || BR2_sh3eb || \
+				   BR2_sh4eb || BR2_sh4aeb

arch/Config.in.sparc

@@ -1,30 +1,39 @@
 choice
 	prompt "Target Architecture Variant"
-	depends on BR2_sparc || BR2_sparc64
-	default BR2_sparc_v8 if BR2_sparc
-	default BR2_sparc_v9 if BR2_sparc64
+	depends on BR2_sparc
+	default BR2_sparc_v8
 	help
 	  Specific CPU variant to use
 
 config BR2_sparc_v8
 	bool "v8"
-	depends on BR2_sparc
-config BR2_sparc_leon3
-	bool "leon3"
-	depends on BR2_sparc
-config BR2_sparc_v9
-	bool "v9"
-	depends on BR2_sparc64
+config BR2_sparc_sparchfleon
+	bool "hfleon"
+config BR2_sparc_sparchfleonv8
+	bool "hfleonv8"
+config BR2_sparc_sparcsfleon
+	bool "sfleon"
+config BR2_sparc_sparcsfleonv8
+	bool "sfleonv8"
 endchoice
 
 config BR2_ARCH
 	default "sparc"	if BR2_sparc
-	default "sparc64" if BR2_sparc64
 
 config BR2_ENDIAN
 	default "BIG"
 
-config BR2_GCC_TARGET_CPU
-	default "leon3"		if BR2_sparc_leon3
+config BR2_GCC_TARGET_TUNE
 	default "v8"		if BR2_sparc_v8
-	default "ultrasparc"	if BR2_sparc_v9
+	default "v9"		if BR2_sparc_v9
+	default "v9"		if BR2_sparc_v9a
+	default "v9"		if BR2_sparc_v9b
+	default "ultrasparc"	if BR2_sparc_ultrasparc
+	default "ultrasparc3"	if BR2_sparc_ultrasparc3
+	default "niagara"	if BR2_sparc_niagara
+
+config BR2_GCC_TARGET_CPU
+	default "sparchfleon"	if BR2_sparc_sparchfleon
+	default "sparchfleonv8"	if BR2_sparc_sparchfleonv8
+	default "sparcsfleon"	if BR2_sparc_sparcsfleon
+	default "sparcsfleonv8"	if BR2_sparc_sparcsfleonv8

arch/Config.in.x86

@@ -9,39 +9,26 @@ config BR2_X86_CPU_HAS_SSE3
 	bool
 config BR2_X86_CPU_HAS_SSSE3
 	bool
-config BR2_X86_CPU_HAS_SSE4
-	bool
-config BR2_X86_CPU_HAS_SSE42
-	bool
-config BR2_X86_CPU_HAS_AVX
-	bool
-config BR2_X86_CPU_HAS_AVX2
-	bool
 
 choice
 	prompt "Target Architecture Variant"
 	depends on BR2_i386 || BR2_x86_64
 	default BR2_x86_i586 if BR2_i386
+	default BR2_x86_generic if BR2_x86_64
 	help
 	  Specific CPU variant to use
 
+config BR2_x86_generic
+	bool "generic"
+config BR2_x86_i386
+	bool "i386"
+	depends on !BR2_x86_64
 config BR2_x86_i486
 	bool "i486"
 	depends on !BR2_x86_64
 config BR2_x86_i586
 	bool "i586"
 	depends on !BR2_x86_64
-config BR2_x86_x1000
-	bool "x1000"
-	depends on !BR2_x86_64
-	help
-	  The Intel X1000 is a Pentium class microprocessor in the
-	  Quark (sub-Atom) Product Line. The X1000 has a bug on the
-	  lock prefix requiring that prefix must be stripped at build
-	  time.
-
-	  See https://en.wikipedia.org/wiki/Intel_Quark
-
 config BR2_x86_i686
 	bool "i686"
 	depends on !BR2_x86_64
@@ -92,36 +79,6 @@ config BR2_x86_core2
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
 	select BR2_X86_CPU_HAS_SSSE3
-config BR2_x86_corei7
-	bool "corei7"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-config BR2_x86_corei7_avx
-	bool "corei7-avx"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-config BR2_x86_core_avx2
-	bool "core-avx2"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
 config BR2_x86_atom
 	bool "atom"
 	select BR2_X86_CPU_HAS_MMX
@@ -163,24 +120,6 @@ config BR2_x86_barcelona
 	select BR2_X86_CPU_HAS_SSE
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_jaguar
-	bool "jaguar"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-config BR2_x86_steamroller
-	bool "steamroller"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
 config BR2_x86_geode
 	bool "geode"
 	# Don't include MMX support because there several variant of geode
@@ -207,9 +146,9 @@ config BR2_x86_winchip2
 endchoice
 
 config BR2_ARCH
+	default "i386"		if BR2_x86_i386
 	default "i486"		if BR2_x86_i486
 	default "i586"		if BR2_x86_i586
-	default "i586"		if BR2_x86_x1000
 	default "i586"		if BR2_x86_pentium_mmx
 	default "i586"		if BR2_x86_geode
 	default "i586"		if BR2_x86_c3
@@ -225,28 +164,53 @@ config BR2_ARCH
 	default "i686"		if BR2_x86_prescott
 	default "i686"		if BR2_x86_nocona && BR2_i386
 	default "i686"		if BR2_x86_core2 && BR2_i386
-	default "i686"		if BR2_x86_corei7 && BR2_i386
-	default "i686"		if BR2_x86_corei7_avx && BR2_i386
-	default "i686"		if BR2_x86_corei7_avx2 && BR2_i386
 	default "i686"		if BR2_x86_atom && BR2_i386
 	default "i686"		if BR2_x86_opteron && BR2_i386
 	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
 	default "i686"		if BR2_x86_barcelona && BR2_i386
-	default "i686"		if BR2_x86_jaguar && BR2_i386
-	default "i686"		if BR2_x86_steamroller && BR2_i386
 	default "i686"		if BR2_x86_k6
 	default "i686"		if BR2_x86_k6_2
 	default "i686"		if BR2_x86_athlon
 	default "i686"		if BR2_x86_athlon_4
 	default "x86_64"	if BR2_x86_64
+	default "i386"		if BR2_x86_generic
 
 config BR2_ENDIAN
 	default "LITTLE"
 
-config BR2_GCC_TARGET_ARCH
+config BR2_GCC_TARGET_TUNE
+	default "i386"		if BR2_x86_i386
+	default "i486"		if BR2_x86_i486
+	default "i586"		if BR2_x86_i586
+	default "pentium-mmx"	if BR2_x86_pentium_mmx
+	default "i686"		if BR2_x86_i686
+	default "pentiumpro"	if BR2_x86_pentiumpro
+	default "pentium-m"	if BR2_x86_pentium_m
+	default "pentium2"	if BR2_x86_pentium2
+	default "pentium3"	if BR2_x86_pentium3
+	default "pentium4"	if BR2_x86_pentium4
+	default "prescott"	if BR2_x86_prescott
+	default "nocona"	if BR2_x86_nocona
+	default "core2"		if BR2_x86_core2
+	default "atom"		if BR2_x86_atom
+	default "k8"		if BR2_x86_opteron
+	default "k8-sse3"	if BR2_x86_opteron_sse3
+	default "barcelona"	if BR2_x86_barcelona
+	default "k6"		if BR2_x86_k6
+	default "k6-2"		if BR2_x86_k6_2
+	default "athlon"	if BR2_x86_athlon
+	default "athlon-4"	if BR2_x86_athlon_4
+	default "winchip-c6"	if BR2_x86_winchip_c6
+	default "winchip2"	if BR2_x86_winchip2
+	default "c3"		if BR2_x86_c3
+	default "c3-2"		if BR2_x86_c32
+	default "geode"		if BR2_x86_geode
+	default "generic"	if BR2_x86_generic
+
+config BR2_GCC_TARGET_ARCH
+	default "i386"		if BR2_x86_i386
 	default "i486"		if BR2_x86_i486
 	default "i586"		if BR2_x86_i586
-	default "i586"		if BR2_x86_x1000
 	default "pentium-mmx"	if BR2_x86_pentium_mmx
 	default "i686"		if BR2_x86_i686
 	default "pentiumpro"	if BR2_x86_pentiumpro
@@ -257,15 +221,10 @@ config BR2_GCC_TARGET_ARCH
 	default "prescott"	if BR2_x86_prescott
 	default "nocona"	if BR2_x86_nocona
 	default "core2"		if BR2_x86_core2
-	default "corei7"	if BR2_x86_corei7
-	default "corei7-avx"	if BR2_x86_corei7_avx
-	default "core-avx2"	if BR2_x86_core_avx2
 	default "atom"		if BR2_x86_atom
 	default "k8"		if BR2_x86_opteron
 	default "k8-sse3"	if BR2_x86_opteron_sse3
 	default "barcelona"	if BR2_x86_barcelona
-	default "btver2"	if BR2_x86_jaguar
-	default "bdver3"	if BR2_x86_steamroller
 	default "k6"		if BR2_x86_k6
 	default "k6-2"		if BR2_x86_k6_2
 	default "athlon"	if BR2_x86_athlon

arch/Config.in.xtensa

@@ -3,10 +3,8 @@ choice
 	depends on BR2_xtensa
 	default BR2_xtensa_fsf
 config BR2_XTENSA_CUSTOM
-	select BR2_ARCH_HAS_MMU_OPTIONAL
 	bool "Custom Xtensa processor configuration"
 config BR2_xtensa_fsf
-	select BR2_ARCH_HAS_MMU_MANDATORY
 	bool "fsf - Default configuration"
 endchoice
 
@@ -35,22 +33,5 @@ config BR2_XTENSA_OVERLAY_DIR
 	  configurations. They are provided by the processor vendor or
 	  directly from Tensilica.
 
-choice
-	prompt "Target Architecture Endianness"
-	depends on BR2_XTENSA_CUSTOM
-	default BR2_XTENSA_LITTLE_ENDIAN
-
-config BR2_XTENSA_LITTLE_ENDIAN
-	bool "Little endian"
-
-config BR2_XTENSA_BIG_ENDIAN
-	bool "Big endian"
-
-endchoice
-
-config BR2_ENDIAN
-	default "LITTLE"	if BR2_XTENSA_LITTLE_ENDIAN
-	default "BIG"		if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
-
 config BR2_ARCH
 	default "xtensa"	if BR2_xtensa

board/acmesystems/aria-g25/genimage.cfg

@@ -1,35 +0,0 @@
-# Minimal SD card image for the Acmesystems Aria G25
-
-image boot.vfat {
-	vfat {
-		file zImage {
-			image = "zImage"
-		}
-
-		file at91-ariag25.dtb {
-			image = "at91-ariag25.dtb"
-		}
-
-		file boot.bin {
-			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.8.6.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/acmesystems/aria-g25/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage  \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/acmesystems/aria-g25/readme.txt

@@ -1,44 +0,0 @@
-Acme Systems Aria G25
-
-Build instructions
-==================
-
-To build an image for the Aria G25 choose the configuration
-corresponding to the Aria variant.
-
-For 128MB RAM variant type:
-
-$ make acmesystems_aria_g25_128mb_defconfig
-
-else for 256MB RAM variant type:
-
-$ make acmesystems_aria_g25_256mb_defconfig
-
-To customize the configuration choosed type:
-
-$ make menuconfig
-
-When you are ready to start building Buildroot type:
-
-$ make
-
-How to write the microSD card
-=============================
-
-Once the build process is finished you will have an image called
-"sdcard.img" in the output/images/ directory.
-
-Write the bootable SD card image "sdcard.img" onto an SD card with
-"dd" command:
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Assuming your Aria G25 baseboard has a MicroSD socket, for example
-with the Terra baseboard, insert the microSD card into the baseboard
-slot and power it.
-
-To get the kernel log messages you can use a DPI cable
-(http://www.acmesystems.it/DPI)
-
-You can find additional informations, tutorials and a very
-comprehensive documentation on http://www.acmesystems.it/aria.

board/acmesystems/arietta-g25/genimage.cfg

@@ -1,35 +0,0 @@
-# Minimal SD card image for the Acmesystems Arietta G25
-
-image boot.vfat {
-	vfat {
-		file zImage {
-			image = "zImage"
-		}
-		
-		file acme-arietta.dtb {
-			image = "at91-ariettag25.dtb"
-		}
-		
-		file boot.bin {
-			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.8.6.bin"
-		} 
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/acmesystems/arietta-g25/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage  \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/acmesystems/arietta-g25/readme.txt

@@ -1,49 +0,0 @@
-Acme Systems Arietta G25
-
-Intro
-=====
-
-This default configuration will allow you to start experimenting with the
-buildroot environment for the Arietta G25. With the current configuration
-it will bring-up the board, and allow access through the serial console.
-
-You can find additional informations, tutorials and a very comprehensive
-documentation on http://www.acmesystems.it/arietta.
-
-Build instructions
-==================
-
-To build an image for the Arietta G25 choose the configuration
-corresponding to the Arietta variant.
-
-For 128MB RAM variant type:
-
-$ make acmesystems_arietta_g25_128mb_defconfig
-
-else for 256MB RAM variant type:
-
-$ make acmesystems_arietta_g25_256mb_defconfig
-
-To customize the configuration chosen type:
-
-$ make menuconfig
-
-When you are ready to start building Buildroot type:
-
-$ make
-
-How to write the microSD card
-=============================
-
-Once the build process is finished you will have an image called "sdcard.img"
-in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an SD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Insert the microSD card into the Arietta slot and power it.
-
-The image just built is fairly basic and the only output
-you will get is on serial console, please consider to use a DPI
-cable (http://www.acmesystems.it/DPI)

board/altera/post-image.sh

@@ -1,8 +0,0 @@
-#!/bin/sh
-# post-image.sh for SoCkit/SoCDK
-# 2014, "Roman Diouskine" <roman.diouskine@savoirfairelinux.com>
-# 2014, "Sebastien Bourdelin" <sebastien.bourdelin@savoirfairelinux.com>
-
-# create a DTB file copy with the name expected by the u-boot config
-# Name of the DTB is passed as the second argument to the script.
-cp -af $BINARIES_DIR/${2}.dtb  $BINARIES_DIR/socfpga.dtb

board/altera/readme.txt

@@ -1,165 +0,0 @@
-SoCkit, SoC Development Kit
-
-Intro
-=====
-
-This is the buildroot board support for the Arrow SoCkit Evaluation Board
-and the Altera Cyclone 5 Development Board.
-
-A good source of information for Arrow SoCkit:
-http://www.rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard
-
-More information about SoC DK:
-https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-cyclone-v-soc.html
-
-How it works
-============
-
-Boot process:
--------------
-
-In summary, the bootloader has multiple stages, an hardcoded boot routine is
-loaded from an on-chip ROM.
-
-  - That first stage is scanning the SD card's partition table to find
-    partition having the 0xA2 type.
-  - This partition is expected to contain a boot image on its first 60 Kb,
-    because u-boot is bigger, we must fill it with a preloader (u-boot-spl)
-    which will load the u-boot image.
-  - Then the u-boot image will load the Linux kernel.
-
-A good source of information for the boot process is:
-http://xillybus.com/tutorials/u-boot-image-altera-soc
-
-Note for the SPL:
-The SPL generated by the u-boot from Rocketboards doesn't seems to work,
-therefore we provide a patch for {uboot-PKG}/board/altera/socfpga_cyclone5/*
-based on the files generated with the Altera example design.
-
-For more information about this files please look at:
-http://www.rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization#Common_Source_Code
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-The altera_sockit_defconfig configuration is a minimal configuration with
-all that is required to bring the SoCkit:
-
-  $ make altera_sockit_defconfig
-
-and for the SoC Development Board:
-
-  $ make altera_sockdk_defconfig
-
-Build everything
-----------------
-
-Note: you will need to have access to the network, since Buildroot will
-download the packages' sources.
-
-  $ make
-
-Result of the build
--------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    ├── rootfs.ext2
-    ├── rootfs.ext3 -> rootfs.ext2
-    ├── rootfs.tar
-    ├── socfpga_cyclone5_sockit.dtb or socfpga_cyclone5_socdk.dtb
-    ├── socfpga.dtb
-    ├── u-boot.img
-    ├── u-boot-spl.bin
-    └── uImage
-
-
-Signing the Preloader
----------------------
-
-*** BEWARE ****
-The u-boot-spl.bin must be signed using the Altera's tool "mkpimage".
-This tool comes as a part of the Altera development environnment (SoC EDS).
-A fork of this tool have been done by Maxime Hadjinlian and can be found here:
-https://github.com/maximeh/mkpimage
-
-Remember that without signing the u-boot-spl.bin, the board will not boot !!!
-
-  $ mkpimage u-boot-spl.bin -o u-boot-spl-signed.bin
-
-Prepare your SDcard
-===================
-
-A good source of information for the partitioning process is:
-http://www.rocketboards.org/foswiki/view/Projects/SoCKitLinaroLinuxDesktop#Partition_the_SD_Card
-
-Create the SDcard partition table
-----------------------------------
-
-Determine the device associated to the SD card:
-
-  $ cat /proc/partitions
-
-let's assume it is /dev/mmcblk0:
-
-  $ sudo fdisk /dev/mmcblk0
-
-Delete all previous partitions with 'd' then create the new partition table,
-using these options, pressing enter after each one:
-
-  * n p 1 9000000 +20480K t 1 b
-  * n p 2 4096 +4496384K t 83
-  * n p 3 2048 +1024K t 3 a2
-
-Using the 'p' option, the SD card's partition must look like this:
-
-Device         Boot     Start       End  Blocks  Id System
-/dev/mmcblk0p1        9000000   9041919   20960   b W95 FAT32
-/dev/mmcblk0p2           4096   8996863 4496384  83 Linux
-/dev/mmcblk0p3           2048      4095    1024  a2 Unknown
-
-Then write the partition table using 'w' and exit.
-
-Make partition one a DOS partition:
-
-  $ sudo mkdosfs /dev/mmcblk0p1
-
-Install the binaries to the SDcard
-----------------------------------
-
-Remember your binaries are located in output/images/, go inside that directory:
-
-  $ cd output/images
-
-The partition with type a2 is the partition scan by the first bootloader stage
-in the SoCkit ROM to find the next bootloader stage so we must write the signed
-preloader and the u-boot binaries in that partition:
-
-  $ sudo dd if=u-boot-spl-signed.bin of=/dev/mmcblk0p3 bs=64k seek=0
-  $ sudo dd if=u-boot.img of=/dev/mmcblk0p3 bs=64k seek=4
-
-Copy the Linux kernel and its Device tree:
-
-  $ sudo mkdir /mnt/sdcard
-  $ sudo mount /dev/mmcblk0p1 /mnt/sdcard
-  $ sudo cp socfpga.dtb uImage /mnt/sdcard
-  $ sudo umount /mnt/sdcard
-
-Copy the rootfs:
-
-  $ sudo dd if=rootfs.ext2 of=/dev/mmcblk0p2 bs=64k
-  $ sudo sync
-
-It's Done!
-
-Finish
-======
-
-Eject your SDcard, insert it in your SoCkit, and power it up.
-
-if you want a serial console, you can plug a micro B USB cable on the USB-UART
-port, the serial port config to used is 57600/8-N-1.

board/altera/sockit/uboot-sockit-preloader-sample-design.patch

@@ -1,820 +0,0 @@
-From c70f2ebb350da20af1a0ed4b7960b8e5a1952713 Mon Sep 17 00:00:00 2001
-From: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
-Date: Thu, 20 Feb 2014 11:51:31 -0500
-Subject: [PATCH] board: add to sockit a working preloader design
-
----
- board/altera/socfpga_cyclone5/build.h              |   2 +-
- board/altera/socfpga_cyclone5/iocsr_config.c       | 314 ++++++++++-----------
- board/altera/socfpga_cyclone5/pinmux_config.c      |  32 +--
- board/altera/socfpga_cyclone5/pinmux_config.h      |   8 +-
- board/altera/socfpga_cyclone5/sdram/sdram_config.h |  14 +-
- .../altera/socfpga_cyclone5/sdram/sequencer_auto.h |  16 +-
- .../sdram/sequencer_auto_ac_init.c                 |  16 +-
- .../socfpga_cyclone5/sdram/sequencer_defines.h     |  34 +--
- 8 files changed, 218 insertions(+), 218 deletions(-)
-
-diff --git a/board/altera/socfpga_cyclone5/build.h b/board/altera/socfpga_cyclone5/build.h
-index e5d9c3c..a369015 100644
---- a/board/altera/socfpga_cyclone5/build.h
-+++ b/board/altera/socfpga_cyclone5/build.h
-@@ -29,7 +29,7 @@
-  * Handoff files must provide user option whether to
-  * enable watchdog during preloader execution phase
-  */
--#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(0)
-+#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(1)
- 
- /*
-  * Handoff files must provide user option whether to enable
-diff --git a/board/altera/socfpga_cyclone5/iocsr_config.c b/board/altera/socfpga_cyclone5/iocsr_config.c
-index fa663e1..90fc154 100644
---- a/board/altera/socfpga_cyclone5/iocsr_config.c
-+++ b/board/altera/socfpga_cyclone5/iocsr_config.c
-@@ -7,113 +7,113 @@ const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
- 	0xC0000000,
- 	0x0000003F,
- 	0x00008000,
--	0x00020080,
--	0x08020000,
--	0x08000000,
--	0x00018020,
-+	0x00060180,
-+	0x18060000,
-+	0x18000000,
-+	0x00018060,
- 	0x00000000,
- 	0x00004000,
--	0x00010040,
--	0x04010000,
--	0x04000000,
--	0x00000010,
--	0x00004010,
-+	0x000300C0,
-+	0x0C030000,
-+	0x0C000000,
-+	0x00000030,
-+	0x0000C030,
- 	0x00002000,
--	0x00020000,
--	0x02008000,
--	0x02000000,
--	0x00000008,
--	0x00002008,
-+	0x00018060,
-+	0x06018000,
-+	0x06000000,
-+	0x00000018,
-+	0x00006018,
- 	0x00001000,
- };
- 
- const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = {
--	0x000C0300,
--	0x10040000,
--	0x100000C0,
--	0x00000040,
--	0x00010040,
-+	0x00100000,
-+	0x300C0000,
-+	0x300000C0,
-+	0x000000C0,
-+	0x000300C0,
- 	0x00008000,
- 	0x00080000,
--	0x18060000,
--	0x18000000,
--	0x00000060,
--	0x00018060,
-+	0x20000000,
-+	0x00000000,
-+	0x00000080,
-+	0x00020000,
- 	0x00004000,
--	0x00010040,
-+	0x000300C0,
- 	0x10000000,
--	0x04000000,
--	0x00000010,
--	0x00004010,
-+	0x0C000000,
-+	0x00000030,
-+	0x0000C030,
- 	0x00002000,
--	0x06008020,
--	0x02008000,
-+	0x06018060,
-+	0x06018000,
- 	0x01FE0000,
- 	0xF8000000,
- 	0x00000007,
- 	0x00001000,
--	0x00004010,
--	0x01004000,
--	0x01000000,
--	0x00003004,
--	0x00001004,
-+	0x0000C030,
-+	0x0300C000,
-+	0x03000000,
-+	0x0000300C,
-+	0x0000300C,
- 	0x00000800,
- 	0x00000000,
- 	0x00000000,
--	0x00800000,
--	0x00000002,
-+	0x01800000,
-+	0x00000006,
- 	0x00002000,
- 	0x00000400,
- 	0x00000000,
--	0x00401000,
-+	0x00C03000,
- 	0x00000003,
- 	0x00000000,
- 	0x00000000,
- 	0x00000200,
--	0x00600802,
-+	0x00601806,
- 	0x00000000,
--	0x80200000,
--	0x80000600,
--	0x00000200,
-+	0x80600000,
-+	0x80000601,
-+	0x00000601,
- 	0x00000100,
--	0x00300401,
--	0xC0100400,
--	0x40100000,
--	0x40000300,
--	0x000C0100,
-+	0x00300C03,
-+	0xC0300C00,
-+	0xC0300000,
-+	0xC0000300,
-+	0x000C0300,
- 	0x00000080,
- };
- 
- const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = {
--	0x80040100,
-+	0x300C0300,
- 	0x00000000,
- 	0x0FF00000,
- 	0x00000000,
--	0x0C010040,
-+	0x0C0300C0,
- 	0x00008000,
--	0x18020080,
--	0x00000000,
--	0x08000000,
--	0x00040020,
--	0x06018060,
-+	0x18060180,
-+	0x18060000,
-+	0x18000000,
-+	0x00018060,
-+	0x00018060,
- 	0x00004000,
--	0x0C010040,
--	0x04010000,
-+	0x000300C0,
-+	0x0C030000,
- 	0x00000030,
- 	0x00000000,
--	0x03004010,
-+	0x0300C030,
- 	0x00002000,
--	0x06008020,
--	0x02008000,
--	0x02000018,
--	0x00006008,
--	0x01802008,
-+	0x00018060,
-+	0x06018000,
-+	0x06000000,
-+	0x00000018,
-+	0x00006018,
- 	0x00001000,
--	0x03004010,
--	0x01004000,
--	0x0100000C,
--	0x00003004,
--	0x00C01004,
-+	0x0000C030,
-+	0x00000000,
-+	0x03000000,
-+	0x0000000C,
-+	0x00C0300C,
- 	0x00000800,
- };
- 
-@@ -170,14 +170,14 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xA0000034,
- 	0x0D000001,
- 	0x6068030C,
--	0xC7034018,
--	0x0E381A01,
-+	0xCF034059,
-+	0x1E781A03,
- 	0x8030C0D0,
--	0x34018606,
--	0x01A01C70,
-+	0x34059606,
-+	0x01A03CF0,
- 	0x0C0D0000,
--	0x18606803,
--	0x01C70340,
-+	0x59606803,
-+	0x03CF0340,
- 	0xD000001A,
- 	0x068030C0,
- 	0x10040000,
-@@ -244,15 +244,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xA0000034,
- 	0x0D000001,
- 	0x6068030C,
--	0xC7034018,
--	0x0E381A01,
-+	0xCF034059,
-+	0x1E781A03,
- 	0x8030C0D0,
--	0x34018606,
-+	0x34059606,
- 	0x01A00000,
- 	0x0C0D0000,
--	0x18606803,
--	0x01C70340,
--	0xD00E381A,
-+	0x59606803,
-+	0x03CF0340,
-+	0xD01E781A,
- 	0x068030C0,
- 	0x10040000,
- 	0x00200000,
-@@ -273,7 +273,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -301,7 +301,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00010040,
-@@ -321,15 +321,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
-+	0xF5DE791E,
-+	0x0356D348,
- 	0x821A0000,
- 	0x0000D000,
- 	0x01860680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -347,7 +347,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -375,7 +375,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00015000,
-@@ -395,15 +395,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
--	0x821A00C3,
-+	0xF5DE791E,
-+	0x0356D348,
-+	0x821A02CB,
- 	0x0000D000,
- 	0x00000680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -421,7 +421,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -449,7 +449,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00010040,
-@@ -469,15 +469,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
-+	0xF5DE791E,
-+	0x0356D348,
- 	0x821A0000,
- 	0x0000D000,
- 	0x00000680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -495,7 +495,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -523,7 +523,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00010040,
-@@ -543,15 +543,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
-+	0xF5DE791E,
-+	0x0356D348,
- 	0x821A0000,
- 	0x0000D000,
- 	0x00000680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -567,80 +567,80 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x04000002,
- 	0x00820000,
- 	0x00489000,
--	0x001A1A1A,
--	0x085506A0,
--	0x0000E1D4,
--	0x045506A0,
--	0x0000E1D4,
--	0x085506A0,
--	0x8000E1D4,
-+	0x801A1A1A,
-+	0x00000200,
-+	0x80000004,
-+	0x00000200,
-+	0x80000004,
-+	0x00000200,
-+	0x80000004,
- 	0x00000200,
- 	0x00000004,
--	0x04000000,
--	0x00000009,
--	0x00002410,
-+	0x00040000,
-+	0x10000000,
-+	0x00000000,
- 	0x00000040,
--	0x41000000,
--	0x00002082,
--	0x00000350,
--	0x000000DA,
-+	0x00010000,
-+	0x40002000,
-+	0x00000100,
-+	0x40000002,
-+	0x00000100,
-+	0x40000002,
- 	0x00000100,
- 	0x40000002,
- 	0x00000100,
- 	0x00000002,
--	0x042A8350,
--	0x000070EA,
--	0x86000000,
--	0x08000004,
-+	0x00020000,
-+	0x08000000,
- 	0x00000000,
--	0x00482000,
--	0x21800000,
--	0x00101061,
--	0x021541A8,
--	0x00003875,
--	0x011541A8,
--	0x00003875,
--	0x021541A8,
--	0x20003875,
-+	0x00000020,
-+	0x00008000,
-+	0x20001000,
-+	0x00000080,
-+	0x20000001,
-+	0x00000080,
-+	0x20000001,
-+	0x00000080,
-+	0x20000001,
- 	0x00000080,
- 	0x00000001,
--	0x41000000,
--	0x00000002,
--	0x00FF0904,
-+	0x00010000,
-+	0x04000000,
-+	0x00FF0000,
- 	0x00000000,
--	0x90400000,
--	0x00000820,
-+	0x00004000,
-+	0x00000800,
- 	0x80000001,
--	0x38D612AF,
--	0x86F8E38E,
--	0x0A0A78B4,
--	0x000D020A,
-+	0x00041419,
-+	0x40000000,
-+	0x04000816,
-+	0x000D0000,
- 	0x00006800,
--	0x028A4320,
--	0xEBB4D23D,
--	0x8F65E791,
--	0xA47A0F3C,
--	0x0001A769,
--	0x00410D00,
-+	0x00000340,
-+	0xD000001A,
-+	0x06800000,
-+	0x00340000,
-+	0x0001A000,
-+	0x00000D00,
- 	0x40000068,
--	0x3D000003,
--	0x91EBB4D2,
--	0x3C8F65E7,
--	0x69A47A0F,
--	0x000001A7,
-+	0x1A000003,
-+	0x00D00000,
-+	0x00068000,
-+	0x00003400,
-+	0x000001A0,
-+	0x00000401,
-+	0x00000008,
- 	0x00000401,
- 	0x00000008,
- 	0x00000401,
- 	0x00000008,
--	0x00000540,
--	0x000003A8,
--	0x10AA0D40,
--	0x8001C3A8,
-+	0x00000401,
-+	0x80000008,
- 	0x0000007F,
-+	0x20000000,
- 	0x00000000,
--	0x00004060,
--	0xE1208000,
-+	0xE0000080,
- 	0x0000001F,
--	0x00004100,
-+	0x00004000,
- };
- 
-diff --git a/board/altera/socfpga_cyclone5/pinmux_config.c b/board/altera/socfpga_cyclone5/pinmux_config.c
-index 730067e..cfd74cd 100644
---- a/board/altera/socfpga_cyclone5/pinmux_config.c
-+++ b/board/altera/socfpga_cyclone5/pinmux_config.c
-@@ -23,7 +23,7 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
- 	0, /* EMACIO18 */
- 	0, /* EMACIO19 */
- 	3, /* FLASHIO0 */
--	3, /* FLASHIO1 */
-+	0, /* FLASHIO1 */
- 	3, /* FLASHIO2 */
- 	3, /* FLASHIO3 */
- 	0, /* FLASHIO4 */
-@@ -34,25 +34,25 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
- 	3, /* FLASHIO9 */
- 	3, /* FLASHIO10 */
- 	3, /* FLASHIO11 */
--	3, /* GENERALIO0 */
--	3, /* GENERALIO1 */
--	3, /* GENERALIO2 */
--	3, /* GENERALIO3 */
--	3, /* GENERALIO4 */
--	3, /* GENERALIO5 */
--	3, /* GENERALIO6 */
--	3, /* GENERALIO7 */
--	3, /* GENERALIO8 */
-+	0, /* GENERALIO0 */
-+	1, /* GENERALIO1 */
-+	1, /* GENERALIO2 */
-+	1, /* GENERALIO3 */
-+	1, /* GENERALIO4 */
-+	0, /* GENERALIO5 */
-+	0, /* GENERALIO6 */
-+	0, /* GENERALIO7 */
-+	0, /* GENERALIO8 */
- 	3, /* GENERALIO9 */
- 	3, /* GENERALIO10 */
- 	3, /* GENERALIO11 */
- 	3, /* GENERALIO12 */
--	2, /* GENERALIO13 */
--	2, /* GENERALIO14 */
--	3, /* GENERALIO15 */
--	3, /* GENERALIO16 */
--	2, /* GENERALIO17 */
--	2, /* GENERALIO18 */
-+	0, /* GENERALIO13 */
-+	0, /* GENERALIO14 */
-+	1, /* GENERALIO15 */
-+	1, /* GENERALIO16 */
-+	1, /* GENERALIO17 */
-+	1, /* GENERALIO18 */
- 	0, /* GENERALIO19 */
- 	0, /* GENERALIO20 */
- 	0, /* GENERALIO21 */
-diff --git a/board/altera/socfpga_cyclone5/pinmux_config.h b/board/altera/socfpga_cyclone5/pinmux_config.h
-index fb483ab..64c750a 100644
---- a/board/altera/socfpga_cyclone5/pinmux_config.h
-+++ b/board/altera/socfpga_cyclone5/pinmux_config.h
-@@ -11,15 +11,15 @@
- #define CONFIG_HPS_UART0 (1)
- #define CONFIG_HPS_UART1 (0)
- #define CONFIG_HPS_TRACE (0)
--#define CONFIG_HPS_I2C0 (1)
--#define CONFIG_HPS_I2C1 (0)
-+#define CONFIG_HPS_I2C0 (0)
-+#define CONFIG_HPS_I2C1 (1)
- #define CONFIG_HPS_I2C2 (0)
- #define CONFIG_HPS_I2C3 (0)
- #define CONFIG_HPS_SPIM0 (1)
--#define CONFIG_HPS_SPIM1 (0)
-+#define CONFIG_HPS_SPIM1 (1)
- #define CONFIG_HPS_SPIS0 (0)
- #define CONFIG_HPS_SPIS1 (0)
--#define CONFIG_HPS_CAN0 (1)
-+#define CONFIG_HPS_CAN0 (0)
- #define CONFIG_HPS_CAN1 (0)
- 
- #define CONFIG_HPS_SDMMC_BUSWIDTH (4)
-diff --git a/board/altera/socfpga_cyclone5/sdram/sdram_config.h b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
-index b90d6f3..dd027ef 100755
---- a/board/altera/socfpga_cyclone5/sdram/sdram_config.h
-+++ b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
-@@ -4,16 +4,16 @@
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE			(2)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL			(8)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER		(0)
--#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(1)
--#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(1)
-+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(0)
-+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(0)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN		(1)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT		(10)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN			(0)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS			(0)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(6)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(8)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL			(0)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(7)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(4)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(11)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(3)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW			(12)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC			(104)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI		(3120)
-@@ -21,7 +21,7 @@
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP		(6)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR		(6)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR		(4)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(4)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(3)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS			(14)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC			(20)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD			(4)
-@@ -33,7 +33,7 @@
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS		(15)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS		(3)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS			(1)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(40)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(32)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH		(8)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN			(0)
- #define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL			(2)
-diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
-index e8c5484..919676d 100644
---- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
-+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
-@@ -34,7 +34,7 @@
- #define __RW_MGR_ac_read_en 0x21
- #define __RW_MGR_ac_mrs3_mirr 0x0C
- #define __RW_MGR_ac_mrs2 0x05
--#define __RW_MGR_CONTENT_ac_mrs1 0x10090044
-+#define __RW_MGR_CONTENT_ac_mrs1 0x10090006
- #define __RW_MGR_CONTENT_ac_mrs3 0x100B0000
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata_wl_1 0x18980000
- #define __RW_MGR_CONTENT_ac_act_1 0x106B0000
-@@ -46,8 +46,8 @@
- #define __RW_MGR_CONTENT_ac_init_reset_0_cke_0 0x20700000
- #define __RW_MGR_CONTENT_ac_read_bank_0_1_norden 0x10580008
- #define __RW_MGR_CONTENT_ac_pre_all 0x10280400
--#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080431
--#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080530
-+#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080471
-+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080570
- #define __RW_MGR_CONTENT_ac_read_bank_0_0 0x13580000
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_1 0x1C980008
- #define __RW_MGR_CONTENT_ac_read_bank_0_1 0x13580008
-@@ -55,21 +55,21 @@
- #define __RW_MGR_CONTENT_ac_write_bank_1_col_1 0x1C9B0008
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_0 0x1C980000
- #define __RW_MGR_CONTENT_ac_read_bank_1_0 0x135B0000
--#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0024
-+#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0006
- #define __RW_MGR_CONTENT_ac_read_bank_1_1 0x135B0008
- #define __RW_MGR_CONTENT_ac_des_odt_1 0x38780000
--#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804C8
-+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804E8
- #define __RW_MGR_CONTENT_ac_zqcl 0x10380400
- #define __RW_MGR_CONTENT_ac_write_predata 0x38F80000
--#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080449
-+#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080469
- #define __RW_MGR_CONTENT_ac_ref 0x10480000
- #define __RW_MGR_CONTENT_ac_nop 0x30780000
- #define __RW_MGR_CONTENT_ac_rdimm 0x10780000
--#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090010
-+#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090218
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata 0x18180000
- #define __RW_MGR_CONTENT_ac_read_en 0x33780000
- #define __RW_MGR_CONTENT_ac_mrs3_mirr 0x100B0000
--#define __RW_MGR_CONTENT_ac_mrs2 0x100A0008
-+#define __RW_MGR_CONTENT_ac_mrs2 0x100A0218
- 
- #define __RW_MGR_READ_B2B_WAIT2 0x6A
- #define __RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x31
-diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
-index e16efa1..20b4ca1 100644
---- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
-+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
-@@ -6,16 +6,16 @@ const alt_u32 ac_rom_init[36] =
- {
- 	0x20700000,
- 	0x20780000,
--	0x10080431,
--	0x10080530,
--	0x10090044,
--	0x100a0008,
-+	0x10080471,
-+	0x10080570,
-+	0x10090006,
-+	0x100a0218,
- 	0x100b0000,
- 	0x10380400,
--	0x10080449,
--	0x100804c8,
--	0x100a0024,
--	0x10090010,
-+	0x10080469,
-+	0x100804e8,
-+	0x100a0006,
-+	0x10090218,
- 	0x100b0000,
- 	0x30780000,
- 	0x38780000,
-diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
-index 52faf3f..b85b85c 100644
---- a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
-+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
-@@ -1,28 +1,28 @@
- #ifndef _SEQUENCER_DEFINES_H_
- #define _SEQUENCER_DEFINES_H_
- 
--#define AC_ROM_MR1_MIRR 0000000100100
-+#define AC_ROM_MR1_MIRR 0000000000110
- #define AC_ROM_MR1_OCD_ENABLE
--#define AC_ROM_MR2_MIRR 0000000010000
-+#define AC_ROM_MR2_MIRR 0001000011000
- #define AC_ROM_MR3_MIRR 0000000000000
- #define AC_ROM_MR0_CALIB
--#define AC_ROM_MR0_DLL_RESET_MIRR 0010011001000
--#define AC_ROM_MR0_DLL_RESET 0010100110000
--#define AC_ROM_MR0_MIRR 0010001001001
--#define AC_ROM_MR0 0010000110001
--#define AC_ROM_MR1 0000001000100
--#define AC_ROM_MR2 0000000001000
-+#define AC_ROM_MR0_DLL_RESET_MIRR 0010011101000
-+#define AC_ROM_MR0_DLL_RESET 0010101110000
-+#define AC_ROM_MR0_MIRR 0010001101001
-+#define AC_ROM_MR0 0010001110001
-+#define AC_ROM_MR1 0000000000110
-+#define AC_ROM_MR2 0001000011000
- #define AC_ROM_MR3 0000000000000
- #define AFI_CLK_FREQ 401
- #define AFI_RATE_RATIO 1
- #define ARRIAVGZ 0
- #define ARRIAV 0
--#define AVL_CLK_FREQ 67
-+#define AVL_CLK_FREQ 81
- #define BFM_MODE 0
- #define BURST2 0
- #define CALIBRATE_BIT_SLIPS 0
--#define CALIB_LFIFO_OFFSET 7
--#define CALIB_VFIFO_OFFSET 5
-+#define CALIB_LFIFO_OFFSET 11
-+#define CALIB_VFIFO_OFFSET 9
- #define CYCLONEV 1
- #define DDR2 0
- #define DDR3 1
-@@ -89,20 +89,20 @@
- #define RW_MGR_MEM_CHIP_SELECT_WIDTH 1
- #define RW_MGR_MEM_CLK_EN_WIDTH 1
- #define RW_MGR_MEM_CONTROL_WIDTH 1
--#define RW_MGR_MEM_DATA_MASK_WIDTH 5
--#define RW_MGR_MEM_DATA_WIDTH 40
-+#define RW_MGR_MEM_DATA_MASK_WIDTH 4
-+#define RW_MGR_MEM_DATA_WIDTH 32
- #define RW_MGR_MEM_DQ_PER_READ_DQS 8
- #define RW_MGR_MEM_DQ_PER_WRITE_DQS 8
--#define RW_MGR_MEM_IF_READ_DQS_WIDTH 5
--#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 5
-+#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4
-+#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4
- #define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
- #define RW_MGR_MEM_NUMBER_OF_RANKS 1
- #define RW_MGR_MEM_ODT_WIDTH 1
- #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
- #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1
- #define RW_MGR_MR0_BL 1
--#define RW_MGR_MR0_CAS_LATENCY 3
--#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 5
-+#define RW_MGR_MR0_CAS_LATENCY 7
-+#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4
- #define RW_MGR_WRITE_TO_DEBUG_READ 1.0
- #define SKEW_CALIBRATION 0
- #define STATIC_FULL_CALIBRATION 1
--- 
-1.9.0
-

board/arcturus/ppc-ucp1020/configs/linux-4.1.x.config

@@ -1,269 +0,0 @@
-CONFIG_PPC_85xx=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_CROSS_COMPILE="powerpc-linux-"
-CONFIG_LOCALVERSION="-ANI-uCP1020-64EE512"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="uCP1020-64EE512"
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_AUDIT=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_LOG_CPU_MAX_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_RD_BZIP2 is not set
-# CONFIG_RD_LZMA is not set
-# CONFIG_RD_XZ is not set
-# CONFIG_RD_LZO is not set
-# CONFIG_RD_LZ4 is not set
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
-# CONFIG_EFI_PARTITION is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_UCP1020_SOM=y
-CONFIG_HIGHMEM=y
-CONFIG_PREEMPT=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_MATH_EMULATION=y
-CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y
-CONFIG_SWIOTLB=y
-# CONFIG_COMPACTION is not set
-CONFIG_PCI=y
-CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIEAER is not set
-# CONFIG_PCIEASPM is not set
-CONFIG_PCI_MSI=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_BRIDGE_NETFILTER=y
-CONFIG_NF_CONNTRACK=y
-CONFIG_NF_CONNTRACK_FTP=y
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
-CONFIG_NETFILTER_XT_TARGET_MARK=y
-CONFIG_NETFILTER_XT_MATCH_COMMENT=y
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
-CONFIG_NETFILTER_XT_MATCH_HELPER=y
-CONFIG_NETFILTER_XT_MATCH_MARK=y
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
-CONFIG_NETFILTER_XT_MATCH_STATE=y
-CONFIG_NF_CONNTRACK_IPV4=y
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_IP_NF_FILTER=y
-CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_NAT=y
-CONFIG_IP_NF_TARGET_MASQUERADE=y
-CONFIG_IP_NF_TARGET_NETMAP=y
-CONFIG_IP_NF_TARGET_REDIRECT=y
-CONFIG_IP_NF_MANGLE=y
-CONFIG_BRIDGE=y
-CONFIG_VLAN_8021Q=y
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_HTB=y
-CONFIG_CFG80211=y
-# CONFIG_CFG80211_DEFAULT_PS is not set
-CONFIG_MAC80211=y
-# CONFIG_MAC80211_RC_MINSTREL is not set
-CONFIG_UEVENT_HELPER_PATH="/bin/hotplug"
-CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_FTL=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_MTD_NAND_FSL_UPM=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NET_VENDOR_ADAPTEC is not set
-# CONFIG_NET_VENDOR_AGERE is not set
-# CONFIG_NET_VENDOR_ALTEON is not set
-# CONFIG_NET_VENDOR_AMD is not set
-# CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_VENDOR_ATHEROS is not set
-# CONFIG_NET_CADENCE is not set
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_BROCADE is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CISCO is not set
-# CONFIG_NET_VENDOR_DEC is not set
-# CONFIG_NET_VENDOR_DLINK is not set
-# CONFIG_NET_VENDOR_EMULEX is not set
-# CONFIG_NET_VENDOR_EXAR is not set
-CONFIG_GIANFAR=y
-# CONFIG_NET_VENDOR_HP is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MELLANOX is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_MYRI is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_NVIDIA is not set
-# CONFIG_NET_VENDOR_OKI is not set
-# CONFIG_NET_PACKET_ENGINE is not set
-# CONFIG_NET_VENDOR_QLOGIC is not set
-# CONFIG_NET_VENDOR_QUALCOMM is not set
-# CONFIG_NET_VENDOR_REALTEK is not set
-# CONFIG_NET_VENDOR_RDC is not set
-# CONFIG_NET_VENDOR_ROCKER is not set
-# CONFIG_NET_VENDOR_SAMSUNG is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SILAN is not set
-# CONFIG_NET_VENDOR_SIS is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_SUN is not set
-# CONFIG_NET_VENDOR_TEHUTI is not set
-# CONFIG_NET_VENDOR_TI is not set
-# CONFIG_NET_VENDOR_VIA is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-# CONFIG_NET_VENDOR_XILINX is not set
-CONFIG_MICREL_PHY=y
-CONFIG_IWLWIFI=m
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO_LIBPS2=y
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_NOZOMI=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_NVRAM=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MPC=y
-CONFIG_SPI=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_FSL_ESPI=y
-CONFIG_SPI_SPIDEV=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_MPC8XXX=y
-CONFIG_SENSORS_LM90=y
-CONFIG_THERMAL=y
-CONFIG_WATCHDOG=y
-CONFIG_BOOKE_WDT=y
-CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=36
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_MEDIA_CONTROLLER=y
-CONFIG_VIDEO_V4L2_SUBDEV_API=y
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=y
-CONFIG_USB_GSPCA=y
-CONFIG_USB_PWC=y
-CONFIG_USB_ZR364XX=y
-CONFIG_USB_STKWEBCAM=y
-CONFIG_VIDEO_EM28XX=y
-CONFIG_VIDEO_EM28XX_V4L2=y
-# CONFIG_HID is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_FSL=y
-CONFIG_USB_ACM=y
-CONFIG_USB_WDM=y
-CONFIG_USB_TMC=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_MDC800=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
-CONFIG_DMADEVICES=y
-CONFIG_FSL_DMA=y
-CONFIG_ASYNC_TX_DMA=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=y
-CONFIG_XFS_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_NTFS_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_NFSD=y
-CONFIG_CIFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRC_ITU_T=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_RCU_CPU_STALL_TIMEOUT=60
-# CONFIG_RCU_CPU_STALL_INFO is not set
-# CONFIG_FTRACE is not set
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_PCBC=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA1_PPC=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_TALITOS=y

board/arcturus/ppc-ucp1020/patches/linux/0001-Arcturus-uCP1020-BSP-support.patch

@@ -1,462 +0,0 @@
-From a243628639e12a4bd0a737eac78a12ed240cd137 Mon Sep 17 00:00:00 2001
-From: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Date: Mon, 18 Jul 2016 10:40:16 -0400
-Subject: [PATCH] Arcturus uCP1020 BSP support
-
-The uCP1020 product family (ucp1020) is an Arcturus Networks Inc.
-System on Modules product featuring a NXP QorIQ P1020 CPU,
-optionally populated with 1 or 2 Gig-Ethernet PHYs,
-DDR3, NOR Flash, eMMC NAND Flash and/or SPI Flash.
-
-Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Signed-off-by: Michael Durrant <arcsupport@arcturusnetworks.com>
----
- arch/powerpc/boot/dts/ucp1020.dts         |  87 ++++++++++++
- arch/powerpc/boot/dts/ucp1020.dtsi        | 211 ++++++++++++++++++++++++++++++
- arch/powerpc/platforms/85xx/Kconfig       |   7 +
- arch/powerpc/platforms/85xx/Makefile      |   1 +
- arch/powerpc/platforms/85xx/ucp1020_som.c |  92 +++++++++++++
- 5 files changed, 398 insertions(+)
- create mode 100644 arch/powerpc/boot/dts/ucp1020.dts
- create mode 100644 arch/powerpc/boot/dts/ucp1020.dtsi
- create mode 100644 arch/powerpc/platforms/85xx/ucp1020_som.c
-
-diff --git a/arch/powerpc/boot/dts/ucp1020.dts b/arch/powerpc/boot/dts/ucp1020.dts
-new file mode 100644
-index 0000000..291e70a
---- /dev/null
-+++ b/arch/powerpc/boot/dts/ucp1020.dts
-@@ -0,0 +1,87 @@
-+/*
-+ * uCP1020 Tree Source (32-bit address map)
-+ *
-+ * Copyright 2013-2016 Arcturus Networks Inc.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Freescale Semiconductor nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ *
-+ * ALTERNATIVELY, this software may be distributed under the terms of the
-+ * GNU General Public License ("GPL") as published by the Free Software
-+ * Foundation, either version 2 of that License or (at your option) any
-+ * later version.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
-+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+/include/ "fsl/p1020si-pre.dtsi"
-+/ {
-+	model = "arcturus,uCP1020";
-+	compatible = "arcturus,uCP1020";
-+
-+	memory {
-+		device_type = "memory";
-+	};
-+
-+	lbc: localbus@ffe05000 {
-+		reg = <0 0xffe05000 0 0x1000>;
-+
-+		/* NOR Flash */
-+		ranges = <0x0 0x0 0x0 0xec000000 0x04000000>;
-+	};
-+
-+	soc: soc@ffe00000 {
-+		ranges = <0x0 0x0 0xffe00000 0x100000>;
-+	};
-+
-+	pci0: pcie@ffe09000 {
-+		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-+			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-+		reg = <0 0xffe09000 0 0x1000>;
-+		pcie@0 {
-+			ranges = <0x2000000 0x0 0xa0000000
-+				  0x2000000 0x0 0xa0000000
-+				  0x0 0x20000000
-+
-+				  0x1000000 0x0 0x0
-+				  0x1000000 0x0 0x0
-+				  0x0 0x100000>;
-+		};
-+	};
-+
-+	pci1: pcie@ffe0a000 {
-+		reg = <0 0xffe0a000 0 0x1000>;
-+		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-+			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-+		pcie@0 {
-+			ranges = <0x2000000 0x0 0x80000000
-+				  0x2000000 0x0 0x80000000
-+				  0x0 0x20000000
-+
-+				  0x1000000 0x0 0x0
-+				  0x1000000 0x0 0x0
-+				  0x0 0x100000>;
-+		};
-+	};
-+};
-+
-+/include/ "ucp1020.dtsi"
-+/include/ "fsl/p1020si-post.dtsi"
-diff --git a/arch/powerpc/boot/dts/ucp1020.dtsi b/arch/powerpc/boot/dts/ucp1020.dtsi
-new file mode 100644
-index 0000000..7cff949
---- /dev/null
-+++ b/arch/powerpc/boot/dts/ucp1020.dtsi
-@@ -0,0 +1,211 @@
-+/*
-+ * uCP1020 Device Tree Source stub (no addresses or top-level ranges)
-+ *
-+ * Copyright 2013-2016 Arcturus Networks Inc.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Freescale Semiconductor nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ *
-+ * ALTERNATIVELY, this software may be distributed under the terms of the
-+ * GNU General Public License ("GPL") as published by the Free Software
-+ * Foundation, either version 2 of that License or (at your option) any
-+ * later version.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
-+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+&lbc {
-+	nor@0,0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "cfi-flash";
-+		reg = <0x0 0x0 0x04000000>;
-+		bank-width = <2>;
-+		device-width = <1>;
-+
-+		partition@100000 {
-+			/* 7MB - PART 0 */
-+			reg = <0x00100000 0x00700000>;
-+			label = "0";
-+		};
-+
-+		partition@800000 {
-+			/* 32MB - PART 1 */
-+			reg = <0x0800000 0x02000000>;
-+			label = "1";
-+		};
-+
-+		partition@2800000 {
-+			/* 8MB - PART 2 */
-+			reg = <0x02800000 0x00800000>;
-+			label = "2";
-+		};
-+
-+		partition@3000000 {
-+			/* (16MB - 512K) - PART 3 JFFS 2 */
-+			reg = <0x03000000 0x00f80000>;
-+			label = "3";
-+		};
-+
-+		partition@0 {
-+			/* 512KB - bootloader[u-boot, uCbootloader] */
-+			reg = <0x0 0x00080000>;
-+			label = "BOOT_SPI";
-+		};
-+
-+		partition@3f80000 {
-+			/* 512KB - bootloade NOR r[u-boot, uCbootloader] */
-+			reg = <0x03f80000 0x00080000>;
-+			label = "B";
-+		};
-+
-+		partition@80000 {
-+			/* 256KB - bootloaders environment (uCenv) */
-+			reg = <0x00080000 0x00040000>;
-+	
-+			label = "E";
-+		};
-+
-+		partition@C0000 {
-+			/* 256KB - bootloaders environment (u-boot) */
-+			reg = <0x000C0000 0x00040000>;
-+			label = "UENV";
-+		};
-+	};
-+};
-+
-+&soc {
-+	i2c@3000 {
-+		spoc@14 {
-+			compatible = "conexant,cx2070x";
-+			reg = <0x14>;
-+		};
-+	};
-+
-+	i2c@3100 {
-+			dtt@4C {
-+				compatible = "national,lm90";
-+				reg = <0x4C>;
-+			};
-+	};
-+
-+	spi@7000 {
-+		flash@0 {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			compatible = "winbond,w25q80bl";
-+			reg = <0>;
-+			spi-max-frequency = <40000000>; /* input clock */
-+
-+			partition@0 {
-+				label = "SPI MBR";
-+				reg = <0x00000000 0x00002000>;
-+				read-only;
-+			};
-+			partition@2000 {
-+				label = "SPI ENV";
-+				reg = <0x00002000 0x00006000>;
-+				read-only;
-+			};
-+			partition@8000 {
-+				label = "SPI FS";
-+				reg = <0x00008000 0x000F8000>;
-+			};
-+		};
-+		flash@3 {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			compatible = "spansion,s25fl008k";
-+			reg = <3>;
-+			spi-max-frequency = <40000000>; /* input clock */
-+			partition@0 {
-+				label = "SPI USER";
-+				reg = <0x00000000 0x00100000>;
-+			};
-+		};
-+	};
-+
-+	usb@22000 {
-+		phy_type = "ulpi";
-+		dr_mode = "host";
-+	};
-+
-+	mdio@24000 {
-+		phy0: ethernet-phy@4 {
-+			interrupt-parent = <&mpic>;
-+			interrupts = <4 1>;
-+			reg = <0x04>;
-+		};
-+
-+		phy1: ethernet-phy@6 {
-+			interrupt-parent = <&mpic>;
-+			interrupts = <8 1>;
-+			reg = <0x6>;
-+		};
-+	};
-+
-+	enet0: ethernet@b0000 {
-+		phy-handle = <&phy0>;
-+		phy-connection-type = "rgmii-id";
-+	};
-+
-+	enet1: ethernet@b1000 {
-+		status = "disabled";
-+	};
-+
-+	enet2: ethernet@b2000 {
-+		phy-handle = <&phy1>;
-+		phy-connection-type = "rgmii-id";
-+	};
-+
-+	gpio0: gpio@f000 {
-+		compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
-+		reg = <0xf000 0x1000>;
-+		interrupts = <47 2>;
-+		interrupt-parent = <&mpic>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+	};
-+
-+	gpio-leds {
-+		compatible = "gpio-leds";
-+		gpio5 {
-+			label = "led1";		/* LED15 */
-+			gpios = <&gpio0 5 0>;
-+		};
-+		gpio12 {
-+			label = "led2";		/* LED16 */
-+			gpios = <&gpio0 12 0>;
-+		};
-+		gpio13 {
-+			label = "led3";		/* LED17 */
-+			gpios = <&gpio0 13 0>;
-+		};
-+		gpio7 {
-+			label = "led4";		/* LED18 */
-+			gpios = <&gpio0 7 0>;
-+		};
-+		gpio6 {
-+			label = "led5";		/* LED19 */
-+			gpios = <&gpio0 6 0>;
-+		};
-+	};
-+};
-diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
-index 2fb4b24..81a944f 100644
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -241,6 +241,13 @@ config SGY_CTS1000
- 	help
- 	  Enable this to support functionality in Servergy's CTS-1000 systems.
- 
-+config UCP1020_SOM
-+	bool "Arcturus uCP1020 Rev.1.3 System on Module"
-+	select DEFAULT_UIMAGE
-+	help
-+	  This option enables support for the Arcturus Networks Inc. 
-+	  uCP1020 System on Module.
-+
- config MVME2500
- 	bool "Artesyn MVME2500"
- 	select DEFAULT_UIMAGE
-diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
-index 1fe7fb9..84f2b9a 100644
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -31,4 +31,5 @@ obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
- obj-$(CONFIG_GE_IMP3A)	  += ge_imp3a.o
- obj-$(CONFIG_PPC_QEMU_E500) += qemu_e500.o
- obj-$(CONFIG_SGY_CTS1000) += sgy_cts1000.o
-+obj-$(CONFIG_UCP1020_SOM) += ucp1020_som.o
- obj-$(CONFIG_MVME2500)	  += mvme2500.o
-diff --git a/arch/powerpc/platforms/85xx/ucp1020_som.c b/arch/powerpc/platforms/85xx/ucp1020_som.c
-new file mode 100644
-index 0000000..777e8ad
---- /dev/null
-+++ b/arch/powerpc/platforms/85xx/ucp1020_som.c
-@@ -0,0 +1,92 @@
-+/*
-+ * Arcturus Networks Inc. uCP1020 module Setup
-+ *
-+ * Copyright 2014-2016 Arcturus Networks Inc.
-+ *
-+ * by Oleksandr G Zhadan & Michael Durrant (www.ArcturusNetworks.com)
-+ *
-+ * This program is free software; you can redistribute  it and/or modify it
-+ * under  the terms of  the GNU General  Public License as published by the
-+ * Free Software Foundation;  either version 2 of the  License, or (at your
-+ * option) any later version.
-+ */
-+
-+#include <linux/stddef.h>
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/kdev_t.h>
-+#include <linux/delay.h>
-+#include <linux/seq_file.h>
-+#include <linux/interrupt.h>
-+#include <linux/of_platform.h>
-+
-+#include <asm/time.h>
-+#include <asm/machdep.h>
-+#include <asm/pci-bridge.h>
-+#include <mm/mmu_decl.h>
-+#include <asm/prom.h>
-+#include <asm/udbg.h>
-+#include <asm/mpic.h>
-+#include <asm/fsl_guts.h>
-+
-+#include <sysdev/fsl_soc.h>
-+#include <sysdev/fsl_pci.h>
-+#include "smp.h"
-+
-+#include "mpc85xx.h"
-+
-+void __init ucp1020_som_pic_init(void)
-+{
-+	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
-+	  MPIC_SINGLE_DEST_CPU,
-+	  0, 256, " OpenPIC  ");
-+
-+	BUG_ON(mpic == NULL);
-+
-+	mpic_init(mpic);
-+}
-+
-+/*
-+ * Setup the architecture
-+ */
-+static void __init ucp1020_som_setup_arch(void)
-+{
-+	if (ppc_md.progress)
-+		ppc_md.progress("uCP1020_SoM_setup_arch()", 0);
-+
-+	mpc85xx_smp_init();
-+
-+	fsl_pci_assign_primary();
-+	pr_info("\n\t%s (http://www.arcturusnetworks.com)\n", ppc_md.name);
-+}
-+
-+machine_arch_initcall(ucp1020, mpc85xx_common_publish_devices);
-+machine_arch_initcall(ucp1020, swiotlb_setup_bus_notifier);
-+
-+/*
-+ * Called very early, device-tree isn't unflattened
-+ */
-+static int __init ucp1020_probe(void)
-+{
-+	unsigned long root = of_get_flat_dt_root();
-+
-+	if (of_flat_dt_is_compatible(root, "arcturus,uCP1020"))
-+		return 1;
-+	return 0;
-+}
-+
-+define_machine(ucp1020) {
-+	.name			= "uCP1020 SoM - Arcturus Networks Inc.",
-+	.probe			= ucp1020_probe,
-+	.setup_arch		= ucp1020_som_setup_arch,
-+	.init_IRQ		= ucp1020_som_pic_init,
-+#ifdef CONFIG_PCI
-+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
-+#endif
-+	.get_irq		= mpic_get_irq,
-+	.restart		= fsl_rstcr_restart,
-+	.calibrate_decr		= generic_calibrate_decr,
-+#ifdef DEBUG 
-+	.progress		= udbg_progress,
-+#endif
-+};
--- 
-2.1.4
-

board/arcturus/ppc-ucp1020/patches/linux/0002-p1020-esdhc-controller-reserved-bit.patch

@@ -1,28 +0,0 @@
-From 4c74fd1266287deca0c1ff091071c5b8558b9735 Mon Sep 17 00:00:00 2001
-From: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Date: Mon, 18 Jul 2016 10:45:41 -0400
-Subject: [PATCH 1/1] p1020 esdhc controller reserved bit
-
-Prevent SDHCI core from writing reserved bits, where
-p1020 reserved bit is SDHCI_CTRL_HISPD, not 0x01(SDHCI_CTRL_LED).
-
-Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
-Signed-off-by: Michael Durrant <arcsupport@arcturusnetworks.com>
----
- drivers/mmc/host/sdhci-esdhc.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
-index a870c42..b45de0a 100644
---- a/drivers/mmc/host/sdhci-esdhc.h
-+++ b/drivers/mmc/host/sdhci-esdhc.h
-@@ -45,6 +45,6 @@
- #define ESDHC_DMA_SYSCTL	0x40c
- #define ESDHC_DMA_SNOOP		0x00000040
- 
--#define ESDHC_HOST_CONTROL_RES	0x01
-+#define ESDHC_HOST_CONTROL_RES	(SDHCI_CTRL_HISPD)
- 
- #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
--- 
-2.1.4

board/arcturus/ppc-ucp1020/readme.txt

@@ -1,73 +0,0 @@
-Arcturus uCP1020 SoM
-====================
-
-This tutorial describes how to use the predefined Buildroot
-configuration for the Arcturus uCP1020 SoM platform.
-
-Additional information about this module can be found at
-<www.arcturusnetworks.com/products/ucp1020>
-
-Building
---------
-
-  make arcturus_ucp1020_defconfig
-  make
-
-Result of the build
--------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.jffs2
-    +-- rootfs.tar
-    +-- u-boot.bin
-    +-- ucp1020.dtb
-    +-- uImage
-
-Flashing
---------
-
-You'll need to program the files created by buildroot into the NOR flash.
-
-1. Program the new U-Boot binary (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    B$ tftp u-boot.bin
-    B$ protect off 0xeff80000 +$filesize
-    B$ erase 0xeff80000 +$filesize
-    B$ cp.b $loadaddr 0xeff80000 $filesize
-
-2. Program the kernel
-
-    B$ tftp uImage
-    B$ erase 0xec140000 +$filesize
-    B$ cp.b $loadaddr 0xec140000 $filesize
-
-3. Program the DTB
-
-    B$ tftp ucp1020.dtb
-    B$ erase 0xec100000 +$filesize
-    B$ cp.b $loadaddr 0xec100000 $filesize
-
-4. Program the jffs2 root filesystem
-
-    B$ tftp rootfs.jffs2
-    B$ erase 0xec800000 0xee8fffff
-    B$ cp.b $loadaddr 0xec800000 $filesize
-
-5. Booting your new system
-
-    B$ setenv norboot 'setenv bootargs root=/dev/mtdblock1 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xec140000 - 0xec100000'
-
-    If you want to set this boot option as default:
-
-    B$ setenv bootcmd 'run norboot'
-    B$ saveenv
-
-    ...or for a single boot:
-
-    B$ run norboot
-
-Good Luck !

board/arm/foundation-v8/readme.txt

@@ -3,14 +3,14 @@ ARM software simulator of the AArch64 architecture.
 
 First, one has to download the AArch64 software simulator from:
 
-  https://silver.arm.com/download/download.tm?pv=2663527
+  https://silver.arm.com/download/download.tm?pv=1317469
 
 Then, use the arm_foundationv8_defconfig configuration to build your
 Buildroot system.
 
 Finally, boot your system with:
 
- ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-4.7/Foundation_Platform \
+ ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/Foundation_v8 \
     --image output/images/linux-system.axf \
     --block-device output/images/rootfs.ext2 \
     --network=nat

board/arm/juno/linux-juno-defconfig

@@ -1,169 +0,0 @@
-CONFIG_SMP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_FHANDLE=y
-CONFIG_AUDIT=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MEMCG=y
-CONFIG_MEMCG_SWAP=y
-CONFIG_MEMCG_KMEM=y
-CONFIG_CGROUP_HUGETLB=y
-CONFIG_SCHED_AUTOGROUP=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_PROFILING=y
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_ARCH_VEXPRESS=y
-CONFIG_PCI=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_HOST_GENERIC=y
-CONFIG_PCIEPORTBUS=y
-CONFIG_HOTPLUG_PCI_PCIE=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_NR_CPUS=6
-CONFIG_PREEMPT=y
-CONFIG_KSM=y
-CONFIG_TRANSPARENT_HUGEPAGE=y
-CONFIG_CMA=y
-CONFIG_CMDLINE="console=ttyAMA0"
-CONFIG_COMPAT=y
-CONFIG_CPU_IDLE=y
-CONFIG_ARM_CPUIDLE=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
-CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
-CONFIG_ARM_DT_BL_CPUFREQ=y
-CONFIG_ARM_SCPI_CPUFREQ=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_BPF_JIT=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_AHCI_XGENE=y
-CONFIG_PATA_PLATFORM=y
-CONFIG_PATA_OF_PLATFORM=y
-CONFIG_NETDEVICES=y
-CONFIG_TUN=y
-CONFIG_SKY2=y
-CONFIG_SMC91X=y
-CONFIG_SMSC911X=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SERIAL_XILINX_PS_UART=y
-CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_I2C_SLAVE=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_PTP_1588_CLOCK=m
-CONFIG_GPIO_PL061=y
-CONFIG_GPIO_XGENE=y
-CONFIG_POWER_RESET_XGENE=y
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_VEXPRESS=m
-CONFIG_DRM=y
-CONFIG_DRM_I2C_NXP_TDA998X=y
-CONFIG_DRM_ARM=y
-CONFIG_DRM_HDLCD=y
-CONFIG_DRM_VIRTUAL_HDLCD=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_HCD_PLATFORM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_ISP1760=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_ULPI=y
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SPI=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_EFI=y
-CONFIG_RTC_DRV_PL030=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_DMADEVICES=y
-CONFIG_PL330_DMA=y
-CONFIG_COMMON_CLK_SCPI=y
-CONFIG_ARM_TIMER_SP804=y
-CONFIG_MAILBOX=y
-CONFIG_ARM_MHU=y
-CONFIG_PHY_XGENE=y
-CONFIG_ARM_SCPI_PROTOCOL=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
-CONFIG_QUOTA=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_CUSE=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_HUGETLBFS=y
-CONFIG_EFIVAR_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_KVM=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOCKUP_DETECTOR=y
-CONFIG_SECURITY=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
-CONFIG_ARM64_CRYPTO=y
-CONFIG_CRYPTO_SHA1_ARM64_CE=y
-CONFIG_CRYPTO_SHA2_ARM64_CE=y
-CONFIG_CRYPTO_GHASH_ARM64_CE=y
-CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
-CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SOC=y
-CONFIG_SND_SIMPLE_CARD=y
-CONFIG_SND_DESIGNWARE_I2S=y
-CONFIG_CMA=y
-CONFIG_CMA_SIZE_MBYTES=64

board/arm/juno/readme.txt

@@ -1,134 +0,0 @@
-ARM Juno r1/r0
-
-Intro
-=====
-
-These instructions apply to all models of the ARM Juno:
-  - Juno r0 (does not support PCIe)
-  - Juno r1 (supports PCIe)
-  - Juno r2 (Big Cluster with A72)
-
-Buildroot will generate the kernel image, device tree blob, bootloader binaries
-and a minimal root filesystem.
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-Configuring Buildroot is pretty simple, just execute:
-
-  $ make arm_juno_defconfig
-
-Build the rootfs, kernel and DTB
---------------------------------
-
-Note: you will need to have access to the network, since Buildroot will
-download the packages' sources.
-
-You may now build your rootfs with:
-
-  $ make
-
-(This may take a while)
-
-Result of the build
--------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.tar
-    +-- juno.dtb (if Juno r0 is used)
-    +-- juno-r1.dtb (if Juno r1 is used)
-    +-- juno-r2.dtb (if Juno r2 is used)
-    +-- Image
-    +-- bl1.bin
-    +-- bl2.bin
-    +-- bl2u.bin
-    +-- bl31.bin
-    +-- fip.bin
-    +-- scp-fw.bin
-    +-- u-boot.bin
-
-Preparing your rootfs
-======================
-
-Format your pen drive as a ext3 filesystem by executing:
-
-   $ mkfs.ext3 /dev/<your device>
-
-Preparing your rootfs
-======================
-
-Format your pen drive as a ext3 filesystem by executing:
-
-   $ mkfs.ext3 /dev/<your device>
-
-Installing your rootfs
-======================
-
-After mounting the pen drive please execute the following:
-
-   $ sudo tar -xvf output/images/rootfs.tar -C <pen drive mount path>
-
-When completed make sure to unmount the device:
-
-   $ umount <pen drive mount path>
-
-Insert the pen drive in one of the ARM Juno' USB type A connectors.
-
-Configure *.dtb in the boot configuration for Juno r0
-=====================================================
-
-SITE1/HBI0262B/images.txt
-.....
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x00C00000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno.dtb     ;Image File Name
-NOR3NAME: board.dtb              ;Specify Image name to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Configure *.dtb in the boot configuration for Juno r1
-=====================================================
-
-SITE1/HBI0262C/images.txt
-......
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x00C00000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno-r1.dtb  ;Image File Name
-NOR3NAME: board.dtb              ;Specify target filename to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Configure *.dtb in the boot configuration for Juno r2
-=====================================================
-
-SITE1/HBI0262D/images.txt
-......
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x02000000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno-r2.dtb  ;Image File Name
-NOR3NAME: board.dtb              ;Specify target filename to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Installing kernel image and DTB
-===============================
-
-1. Connect to the ARM Juno UART0 and execute USB_ON in the terminal
-2. Connect a USB cable between your PC and ARM Juno USB type B connector
-   A mass storage device should appear in your desktop.
-3. Open the software/ folder
-4. Copy the 'Image' file to software/
-5. Copy the 'juno-r1.dtb' (r1), 'juno.dtb' (r0) or juno-r2.dtb (r2) file to software/
-6. Copy the bootloader binaries (bl1.bin and fip.bin) to software/
-7. Press the red button in the front pannel of ARM Juno
-
-At this time, the board will erase the Flash entry for each new item and
-replace it with the lastest ones.

board/armadeus/apf27/linux-3.18.config

@@ -1,224 +0,0 @@
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MACH_IMX27_DT=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-CONFIG_SMSC_PHY=y
-CONFIG_RTL8187=m
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT2500USB=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RTL8192CU=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_IMX=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_W1=y
-CONFIG_W1_MASTER_MXC=y
-CONFIG_W1_SLAVE_THERM=y
-CONFIG_WATCHDOG=y
-CONFIG_IMX2_WDT=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_USB_PWC=m
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_SOC_CAMERA=m
-CONFIG_VIDEO_MX2=m
-# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-# CONFIG_DVB_AU8522_V4L is not set
-# CONFIG_DVB_TUNER_DIB0070 is not set
-# CONFIG_DVB_TUNER_DIB0090 is not set
-CONFIG_FB=y
-# CONFIG_FB_MX3 is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_CHIPIDEA_DEBUG=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_MXC=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_LEDS_TRIGGER_TRANSIENT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1374=y
-CONFIG_RTC_DRV_MXC=m
-CONFIG_DMADEVICES=y
-CONFIG_IMX_SDMA=y
-CONFIG_IMX_DMA=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_IIO=y
-CONFIG_MAX1027=y
-CONFIG_MAX5821=y
-CONFIG_PWM=y
-CONFIG_PWM_IMX=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=m
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y

board/armadeus/apf27/linux-3.8.config

@@ -0,0 +1,229 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_CGROUPS=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MXC=y
+CONFIG_MXC_IRQ_PRIOR=y
+CONFIG_MACH_IMX27_DT=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_FPE_NWFPE=y
+CONFIG_FPE_NWFPE_XP=y
+CONFIG_PM_DEBUG=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_MCP251X=m
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+# CONFIG_MTD_CFI_I2 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
+CONFIG_MTD_UBI=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_SMSC_PHY=y
+CONFIG_RTL8187=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RTL8192CU=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_IMX=m
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_W1=y
+CONFIG_W1_MASTER_MXC=y
+CONFIG_W1_SLAVE_THERM=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_PWC=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=m
+CONFIG_VIDEO_MX2=m
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+# CONFIG_DVB_AU8522_V4L is not set
+# CONFIG_DVB_TUNER_DIB0070 is not set
+# CONFIG_DVB_TUNER_DIB0090 is not set
+CONFIG_FB=y
+# CONFIG_FB_MX3 is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=m
+CONFIG_SND=m
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_IMX_SOC=m
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_DEBUG=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_HID=m
+CONFIG_USB_ULPI=y
+CONFIG_MMC=y
+CONFIG_MMC_MXC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1374=y
+CONFIG_RTC_DRV_MXC=m
+CONFIG_DMADEVICES=y
+CONFIG_IMX_SDMA=y
+CONFIG_IMX_DMA=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_IIO=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=m
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_FS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set

board/armadeus/apf28/linux-3.8.config

@@ -0,0 +1,180 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_MXS=y
+CONFIG_MACH_MXS_DT=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_IDLE=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_FLEXCAN=m
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RC_PID=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER=m
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+CONFIG_RTL8187=m
+CONFIG_RT2X00=m
+CONFIG_RT73USB=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=m
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_MXS_AUART=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MXS=y
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_MXS=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_GPIO_SYSFS=y
+CONFIG_HWMON=m
+CONFIG_WATCHDOG=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_FB=y
+CONFIG_FB_MXS=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_ETH=m
+CONFIG_USB_ULPI=y
+CONFIG_USB_MXS_PHY=y
+CONFIG_MMC=y
+CONFIG_MMC_MXS=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_STMP=y
+CONFIG_DMADEVICES=y
+CONFIG_MXS_DMA=y
+CONFIG_STAGING=y
+CONFIG_MXS_LRADC=y
+CONFIG_IIO=y
+CONFIG_PWM=y
+CONFIG_PWM_MXS=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_FS=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set

board/armadeus/apf28/linux-4.4.config

@@ -1,185 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_IDLE=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_FLEXCAN=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_M25P80=y
-# CONFIG_M25PXX_USE_FAST_READ is not set
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPMI_NAND=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_RTL8187=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_MXS_AUART=y
-CONFIG_TTY_PRINTK=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MXS=y
-CONFIG_SPI=y
-CONFIG_SPI_BITBANG=m
-CONFIG_SPI_MXS=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_HWMON=m
-CONFIG_WATCHDOG=y
-CONFIG_STMP3XXX_RTC_WATCHDOG=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_FB=y
-CONFIG_FB_MXS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_MXS_PHY=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_MXS=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_STMP=y
-CONFIG_DMADEVICES=y
-CONFIG_MXS_DMA=y
-CONFIG_STAGING=y
-CONFIG_MXS_LRADC=y
-CONFIG_IIO=y
-CONFIG_PWM=y
-CONFIG_PWM_MXS=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y

board/armadeus/apf51/linux-4.4.config

@@ -1,278 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MXC_IRQ_PRIOR=y
-CONFIG_SOC_IMX51=y
-CONFIG_ARM_THUMBEE=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_IMX=y
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_SUSPEND is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_MISC_DEVICES=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_RTL8187=m
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=m
-CONFIG_KEYBOARD_IMX=m
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_WM831X=y
-CONFIG_TOUCHSCREEN_MC13XXX=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_MC13783_PWRBUTTON=m
-CONFIG_INPUT_UINPUT=m
-CONFIG_INPUT_WM831X_ON=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_WM831X=m
-CONFIG_POWER_SUPPLY=y
-CONFIG_WM831X_BACKUP=m
-CONFIG_WM831X_POWER=m
-CONFIG_HWMON=m
-CONFIG_SENSORS_AS1531=m
-CONFIG_SENSORS_MC13783_ADC=m
-CONFIG_SENSORS_WM831X=m
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WM831X_WATCHDOG=m
-CONFIG_IMX2_WDT=y
-CONFIG_MFD_MC13XXX_I2C=y
-CONFIG_MFD_WM831X_I2C=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_MC13892=m
-CONFIG_IMX_IPUV3_CORE=y
-CONFIG_DRM=y
-CONFIG_MFD_IMX_IPU_V3=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_VIDEO_DEV=m
-# CONFIG_RC_CORE is not set
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5761 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_XC2028 is not set
-# CONFIG_MEDIA_TUNER_XC5000 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_MEDIA_TUNER_MAX2165 is not set
-# CONFIG_MEDIA_TUNER_TDA18218 is not set
-CONFIG_VIDEO_VIVI=m
-CONFIG_USB_VIDEO_CLASS=m
-# CONFIG_RADIO_ADAPTERS is not set
-CONFIG_FB=y
-CONFIG_FB_MX5=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_SND_SOC_APF51_DEV_WM8960=m
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_OTG=y
-# CONFIG_USB_OTG_WHITELIST is not set
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_PHY=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_GPIO_VBUS=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ETH=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_MMC_SPI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_WM831X_STATUS=m
-CONFIG_LEDS_MC13783=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_MXC=y
-CONFIG_RTC_DRV_WM831X=y
-CONFIG_RTC_DRV_MC13XXX=m
-CONFIG_STAGING=y
-CONFIG_DRM_IMX=y
-CONFIG_DRM_IMX_FB_HELPER=y
-CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
-CONFIG_DRM_IMX_TVE=y
-CONFIG_DRM_IMX_IPUV3=y
-CONFIG_IIO=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_EXT4_FS=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set

board/armadeus/apf9328/linux-3.1.1-0001-fixes_arm_mach-types_for_apf9328.patch

@@ -0,0 +1,26 @@
+From 053ba505eb0d40287ac5750daf454af0aed2ce75 Mon Sep 17 00:00:00 2001
+From: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
+Date: Tue, 4 Oct 2011 14:19:58 +0200
+Subject: [PATCH 1/2] [ARM] mach-types: Re-add apf9328
+
+
+Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
+---
+ arch/arm/tools/mach-types |    1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
+index fff68d0..07811a7 100644
+--- a/arch/arm/tools/mach-types
++++ b/arch/arm/tools/mach-types
+@@ -188,6 +188,7 @@ omap_2430sdp		MACH_OMAP_2430SDP	OMAP_2430SDP		900
+ davinci_evm		MACH_DAVINCI_EVM	DAVINCI_EVM		901
+ palmz72			MACH_PALMZ72		PALMZ72			904
+ nxdb500			MACH_NXDB500		NXDB500			905
++apf9328			MACH_APF9328		APF9328			906
+ palmt5			MACH_PALMT5		PALMT5			917
+ palmtc			MACH_PALMTC		PALMTC			918
+ omap_apollon		MACH_OMAP_APOLLON	OMAP_APOLLON		919
+-- 
+1.7.3.4
+

board/armadeus/apf9328/linux-3.1.1-0002-add_missing_config_option_for_apf9328.patch

@@ -0,0 +1,16 @@
+APF9328 needs CONFIG_MTD_CFI_INTELEXT to boot on its NOR FLASH.
+
+Signed-off-by: Julien Boibessot <julien.boibessot@armadeus.com>
+
+Index: linux-3.1.1/arch/arm/mach-imx/Kconfig
+===================================================================
+--- linux-3.1.1.orig/arch/arm/mach-imx/Kconfig	2011-11-16 14:45:55.000000000 +0100
++++ linux-3.1.1/arch/arm/mach-imx/Kconfig	2011-11-16 14:47:20.000000000 +0100
+@@ -84,6 +84,7 @@
+ 	bool "APF9328"
+ 	select SOC_IMX1
+ 	select IMX_HAVE_PLATFORM_IMX_UART
++	select MTD_CFI_INTELEXT
+ 	help
+ 	  Say Yes here if you are using the Armadeus APF9328 development board
+ 

board/armadeus/readme.txt

@@ -1,89 +0,0 @@
-Introduction
-============
-
-Armadeus APFxx are Systems On Module (SOM) based on Freescale/NXP i.MX
-processors associated with an FPGA (except on APF28). Non volatile
-data are stored in on-module NOR or NAND Flash, depending on the
-model. These SOM can be used on Armadeus development boards or with
-custom docking boards.
-
-Supported platforms
-===================
-
-Buildroot currently supports the following Armadeus platforms with the
-associated defconfigs:
-
- * APF9328 SOM + devt boards -> armadeus_apf9328_defconfig
- * APF27 SOM + devt board    -> armadeus_apf27_defconfig
- * APF51 SOM + devt board    -> armadeus_apf51_defconfig
- * APF28 SOM + devt board    -> armadeus_apf28_defconfig
-
-Vanilla Linux versions are preferred to Freescale's one in these
-configurations.
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-Let's say you own an APFxx SOM with it's corresponding development
-board, all you have to do is:
-
-  $ make armadeus_apfxx_defconfig
-
-where "apfxx" is the version of your SOM.
-
-Launch build
-------------
-
-  $ make
-
-Result of the build
--------------------
-
-When the build is finished, you will end up with:
-
-    output/images/
-    ├── imx**-apfxxdev.dtb	[1]
-    ├── rootfs.jffs2		[2]
-    ├── rootfs.tar
-    ├── rootfs.ubi		[2]
-    ├── rootfs.ubifs		[2]
-    └── uImage
-
-[1] Only if the kernel version used uses a Device Tree.
-[2] .ubi/.ubifs images are not available on APF9328 and replaced by a
-    .jffs2 one in this case.
-
-Building U-Boot is currently not supported in these configurations.
-
-Installation
-============
-
-You will require a serial connection to the board and a TFTP server on
-your Host PC. Assuming your server is configured for exporting
-/tftpboot/ directory, you will have to copy the generated images to
-it:
-
-  $ cp output/images/uImage /tftpboot/apfxx-linux.bin
-  $ cp output/images/*.dtb /tftpboot/
-  $ cp output/images/rootfs.ubi /tftpboot/apfxx-rootfs.ubi
-  $ cp output/images/rootfs.jffs2 /tftpboot/apfxx-rootfs.jffs2
-
-where "apfxx" is the version of your SOM, as used with _defconfigs.
-
-Then on your serial terminal, all you have to do is:
-
-* interrupt the boot process and access U-Boot console by pressing any
-  key when booting,
-* configure board and server IP addresses with "ipaddr" and "serverip"
-  environment variables,
-* if you want to update kernel:
-  BIOS > run update_kernel
-* if you want to update device tree:
-  BIOS > run update_dtb
-* if you want to update rootfs:
-  BIOS > run update_rootfs
-
-That's it !

board/atmel/at91sam9260ek/linux-3.9.config

@@ -0,0 +1,98 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9260=y
+CONFIG_ARCH_AT91SAM9260_SAM9XE=y
+CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_MACH_CAM60=y
+CONFIG_MACH_SAM9_L9260=y
+CONFIG_MACH_AFEB9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_MACH_CPU9260=y
+CONFIG_MACH_FLEXIBITY=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_GPIO=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_AT91SAM9X_WATCHDOG=y
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DEBUG=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91SAM9=y
+CONFIG_EXT2_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y

board/atmel/flasher.sh

@@ -1,136 +0,0 @@
-#!/usr/bin/env bash
-
-BUILDIR=$1
-TTY=$2
-BOARD=$3
-
-family_at91sam9g45m10ek="at91sam9m10g45ek"
-mach_at91sam9g45m10ek="at91sam9m10-g45-ek"
-dtb_at91sam9g45m10ek="at91sam9m10g45ek.dtb"
-
-family_at91sam9rlek="at91sam9rlek"
-mach_at91sam9rlek="at91sam9rl64-ek"
-dtb_at91sam9rlek="at91sam9rlek.dtb"
-
-family_at91sam9g15ek="at91sam9x5ek"
-mach_at91sam9g15ek="at91sam9g15-ek"
-dtb_at91sam9g15ek="at91sam9g15ek.dtb"
-
-family_at91sam9g25ek="at91sam9x5ek"
-mach_at91sam9g25ek="at91sam9g25-ek"
-dtb_at91sam9g25ek="at91sam9g25ek.dtb"
-
-family_at91sam9g35ek="at91sam9x5ek"
-mach_at91sam9g35ek="at91sam9g35-ek"
-dtb_at91sam9g35ek="at91sam9g35ek.dtb"
-
-family_at91sam9x25ek="at91sam9x5ek"
-mach_at91sam9x25ek="at91sam9x25-ek"
-dtb_at91sam9x25ek="at91sam9x25ek.dtb"
-
-family_at91sam9x35ek="at91sam9x5ek"
-mach_at91sam9x35ek="at91sam9x35-ek"
-dtb_at91sam9x35ek="at91sam9x35ek.dtb"
-
-family_sama5d31ek="sama5d3xek"
-mach_sama5d31ek="at91sama5d3x-ek"
-dtb_sama5d31ek="sama5d31ek.dtb"
-
-family_sama5d31ek_revc="sama5d3xek"
-mach_sama5d31ek_revc="at91sama5d3x-ek"
-dtb_sama5d31ek_revc="sama5d31ek_revc.dtb"
-
-family_sama5d33ek="sama5d3xek"
-mach_sama5d33ek="at91sama5d3x-ek"
-dtb_sama5d33ek="sama5d33ek.dtb"
-
-family_sama5d33ek_revc="sama5d3xek"
-mach_sama5d33ek_revc="at91sama5d3x-ek"
-dtb_sama5d33ek_revc="sama5d33ek_revc.dtb"
-
-family_sama5d34ek="sama5d3xek"
-mach_sama5d34ek="at91sama5d3x-ek"
-dtb_sama5d34ek="sama5d34ek.dtb"
-
-family_sama5d34ek_revc="sama5d3xek"
-mach_sama5d34ek_revc="at91sama5d3x-ek"
-dtb_sama5d34ek_revc="sama5d34ek_revc.dtb"
-
-family_sama5d35ek="sama5d3xek"
-mach_sama5d35ek="at91sama5d3x-ek"
-dtb_sama5d35ek="sama5d35ek.dtb"
-
-family_sama5d35ek_revc="sama5d3xek"
-mach_sama5d35ek_revc="at91sama5d3x-ek"
-dtb_sama5d35ek_revc="sama5d35ek_revc.dtb"
-
-family_sama5d36ek="sama5d3xek"
-mach_sama5d36ek="at91sama5d3x-ek"
-dtb_sama5d36ek="sama5d36ek.dtb"
-
-family_sama5d36ek_revc="sama5d3xek"
-mach_sama5d36ek_revc="at91sama5d3x-ek"
-dtb_sama5d36ek_revc="sama5d36ek_revc.dtb"
-
-family_sama5d3_xplained="sama5d3_xplained"
-mach_sama5d3_xplained="at91sama5d3x-xplained"
-dtb_sama5d3_xplained="at91-sama5d3_xplained.dtb"
-
-family_sama5d4ek="sama5d4ek"
-mach_sama5d4ek="at91sama5d4x-ek"
-dtb_sama5d4ek="at91-sama5d4ek.dtb"
-
-family_sama5d4_xplained="sama5d4_xplained"
-mach_sama5d4_xplained="at91sama5d4x-ek"
-dtb_sama5d4_xplained="at91-sama5d4_xplained.dtb"
-
-usage() {
-	cat << EOF
-Usage:
-  $0 <builddir_path> <interface> <board>
-
-Available boards:
-  at91sam9g45m10ek
-  at91sam9rlek
-  at91sam9g15ek
-  at91sam9g25ek
-  at91sam9x25ek
-  at91sam9g35ek
-  at91sam9x35ek
-  sama5d31ek
-  sama5d33ek
-  sama5d34ek
-  sama5d35ek
-  sama5d36ek
-  sama5d31ek_revc (Until rev. C)
-  sama5d33ek_revc (Until rev. C)
-  sama5d34ek_revc (Until rev. C)
-  sama5d35ek_revc (Until rev. C)
-  sama5d36ek_revc (Until rev. C)
-  sama5d3_xplained
-  sama5d4ek
-  sama5d4_xplained
-
-Example:
-  $0 ./output /dev/ttyACM0 at91sam9g45m10ek
-EOF
-}
-
-F="family_$BOARD"
-M="mach_$BOARD"
-D="dtb_$BOARD"
-
-if [[ $# != 3 || -z ${!F} ]]; then
-	usage
-	exit 1
-fi
-
-video_mode="video=LVDS-1:800x480-16"
-if [[ $BOARD == "*pda4" ]]; then
-	video_mode="video=LVDS-1:480x272-16"
-fi
-
-echo "Executing: ${!F} O=$1/images $1/host/opt/sam-ba/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode"
-export O=$1/images
-$1/host/opt/sam-ba/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode
-

board/atmel/nandflash.tcl

@@ -1,358 +0,0 @@
-# ----------------------------------------------------------------------------
-#         ATMEL Microcontroller
-# ----------------------------------------------------------------------------
-# Copyright (c) 2015, Atmel Corporation
-#
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-#
-# - Redistributions of source code must retain the above copyright notice,
-# this list of conditions and the disclaimer below.
-#
-# Atmel's name may not be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-# DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-# OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-# ----------------------------------------------------------------------------
-
-################################################################################
-#  Script data
-################################################################################
-# DBGU address for rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5
-set at91_base_dbgu0 0xfffff200
-# DBGU address for 9263, 9g45, sama5d3
-set at91_base_dbgu1 0xffffee00
-# DBGU address for sama5d4
-set at91_base_dbgu2 0xfc069000
-
-set arch_exid_offset 0x44
-
-# arch id
-set arch_id_at91sam9g20 0x019905a0
-set arch_id_at91sam9g45 0x819b05a0
-set arch_id_at91sam9x5  0x819a05a0
-set arch_id_at91sam9n12 0x819a07a0
-set arch_id_sama5d3     0x8a5c07c0
-
-## Find out at91sam9x5 variant to load the corresponding dtb file
-array set at91sam9x5_variant {
-   0x00000000 at91sam9g15
-   0x00000001 at91sam9g35
-   0x00000002 at91sam9x35
-   0x00000003 at91sam9g25
-   0x00000004 at91sam9x25
-}
-
-## Find out sama5d3 variant to load the corresponding dtb file
-array set sama5d3_variant {
-   0x00444300 sama5d31
-   0x00414300 sama5d33
-   0x00414301 sama5d34
-   0x00584300 sama5d35
-   0x00004301 sama5d36
-}
-
-## Find out sama5d4 variant
-array set sama5d4_variant {
-   0x00000001 sama5d41
-   0x00000002 sama5d42
-   0x00000003 sama5d43
-   0x00000004 sama5d44
-}
-
-################################################################################
-#  proc uboot_env: Convert u-boot variables in a string ready to be flashed
-#                  in the region reserved for environment variables
-################################################################################
-proc set_uboot_env {nameOfLstOfVar} {
-    upvar $nameOfLstOfVar lstOfVar
-
-    # sector size is the size defined in u-boot CFG_ENV_SIZE
-    set sectorSize [expr 0x20000 - 5]
-
-    set strEnv [join $lstOfVar "\0"]
-    while {[string length $strEnv] < $sectorSize} {
-        append strEnv "\0"
-    }
-    # \0 between crc and strEnv is the flag value for redundant environment
-    set strCrc [binary format i [::vfs::crc $strEnv]]
-    return "$strCrc\0$strEnv"
-}
-
-################################################################################
-proc find_variant_name {boardType} {
-   global at91_base_dbgu0
-   global at91_base_dbgu1
-   global at91_base_dbgu2
-   global arch_exid_offset
-   global at91sam9x5_variant
-   global sama5d3_variant
-   global sama5d4_variant
-   set socName "none"
-
-   switch $boardType {
-      at91sam9x5ek {
-         set exidAddr [expr {$at91_base_dbgu0 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get at91sam9x5_variant] {
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d3xek {
-         set exidAddr [expr {$at91_base_dbgu1 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d3_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d3_xplained {
-         set exidAddr [expr {$at91_base_dbgu1 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d3_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d4ek {
-         set exidAddr [expr {$at91_base_dbgu2 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d4_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d4_xplained {
-         set exidAddr [expr {$at91_base_dbgu2 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d4_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-   }
-
-   return "$socName"
-}
-
-proc find_variant_ecc {boardType} {
-   set eccType "none"
-
-   switch $boardType {
-      at91sam9x5ek {
-         set eccType 0xc0c00405
-      }
-      at91sam9n12ek {
-         set eccType 0xc0c00405
-      }
-      sama5d3xek {
-         set eccType 0xc0902405
-      }
-      sama5d3_xplained {
-         set eccType 0xc0902405
-      }
-      sama5d4ek {
-         set eccType 0xc1e04e07
-      }
-      sama5d4_xplained {
-         set eccType 0xc1e04e07
-      }
-   }
-
-   puts "-I- === eccType is $eccType ==="
-   return $eccType
-}
-
-proc get_kernel_load_addr {boardType} {
-   set kernel_load_addr 0x22000000
-
-   switch $boardType {
-      at91sam9m10g45ek {
-         set kernel_load_addr 0x72000000
-      }
-   }
-
-   return $kernel_load_addr
-}
-
-proc get_dtb_load_addr {boardType} {
-   set dtb_load_addr 0x21000000
-
-   switch $boardType {
-      at91sam9m10g45ek {
-         set dtb_load_addr 0x71000000
-      }
-   }
-
-   return $dtb_load_addr
-}
-
-################################################################################
-#  Main script: Load the linux demo in NandFlash,
-#               Update the environment variables
-################################################################################
-
-################################################################################
-
-# check for proper variable initialization
-if {! [info exists boardFamily]} {
-   puts "-I- === Parsing script arguments ==="
-   if {! [info exists env(O)]} {
-      puts "-E- === Binaries path not defined ==="
-      exit
-   }
-
-   set bootstrapFile   "$env(O)/at91bootstrap.bin"
-   set ubootFile       "$env(O)/u-boot.bin"
-   set kernelFile      "$env(O)/zImage"
-   set rootfsFile      "$env(O)/rootfs.ubi"
-   set build_uboot_env "yes"
-
-   set i 1
-   foreach arg $::argv {
-      puts "argument $i is $arg"
-      switch $i {
-         4 { set boardFamily $arg }
-         5 { set dtbFile "$env(O)/$arg" }
-         6 { set videoMode $arg }
-      }
-      incr i
-    }
-}
-
-puts "-I- === Board Family is $boardFamily ==="
-
-set pmeccConfig [find_variant_ecc $boardFamily]
-
-## Now check for the needed files
-if {! [file exists $bootstrapFile]} {
-   puts "-E- === AT91Bootstrap file not found ==="
-   exit
-}
-
-if {! [file exists $ubootFile]} {
-   puts "-E- === U-Boot file not found ==="
-   exit
-}
-
-if {! [file exists $kernelFile]} {
-   puts "-E- === Linux kernel file not found ==="
-   exit
-}
-
-if {! [file exists $dtbFile]} {
-   puts "-E- === Device Tree binary: $dtbFile file not found ==="
-   exit
-}
-
-if {! [file exists $rootfsFile]} {
-   puts "-E- === Rootfs file not found ==="
-   exit
-}
-
-## NandFlash Mapping
-set bootStrapAddr	0x00000000
-set ubootAddr		0x00040000
-set ubootEnvAddr	0x000c0000
-set dtbAddr		0x00180000
-set kernelAddr		0x00200000
-set rootfsAddr		0x00800000
-
-## u-boot variable
-set kernelLoadAddr [get_kernel_load_addr $boardFamily]
-set dtbLoadAddr	[get_dtb_load_addr $boardFamily]
-
-## NandFlash Mapping
-set kernelSize	[format "0x%08X" [file size $kernelFile]]
-set dtbSize	[format "0x%08X" [file size $dtbFile]]
-set bootCmd "bootcmd=nand read $dtbLoadAddr $dtbAddr $dtbSize; nand read $kernelLoadAddr $kernelAddr $kernelSize; bootz $kernelLoadAddr - $dtbLoadAddr"
-set rootfsSize	[format "0x%08X" [file size $rootfsFile]]
-
-lappend u_boot_variables \
-    "bootdelay=1" \
-    "baudrate=115200" \
-    "stdin=serial" \
-    "stdout=serial" \
-    "stderr=serial" \
-    "bootargs=console=ttyS0,115200 mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw $videoMode" \
-    "$bootCmd"
-
-## Additional files to load
-set ubootEnvFile	"ubootEnvtFileNandFlash.bin"
-
-
-##  Start flashing procedure  ##################################################
-puts "-I- === Initialize the NAND access ==="
-NANDFLASH::Init
-
-if {$pmeccConfig != "none"} {
-   puts "-I- === Enable PMECC OS Parameters ==="
-   NANDFLASH::NandHeaderValue HEADER $pmeccConfig
-}
-
-puts "-I- === Erase all the NAND flash blocs and test the erasing ==="
-NANDFLASH::EraseAllNandFlash
-
-puts "-I- === Load AT91Bootstrap in the first sector ==="
-if {$pmeccConfig != "none"} {
-   NANDFLASH::SendBootFilePmeccCmd $bootstrapFile
-} else {
-   NANDFLASH::sendBootFile $bootstrapFile
-}
-
-puts "-I- === Load u-boot in the next sectors ==="
-send_file {NandFlash} "$ubootFile" $ubootAddr 0 
-
-if {$build_uboot_env == "yes"} {
-   puts "-I- === Load the u-boot environment variables ==="
-   set fh [open "$ubootEnvFile" w]
-   fconfigure $fh -translation binary
-   puts -nonewline $fh [set_uboot_env u_boot_variables]
-   close $fh
-   send_file {NandFlash} "$ubootEnvFile" $ubootEnvAddr 0
-}
-
-puts "-I- === Load the Kernel image and device tree database ==="
-send_file {NandFlash} "$dtbFile" $dtbAddr 0
-send_file {NandFlash} "$kernelFile" $kernelAddr 0
-
-if {$pmeccConfig != "none"} {
-   puts "-I- === Enable trimffs ==="
-   NANDFLASH::NandSetTrimffs 1
-}
-
-puts "-I- === Load the linux file system ==="
-send_file {NandFlash} "$rootfsFile" $rootfsAddr 0
-
-puts "-I- === DONE. ==="

board/atmel/readme.txt

@@ -1,173 +0,0 @@
-This document explains how to set up a basic Buildroot system on various
-Atmel boards. Additional details can also be found on the Linux4SAM website:
-http://www.at91.com/linux4sam/bin/view/Linux4SAM/
-
-This guide covers the following configurations:
- - at91sam9g45m10ek_defconfig
- - at91sam9rlek_defconfig
- - at91sam9x5ek_defconfig (at91sam9g15, at91sam9g25, at91sam9x25,
-   at91sam9g35 and at91sam9x35)
- - atmel_sama5d3xek_defconfig (sama5d31, sama5d33, sama5d34, sama5d35,
-   sama5d36)
- - atmel_sama5d3_xplained_defconfig
- - atmel_sama5d3_xplained_dev_defconfig
- - atmel_sama5d3_xplained_mmc_defconfig
- - atmel_sama5d3_xplained_mmc_dev_defconfig
- - atmel_sama5d4_xplained_defconfig
- - atmel_sama5d4_xplained_dev_defconfig
- - atmel_sama5d4_xplained_mmc_defconfig
- - atmel_sama5d4_xplained_mmc_dev_defconfig
- - atmel_sama5d2_xplained_mmc_defconfig
- - atmel_sama5d2_xplained_mmc_dev_defconfig
-
-These configurations will use AT91Bootstrap, u-boot and a linux kernel from
-the git trees maintained by Atmel.
-
-The configurations labeled as 'dev' provide a development rootfs with tools to
-tests the features of the SoC:
-- ALSA tools to test audio
-- FFMPEG to record video from the ISI/ISC
-- I2C, SPI, CAN, etc. tools
-- modetest for LCD screens, HDMI
-- Wilc1000 firmware for the Atmel Wireless sdio module
-- SSH for convenience
-- GDB/GDB server for debug
-
-Configuring and building Buildroot
-==================================
-
-For most configurations listed above, the Buildroot configuration
-assumes the system will be flashed on NAND. In this case, after
-building Buildroot, follow the instructions in the "Flashing the NAND
-using SAM-BA" section below.
-
-For the Xplained boards, an alternative Buildroot configuration is
-provided to boot from an SD card. Those configurations are labeled as
-'mmc'. In this case, after building Buildroot, follow the instructions
-in the "Preparting the SD card" sction.
-
-To configure and build Buildroot, run:
-
-  make <board>_defconfig
-  make
-
-Flashing the NAND using SAM-BA
-==============================
-
-Flashing the board
-------------------
-
-Connect the board:
- o at91sam9g45m10ek: DBGU: J10, USB sam-ba: J14
- o at91sam9rlek: DBGU: J19, USB sam-ba: J21
- o at91sam9x5ek: DBGU: J11, USB sam-ba: J20
- o sama5d3xek: DBGU: J14, USB sam-ba: J20
- o sama5d3 Xplained: DBGU: J23, USB sam-ba: J6
- o sama5d4ek: DBGU: J22 or J24, USB sam-ba: J1
- o sama5d4 Xplained: DBGU: J1, USB sam-ba: J11
-
-Start the board in RomBOOT:
- o at91sam9g45m10ek:
-    1. open JP8, JP10 and JP12
-    2. start the board
-    3. close JP8, JP10 and JP12
-
- o at91sam9rlek:
-   1. J11 on 1-2 (BMS=1), open J12 and J13
-   2. start the board
-   3. close J12 and J13
-
- o at91sam9x5ek:
-   1. open JP9 and:
-      - Cogent: open *NCS jumper
-      - Embest: open SW1
-      - Ronetix: open J1 and J2
-   2. start the board
-   3. close JP9 and:
-      - Cogent: close *NCS jumper
-      - Embest: close SW1 (ON position)
-      - Ronetix: close J1 and J2
-
- o sama5d3xek:
-   1. start the board
-   2. push BP4 and BP1
-   3. release BP1
-   4. release BP4
-
- o sama5d3 Xplained:
-   1. open JP5 (NANDCS) and JP6 (SPICS)
-   2. start the board
-   3. close JP5 ans JP6
-
- o sama5d4ek:
-   1. start the board
-   2. push BP3 and BP4
-   3. release BP4
-   4. release BP3
-
- o sama5d4 Xplained:
-   1. close JP7 (BOOT_DIS)
-   2. start the board
-   3. open JP7
-
-"RomBOOT" should appear on your console (this should be ttyUSBx or ttyACMx)
-
-Now locate the USB sam-ba interface it should be ttyACMx, usually ttyACM0
-dmesg on your machine should give:
-usb 1-2.1.4: New USB device found, idVendor=03eb, idProduct=6124
-usb 1-2.1.4: New USB device strings: Mfr=0, Product=0, SerialNumber=0
-cdc_acm 1-2.1.4:1.0: ttyACM0: USB ACM device
-
-Look for idVendor=03eb, idProduct=6124, this is the interface you want to use.
-
-You can then flash the board using the provided flasher.sh script in board/atmel:
-
-board/atmel/flasher.sh <builddir_path> <interface> <board>
-
-For example, for an out of tree build made in
-/tmp/atmel_sama5d3_xplained/ for the sama5d3 Xplained, you would use:
-board/atmel/flasher.sh /tmp/atmel_sama5d3_xplained/ /dev/ttyACM0 sama5d3_xplained
-
-Reboot, the system should boot up to the buildroot login invite.
-
-Preparing the SD card
-=====================
-
-An image named sdcard.img is automatically generated. With this image,
-you no longer have to care about the creation of the partition and
-copying files to the SD card.
-
-You need at least a 1GB SD card. All the data on the SD card will be
-lost. To copy the image on the SD card:
-
-/!\ Caution be sure to do it on the right mmcblk device /!\
-
-dd if=output/images/sdcard.img of=/dev/mmcblk0
-
-Insert your SD card in your Xplained board, and enjoy. The default
-U-Boot environment will load properly the kernel and Device Tree blob
-from the first partition of the SD card, so everything works
-automatically.
-
-By default a 16MB FAT partition is created. It contains at91bootstrap,
-u-boot, the kernel image and all dtb variants for your board. The dtb
-used is the basic one:
-
-U-Boot> print
-[...]
-bootcmd=fatload mmc 1:1 0x21000000 at91-sama5d2_xplained.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
-[...]
-
-If you want to use a variant such as the _pda7 one, you will have to
-update your u-boot environment:
-
-U-Boot> setenv bootcmd 'fatload mmc 1:1 0x21000000 at91-sama5d2_xplained_pda7.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000'
-U-Boot> save
-Saving Environment to FAT...
-writing uboot.env
-done
-
-A 512MB ext4 partition is also created to store the rootfs generated.
-
-If you want to customize the size of the partitions and their content,
-take a look at the the genimage.cfg file in the board directory.

board/atmel/sama5d2_xplained_mmc/genimage.cfg

@@ -1,34 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D2 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d2_xplained.dtb",
-			"at91-sama5d2_xplained_pda4.dtb",
-			"at91-sama5d2_xplained_pda7.dtb",
-			"at91-sama5d2_xplained_pda7b.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/atmel/sama5d2_xplained_mmc/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                               \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/atmel/sama5d3_xplained_mmc/genimage.cfg

@@ -1,34 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D3 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d3_xplained.dtb",
-			"at91-sama5d3_xplained_pda4.dtb",
-			"at91-sama5d3_xplained_pda7.dtb",
-			"at91-sama5d3_xplained_pda7b.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/atmel/sama5d3_xplained_mmc/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                               \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/atmel/sama5d4_xplained_mmc/genimage.cfg

@@ -1,35 +0,0 @@
-# Image for SD card boot on Atmel SAMA5D4 Xplained boards
-#
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"at91-sama5d4_xplained.dtb",
-			"at91-sama5d4_xplained_hdmi.dtb",
-			"at91-sama5d4_xplained_pda4.dtb",
-			"at91-sama5d4_xplained_pda7.dtb",
-			"at91-sama5d4_xplained_pda7b.dtb",
-			"boot.bin",
-			"u-boot.bin"
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 1M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/atmel/sama5d4_xplained_mmc/post-image.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                               \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"

board/beaglebone/genimage.cfg

@@ -1,32 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"MLO",
-			"u-boot.img",
-			"zImage",
-			"uEnv.txt",
-			"am335x-evm.dtb",
-			"am335x-evmsk.dtb",
-			"am335x-bone.dtb",
-			"am335x-boneblack.dtb",
-		}
-	}
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		partition-type = 0xC
-		bootable = "true"
-                image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/beaglebone/linux-3.8.config

@@ -0,0 +1,203 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_DEFAULT_HOSTNAME="beaglebone"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_ARCH_OMAP=y
+CONFIG_OMAP_RESET_CLOCKS=y
+CONFIG_OMAP_MUX_DEBUG=y
+# CONFIG_ARCH_OMAP2 is not set
+# CONFIG_ARCH_OMAP3 is not set
+# CONFIG_ARCH_OMAP4 is not set
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_ERRATA_720789=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
+CONFIG_KEXEC=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_NEON=y
+CONFIG_BINFMT_MISC=y
+CONFIG_PM_DEBUG=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_OMAP_OCP2SCP=y
+CONFIG_OMAP_INTERCONNECT=y
+CONFIG_CONNECTOR=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=16384
+CONFIG_EEPROM_93CX6=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_ATA=y
+# CONFIG_SATA_PMP is not set
+CONFIG_SATA_AHCI_PLATFORM=m
+# CONFIG_ATA_SFF is not set
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_TI_CPSW=y
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_POLLDEV=m
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_MISC=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=32
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_SPI=y
+CONFIG_SPI_OMAP24XX=y
+CONFIG_DEBUG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_W1=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_OMAP_WATCHDOG=y
+CONFIG_MFD_TPS65217=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_TPS65023=y
+CONFIG_REGULATOR_TPS6507X=y
+CONFIG_REGULATOR_TPS65217=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_MON=y
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_AM35X=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_TEST=y
+CONFIG_OMAP_USB2=m
+CONFIG_OMAP_USB3=m
+CONFIG_OMAP_CONTROL_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_DEBUG_FS=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_OMAP=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_OMAP=y
+CONFIG_DMADEVICES=y
+CONFIG_TI_EDMA=y
+CONFIG_DMA_OMAP=y
+CONFIG_STAGING=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V2=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_SCHEDSTATS=y
+CONFIG_TIMER_STATS=y
+CONFIG_PROVE_LOCKING=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_LZO=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRC_CCITT=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=y
+CONFIG_AVERAGE=y

board/beaglebone/linux-4.1-sgx.fragment

@@ -1,12 +0,0 @@
-CONFIG_PREEMPT=y
-CONFIG_PREEMPT_COUNT=y
-CONFIG_OMAP2_DSS_INIT=y
-CONFIG_OMAP_DSS_BASE=y
-CONFIG_OMAP2_DSS=y
-CONFIG_OMAP2_DSS_DPI=y
-CONFIG_DRM_OMAP=y
-CONFIG_DRM_OMAP_NUM_CRTCS=2
-CONFIG_DRM_OMAP_WB_M2M=y
-CONFIG_DRM_TILCDC=y
-CONFIG_DRM_I2C_NXP_TDA998X=y
-CONFIG_DRM=y

board/beaglebone/patches/linux/0001-keep-jtag-clock-alive-for-debugger.patch

@@ -1,16 +0,0 @@
-This patch keeps the debugSS clock alive, it clocks the JTAG macro and enables
-access to the SoC via JTAG after the kernel booted.
-
-Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
----
-diff -Naur linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
---- linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c	2015-10-02 17:30:56.000000000 +0200
-+++ linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c	2016-08-15 11:28:55.017617612 +0200
-@@ -208,6 +208,7 @@
- 	.name		= "debugss",
- 	.class		= &am33xx_debugss_hwmod_class,
- 	.clkdm_name	= "l3_aon_clkdm",
-+	.flags		= (HWMOD_INIT_NO_IDLE|HWMOD_INIT_NO_RESET), /* keep debugSS clock alive for JTAG */
- 	.main_clk	= "trace_clk_div_ck",
- 	.prcm		= {
- 		.omap4	= {

board/beaglebone/post-image.sh

@@ -1,21 +0,0 @@
-#!/bin/sh
-# post-image.sh for CircuitCo BeagleBone and TI am335x-evm
-# 2014, Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
-# 2016, Lothar Felten <lothar.felten@gmail.com>
-
-BOARD_DIR="$(dirname $0)"
-
-# copy the uEnv.txt to the output/images directory
-cp board/beaglebone/uEnv.txt $BINARIES_DIR/uEnv.txt
-
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-    --rootpath "${TARGET_DIR}" \
-    --tmppath "${GENIMAGE_TMP}" \
-    --inputpath "${BINARIES_DIR}" \
-    --outputpath "${BINARIES_DIR}" \
-    --config "${GENIMAGE_CFG}"

board/beaglebone/readme.txt

@@ -1,52 +0,0 @@
-CircuitCo BeagleBone
-Texas Instuments AM335x Evaluation Module (TMDXEVM3358)
-
-Description
-===========
-
-This configuration will build a complete image for the beaglebone and
-the TI AM335x-EVM, the board type is identified by the on-board
-EEPROM. The configuration is based on the
-ti-processor-sdk-02.00.00.00. Device tree blobs for beaglebone
-variants and the evm-sk are built too.
-
-For Qt5 support support use the beaglebone_qt5_defconfig.
-
-How to build it
-===============
-
-Select the default configuration for the target:
-$ make beaglebone_defconfig
-
-Optional: modify the configuration:
-$ make menuconfig
-
-Build:
-$ make
-
-Result of the build
-===================
-output/images/
-├── am335x-boneblack.dtb
-├── am335x-bone.dtb
-├── am335x-evm.dtb
-├── am335x-evmsk.dtb
-├── boot.vfat
-├── MLO
-├── rootfs.ext2
-├── rootfs.tar
-├── sdcard.img
-├── u-boot.img
-├── uEnv.txt
-└── zImage
-
-To copy the image file to the sdcard use dd:
-$ dd if=output/images/sdcard.img of=/dev/XXX
-
-Tested hardware
-===============
-am335x-evm (rev. 1.1A)
-beagleboneblack (rev. A5A)
-beaglebone (rev. A6)
-
-2016, Lothar Felten <lothar.felten@gmail.com>

board/beaglebone/uEnv.txt

@@ -1,4 +0,0 @@
-bootpart=0:1
-bootdir=
-bootargs=console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
-uenvcmd=run loadimage;run loadfdt;printenv bootargs;bootz ${loadaddr} - ${fdtaddr};

board/boundarydevices/common/6x_bootscript.txt

@@ -1,130 +0,0 @@
-setenv bootargs ''
-
-if itest.s x6SX == "x${cpu}" || itest.s x7D == "x${cpu}"; then
-	a_script=0x80800000
-	a_zImage=0x80800000
-	a_fdt=0x83000000
-	m4=''
-	if itest.s "x1" == "x$m4enabled" ; then
-		run m4boot;
-		m4='-m4';
-	fi
-else
-	a_script=0x10800000
-	a_zImage=0x10800000
-	a_fdt=0x13000000
-fi
-
-setenv initrd_high 0xffffffff
-if itest.s "x" == "x${dtbname}" ; then
-	if itest.s x6SOLO == "x${cpu}" ; then
-		dtbname=imx6dl-${board}.dtb;
-	elif itest.s x6DL == "x${cpu}" ; then
-		dtbname=imx6dl-${board}.dtb;
-	elif itest.s x6QP == "x${cpu}" ; then
-		dtbname=imx6qp-${board}.dtb;
-	elif itest.s x6SX == "x${cpu}" ; then
-		dtbname=imx6sx-${board}${m4}.dtb;
-	elif itest.s x7D == "x${cpu}" ; then
-		dtbname=imx7d-${board}${m4}.dtb;
-	else
-		dtbname=imx6q-${board}.dtb;
-	fi
-fi
-
-if load ${dtype} ${disk}:1 ${a_script} uEnv.txt ; then
-    env import -t ${a_script} ${filesize}
-fi
-
-if itest.s x == x${bootdir} ; then
-	bootdir=/boot/
-fi
-
-if itest.s x${bootpart} == x ; then
-	bootpart=1
-fi
-
-if load ${dtype} ${disk}:${bootpart} ${a_fdt} ${bootdir}${dtbname} ; then
-	fdt addr ${a_fdt}
-	setenv fdt_high 0xffffffff
-else
-	echo "!!!! Error loading ${bootdir}${dtbname}";
-	exit;
-fi
-
-cmd_xxx_present=
-fdt resize
-if itest.s "x" != "x${cmd_custom}" ; then
-	run cmd_custom
-	cmd_xxx_present=1;
-fi
-
-if itest.s "x" != "x${cmd_hdmi}" ; then
-	run cmd_hdmi
-	cmd_xxx_present=1;
-	if itest.s x == x${allow_noncea} ; then
-		setenv bootargs ${bootargs} mxc_hdmi.only_cea=1;
-		echo "only CEA modes allowed on HDMI port";
-	else
-		setenv bootargs ${bootargs} mxc_hdmi.only_cea=0;
-		echo "non-CEA modes allowed on HDMI, audio may be affected";
-	fi
-fi
-
-if itest.s "x" != "x${cmd_lcd}" ; then
-	run cmd_lcd
-	cmd_xxx_present=1;
-fi
-if itest.s "x" != "x${cmd_lvds}" ; then
-	run cmd_lvds
-	cmd_xxx_present=1;
-fi
-if itest.s "x" != "x${cmd_lvds2}" ; then
-	run cmd_lvds2
-	cmd_xxx_present=1;
-fi
-
-if itest.s "x" == "x${cmd_xxx_present}" ; then
-	echo "!!!!!!!!!!!!!!!!"
-	echo "warning: your u-boot may be outdated, please upgrade"
-	echo "!!!!!!!!!!!!!!!!"
-fi
-
-setenv bootargs "${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc"
-
-if test "sata" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
-elif test "usb" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
-else
-	setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bootpart}"
-fi
-
-if itest.s "x" != "x${disable_giga}" ; then
-	setenv bootargs ${bootargs} fec.disable_giga=1
-fi
-
-if itest.s "x" != "x${wlmac}" ; then
-	setenv bootargs ${bootargs} wlcore.mac=${wlmac}
-fi
-
-if itest.s "x" != "x${gpumem}" ; then
-	setenv bootargs ${bootargs} galcore.contiguousSize=${gpumem}
-fi
-
-if itest.s "x" != "x${cma}" ; then
-	setenv bootargs ${bootargs} cma=${cma}
-fi
-
-if itest.s "x" != "x${show_fdt}" ; then
-	fdt print /
-fi
-
-if itest.s "x" != "x${show_env}" ; then
-	printenv
-fi
-
-if load ${dtype} ${disk}:${bootpart} ${a_zImage} ${bootdir}/zImage ; then
-	bootz ${a_zImage} - ${a_fdt}
-fi
-echo "Error loading kernel image"

board/boundarydevices/common/6x_upgrade.txt

@@ -1,69 +0,0 @@
-if itest.s a$uboot_defconfig == a; then
-        echo "Please set uboot_defconfig to the appropriate value"
-        exit
-fi
-
-offset=0x400
-a_uImage1=0x12000000
-a_uImage2=0x12400000
-
-if itest.s x6SX == "x${cpu}" || itest.s x7D == "x${cpu}"; then
-	a_uImage1=0x82000000
-	a_uImage2=0x82400000
-fi
-
-setenv stdout serial,vga
-echo "check U-Boot" ;
-
-if load ${dtype} ${disk}:1 ${a_uImage1} u-boot.$uboot_defconfig ; then
-else
-	echo "No U-Boot image found on SD card" ;
-	exit
-fi
-echo "read $filesize bytes from SD card" ;
-if sf probe || sf probe || sf probe 1 27000000 || sf probe 1 27000000 ; then
-	echo "probed SPI ROM" ;
-else
-	echo "Error initializing EEPROM" ;
-	exit
-fi ;
-if sf read ${a_uImage2} $offset $filesize ; then
-else
-	echo "Error reading boot loader from EEPROM" ;
-	exit
-fi
-if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
-	echo "------- U-Boot versions match" ;
-	exit
-fi
-echo "Need U-Boot upgrade" ;
-echo "Program in 5 seconds" ;
-for n in 5 4 3 2 1 ; do
-	echo $n ;
-	sleep 1 ;
-done
-echo "erasing" ;
-sf erase 0 0xC0000 ;
-
-# two steps to prevent bricking
-echo "programming" ;
-setexpr a1 ${a_uImage1} + 0x400
-setexpr o1 ${offset} + 0x400
-setexpr s1 ${filesize} - 0x400
-sf write ${a1} ${o1} ${s1} ;
-sf write ${a_uImage1} $offset 0x400 ;
-
-echo "verifying" ;
-if sf read ${a_uImage2} $offset $filesize ; then
-else
-	echo "Error re-reading EEPROM" ;
-	exit
-fi
-if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
-else
-	echo "Read verification error" ;
-	exit
-fi
-while echo "---- U-Boot upgraded. reset" ; do
-	sleep 120
-done

board/boundarydevices/common/genimage.cfg

@@ -1,18 +0,0 @@
-# Minimal SD card image for Boundary Devices platforms
-#
-# It does not need a boot section for a bootloader since it is booted
-# from its NOR flash memory.
-#
-# To update the bootloader, execute the following from U-Boot prompt:
-# => run upgradeu
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/boundarydevices/common/post-build.sh

@@ -1,20 +0,0 @@
-#!/bin/sh
-# post-build fixups
-# for further details, see
-#
-#  http://boundarydevices.com/u-boot-on-i-mx6/
-#
-
-BOARD_DIR="$(dirname $0)"
-
-# bd u-boot looks for bootscript here
-$HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
--n "boot script" -d $BOARD_DIR/6x_bootscript.txt $TARGET_DIR/6x_bootscript
-
-# u-boot / update script for bd upgradeu command
-if [ -e $BINARIES_DIR/u-boot.imx ];
-then
-    install -D -m 0644 $BINARIES_DIR/u-boot.imx $TARGET_DIR/u-boot.imx
-    $HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
-    -n "upgrade script" -d $BOARD_DIR/6x_upgrade.txt $TARGET_DIR/6x_upgrade
-fi

board/boundarydevices/common/post-image.sh

@@ -1,16 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                           \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"
-
-exit $?

board/boundarydevices/common/readme.txt

@@ -1,30 +0,0 @@
-Buildroot for Boundary Devices platforms:
-
-https://boundarydevices.com/product-category/popular-sbc-and-som-modules/
-
-Here is the list of targeted platforms per defconfig:
-
-- nitrogen6x_defconfig
-  - BD-SL-i.MX6 (SABRE-Lite)
-  - Nitrogen6X
-  - Nitrogen6_Lite
-  - Nitrogen6_MAX
-  - Nitrogen6_VM
-  - Nitrogen6_SOM
-  - Nitrogen6_SOMv2
-
-- nitrogen6sx_defconfig
-  - Nitrogen6_SoloX
-
-- nitrogen7_defconfig
-  - Nitrogen7
-
-To install, simply copy the image to a uSD card:
-
-$ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Where 'sdX' is the device node of the uSD partition.
-
-To upgrade u-boot, cancel autoboot and type:
-
-> run upgradeu

board/boundarydevices/nitrogen6x/post-build.sh

@@ -0,0 +1,18 @@
+#!/bin/sh
+# post-build fixups
+# for furthe details, see
+# http://boundarydevices.com/u-boot-conventions-for-i-mx6-nitrogen6x-and-sabrelite/
+
+TARGET_DIR=$1
+IMAGES_DIR=$1/../images
+BOARD_DIR="$(dirname $0)"
+
+# bd u-boot looks for bootscript here
+cp $BOARD_DIR/6q_bootscript $TARGET_DIR
+
+# u-boot / update script for bd upgradeu command
+if [ -e $IMAGES_DIR/u-boot.bin ];
+then
+    cp $IMAGES_DIR/u-boot.bin $TARGET_DIR
+    cp $BOARD_DIR/6q_upgrade $TARGET_DIR
+fi

board/boundarydevices/nitrogen6x/readme.txt

@@ -0,0 +1,9 @@
+Buildroot for Boundary Devices Nitrogen6X:
+
+http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/
+
+To install, simply extract rootfs.ext2 to first partition of a uSD card:
+
+sudo dd if=output/images/rootfs.ext2 of=/dev/sdX1
+
+Where 'sdX1' is the device node of the uSD partition.

board/calao/qil-a9260/at91bootstrap-1.16-qil-a9260.patch

@@ -0,0 +1,603 @@
+From a3e08beea8bf5e96e1237eef4a82f4a2fdd5286b Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Thu, 19 Jul 2012 14:19:59 +0200
+Subject: [PATCH] Add support for the Calao-systems QIL-A9260
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/qil_a9260/nandflash/Makefile    |  122 ++++++++++++++
+ board/qil_a9260/nandflash/qil-a9260.h |  109 ++++++++++++
+ board/qil_a9260/qil_a9260.c           |  298 +++++++++++++++++++++++++++++++++
+ crt0_gnu.S                            |    7 +
+ include/part.h                        |    6 +-
+ 5 files changed, 541 insertions(+), 1 deletions(-)
+ create mode 100644 board/qil_a9260/nandflash/Makefile
+ create mode 100644 board/qil_a9260/nandflash/qil-a9260.h
+ create mode 100644 board/qil_a9260/qil_a9260.c
+
+diff --git a/board/qil_a9260/nandflash/Makefile b/board/qil_a9260/nandflash/Makefile
+new file mode 100644
+index 0000000..209a25f
+--- /dev/null
++++ b/board/qil_a9260/nandflash/Makefile
+@@ -0,0 +1,122 @@
++# TODO: set this appropriately for your local toolchain
++ifndef ERASE_FCT
++ERASE_FCT=rm -f
++endif
++ifndef CROSS_COMPILE
++CROSS_COMPILE=arm-elf-
++endif
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for QIL-A9260
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9260
++# Board name (case sensitive!!!)
++BOARD=qil_a9260
++# Link Address and Top_of_Memory
++LINK_ADDR=0x200000
++TOP_OF_MEMORY=0x301000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++
++
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	$(ERASE_FCT) *.o *.bin *.elf *.map
+diff --git a/board/qil_a9260/nandflash/qil-a9260.h b/board/qil_a9260/nandflash/qil-a9260.h
+new file mode 100644
+index 0000000..c87002e
+--- /dev/null
++++ b/board/qil_a9260/nandflash/qil-a9260.h
+@@ -0,0 +1,109 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : qil-a9260.h
++ * Object              :
++ * Creation            : GH July 19th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _QIL_A9260_H
++#define _QIL_A9260_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(180000000/2)
++#define PLL_LOCK_TIMEOUT	1000000
++
++#define PLLA_SETTINGS	0x20593F06
++#define PLLB_SETTINGS	0x10483F0E
++
++/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
++#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
++#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
++#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
++
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
++
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
++/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(1 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(1 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(3 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
++#define AT91C_SM_NRD_PULSE	(3 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(5 << 0)
++#define AT91C_SM_NRD_CYCLE	(5 << 16)
++#define AT91C_SM_TDF	        (2 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
++#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
++
++#define MACH_TYPE       	0x6AF		/* QIL-A9260 */
++#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++
++#define CFG_HW_INIT
++#define CFG_SDRAM
++
++#endif	/* _QIL_A9260_H */
+diff --git a/board/qil_a9260/qil_a9260.c b/board/qil_a9260/qil_a9260.c
+new file mode 100644
+index 0000000..ae122e7
+--- /dev/null
++++ b/board/qil_a9260/qil_a9260.c
+@@ -0,0 +1,298 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaiimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : qil_a9260.c
++ * Object              :
++ * Creation            : GH July 19th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++#ifdef CFG_DATAFLASH
++#include "../../include/dataflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++#ifdef CFG_HW_INIT
++/*----------------------------------------------------------------------------*/
++/* \fn    hw_init							      */
++/* \brief This function performs very low level HW initialization	      */
++/* This function is invoked as soon as possible during the c_startup	      */
++/* The bss segment must be initialized					      */
++/*----------------------------------------------------------------------------*/
++void hw_init(void)
++{
++	unsigned int cp15;
++	
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA = 2 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure CP15 */
++	cp15 = get_cp15();
++	cp15 |= I_CACHE;
++	set_cp15(cp15);
++
++	/* Configure the PIO controller */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI Slave Slot Cycle to 64 */
++	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_2 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_2 |
++				AT91C_SDRAMC_TRC_7 |
++				AT91C_SDRAMC_TRP_2 |
++				AT91C_SDRAMC_TRCD_2 |
++				AT91C_SDRAMC_TRAS_5 |
++				AT91C_SDRAMC_TXSR_8,		/* Control Register */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
++
++
++#endif /* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++#ifdef CFG_SDRAM
++/*------------------------------------------------------------------------------*/
++/* \fn    sdramc_hw_init							*/
++/* \brief This function performs SDRAMC HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++/*	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++*/
++	/* Configure the SDRAMC PIO controller to output PCK0 */
++/*	pio_setup(sdramc_pio); */
++
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
++
++}
++#endif /* CFG_SDRAM */
++
++#ifdef CFG_DATAFLASH
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_recovery								*/
++/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++void df_recovery(AT91PS_DF pDf)
++{
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase DataFlash Page 0*/
++	if ( !pio_get_value(AT91C_PIN_PB(10)) )
++		df_page_erase(pDf, 0);
++#endif
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_hw_init								*/
++/* \brief This function performs DataFlash HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void df_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc df_pio[] = {
++		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	pio_setup(df_pio);
++}
++#endif /* CFG_DATAFLASH */
++
++
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery						*/
++/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PB(10)) )
++		AT91F_NandEraseBlock0();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(nand_pio);
++	
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++
++#endif /* #ifdef CFG_NANDFLASH */
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..002feef 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,13 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
++
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/include/part.h b/include/part.h
+index ba5985a..bbd33fe 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -35,7 +35,11 @@
+ 
+ #ifdef AT91SAM9260
+ #include "AT91SAM9260_inc.h"
+-#include "at91sam9260ek.h"
++	#ifdef at91sam9260ek
++	#include "at91sam9260ek.h"
++	#elif qil_a9260
++	#include "qil-a9260.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91SAM9XE
+-- 
+1.5.6.3
+

board/calao/qil-a9260/barebox-2012.07.0-qil-a9260.patch

@@ -0,0 +1,36 @@
+From d076aa6182dc6df6bb311e60bbddb03573b9483b Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Fri, 3 Aug 2012 11:25:49 +0200
+Subject: [PATCH] Enable pull-up on Rx serial ports for the CALAO MB-QIL-A9260
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ arch/arm/boards/qil-a9260/init.c |    6 ++++++
+ 1 files changed, 6 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/boards/qil-a9260/init.c b/arch/arm/boards/qil-a9260/init.c
+index 305d733..b43cace 100644
+--- a/arch/arm/boards/qil-a9260/init.c
++++ b/arch/arm/boards/qil-a9260/init.c
+@@ -196,11 +196,17 @@ device_initcall(qil_a9260_devices_init);
+ static int qil_a9260_console_init(void)
+ {
+ 	at91_register_uart(0, 0);
++	at91_set_A_periph(AT91_PIN_PB14, 1);    /* Enable pull-up on DRXD */
++
+ 	at91_register_uart(1, ATMEL_UART_CTS | ATMEL_UART_RTS
+ 			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+ 			   | ATMEL_UART_RI);
++
+ 	at91_register_uart(2, ATMEL_UART_CTS | ATMEL_UART_RTS);
++	at91_set_A_periph(AT91_PIN_PB7, 1);	/* Enable pull-up on RXD1 */
++
+ 	at91_register_uart(3, ATMEL_UART_CTS | ATMEL_UART_RTS);
++	at91_set_A_periph(AT91_PIN_PB9, 1);	/* Enable pull-up on RXD2 */
+ 
+ 	return 0;
+ }
+-- 
+1.5.6.3
+

board/calao/qil-a9260/linux-3.4.7.config

@@ -0,0 +1,111 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_AT91_SLOW_CLOCK=y
+CONFIG_AT91_EARLY_USART0=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS1,115200"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_MMC=y
+CONFIG_MMC_AT91=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M41T94=y
+CONFIG_EXT2_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y

board/calao/qil-a9260/linux-3.4.7.patch

@@ -0,0 +1,27 @@
+From fe6432a9728b62bce3db73c5a4efe026018fd495 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Fri, 3 Aug 2012 16:45:37 +0200
+Subject: [PATCH] QIL-A9260: rtc modalias m41t48 renamed to rtc-m41t48
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ arch/arm/mach-at91/board-qil-a9260.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
+index bf351e2..c0df05c 100644
+--- a/arch/arm/mach-at91/board-qil-a9260.c
++++ b/arch/arm/mach-at91/board-qil-a9260.c
+@@ -78,7 +78,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
+ static struct spi_board_info ek_spi_devices[] = {
+ #if defined(CONFIG_RTC_DRV_M41T94)
+ 	{	/* M41T94 RTC */
+-		.modalias	= "m41t94",
++		.modalias	= "rtc-m41t94",
+ 		.chip_select	= 0,
+ 		.max_speed_hz	= 1 * 1000 * 1000,
+ 		.bus_num	= 0,
+-- 
+1.5.6.3
+

board/calao/snowball/linux-3.4.patch

@@ -0,0 +1,45 @@
+From 3d1a9b44b9dcd2c0f5d54c09596c96c0524d8340 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Tue, 13 Nov 2012 11:47:41 +0100
+Subject: [PATCH] trace-debug[stm]: Fix for BT/WLAN instability
+
+Pins under mop500_ske_pins array are used for different
+functionalities in snowball. Ex: GPIO161 pin configured
+for keypad here must stay configured as GPIO alternate
+function for operating PMU_EN pin of BT/WLAN chip in snowball.
+So forbid configuring these pins, for snowball
+
+Signed-off-by: Rajanikanth H.V <rajanikanth.hv@stericsson.com>
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ arch/arm/mach-ux500/board-mop500-stm.c |    7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-ux500/board-mop500-stm.c b/arch/arm/mach-ux500/board-mop500-stm.c
+index 1bef2a0..532fb9e 100644
+--- a/arch/arm/mach-ux500/board-mop500-stm.c
++++ b/arch/arm/mach-ux500/board-mop500-stm.c
+@@ -121,7 +121,9 @@ static int stm_ste_disable_ape_on_mipi60(void)
+ 	if (retval)
+ 		STM_ERR("Failed to disable MIPI60\n");
+ 	else {
+-		retval = nmk_config_pins(ARRAY_AND_SIZE(mop500_ske_pins));
++		if (!machine_is_snowball())
++			retval = nmk_config_pins(
++				ARRAY_AND_SIZE(mop500_ske_pins));
+ 		if (retval)
+ 			STM_ERR("Failed to enable SKE gpio\n");
+ 	}
+@@ -314,7 +316,8 @@ static int stm_ste_connection(enum stm_connection_type con_type)
+ 		/* Enable altC3 on GPIO70-74 (STMMOD) and GPIO75-76 (UARTMOD) */
+ 		prcmu_enable_stm_mod_uart();
+ 		/* Enable APE on MIPI60 */
+-		retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
++		if (!machine_is_snowball())
++			retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
+ 		if (retval)
+ 			STM_ERR("Failed to disable SKE GPIO\n");
+ 		else {
+-- 
+1.7.9.5
+

board/calao/tny-a9g20-lpw/at91bootstrap-1.16-tny-a9g20-lpw.patch

@@ -0,0 +1,551 @@
+From 53bd82b122f4530a98cba45795832820bb1d0b45 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Mon, 13 Aug 2012 11:26:10 +0200
+Subject: [PATCH] Add support for the Calao-systems TNY-A9G20-LPW
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/tny_a9g20_lpw/nandflash/Makefile        |  121 ++++++++++++
+ board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h |  114 ++++++++++++
+ board/tny_a9g20_lpw/tny_a9g20_lpw.c           |  243 +++++++++++++++++++++++++
+ crt0_gnu.S                                    |    6 +
+ include/part.h                                |    6 +-
+ 5 files changed, 489 insertions(+), 1 deletion(-)
+ create mode 100644 board/tny_a9g20_lpw/nandflash/Makefile
+ create mode 100644 board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
+ create mode 100644 board/tny_a9g20_lpw/tny_a9g20_lpw.c
+
+diff --git a/board/tny_a9g20_lpw/nandflash/Makefile b/board/tny_a9g20_lpw/nandflash/Makefile
+new file mode 100644
+index 0000000..7efbea7
+--- /dev/null
++++ b/board/tny_a9g20_lpw/nandflash/Makefile
+@@ -0,0 +1,121 @@
++# TODO: set this appropriately for your local toolchain
++ifndef ERASE_FCT
++ERASE_FCT=rm -f
++endif
++ifndef CROSS_COMPILE
++CROSS_COMPILE=arm-elf-
++endif
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for AT91SAM9260EK
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9G20
++# Board name (case sensitive!!!)
++BOARD=tny_a9g20_lpw
++# Link Address and Top_of_Memory
++LINK_ADDR=0x200000
++TOP_OF_MEMORY=0x301000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++
++
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	$(ERASE_FCT) *.o *.bin *.elf *.map
+diff --git a/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
+new file mode 100644
+index 0000000..b1f8a1d
+--- /dev/null
++++ b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
+@@ -0,0 +1,114 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2008, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : tny-a9g20-lpw.h
++ * Object              :
++ * Creation            : GH August 13th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _TNY_A9G20_LPW_H
++#define _TNY_A9G20_LPW_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(100000000)
++#define PLL_LOCK_TIMEOUT	1000000
++
++/* set PLLA to 800Mhz from MAINCK= 12Mhz MULA=199 (0xC7+1= 200), DIVA=0x03 (Fplla=12Mhz x [(199+1)/3]=800Mhz) */
++#define PLLA_SETTINGS   0x20C73F03
++#define PLLB_SETTINGS   0x100F3F02
++
++/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
++/* LP-SDRAM (fmax=100Mhz) PDIV=0 => PRESCALER CLK=PCLK; */
++/* MDIV = 2 => PRESCALER CLK / 4 = MCLK=100Mhz */
++/* PRESCALER CLK = PLLA (800Mhz) / 2 (PRES=1) = 400Mhz */
++#define MCKR_SETTINGS           0x0204 
++#define MCKR_CSS_SETTINGS       (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
++#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
++
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
++
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 100000000.*/
++/* Please refer to SMC section in AT91SAM9 datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(1 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(1 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(3 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
++#define AT91C_SM_NRD_PULSE	(3 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(5 << 0)
++#define AT91C_SM_NRD_CYCLE	(5 << 16)
++
++#define AT91C_SM_TDF	        (2 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 		0x20000			/* Image Address in NandFlash */
++#define	IMG_SIZE		0x40000			/* Image Size in NandFlash */
++
++#define MACH_TYPE		0x80B			/* TNY-A9G20 */
++#define JUMP_ADDR		0x23F00000		/* Final Jump Address */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++
++#define	CFG_SDRAM
++#define	CFG_HW_INIT
++
++#endif	/* _TNY_A9G20_LPW_H */
+diff --git a/board/tny_a9g20_lpw/tny_a9g20_lpw.c b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
+new file mode 100644
+index 0000000..cef9055
+--- /dev/null
++++ b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
+@@ -0,0 +1,243 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2008, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : tny_a9g20_lpw.c
++ * Object              :
++ * Creation            : GH August 13th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++#ifdef CFG_HW_INIT
++/*----------------------------------------------------------------------------*/
++/* \fn    hw_init							      */
++/* \brief This function performs very low level HW initialization	      */
++/* This function is invoked as soon as possible during the c_startup	      */
++/* The bss segment must be initialized					      */
++/*----------------------------------------------------------------------------*/
++void hw_init(void)
++{
++	unsigned int cp15;
++	
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++	writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA/2 = 3 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure CP15 */
++	cp15 = get_cp15();
++	cp15 |= I_CACHE;
++	set_cp15(cp15);
++
++	/* Configure the PIO controller */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI Slave Slot Cycle to 64 */
++	writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix (slow slew rate enabled and LPSDRAM memory voltage = 1.8V) */
++	writel(((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<17)) & ~0x00010000, AT91C_BASE_CCFG + CCFG_EBICSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_3 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_2 |
++				AT91C_SDRAMC_TRC_7 |
++				AT91C_SDRAMC_TRP_2 |
++				AT91C_SDRAMC_TRCD_2 |
++				AT91C_SDRAMC_TRAS_5 |
++				AT91C_SDRAMC_TXSR_8,		/* Control Register */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++                                AT91C_SDRAMC_MD_LOW_POWER_SDRAM); /* SDRAM (low power)   */
++
++#endif /* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++#ifdef CFG_SDRAM
++/*------------------------------------------------------------------------------*/
++/* \fn    sdramc_hw_init							*/
++/* \brief This function performs SDRAMC HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++/*	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++*/
++	/* Configure the SDRAMC PIO controller to output PCK0 */
++/*	pio_setup(sdramc_pio); */
++
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
++
++}
++#endif /* CFG_SDRAM */
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery						*/
++/* \brief This function erases NandFlash Block 0 if BP4 is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc bp4_pio[] = {
++		{"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(bp4_pio);
++	
++	/* If BP4 is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PA(31)) )
++		AT91F_NandEraseBlock0();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(nand_pio);
++	
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++#endif /* #ifdef CFG_NANDFLASH */
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..c6cd49d 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,12 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/include/part.h b/include/part.h
+index ba5985a..ab79af1 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -46,7 +46,11 @@
+ 
+ #ifdef AT91SAM9G20
+ #include "AT91SAM9260_inc.h"
+-#include "at91sam9g20ek.h"
++	#ifdef at91sam9g20ek
++	#include "at91sam9g20ek.h"
++	#elif tny_a9g20_lpw
++	#include "tny-a9g20-lpw.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91SAM9261
+-- 
+1.7.9.5
+

board/calao/tny-a9g20-lpw/linux-3.9.config

@@ -0,0 +1,187 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_SOC_AT91SAM9260=y
+CONFIG_SOC_AT91SAM9263=y
+CONFIG_SOC_AT91SAM9G45=y
+CONFIG_SOC_AT91SAM9X5=y
+CONFIG_SOC_AT91SAM9N12=y
+CONFIG_MACH_AT91SAM_DT=y
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_TIMER_HZ=128
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_UACCESS_WITH_MEMCPY=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_KEXEC=y
+CONFIG_AUTO_ZRELADDR=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+CONFIG_IPV6_SIT_6RD=y
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_GLUEBI=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_ATMEL_PWM=y
+CONFIG_ATMEL_TCLIB=y
+CONFIG_EEPROM_93CX6=m
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_DAVICOM_PHY=y
+CONFIG_MICREL_PHY=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=4
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_AT91SAM9X_WATCHDOG=y
+CONFIG_SSB=m
+CONFIG_FB=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_ATMEL=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_ACORN_8x8=y
+CONFIG_FONT_MINI_4x6=y
+CONFIG_LOGO=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_AT91=m
+CONFIG_USB_ETH=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_ACM_MS=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_MMC=y
+CONFIG_MMC_ATMELMCI=y
+CONFIG_MMC_SPI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91RM9200=y
+CONFIG_RTC_DRV_AT91SAM9=y
+CONFIG_DMADEVICES=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_STRIP_ASM_SYMS=y
+CONFIG_DEBUG_FS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+# CONFIG_CRYPTO_HW is not set
+CONFIG_CRC_CCITT=m
+CONFIG_AVERAGE=y

board/calao/usb-a9260/at91bootstrap-1.16-usb-a9260.patch

@@ -0,0 +1,603 @@
+From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Tue, 2 Oct 2012 09:19:15 +0200
+Subject: [PATCH] Add support for the USB-A9260
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/usb_a9260/nandflash/Makefile    |  122 ++++++++++++++
+ board/usb_a9260/nandflash/usb-a9260.h |  109 ++++++++++++
+ board/usb_a9260/usb_a9260.c           |  298 +++++++++++++++++++++++++++++++++
+ crt0_gnu.S                            |    7 +
+ include/part.h                        |    6 +-
+ 5 files changed, 541 insertions(+), 1 deletion(-)
+ create mode 100644 board/usb_a9260/nandflash/Makefile
+ create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
+ create mode 100644 board/usb_a9260/usb_a9260.c
+
+diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
+new file mode 100644
+index 0000000..02f4b50
+--- /dev/null
++++ b/board/usb_a9260/nandflash/Makefile
+@@ -0,0 +1,122 @@
++# TODO: set this appropriately for your local toolchain
++ifndef ERASE_FCT
++ERASE_FCT=rm -f
++endif
++ifndef CROSS_COMPILE
++CROSS_COMPILE=arm-elf-
++endif
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for USB-A9260
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9260
++# Board name (case sensitive!!!)
++BOARD=usb_a9260
++# Link Address and Top_of_Memory
++LINK_ADDR=0x200000
++TOP_OF_MEMORY=0x301000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++
++
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	$(ERASE_FCT) *.o *.bin *.elf *.map
+diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
+new file mode 100644
+index 0000000..2aaf759
+--- /dev/null
++++ b/board/usb_a9260/nandflash/usb-a9260.h
+@@ -0,0 +1,109 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb-a9260.h
++ * Object              :
++ * Creation            : GH Oct 1th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _USB_A9260_H
++#define _USB_A9260_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(180000000/2)
++#define PLL_LOCK_TIMEOUT	1000000
++
++#define PLLA_SETTINGS	0x20593F06
++#define PLLB_SETTINGS	0x10483F0E
++
++/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
++#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
++#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
++#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
++
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
++
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
++/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(1 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(1 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(3 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
++#define AT91C_SM_NRD_PULSE	(3 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(5 << 0)
++#define AT91C_SM_NRD_CYCLE	(5 << 16)
++#define AT91C_SM_TDF	        (2 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
++#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
++
++#define MACH_TYPE       	0x6AD		/* USB-A9260 */
++#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++
++#define CFG_HW_INIT
++#define CFG_SDRAM
++
++#endif	/* _USB_A9260_H */
+diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
+new file mode 100644
+index 0000000..de30f0b
+--- /dev/null
++++ b/board/usb_a9260/usb_a9260.c
+@@ -0,0 +1,298 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaiimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb_a9260.c
++ * Object              :
++ * Creation            : GH Oct 1th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++#ifdef CFG_DATAFLASH
++#include "../../include/dataflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++#ifdef CFG_HW_INIT
++/*----------------------------------------------------------------------------*/
++/* \fn    hw_init							      */
++/* \brief This function performs very low level HW initialization	      */
++/* This function is invoked as soon as possible during the c_startup	      */
++/* The bss segment must be initialized					      */
++/*----------------------------------------------------------------------------*/
++void hw_init(void)
++{
++	unsigned int cp15;
++	
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA = 2 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure CP15 */
++	cp15 = get_cp15();
++	cp15 |= I_CACHE;
++	set_cp15(cp15);
++
++	/* Configure the PIO controller */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI Slave Slot Cycle to 64 */
++	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_2 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_2 |
++				AT91C_SDRAMC_TRC_7 |
++				AT91C_SDRAMC_TRP_2 |
++				AT91C_SDRAMC_TRCD_2 |
++				AT91C_SDRAMC_TRAS_5 |
++				AT91C_SDRAMC_TXSR_8,		/* Control Register */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
++
++
++#endif /* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++#ifdef CFG_SDRAM
++/*------------------------------------------------------------------------------*/
++/* \fn    sdramc_hw_init							*/
++/* \brief This function performs SDRAMC HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++/*	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++*/
++	/* Configure the SDRAMC PIO controller to output PCK0 */
++/*	pio_setup(sdramc_pio); */
++
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
++
++}
++#endif /* CFG_SDRAM */
++
++#ifdef CFG_DATAFLASH
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_recovery								*/
++/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++void df_recovery(AT91PS_DF pDf)
++{
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase DataFlash Page 0*/
++	if ( !pio_get_value(AT91C_PIN_PB(10)) )
++		df_page_erase(pDf, 0);
++#endif
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_hw_init								*/
++/* \brief This function performs DataFlash HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void df_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc df_pio[] = {
++		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	pio_setup(df_pio);
++}
++#endif /* CFG_DATAFLASH */
++
++
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery						*/
++/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PB(10)) )
++		AT91F_NandEraseBlock0();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(nand_pio);
++	
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++
++#endif /* #ifdef CFG_NANDFLASH */
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..002feef 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,13 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
++
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/include/part.h b/include/part.h
+index ba5985a..212789f 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -35,7 +35,11 @@
+ 
+ #ifdef AT91SAM9260
+ #include "AT91SAM9260_inc.h"
+-#include "at91sam9260ek.h"
++	#ifdef at91sam9260ek
++	#include "at91sam9260ek.h"
++	#elif usb_a9260
++	#include "usb-a9260.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91SAM9XE
+-- 
+1.7.9.5
+

board/calao/usb-a9260/linux-3.7.4.config

@@ -0,0 +1,97 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_AT91_SLOW_CLOCK=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_EXT2_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y

board/calao/usb-a9263/at91bootstrap-1.16-usb-a9263.patch

@@ -0,0 +1,851 @@
+From 74796655212d321f50ab89e8c5570245901f4cba Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Thu, 5 Jul 2012 18:44:07 +0200
+Subject: [PATCH] Add support for the Calao-systems USB-A9263
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/usb_a9263/dataflash/Makefile    |  115 +++++++++++++
+ board/usb_a9263/dataflash/usb-a9263.h |   97 +++++++++++
+ board/usb_a9263/nandflash/Makefile    |  117 ++++++++++++++
+ board/usb_a9263/nandflash/usb-a9263.h |  116 +++++++++++++
+ board/usb_a9263/usb_a9263.c           |  285 +++++++++++++++++++++++++++++++++
+ crt0_gnu.S                            |    7 +
+ driver/dataflash.c                    |    6 +-
+ include/part.h                        |    6 +-
+ 8 files changed, 745 insertions(+), 4 deletions(-)
+ create mode 100644 board/usb_a9263/dataflash/Makefile
+ create mode 100644 board/usb_a9263/dataflash/usb-a9263.h
+ create mode 100644 board/usb_a9263/nandflash/Makefile
+ create mode 100644 board/usb_a9263/nandflash/usb-a9263.h
+ create mode 100644 board/usb_a9263/usb_a9263.c
+
+diff --git a/board/usb_a9263/dataflash/Makefile b/board/usb_a9263/dataflash/Makefile
+new file mode 100644
+index 0000000..332685e
+--- /dev/null
++++ b/board/usb_a9263/dataflash/Makefile
+@@ -0,0 +1,115 @@
++# TODO: set this appropriately for your local toolchain
++#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
++CROSS_COMPILE=arm-elf-
++#CROSS_COMPILE = arm-softfloat-linux-gnu-
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# DataFlashBoot Configuration for USB-A9263
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9263
++# Board name (case sensitive!!!)
++BOARD=usb_a9263
++# Link Address and Top_of_Memory
++LINK_ADDR=0x300000
++TOP_OF_MEMORY=0x314000
++# Name of current directory
++PROJECT=dataflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm9 -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	dataflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++	
++	
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	rm -f *.o *.bin *.elf *.map
+diff --git a/board/usb_a9263/dataflash/usb-a9263.h b/board/usb_a9263/dataflash/usb-a9263.h
+new file mode 100644
+index 0000000..40a3af8
+--- /dev/null
++++ b/board/usb_a9263/dataflash/usb-a9263.h
+@@ -0,0 +1,97 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb-a9263.h
++ * Object              :
++ * Creation            : GH Jun 28th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _USB_A9263_H
++#define _USB_A9263_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(180000000/2)
++#define PLL_LOCK_TIMEOUT	1000000
++
++#define PLLA_SETTINGS	0x20593F06
++#define PLLB_SETTINGS	0x10483F0E
++
++/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
++#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
++#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* DataFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_BASE_SPI	AT91C_BASE_SPI0
++#define AT91C_ID_SPI	AT91C_ID_SPI0
++
++/* SPI CLOCK */
++#define AT91C_SPI_CLK 		 8000000
++/* AC characteristics */
++/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
++#define DATAFLASH_TCSS		(0x1a << 16)	/* 250ns min (tCSS) <=> 12/48000000 = 250ns */
++#define DATAFLASH_TCHS		(0x1 << 24)	/* 250ns min (tCSH) <=> (64*1+SCBR)/(2*48000000) */
++
++#define DF_CS_SETTINGS 		(AT91C_SPI_NCPHA | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | ((MASTER_CLOCK / AT91C_SPI_CLK) << 8))
++
++/* ******************************************************************* */
++/* SDRAMC Settings                                                     */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_BASE_SDRAMC 	AT91C_BASE_SDRAMC0
++#define AT91C_EBI_SDRAM		AT91C_EBI0_SDRAM
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SPI_PCS_DATAFLASH		AT91C_SPI_PCS0_DATAFLASH	/* Boot on SPI NCS0 */
++
++#define IMG_ADDRESS 			0x4000			/* Image Address in DataFlash */
++#define	IMG_SIZE			0x40000			/* Image Size in DataFlash    */
++
++#define MACH_TYPE       		0x6AE       		/* USB-A9263 */
++#define JUMP_ADDR			0x23F00000		/* Final Jump Address 	      */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#define CFG_HW_INIT
++#define CFG_SDRAM
++#undef	CFG_DEBUG
++
++#define CFG_DATAFLASH
++
++#endif	/* _USB_A9263_H */
+diff --git a/board/usb_a9263/nandflash/Makefile b/board/usb_a9263/nandflash/Makefile
+new file mode 100644
+index 0000000..c453098
+--- /dev/null
++++ b/board/usb_a9263/nandflash/Makefile
+@@ -0,0 +1,117 @@
++# TODO: set this appropriately for your local toolchain
++#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
++CROSS_COMPILE=arm-elf-
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for USB-A9263
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9263
++# Board name (case sensitive!!!)
++BOARD=usb_a9263
++# Link Address and Top_of_Memory
++LINK_ADDR=0x300000
++TOP_OF_MEMORY=0x314000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm9 -O0 -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++	
++	
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	rm -f *.o *.bin *.elf *.map
+diff --git a/board/usb_a9263/nandflash/usb-a9263.h b/board/usb_a9263/nandflash/usb-a9263.h
+new file mode 100644
+index 0000000..24e2cf1
+--- /dev/null
++++ b/board/usb_a9263/nandflash/usb-a9263.h
+@@ -0,0 +1,116 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb-a9263.h
++ * Object              :
++ * Creation            : GH Jun 28th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _USB_A9263_H
++#define _USB_A9263_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(180000000/2)
++#define PLL_LOCK_TIMEOUT	1000000
++
++#define PLLA_SETTINGS	0x20593F06
++#define PLLB_SETTINGS	0x10483F0E
++
++/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
++#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
++#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_SODR = AT91C_PIO_PD15;} while(0)
++#define NAND_ENABLE_CE()  do { *(volatile unsigned int *)AT91C_PIOD_CODR = AT91C_PIO_PD15;} while(0)
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOA_PDSR & AT91C_PIO_PA22))
++
++/* ******************************************************************* */
++/* SDRAMC Settings                                                     */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_BASE_SDRAMC 	AT91C_BASE_SDRAMC0
++#define AT91C_EBI_SDRAM		AT91C_EBI0_SDRAM
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000. */
++/* Please refer to SMC section in AT91SAM9x datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(1 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(1 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(3 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
++#define AT91C_SM_NRD_PULSE	(3 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(5 << 0)
++#define AT91C_SM_NRD_CYCLE	(5 << 16)
++
++#define AT91C_SM_TDF	        (2 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 	0x20000		/* Image Address in NandFlash */
++#define	IMG_SIZE	0x40000		/* Image Size in NandFlash    */
++
++#define MACH_TYPE       0x6AE  		/* USB-A9263 */
++#define JUMP_ADDR	0x23F00000	/* Final Jump Address 	      */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++
++#define CFG_HW_INIT
++#define CFG_SDRAM
++
++
++#endif	/* _USB_A9263_H */
+diff --git a/board/usb_a9263/usb_a9263.c b/board/usb_a9263/usb_a9263.c
+new file mode 100644
+index 0000000..5630f99
+--- /dev/null
++++ b/board/usb_a9263/usb_a9263.c
+@@ -0,0 +1,285 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2006, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaiimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb_a9263.c
++ * Object              :
++ * Creation            : GH Jun 28th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++#ifdef CFG_DATAFLASH
++#include "../../include/dataflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++
++#ifdef CFG_HW_INIT
++/*---------------------------------------------------------------------------- */
++/* \fn    hw_init							       */
++/* \brief This function performs very low level HW initialization	       */
++/* This function is invoked as soon as possible during the c_startup	       */
++/* The bss segment must be initialized					       */
++/*---------------------------------------------------------------------------- */
++void hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA = 2 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure the PIO controller to output PCK0 */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI0 Slave Slot Cycle to 64 */
++	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG4)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG4));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix */
++	/* VDDIOMSEL = 1 -> Memories are 3.3V powered */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | (1 << 16) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBI0CSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_2 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_2 |
++				AT91C_SDRAMC_TRC_7 |
++				AT91C_SDRAMC_TRP_2 |
++				AT91C_SDRAMC_TRCD_2 |
++				AT91C_SDRAMC_TRAS_5 |
++				AT91C_SDRAMC_TXSR_8,		/* Control Register       */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
++#endif	/* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++
++#ifdef CFG_SDRAM
++//*----------------------------------------------------------------------------
++//* \fn    sdramc_hw_init
++//* \brief This function performs SDRAMC HW initialization
++//*----------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PD(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PD(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PD(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PD(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PD(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PD(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PD(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PD(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PD(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PD(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PD(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PD(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PD(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PD(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PD(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PD(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the SDRAMC PIO controller */
++	pio_setup(sdramc_pio);
++}
++#endif
++
++#ifdef CFG_DATAFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    df_recovery								*/
++/* \brief This function erases DataFlash Page 0 if USER PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++void df_recovery(AT91PS_DF pDf)
++{
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USER PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if ( !pio_get_value(AT91C_PIN_PB(10)) )
++		df_page_erase(pDf, 0);
++#endif
++}
++/*------------------------------------------------------------------------------*/
++/* \fn    df_hw_init								*/
++/* \brief This function performs DataFlash HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void df_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc df_pio[] = {
++		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_B},
++		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_B},
++		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},
++		{"NPCS0", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_B},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	pio_setup(df_pio);
++}
++#endif /* CFG_DATAFLASH */
++
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery								*/
++/* \brief This function erases NandFlash Block 0 if USER PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc usrpb_pio[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb_pio);
++	
++	/* If USER PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PB(10)) )
++		AT91F_NandEraseBlock0();
++}
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PA(22), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PD(15), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBI0CSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC0 + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC0 + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC0 + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC0 + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
++	writel((1 << AT91C_ID_PIOCDE), PMC_PCER + AT91C_BASE_PMC);
++
++	pio_setup(nand_pio);
++
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC0 + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC0 + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
++}
++
++#endif /* #ifdef CFG_NANDFLASH */
++
++
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..002feef 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,13 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
++
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/driver/dataflash.c b/driver/dataflash.c
+index e28e49e..4de295a 100644
+--- a/driver/dataflash.c
++++ b/driver/dataflash.c
+@@ -293,14 +293,14 @@ static int df_init (AT91PS_DF pDf)
+ 			pDf->dfDescription.pages_size = 264;
+ 			pDf->dfDescription.page_offset = 9;
+ 			break;
+-
++*/
+ 		case AT45DB021B:
+ 			pDf->dfDescription.pages_number = 1024;
+ 			pDf->dfDescription.pages_size = 264;
+ 			pDf->dfDescription.page_offset = 9;
+ 			break;
+ 
+-		case AT45DB041B:
++/*		case AT45DB041B:
+ 			pDf->dfDescription.pages_number = 2048;
+ 			pDf->dfDescription.pages_size = 264;
+ 			pDf->dfDescription.page_offset = 9;
+@@ -373,7 +373,7 @@ int load_df(unsigned int pcs, unsigned int img_addr, unsigned int img_size, unsi
+     if (!df_init(pDf))
+         return -1;
+ 
+-#if defined(AT91SAM9260) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
++#if defined(AT91SAM9260) || defined(AT91SAM9263) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
+     /* Test if a button has been pressed or not */
+     /* Erase Page 0 to avoid infinite loop */
+     df_recovery(pDf);
+diff --git a/include/part.h b/include/part.h
+index ba5985a..a1863d0 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -61,7 +61,11 @@
+ 
+ #ifdef AT91SAM9263
+ #include "AT91SAM9263_inc.h"
+-#include "at91sam9263ek.h"
++	#ifdef at91sam9263ek
++	#include "at91sam9263ek.h"
++	#elif usb_a9263
++	#include "usb-a9263.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91CAP9
+-- 
+1.5.6.3
+

board/calao/usb-a9263/linux-3.4.4.config

@@ -0,0 +1,102 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9263=y
+CONFIG_MACH_USB_A9263=y
+CONFIG_AT91_SLOW_CLOCK=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_EXT2_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y

board/calao/usb-a9g20-lpw/at91bootstrap-1.16-usb-a9g20-lpw.patch

@@ -0,0 +1,610 @@
+From 8d84757d5170969e8bdfebc7951f43c5aa2b05fd Mon Sep 17 00:00:00 2001
+From: Gregory Hermant <gregory.hermant@calao-systems.com>
+Date: Fri, 6 Jul 2012 16:32:47 +0200
+Subject: [PATCH] Add support for the Calao-systems USB-A9G20-LPW
+
+
+Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
+---
+ board/usb_a9g20_lpw/nandflash/Makefile        |  121 ++++++++++
+ board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h |  112 +++++++++
+ board/usb_a9g20_lpw/usb_a9g20_lpw.c           |  303 +++++++++++++++++++++++++
+ crt0_gnu.S                                    |    7 +
+ include/part.h                                |    6 +-
+ 5 files changed, 548 insertions(+), 1 deletions(-)
+ create mode 100644 board/usb_a9g20_lpw/nandflash/Makefile
+ create mode 100644 board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
+ create mode 100644 board/usb_a9g20_lpw/usb_a9g20_lpw.c
+
+diff --git a/board/usb_a9g20_lpw/nandflash/Makefile b/board/usb_a9g20_lpw/nandflash/Makefile
+new file mode 100644
+index 0000000..8c9d99a
+--- /dev/null
++++ b/board/usb_a9g20_lpw/nandflash/Makefile
+@@ -0,0 +1,121 @@
++# TODO: set this appropriately for your local toolchain
++ifndef ERASE_FCT
++ERASE_FCT=rm -f
++endif
++ifndef CROSS_COMPILE
++CROSS_COMPILE=arm-elf-
++endif
++
++TOOLCHAIN=gcc
++
++BOOTSTRAP_PATH=../../..
++
++# NandFlashBoot Configuration for USB-A9G20-LPW
++
++# Target name (case sensitive!!!)
++TARGET=AT91SAM9G20
++# Board name (case sensitive!!!)
++BOARD=usb_a9g20_lpw
++# Link Address and Top_of_Memory
++LINK_ADDR=0x200000
++TOP_OF_MEMORY=0x301000
++# Name of current directory
++PROJECT=nandflash
++
++ifndef BOOT_NAME
++BOOT_NAME=$(PROJECT)_$(BOARD)
++endif
++
++INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
++
++ifeq ($(TOOLCHAIN), gcc)
++
++AS=$(CROSS_COMPILE)gcc
++CC=$(CROSS_COMPILE)gcc
++LD=$(CROSS_COMPILE)gcc
++NM= $(CROSS_COMPILE)nm
++SIZE=$(CROSS_COMPILE)size
++OBJCOPY=$(CROSS_COMPILE)objcopy
++OBJDUMP=$(CROSS_COMPILE)objdump
++CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
++ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
++
++# Linker flags.
++#  -Wl,...:     tell GCC to pass this to linker.
++#    -Map:      create map file
++#    --cref:    add cross reference to map file
++LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
++LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
++OBJS=crt0_gnu.o
++
++endif
++
++OBJS+=\
++	$(BOARD).o \
++	main.o \
++	gpio.o \
++	pmc.o \
++	debug.o \
++	sdramc.o \
++	nandflash.o \
++	_udivsi3.o \
++	_umodsi3.o \
++	div0.o \
++	udiv.o \
++	string.o
++
++rebuild: clean all
++
++all: 	$(BOOT_NAME)
++
++ifeq ($(TOOLCHAIN), gcc)
++$(BOOT_NAME): $(OBJS)
++	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
++	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
++endif
++
++
++$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
++
++main.o: $(BOOTSTRAP_PATH)/main.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
++
++gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
++
++pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
++
++debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
++
++sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
++
++dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
++
++nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
++
++crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
++
++div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
++
++string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
++
++udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
++	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
++
++_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
++
++_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
++	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
++
++clean:
++	$(ERASE_FCT) *.o *.bin *.elf *.map
+diff --git a/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
+new file mode 100644
+index 0000000..c0bdc6e
+--- /dev/null
++++ b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
+@@ -0,0 +1,112 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2008, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb-a9g20-lpw.h
++ * Object              :
++ * Creation            : GH July 6th 2012
++ *-----------------------------------------------------------------------------
++ */
++#ifndef _USB_A9G20_LPW_H
++#define _USB_A9G20_LPW_H
++
++/* ******************************************************************* */
++/* PMC Settings                                                        */
++/*                                                                     */
++/* The main oscillator is enabled as soon as possible in the c_startup */
++/* and MCK is switched on the main oscillator.                         */
++/* PLL initialization is done later in the hw_init() function          */
++/* ******************************************************************* */
++#define MASTER_CLOCK		(133000000)
++#define PLL_LOCK_TIMEOUT	1000000
++
++/* Set PLLA to 798Mhz */
++#define PLLA_SETTINGS	0x20843F02
++#define PLLB_SETTINGS	0x100F3F02
++
++/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
++#define MCKR_SETTINGS		0x1300
++#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
++
++/* ******************************************************************* */
++/* NandFlash Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define AT91C_SMARTMEDIA_BASE	0x40000000
++
++#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
++#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
++
++#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
++#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
++
++#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
++
++
++/* ******************************************************************** */
++/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 133000000.*/
++/* Please refer to SMC section in AT91SAM9 datasheet to learn how 	*/
++/* to generate these values. 						*/
++/* ******************************************************************** */
++#define AT91C_SM_NWE_SETUP	(2 << 0)
++#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
++#define AT91C_SM_NRD_SETUP	(2 << 16)
++#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
++  
++#define AT91C_SM_NWE_PULSE 	(4 << 0)
++#define AT91C_SM_NCS_WR_PULSE	(4 << 8)
++#define AT91C_SM_NRD_PULSE	(4 << 16)
++#define AT91C_SM_NCS_RD_PULSE	(4 << 24)
++  
++#define AT91C_SM_NWE_CYCLE 	(7 << 0)
++#define AT91C_SM_NRD_CYCLE	(7 << 16)
++
++#define AT91C_SM_TDF	        (3 << 16)
++
++/* ******************************************************************* */
++/* BootStrap Settings                                                  */
++/*                                                                     */
++/* ******************************************************************* */
++#define IMG_ADDRESS 		0x20000			/* Image Address in NandFlash */
++#define	IMG_SIZE		0x40000			/* Image Size in NandFlash */
++
++#define MACH_TYPE		0x731			/* USB-A9G20 */
++#define JUMP_ADDR		0x23F00000		/* Final Jump Address */
++
++/* ******************************************************************* */
++/* Application Settings                                                */
++/* ******************************************************************* */
++#undef CFG_DEBUG
++#undef CFG_DATAFLASH
++
++#define CFG_NANDFLASH
++#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
++#undef  CFG_NANDFLASH_RECOVERY
++
++#define	CFG_SDRAM
++#define	CFG_HW_INIT
++
++#endif	/* _USB_A9G20_LPW_H */
+diff --git a/board/usb_a9g20_lpw/usb_a9g20_lpw.c b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
+new file mode 100644
+index 0000000..c372307
+--- /dev/null
++++ b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
+@@ -0,0 +1,303 @@
++/* ----------------------------------------------------------------------------
++ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
++ * ----------------------------------------------------------------------------
++ * Copyright (c) 2008, Atmel Corporation
++
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ * - Redistributions of source code must retain the above copyright notice,
++ * this list of conditions and the disclaimer below.
++ *
++ * Atmel's name may not be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ * ----------------------------------------------------------------------------
++ * File Name           : usb_a9g20_lpw.c
++ * Object              :
++ * Creation            : GH July 6th 2012
++ *-----------------------------------------------------------------------------
++ */
++#include "../../include/part.h"
++#include "../../include/gpio.h"
++#include "../../include/pmc.h"
++#include "../../include/debug.h"
++#include "../../include/sdramc.h"
++#include "../../include/main.h"
++#ifdef CFG_NANDFLASH
++#include "../../include/nandflash.h"
++#endif
++#ifdef CFG_DATAFLASH
++#include "../../include/dataflash.h"
++#endif
++
++static inline unsigned int get_cp15(void)
++{
++	unsigned int value;
++	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
++	return value;
++}
++
++static inline void set_cp15(unsigned int value)
++{
++	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
++}
++
++#ifdef CFG_HW_INIT
++/*----------------------------------------------------------------------------*/
++/* \fn    hw_init							      */
++/* \brief This function performs very low level HW initialization	      */
++/* This function is invoked as soon as possible during the c_startup	      */
++/* The bss segment must be initialized					      */
++/*----------------------------------------------------------------------------*/
++void hw_init(void)
++{
++	unsigned int cp15;
++	
++	/* Configure PIOs */
++	const struct pio_desc hw_pio[] = {
++#ifdef CFG_DEBUG
++		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Disable watchdog */
++	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
++
++	/* At this stage the main oscillator is supposed to be enabled
++	 * PCK = MCK = MOSC */
++	writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
++
++	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
++	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* PCK = PLLA/2 = 3 * MCK */
++	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
++	/* Switch MCK on PLLA output */
++	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure PLLB */
++	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
++
++	/* Configure CP15 */
++	cp15 = get_cp15();
++	cp15 |= I_CACHE;
++	set_cp15(cp15);
++
++	/* Configure the PIO controller */
++	pio_setup(hw_pio);
++
++	/* Configure the EBI Slave Slot Cycle to 64 */
++	writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
++
++#ifdef CFG_DEBUG
++	/* Enable Debug messages on the DBGU */
++	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
++
++	dbg_print("Start AT91Bootstrap...\n\r");
++#endif /* CFG_DEBUG */
++
++#ifdef CFG_SDRAM
++	/* Initialize the matrix (VDDIOSEL=0: memory voltage = 1.8V ) */
++	writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA) & ~0x00010000) | AT91C_EBI_CS1A_SDRAMC , AT91C_BASE_CCFG + CCFG_EBICSA);
++
++	/* Configure SDRAM Controller */
++	sdram_init(	AT91C_SDRAMC_NC_9  |
++				AT91C_SDRAMC_NR_13 |
++				AT91C_SDRAMC_CAS_3 |
++				AT91C_SDRAMC_NB_4_BANKS |
++				AT91C_SDRAMC_DBW_32_BITS |
++				AT91C_SDRAMC_TWR_3 |
++				AT91C_SDRAMC_TRC_9 |
++				AT91C_SDRAMC_TRP_3 |
++				AT91C_SDRAMC_TRCD_3 |
++				AT91C_SDRAMC_TRAS_6 |
++				AT91C_SDRAMC_TXSR_10,		/* Control Register */
++				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
++                                AT91C_SDRAMC_MD_SDRAM);         /* SDRAM (no low power)   */
++
++#endif /* CFG_SDRAM */
++}
++#endif /* CFG_HW_INIT */
++
++#ifdef CFG_SDRAM
++/*------------------------------------------------------------------------------*/
++/* \fn    sdramc_hw_init							*/
++/* \brief This function performs SDRAMC HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void sdramc_hw_init(void)
++{
++	/* Configure PIOs */
++/*	const struct pio_desc sdramc_pio[] = {
++		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++*/
++	/* Configure the SDRAMC PIO controller to output PCK0 */
++/*	pio_setup(sdramc_pio); */
++
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
++	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
++
++}
++#endif /* CFG_SDRAM */
++
++#ifdef CFG_DATAFLASH
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_recovery								*/
++/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++void df_recovery(AT91PS_DF pDf)
++{
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
++	/* Configure PIOs */
++	const struct pio_desc usrpb[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb);
++	
++	/* If USR PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if ( !pio_get_value(AT91C_PIN_PB(10)) )
++		df_page_erase(pDf, 0);
++#endif
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    df_hw_init								*/
++/* \brief This function performs DataFlash HW initialization			*/
++/*------------------------------------------------------------------------------*/
++void df_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc df_pio[] = {
++		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
++		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
++		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
++#endif
++#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
++		{"NPCS1", AT91C_PIN_PC(11), 0, PIO_DEFAULT, PIO_PERIPH_B},
++#endif
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	pio_setup(df_pio);
++}
++#endif /* CFG_DATAFLASH */
++
++
++
++#ifdef CFG_NANDFLASH
++/*------------------------------------------------------------------------------*/
++/* \fn    nand_recovery						*/
++/* \brief This function erases NandFlash Block 0 if USER PB is pressed 		*/
++/*        during boot sequence							*/
++/*------------------------------------------------------------------------------*/
++#ifdef CFG_NANDFLASH_RECOVERY
++static void nand_recovery(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc usrpb[] = {
++		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
++		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(usrpb);
++	
++	/* If USER PB is pressed during Boot sequence */
++	/* Erase NandFlash block 0*/
++	if (!pio_get_value(AT91C_PIN_PB(10)) )
++		AT91F_NandEraseBlock0();
++}
++#else
++static void nand_recovery(void) {}
++#endif
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_hw_init							*/
++/* \brief NandFlash HW init							*/
++/*------------------------------------------------------------------------------*/
++void nandflash_hw_init(void)
++{
++	/* Configure PIOs */
++	const struct pio_desc nand_pio[] = {
++		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
++		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
++		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
++	};
++
++	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
++	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
++		    
++	/* Configure SMC CS3 */
++ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
++  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
++	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
++	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
++  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
++
++	/* Configure the PIO controller */
++	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
++	pio_setup(nand_pio);
++	
++	nand_recovery();
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_16bits_dbw_init						*/
++/* \brief Configure SMC in 16 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_16bits_dbw_init(void)
++{
++	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++/*------------------------------------------------------------------------------*/
++/* \fn    nandflash_cfg_8bits_dbw_init						*/
++/* \brief Configure SMC in 8 bits mode						*/
++/*------------------------------------------------------------------------------*/
++void nandflash_cfg_8bits_dbw_init(void)
++{
++	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
++}
++
++#endif /* #ifdef CFG_NANDFLASH */
+diff --git a/crt0_gnu.S b/crt0_gnu.S
+index 042b617..002feef 100644
+--- a/crt0_gnu.S
++++ b/crt0_gnu.S
+@@ -106,6 +106,13 @@ _relocate_to_sram:
+ #endif /* CFG_NORFLASH */
+ 
+ _setup_clocks:
++/* Test if main osc is bypassed */
++	ldr 	r0,=AT91C_PMC_MOR
++	ldr 	r1, [r0]
++	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
++	ands 	r1, r1, r2
++	bne	_init_data	/* branch if OSCBYPASS=1 */
++
+ /* Test if main oscillator is enabled */
+ 	ldr 	r0,=AT91C_PMC_SR
+ 	ldr 	r1, [r0]
+diff --git a/include/part.h b/include/part.h
+index ba5985a..1d7392a 100644
+--- a/include/part.h
++++ b/include/part.h
+@@ -46,7 +46,11 @@
+ 
+ #ifdef AT91SAM9G20
+ #include "AT91SAM9260_inc.h"
+-#include "at91sam9g20ek.h"
++	#ifdef at91sam9g20ek
++	#include "at91sam9g20ek.h"
++	#elif usb_a9g20_lpw
++	#include "usb-a9g20-lpw.h"
++	#endif
+ #endif
+ 
+ #ifdef AT91SAM9261
+-- 
+1.5.6.3
+

board/calao/usb-a9g20-lpw/barebox-2012.07.0-usb-a9g20-lpw.patch

@@ -0,0 +1,12 @@
+diff --git a/arch/arm/configs/usb_a9g20_defconfig b/arch/arm/configs/usb_a9g20_defconfig
+index 30bf380..7716e0e 100644
+--- a/arch/arm/configs/usb_a9g20_defconfig
++++ b/arch/arm/configs/usb_a9g20_defconfig
+@@ -15,6 +15,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
+ CONFIG_CMDLINE_EDITING=y
+ CONFIG_AUTO_COMPLETE=y
+ CONFIG_MENU=y
++# CONFIG_ERRNO_MESSAGES is not set
+ # CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+ CONFIG_CONSOLE_ACTIVATE_ALL=y
+ CONFIG_PARTITION=y

board/calao/usb-a9g20-lpw/linux-3.4.4.config

@@ -0,0 +1,105 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9G20=y
+CONFIG_MACH_USB_A9G20=y
+CONFIG_AT91_SLOW_CLOCK=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
+CONFIG_FPE_NWFPE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETH=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RV3029C2=y
+CONFIG_EXT2_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y

board/chromebook/snow/kernel.args

@@ -1 +0,0 @@
-console=tty1 clk_ignore_unused root=/dev/mmcblk1p2 rootfstype=ext4 ro

board/chromebook/snow/kernel.its

@@ -1,37 +0,0 @@
-/dts-v1/;
-
-/ {
-    description = "Buildroot kernel for Chromebook Snow";
-    images {
-        kernel@1 {
-            description = "kernel";
-            data = /incbin/("zImage");
-            type = "kernel_noload";
-            arch = "arm";
-            os = "linux";
-            compression = "none";
-            load = <0>;
-            entry = <0>;
-            hash@1 {
-                algo = "sha1";
-            };
-        };
-        fdt@1{
-            description = "exynos5250-snow.dtb";
-            data = /incbin/("exynos5250-snow.dtb");
-            type = "flat_dt";
-            arch = "arm";
-            compression = "none";
-            hash@1 {
-                algo = "sha1";
-            };
-        };
-    };
-    configurations {
-        default = "conf@1";
-        conf@1{
-            kernel = "kernel@1";
-            fdt = "fdt@1";
-        };
-    };
-};

board/chromebook/snow/linux-4.6-dts-tpm.patch

@@ -1,27 +0,0 @@
-Some versions of u-boot for this Chromebook check for tpm node
-in the device tree and fail badly (reboot) if it is not found.
-
-While not exactly correct, it is much easier to patch the mainline
-device tree to match u-boot expectations than to fix u-boot on
-this device.
-
-See https://code.google.com/p/chromium/issues/detail?id=220169
-and https://lkml.org/lkml/2013/3/4/242
-
-Signed-off-by: Alex Suykov <alex.suykov@gmail.com>
-
---- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
-+++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
-@@ -466,6 +466,11 @@
- 	status = "okay";
- 	samsung,i2c-sda-delay = <100>;
- 	samsung,i2c-max-bus-freq = <66000>;
-+
-+	tpm {
-+		compatible = "infineon,slb9635tt";
-+		reg = <0x20>;
-+	};
- };
- 
- &i2c_5 {
-

board/chromebook/snow/linux-4.6.fragment

@@ -1,2 +0,0 @@
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m

board/chromebook/snow/mksd.sh

@@ -1,69 +0,0 @@
-#!/bin/sh
-
-# This scripts makes a minimal bootable SD card image for the Chromebook.
-# The resulting file is called bootsd.img. It should be written directly
-# to the card:
-#
-#	SD=/dev/mmcblk1		# check your device name!
-#	dd if=output/images/bootsd.img of=$SD
-#
-# The partitions are created just large enough to hold the kernel and
-# the rootfs image. Most of the card will be empty, and the secondary
-# GPT will not be in its proper location.
-
-# cgpt does not create protective MBR, and the kernel refuses to read
-# GPT unless there's some kind of MBR in sector 0. So we need parted
-# to write that single sector before doing anything with the GPT.
-cgpt=$HOST_DIR/usr/bin/cgpt
-parted=$HOST_DIR/usr/sbin/parted
-kernel=$BINARIES_DIR/uImage.kpart
-rootfs=$BINARIES_DIR/rootfs.ext2
-
-run() { echo "$@"; "$@"; }
-die() { echo "$@" >&2; exit 1; }
-test -f $kernel || die "No kernel image found"
-test -f $rootfs || die "No rootfs image found"
-test -x $cgpt || die "cgpt not found (host-vboot-utils have not been built?)"
-
-# True file sizes in bytes
-kernelsize=`stat -t $kernel | cut -d\  -f2`
-rootfssize=`stat -t $rootfs | cut -d\  -f2`
-
-# The card is partitioned in sectors of 8KB.
-# 4 sectors are reserved for MBR+GPT. Their actual size turns out
-# to be 33 512-blocks which is just over 2 sectors, but we align
-# it to a nice round number.
-sec=8192
-kernelsec=$(((kernelsize+8191)>>13))
-rootfssec=$(((rootfssize+8191)>>13))
-headersec=4
-
-# There is also a copy of MBR+GPT at the end of the image.
-# It's going to be useless but both tools assume it's there.
-imagesec=$((2*headersec+kernelsec+rootfssec))
-bootsd="$BINARIES_DIR/bootsd.img"
-run dd bs=$sec count=$imagesec if=/dev/zero of=$bootsd
-
-# cgpt needs offsets and sizes in 512-blocks.
-block=512
-kernelstart=$((headersec<<4))
-kernelblocks=$((kernelsec<<4))
-rootfsblocks=$((rootfssec<<4))
-rootfsstart=$((kernelstart+kernelblocks))
-
-# This command initializes both GPT and MBR
-run $parted -s $bootsd mklabel gpt
-
-# The kernel partition must be marked as bootable, that's why -S -T -P
-run $cgpt add -i 1 -b $kernelstart -s $kernelblocks \
-	-t kernel -l kernel \
-	-S 1 -T 1 -P 10 $bootsd
-
-# It does not really matter where the rootfs partition is located as long
-# as the kernel can find it.
-# However, if anything is changed here, kernel.args must be updated as well.
-run $cgpt add -i 2 -b $rootfsstart -s $rootfsblocks \
-	-t data -l rootfs $bootsd
-
-run dd bs=$block if=$kernel of=$bootsd seek=$kernelstart
-run dd bs=$block if=$rootfs of=$bootsd seek=$rootfsstart

board/chromebook/snow/readme.txt

@@ -1,137 +0,0 @@
-Samsung XE303C12 aka Chromebook Snow
-====================================
-
-This file describes booting the Chromebook from an SD card containing
-Buildroot kernel and rootfs, using the original bootloader. This is
-the least invasive way to get Buildroot onto the devices and a good
-starting point.
-
-The bootloader will only boot a kernel from a GPT partition marked
-bootable with cgpt tool from vboot-utils package.
-The kernel image must be signed using futility from the same package.
-The signing part is done by sign.sh script in this directory.
-
-It does not really matter where rootfs is as long as the kernel is able
-to find it, but this particular configuration assumes the kernel is on
-partition 1 and rootfs is on partition 2 of the SD card.
-Make sure to check kernel.args if you change this.
-
-Making the boot media
----------------------
-Start by configuring and building the images.
-
-	make chromebook_snow_defconfig
-	make menuconfig # if necessary
-	make
-
-The important files are:
-
-	uImage.kpart (kernel and device tree, signed)
-	rootfs.tar
-	bootsd.img (SD card image containing both kernel and rootfs)
-
-Write the image directly to some SD card.
-WARNING: make sure there is nothing important on that card,
-and double-check the device name!
-
-	SD=/dev/mmcblk1		# may be /dev/sdX on some hosts
-	dd if=output/images/bootsd.img of=$SD
-
-Switching to developer mode and booting from SD
------------------------------------------------
-Power Chromebook down, then power it up while holding Esc+F3.
-BEWARE: switching to developer mode deletes all user data.
-Create backups if you need them.
-
-While in developer mode, Chromebook will boot into a white screen saying
-"OS verification is off".
-
-Press Ctrl-D at this screen to boot Chromium OS from eMMC.
-Press Ctrl-U at this screen to boot from SD (or USB)
-Press Power to power it off.
-Do NOT press Space unless you mean it.
-This will switch it back to normal mode.
-
-The is no way to get rid of the white screen without re-flashing the bootloader.
-
-Troubleshooting
----------------
-Loud *BEEP* after pressing Ctrl-U means there's no valid partition to boot from.
-Which in turn means either bad GPT or improperly signed kernel.
-
-Return to the OS verification screen without any sounds means the code managed
-to reboot the board. May indicate properly signed but invalid image.
-
-Blank screen means the image is valid and properly signed but cannot boot
-for some reason, like missing or incorrect DT.
-
-In case the board becomes unresponsive:
-
-* Press Esc+F3+Power. The board should reboot instantly.
-  Remove SD card to prevent it from attempting a system recovery.
-
-* Hold Power button for around 10s. The board should shut down into
-  its soft-off mode. Press Power button again or open the lid to turn in on.
-
-* If that does not work, disconnect the charger and push a hidden
-  button on the underside with a pin of some sort. The board should shut
-  down completely. Opening the lid and pressing Power button will not work.
-  To turn it back on, connect the charger.
-
-Partitioning SD card manually
------------------------------
-Check mksd.sh for partitioning commands.
-
-Use parted and cgpt on a real device, and calculate the partition
-sizes properly. The kernel partition may be as small as 4MB, but
-you will probably want the rootfs to occupy the whole remaining space.
-
-cgpt may be used to check current layout:
-
-	output/host/usr/bin/cgpt show $SD
-
-All sizes and all offsets are in 512-byte blocks.
-
-Writing kernel and rootfs to a partitioned SD card
---------------------------------------------------
-Write .kpart directly to the bootable partition:
-
-	dd if=output/images/uImage.kpart of=${SD}1
-
-Make a new filesystem on the rootfs partition, and unpack rootfs.tar there:
-
-	mkfs.ext4 ${SD}2
-	mount ${SD2} /mnt/<ROOTFS-PARTITION>
-	tar -xvf output/images/rootfs.tar -C /mnt/<ROOTFS-PARTITION>
-	umount /mnt/<ROOTFS-PARTITION>
-
-This will require root permissions even if you can write to $SD.
-
-Kernel command line
--------------------
-The command line is taken from board/chromebook/snow/kernel.args and stored
-in the vboot header (which also holds the signature).
-
-The original bootloader prepends "cros_secure console= " to the supplied
-command line. The only way to suppress this is to enable CMDLINE_FORCE
-in the kernel config, disabling external command line completely.
-
-That's not necessary however. The mainline kernel ignores cros_secure,
-and supplying console=tty1 in kernel.args undoes the effect of console=
-
-Booting with console= suppresses all kernel output.
-As a side effect, it makes /dev/console unusable, which the init in use must
-be able to handle.
-
-WiFi card
----------
-Run modprobe mwifiex_sdio to load the driver.
-The name of the device should be mlan0.
-
-Further reading
----------------
-https://www.chromium.org/chromium-os/developer-information-for-chrome-os-devices/samsung-arm-chromebook
-http://linux-exynos.org/wiki/Samsung_Chromebook_XE303C12/Installing_Linux
-http://archlinuxarm.org/platforms/armv7/samsung/samsung-chromebook
-http://www.de7ec7ed.com/2013/05/application-processor-ap-uart-samsung.html
-http://www.de7ec7ed.com/2013/05/embedded-controller-ec-uart-samsung.html

board/chromebook/snow/sign.sh

@@ -1,41 +0,0 @@
-#!/bin/sh
-
-# This script creates u-boot FIT image containing the kernel and the DT,
-# then signs it using futility from vboot-utils.
-# The resulting file is called uImage.kpart.
-
-BOARD_DIR=$(dirname $0)
-mkimage=$HOST_DIR/usr/bin/mkimage
-futility=$HOST_DIR/usr/bin/futility
-devkeys=$HOST_DIR/usr/share/vboot/devkeys
-
-run() { echo "$@"; "$@"; }
-die() { echo "$@" >&2; exit 1; }
-test -f $BINARIES_DIR/zImage || \
-	die "No kernel image found"
-test -x $mkimage || \
-	die "No mkimage found (host-uboot-tools has not been built?)"
-test -x $futility || \
-	die "No futility found (host-vboot-utils has not been built?)"
-
-# kernel.its references zImage and exynos5250-snow.dtb, and all three
-# files must be in current directory for mkimage.
-run cp $BOARD_DIR/kernel.its $BINARIES_DIR/kernel.its || exit 1
-echo "# entering $BINARIES_DIR for the next command"
-(cd $BINARIES_DIR && run $mkimage -f kernel.its uImage.itb) || exit 1
-
-# futility requires non-empty file to be supplied with --bootloader
-# even if it does not make sense for the target platform.
-echo > $BINARIES_DIR/dummy.txt
-
-run $futility vbutil_kernel \
-	--keyblock $devkeys/kernel.keyblock \
-	--signprivate $devkeys/kernel_data_key.vbprivk \
-	--arch arm \
-	--version 1 \
-	--config $BOARD_DIR/kernel.args \
-	--vmlinuz $BINARIES_DIR/uImage.itb \
-	--bootloader $BINARIES_DIR/dummy.txt \
-	--pack $BINARIES_DIR/uImage.kpart || exit 1
-
-rm -f $BINARIES_DIR/kernel.its $BINARIES_DIR/dummy.txt

board/ci20/readme.txt

@@ -1,42 +0,0 @@
-*********************
-* MIPS Creator CI20 *
-*********************
-
-The 'ci20_defconfig' will create a root filesystem and a kernel image
-under the 'output/images/' directory. This document will try to explain how
-to use them in order to run Buildroot in the MIPS Creator CI20 board.
-
-Assuming you are at the U-Boot prompt of the MIPS Creator CI20, you have to
-load the generated kernel image by using the 'tftpboot' command. In
-order to do that, you will need to get the network working. Here you
-have the instructions to set the ip address, netmask and gateway:
-
-  setenv ipaddr x.x.x.x
-  setenv netmask x.x.x.x
-  setenv gatewayip x.x.x.x
-
-Now you have to set the ip for the TFTP server you are going to load the
-kernel image from, and also the name of the kernel image file (we use
-'uImage' as a filename in this example):
-
-  setenv serverip x.x.x.x
-  setenv bootfile uImage
-
-And finally load the kernel image:
-
-  tftpboot
-
-Now you have to extract the generated root filesystem into a USB drive
-or SD-Card. Here you have the instructions to boot from the two of them.
-You have to choose the one your prefer:
-
-From USB
-  setenv bootargs console=ttyS4,115200 console=tty0 mem=256M@0x0
-mem=768M@0x30000000 root=/dev/sda1
-
-From SD-Card
-  setenv bootargs console=ttyS4,115200 console=tty0 mem=256M@0x0
-mem=768M@0x30000000 root=/dev/mmcblk0p1
-
-And finally run this command to boot the board:
-  bootm

board/cubietech/cubieboard/boot.cmd

@@ -0,0 +1,4 @@
+setenv bootargs console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait panic=10 ${extra}
+fatload mmc 0 0x43000000 script.bin
+fatload mmc 0 0x48000000 uImage
+bootm 0x48000000

board/cubietech/cubieboard/mkcubiecard.sh

@@ -0,0 +1,119 @@
+#! /bin/sh
+# mkCubieCard.sh v0.1:
+# 2013, Carlo Caione <carlo.caione@gmail.com>
+# heavely based on :
+# mkA10card.sh v0.1
+# 2012, Jason Plum <jplum@archlinuxarm.org>
+# loosely based on :
+# mkcard.sh v0.5
+# (c) Copyright 2009 Graeme Gregory <dp@xora.org.uk>
+# Licensed under terms of GPLv2
+#
+# Parts of the procudure base on the work of Denys Dmytriyenko
+# http://wiki.omap.com/index.php/MMC_Boot_Format
+
+IMAGES_DIR=$1
+SPL_IMG=$IMAGES_DIR/sunxi-spl.bin
+UBOOT_IMG=$IMAGES_DIR/u-boot.bin
+UIMAGE=$IMAGES_DIR/uImage
+BIN_BOARD_FILE=$IMAGES_DIR/script.bin
+ROOTFS=$IMAGES_DIR/rootfs.tar
+BOOT_CMD_H=$IMAGES_DIR/boot.scr
+
+export LC_ALL=C
+
+if [ $# -ne 2 ]; then
+	echo "Usage: $0 <images_dir> <drive>"
+	exit 1;
+fi
+
+if [ $EUID -ne 0 ]; then
+	echo "This script must be run as root" 1>&2
+	exit 1
+fi
+
+if [ ! -f $SPL_IMG ] ||
+   [ ! -f $UBOOT_IMG ] ||
+   [ ! -f $UIMAGE ] ||
+   [ ! -f $BIN_BOARD_FILE ] ||
+   [ ! -f $ROOTFS ] ||
+   [ ! -f $BOOT_CMD_H ]; then
+	echo "File(s) missing."
+	exit 1
+fi
+
+DRIVE=$2
+P1=`mktemp -d`
+P2=`mktemp -d`
+
+dd if=/dev/zero of=$DRIVE bs=1M count=3
+
+SIZE=`fdisk -l $DRIVE | grep Disk | grep bytes | awk '{print $5}'`
+
+echo DISK SIZE - $SIZE bytes
+
+
+# ~2048, 16MB, FAT, bootable
+# ~rest of drive, Ext4
+{
+echo 32,512,0x0C,*
+echo 544,,,-
+} | sfdisk -D $DRIVE
+
+sleep 1
+
+if [ -b ${DRIVE}1 ]; then
+	D1=${DRIVE}1
+	umount ${DRIVE}1
+	mkfs.vfat -n "boot" ${DRIVE}1
+else
+	if [ -b ${DRIVE}p1 ]; then
+		D1=${DRIVE}p1
+		umount ${DRIVE}p1
+		mkfs.vfat -n "boot" ${DRIVE}p1
+	else
+		echo "Cant find boot partition in /dev"
+		exit 1
+	fi
+fi
+
+
+if [ -b ${DRIVE}2 ]; then
+	D2=${DRIVE}2
+	umount ${DRIVE}2
+	mkfs.ext4 -L "Cubie" ${DRIVE}2
+else
+	if [ -b ${DRIVE}p2 ]; then
+		D2=${DRIVE}p2
+		umount ${DRIVE}p2
+		mkfs.ext4 -L "Cubie" ${DRIVE}p2
+	else
+		echo "Cant find rootfs partition in /dev"
+		exit 1
+	fi
+fi
+
+mount $D1 $P1
+mount $D2 $P2
+
+# write uImage
+cp $UIMAGE $P1
+# write board file
+cp $BIN_BOARD_FILE $P1
+# write u-boot script
+cp $BOOT_CMD_H $P1
+# write rootfs
+tar -C $P2 -xvf $ROOTFS
+
+sync
+
+umount $D1
+umount $D2
+
+rm -fr $P1
+rm -fr $P2
+
+# write SPL
+dd if=$SPL_IMG of=$DRIVE bs=1024 seek=8
+# write mele u-boot
+dd if=$UBOOT_IMG of=$DRIVE bs=1024 seek=32

board/cubietech/cubieboard/post-build.sh

@@ -0,0 +1,14 @@
+#!/bin/sh
+# post-build.sh for CubieBoard
+# 2013, Carlo Caione <carlo.caione@gmail.com>
+
+BOARD_DIR="$(dirname $0)"
+MKIMAGE=$HOST_DIR/usr/bin/mkimage
+BOOT_CMD=$BOARD_DIR/boot.cmd
+BOOT_CMD_H=$BINARIES_DIR/boot.scr
+
+# U-Boot script
+if [ -e $MKIMAGE -a -e $BOOT_CMD ];
+then
+	$MKIMAGE -C none -A arm -T script -d $BOOT_CMD $BOOT_CMD_H
+fi