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Author SHA1 Message Date
Peter Korsgaard
b1001acaf0 Update for 2016.08.1
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-09-21 22:53:28 +02:00
Thomas Petazzoni
dcd36d47d2 toolchain-external: fix potential entire root filesystem removal
This reverts commit a0aa7e0e17 and reworks
the code to fix a major and potentially catastrophic bug when the
following conditions are met:

 - The user has selected a "known toolchain profile", such as a Linaro
   toolchain, a Sourcery CodeBench toolchain etc. People using "custom
   toolchain profile" are not affected.

 - The user has enabled BR2_TOOLCHAIN_EXTERNAL_PREINSTALLED=y to
   indicate that the toolchain is already locally available (as
   opposed to having Buildroot download and extract the toolchain)

 - The user has left BR2_TOOLCHAIN_EXTERNAL_PATH empty, because his
   toolchain is directly available through the PATH environment
   variable. When BR2_TOOLCHAIN_EXTERNAL_PATH is non-empty, Buildroot
   will do something silly (remove the toolchain contents), but that
   are limited to the toolchain itself.

When such conditions are met, Buildroot will run "rm -rf /*" due to
TOOLCHAIN_EXTERNAL_INSTALL_DIR being empty.

This bug does not exist in 2016.05, and appeared in 2016.08 due to
commit a0aa7e0e17.

Commit a0aa7e0e17 removed the assignment
of TOOLCHAIN_EXTERNAL_SOURCE and TOOLCHAIN_EXTERNAL_SITE to empty, as
part of a global cleanup to remove such assignments that supposedly
had become unneeded following a fix of the package infrastructure
(75630eba22: core: do not attempt
downloads with no _VERSION set).

However, this causes TOOLCHAIN_EXTERNAL_SOURCE to be non-empty even
for BR2_TOOLCHAIN_EXTERNAL_PREINSTALLED=y configuration, with the
following consequences:

 - Buildroot downloads the toolchain tarball (while we're saying the
   toolchain is already available). Not dramatic, but clearly buggy.

 - Buildroot registers a post-extract hook that moves the toolchain
   from its extract directory (output/build/toolchain-external-.../ to
   its final location in host/opt/ext-toolchain/). Before doing this,
   it removes everything in TOOLCHAIN_EXTERNAL_INSTALL_DIR (which
   should normally be host/opt/ext-toolchain/).

Another mistake that caused the bug is commit
b731dc7bfb ("toolchain-external: make
extraction idempotent"), which introduce the dangerous call "rm -rf
$(var)/*", which can be catastrophic if by mistake $(var) is
empty. Instead, this commit should have just used rm -rf $(var) to
remove the directory instead: it would have failed without consequences
if $(var) is empty, and the directory was anyway already re-created
right after with a mkdir.

To address this problem, we:

 - Revert commit a0aa7e0e17, so that
   _SOURCE and _SITE are empty in the pre-installed toolchain case.

 - Rework the code to ensure that similar problems will no happen in the
   future, by:

   - Registering the TOOLCHAIN_EXTERNAL_MOVE hook only when
     BR2_TOOLCHAIN_EXTERNAL_DOWNLOAD=y, since moving the toolchain is
     only needed when Buildroot downloaded the toolchain.

   - Introduce a variable TOOLCHAIN_EXTERNAL_DOWNLOAD_INSTALL_DIR which
     is the path in which Buildroot installs external toolchains when it
     is in charge of downloading/extracting them. Then, the
     TOOLCHAIN_EXTERNAL_MOVE hook is changed to use this variable, which
     is guaranteed to be non-empty.

   - Replace the removal of the directory contents $(var)/* by removing
     the directory itself $(var). The directory was anyway already
     re-created if needed afterwards. Thanks to doing this, if $(var)
     ever becomes empty, we will do "rm -rf" which will fail and abort
     the build, and not the catastrophic "rm -rf /*".

Reported-by: Mason <slash.tmp@free.fr>
Cc: Mason <slash.tmp@free.fr>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
(cherry picked from commit b171466c44)
2016-09-20 15:12:04 +02:00
7231 changed files with 133448 additions and 116055 deletions

View File

@@ -15,6 +15,7 @@ BR2_i386=y
# BR2_nios2 is not set
# BR2_powerpc is not set
# BR2_sh is not set
# BR2_sh64 is not set
# BR2_sparc is not set
# BR2_sparc64 is not set
# BR2_x86_64 is not set

View File

@@ -1,2 +0,0 @@
[flake8]
max-line-length=132

View File

@@ -1,294 +0,0 @@
# Configuration for Gitlab-CI.
# Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
# The .gitlab-ci.yml file is generated from .gitlab-ci.yml.in.
# It needs to be regenerated every time a defconfig is added, using
# "make .gitlab-ci.yml".
image: buildroot/base:20180205.0730
.defconfig_script: &defconfig_script
- echo 'Configure Buildroot'
- make ${CI_JOB_NAME}
- echo 'Build buildroot'
- |
make > >(tee build.log |grep '>>>') 2>&1 || {
echo 'Failed build last output'
tail -200 build.log
exit 1
}
check-gitlab-ci.yml:
script:
- mv .gitlab-ci.yml .gitlab-ci.yml.orig
- make .gitlab-ci.yml
- diff -u .gitlab-ci.yml.orig .gitlab-ci.yml
check-DEVELOPERS:
# get-developers should print just "No action specified"; if it prints
# anything else, it's a parse error.
# The initial ! is removed by YAML so we need to quote it.
script:
- "! utils/get-developers | grep -v 'No action specified'"
check-package:
script:
- find . -type f \( -name '*.mk' -o -name '*.hash' \) -exec ./utils/check-package {} +
.defconfig: &defconfig
# Running the defconfigs for every push is too much, so limit to
# explicit triggers through the API.
only:
- triggers
- tags
script: *defconfig_script
artifacts:
when: always
expire_in: 2 weeks
paths:
- build.log
- output/images/
- output/build/build-time.log
- output/build/packages-file-list.txt
.runtime_test: &runtime_test
# Keep build directories so the rootfs can be an artifact of the job. The
# runner will clean up those files for us.
# Multiply every emulator timeout by 10 to avoid sporadic failures in
# elastic runners.
script: ./support/testing/run-tests -o test-output/ -d test-dl/ -k --timeout-multiplier 10 ${CI_JOB_NAME}
artifacts:
when: always
expire_in: 2 weeks
paths:
- test-output/*.log
- test-output/*/.config
- test-output/*/images/*
acmesystems_aria_g25_128mb_defconfig: *defconfig
acmesystems_aria_g25_256mb_defconfig: *defconfig
acmesystems_arietta_g25_128mb_defconfig: *defconfig
acmesystems_arietta_g25_256mb_defconfig: *defconfig
arcturus_ucp1020_defconfig: *defconfig
arm_foundationv8_defconfig: *defconfig
arm_juno_defconfig: *defconfig
armadeus_apf27_defconfig: *defconfig
armadeus_apf28_defconfig: *defconfig
armadeus_apf51_defconfig: *defconfig
at91sam9260eknf_defconfig: *defconfig
at91sam9g20dfc_defconfig: *defconfig
at91sam9g45m10ek_defconfig: *defconfig
at91sam9rlek_defconfig: *defconfig
at91sam9x5ek_defconfig: *defconfig
at91sam9x5ek_dev_defconfig: *defconfig
at91sam9x5ek_mmc_defconfig: *defconfig
at91sam9x5ek_mmc_dev_defconfig: *defconfig
atmel_sama5d27_som1_ek_mmc_dev_defconfig: *defconfig
atmel_sama5d2_xplained_mmc_defconfig: *defconfig
atmel_sama5d2_xplained_mmc_dev_defconfig: *defconfig
atmel_sama5d3_xplained_defconfig: *defconfig
atmel_sama5d3_xplained_dev_defconfig: *defconfig
atmel_sama5d3_xplained_mmc_defconfig: *defconfig
atmel_sama5d3_xplained_mmc_dev_defconfig: *defconfig
atmel_sama5d3xek_defconfig: *defconfig
atmel_sama5d4_xplained_defconfig: *defconfig
atmel_sama5d4_xplained_dev_defconfig: *defconfig
atmel_sama5d4_xplained_mmc_defconfig: *defconfig
atmel_sama5d4_xplained_mmc_dev_defconfig: *defconfig
bananapi_m1_defconfig: *defconfig
bananapi_m2_plus_defconfig: *defconfig
bananapi_m64_defconfig: *defconfig
bananapro_defconfig: *defconfig
beagleboardx15_defconfig: *defconfig
beaglebone_defconfig: *defconfig
beaglebone_qt5_defconfig: *defconfig
chromebook_snow_defconfig: *defconfig
ci20_defconfig: *defconfig
ci40_defconfig: *defconfig
csky_gx6605s_defconfig: *defconfig
cubieboard2_defconfig: *defconfig
engicam_imx6qdl_icore_defconfig: *defconfig
engicam_imx6qdl_icore_qt5_defconfig: *defconfig
engicam_imx6qdl_icore_rqs_defconfig: *defconfig
engicam_imx6ul_geam_defconfig: *defconfig
engicam_imx6ul_isiot_defconfig: *defconfig
firefly_rk3288_defconfig: *defconfig
firefly_rk3288_demo_defconfig: *defconfig
freescale_imx28evk_defconfig: *defconfig
freescale_imx31_3stack_defconfig: *defconfig
freescale_imx6dlsabreauto_defconfig: *defconfig
freescale_imx6dlsabresd_defconfig: *defconfig
freescale_imx6qsabreauto_defconfig: *defconfig
freescale_imx6qsabresd_defconfig: *defconfig
freescale_imx6sololiteevk_defconfig: *defconfig
freescale_imx6sxsabresd_defconfig: *defconfig
freescale_imx6ulevk_defconfig: *defconfig
freescale_imx7dsabresd_defconfig: *defconfig
freescale_mpc8315erdb_defconfig: *defconfig
freescale_p1010rdb_pa_defconfig: *defconfig
friendlyarm_nanopi_a64_defconfig: *defconfig
friendlyarm_nanopi_neo2_defconfig: *defconfig
galileo_defconfig: *defconfig
gdb_bfin_bf512_defconfig: *defconfig
grinn_chiliboard_defconfig: *defconfig
grinn_liteboard_defconfig: *defconfig
imx23evk_defconfig: *defconfig
imx6-sabreauto_defconfig: *defconfig
imx6-sabresd_defconfig: *defconfig
imx6-sabresd_qt5_defconfig: *defconfig
imx6slevk_defconfig: *defconfig
imx6sx-sdb_defconfig: *defconfig
imx6ulevk_defconfig: *defconfig
imx6ulpico_defconfig: *defconfig
imx7dpico_defconfig: *defconfig
lego_ev3_defconfig: *defconfig
linksprite_pcduino_defconfig: *defconfig
minnowboard_max-graphical_defconfig: *defconfig
minnowboard_max_defconfig: *defconfig
mx25pdk_defconfig: *defconfig
mx51evk_defconfig: *defconfig
mx53loco_defconfig: *defconfig
mx6cubox_defconfig: *defconfig
mx6sx_udoo_neo_defconfig: *defconfig
mx6udoo_defconfig: *defconfig
nanopi_m1_defconfig: *defconfig
nanopi_m1_plus_defconfig: *defconfig
nanopi_neo_defconfig: *defconfig
nexbox_a95x_defconfig: *defconfig
nitrogen6sx_defconfig: *defconfig
nitrogen6x_defconfig: *defconfig
nitrogen7_defconfig: *defconfig
odroidc2_defconfig: *defconfig
olimex_a13_olinuxino_defconfig: *defconfig
olimex_a20_olinuxino_lime2_defconfig: *defconfig
olimex_a20_olinuxino_lime_defconfig: *defconfig
olimex_a20_olinuxino_lime_mali_defconfig: *defconfig
olimex_a20_olinuxino_micro_defconfig: *defconfig
olimex_a64_olinuxino_defconfig: *defconfig
olimex_imx233_olinuxino_defconfig: *defconfig
openblocks_a6_defconfig: *defconfig
orangepi_lite_defconfig: *defconfig
orangepi_one_defconfig: *defconfig
orangepi_pc2_defconfig: *defconfig
orangepi_pc_defconfig: *defconfig
orangepi_pc_plus_defconfig: *defconfig
orangepi_plus_defconfig: *defconfig
orangepi_prime_defconfig: *defconfig
orangepi_win_defconfig: *defconfig
orangepi_zero_defconfig: *defconfig
orangepi_zero_plus2_defconfig: *defconfig
pandaboard_defconfig: *defconfig
pc_x86_64_bios_defconfig: *defconfig
pc_x86_64_efi_defconfig: *defconfig
pine64_defconfig: *defconfig
pine64_sopine_defconfig: *defconfig
qemu_aarch64_virt_defconfig: *defconfig
qemu_arm_versatile_defconfig: *defconfig
qemu_arm_versatile_nommu_defconfig: *defconfig
qemu_arm_vexpress_defconfig: *defconfig
qemu_m68k_mcf5208_defconfig: *defconfig
qemu_m68k_q800_defconfig: *defconfig
qemu_microblazebe_mmu_defconfig: *defconfig
qemu_microblazeel_mmu_defconfig: *defconfig
qemu_mips32r2_malta_defconfig: *defconfig
qemu_mips32r2el_malta_defconfig: *defconfig
qemu_mips32r6_malta_defconfig: *defconfig
qemu_mips32r6el_malta_defconfig: *defconfig
qemu_mips64_malta_defconfig: *defconfig
qemu_mips64el_malta_defconfig: *defconfig
qemu_mips64r6_malta_defconfig: *defconfig
qemu_mips64r6el_malta_defconfig: *defconfig
qemu_nios2_10m50_defconfig: *defconfig
qemu_or1k_defconfig: *defconfig
qemu_ppc64_pseries_defconfig: *defconfig
qemu_ppc64le_pseries_defconfig: *defconfig
qemu_ppc_g3beige_defconfig: *defconfig
qemu_ppc_mpc8544ds_defconfig: *defconfig
qemu_ppc_virtex_ml507_defconfig: *defconfig
qemu_sh4_r2d_defconfig: *defconfig
qemu_sh4eb_r2d_defconfig: *defconfig
qemu_sparc64_sun4u_defconfig: *defconfig
qemu_sparc_ss10_defconfig: *defconfig
qemu_x86_64_defconfig: *defconfig
qemu_x86_defconfig: *defconfig
qemu_xtensa_lx60_defconfig: *defconfig
qemu_xtensa_lx60_nommu_defconfig: *defconfig
raspberrypi0_defconfig: *defconfig
raspberrypi2_defconfig: *defconfig
raspberrypi3_64_defconfig: *defconfig
raspberrypi3_defconfig: *defconfig
raspberrypi3_qt5we_defconfig: *defconfig
raspberrypi_defconfig: *defconfig
riotboard_defconfig: *defconfig
roseapplepi_defconfig: *defconfig
s6lx9_microboard_defconfig: *defconfig
sheevaplug_defconfig: *defconfig
snps_aarch64_vdk_defconfig: *defconfig
snps_arc700_axs101_defconfig: *defconfig
snps_archs38_axs103_defconfig: *defconfig
snps_archs38_haps_defconfig: *defconfig
snps_archs38_vdk_defconfig: *defconfig
socrates_cyclone5_defconfig: *defconfig
solidrun_macchiatobin_mainline_defconfig: *defconfig
solidrun_macchiatobin_marvell_defconfig: *defconfig
stm32f429_disco_defconfig: *defconfig
stm32f469_disco_defconfig: *defconfig
telit_evk_pro3_defconfig: *defconfig
toradex_apalis_imx6_defconfig: *defconfig
ts4800_defconfig: *defconfig
ts4900_defconfig: *defconfig
ts5x00_defconfig: *defconfig
ts7680_defconfig: *defconfig
wandboard_defconfig: *defconfig
warp7_defconfig: *defconfig
warpboard_defconfig: *defconfig
zynq_microzed_defconfig: *defconfig
zynq_zc706_defconfig: *defconfig
zynq_zed_defconfig: *defconfig
zynq_zybo_defconfig: *defconfig
tests.boot.test_atf.TestATFAllwinner: *runtime_test
tests.boot.test_atf.TestATFMarvell: *runtime_test
tests.boot.test_atf.TestATFVexpress: *runtime_test
tests.core.test_post_scripts.TestPostScripts: *runtime_test
tests.core.test_rootfs_overlay.TestRootfsOverlay: *runtime_test
tests.core.test_timezone.TestGlibcAllTimezone: *runtime_test
tests.core.test_timezone.TestGlibcNonDefaultLimitedTimezone: *runtime_test
tests.core.test_timezone.TestNoTimezone: *runtime_test
tests.fs.test_ext.TestExt2: *runtime_test
tests.fs.test_ext.TestExt2r1: *runtime_test
tests.fs.test_ext.TestExt3: *runtime_test
tests.fs.test_ext.TestExt4: *runtime_test
tests.fs.test_iso9660.TestIso9660Grub2External: *runtime_test
tests.fs.test_iso9660.TestIso9660Grub2ExternalCompress: *runtime_test
tests.fs.test_iso9660.TestIso9660Grub2Internal: *runtime_test
tests.fs.test_iso9660.TestIso9660SyslinuxExternal: *runtime_test
tests.fs.test_iso9660.TestIso9660SyslinuxExternalCompress: *runtime_test
tests.fs.test_iso9660.TestIso9660SyslinuxInternal: *runtime_test
tests.fs.test_jffs2.TestJffs2: *runtime_test
tests.fs.test_squashfs.TestSquashfs: *runtime_test
tests.fs.test_ubi.TestUbi: *runtime_test
tests.fs.test_yaffs2.TestYaffs2: *runtime_test
tests.init.test_busybox.TestInitSystemBusyboxRo: *runtime_test
tests.init.test_busybox.TestInitSystemBusyboxRoNet: *runtime_test
tests.init.test_busybox.TestInitSystemBusyboxRw: *runtime_test
tests.init.test_busybox.TestInitSystemBusyboxRwNet: *runtime_test
tests.init.test_none.TestInitSystemNone: *runtime_test
tests.init.test_systemd.TestInitSystemSystemdRoFull: *runtime_test
tests.init.test_systemd.TestInitSystemSystemdRoIfupdown: *runtime_test
tests.init.test_systemd.TestInitSystemSystemdRoNetworkd: *runtime_test
tests.init.test_systemd.TestInitSystemSystemdRwFull: *runtime_test
tests.init.test_systemd.TestInitSystemSystemdRwIfupdown: *runtime_test
tests.init.test_systemd.TestInitSystemSystemdRwNetworkd: *runtime_test
tests.package.test_dropbear.TestDropbear: *runtime_test
tests.package.test_ipython.TestIPythonPy2: *runtime_test
tests.package.test_ipython.TestIPythonPy3: *runtime_test
tests.package.test_python.TestPython2: *runtime_test
tests.package.test_python.TestPython3: *runtime_test
tests.package.test_rust.TestRust: *runtime_test
tests.package.test_rust.TestRustBin: *runtime_test
tests.toolchain.test_external.TestExternalToolchainBuildrootMusl: *runtime_test
tests.toolchain.test_external.TestExternalToolchainBuildrootuClibc: *runtime_test
tests.toolchain.test_external.TestExternalToolchainCCache: *runtime_test
tests.toolchain.test_external.TestExternalToolchainCtngMusl: *runtime_test
tests.toolchain.test_external.TestExternalToolchainLinaroArm: *runtime_test
tests.toolchain.test_external.TestExternalToolchainSourceryArmv4: *runtime_test
tests.toolchain.test_external.TestExternalToolchainSourceryArmv5: *runtime_test
tests.toolchain.test_external.TestExternalToolchainSourceryArmv7: *runtime_test

View File

@@ -1,65 +0,0 @@
# Configuration for Gitlab-CI.
# Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
# The .gitlab-ci.yml file is generated from .gitlab-ci.yml.in.
# It needs to be regenerated every time a defconfig is added, using
# "make .gitlab-ci.yml".
image: buildroot/base:20180205.0730
.defconfig_script: &defconfig_script
- echo 'Configure Buildroot'
- make ${CI_JOB_NAME}
- echo 'Build buildroot'
- |
make > >(tee build.log |grep '>>>') 2>&1 || {
echo 'Failed build last output'
tail -200 build.log
exit 1
}
check-gitlab-ci.yml:
script:
- mv .gitlab-ci.yml .gitlab-ci.yml.orig
- make .gitlab-ci.yml
- diff -u .gitlab-ci.yml.orig .gitlab-ci.yml
check-DEVELOPERS:
# get-developers should print just "No action specified"; if it prints
# anything else, it's a parse error.
# The initial ! is removed by YAML so we need to quote it.
script:
- "! utils/get-developers | grep -v 'No action specified'"
check-package:
script:
- find . -type f \( -name '*.mk' -o -name '*.hash' \) -exec ./utils/check-package {} +
.defconfig: &defconfig
# Running the defconfigs for every push is too much, so limit to
# explicit triggers through the API.
only:
- triggers
- tags
script: *defconfig_script
artifacts:
when: always
expire_in: 2 weeks
paths:
- build.log
- output/images/
- output/build/build-time.log
- output/build/packages-file-list.txt
.runtime_test: &runtime_test
# Keep build directories so the rootfs can be an artifact of the job. The
# runner will clean up those files for us.
# Multiply every emulator timeout by 10 to avoid sporadic failures in
# elastic runners.
script: ./support/testing/run-tests -o test-output/ -d test-dl/ -k --timeout-multiplier 10 ${CI_JOB_NAME}
artifacts:
when: always
expire_in: 2 weeks
paths:
- test-output/*.log
- test-output/*/.config
- test-output/*/images/*

1515
CHANGES

File diff suppressed because it is too large Load Diff

288
Config.in
View File

@@ -14,23 +14,18 @@ config BR2_HOSTARCH
string
option env="HOSTARCH"
config BR2_BUILD_DIR
config BR2_EXTERNAL
string
option env="BUILD_DIR"
option env="BR2_EXTERNAL"
# Hidden config symbols for packages to check system gcc version
config BR2_HOST_GCC_VERSION
string
option env="HOST_GCC_VERSION"
config BR2_HOST_GCC_AT_LEAST_4_5
bool
default y if BR2_HOST_GCC_VERSION = "4 5"
config BR2_HOST_GCC_AT_LEAST_4_6
bool
default y if BR2_HOST_GCC_VERSION = "4 6"
select BR2_HOST_GCC_AT_LEAST_4_5
config BR2_HOST_GCC_AT_LEAST_4_7
bool
@@ -57,13 +52,8 @@ config BR2_HOST_GCC_AT_LEAST_6
default y if BR2_HOST_GCC_VERSION = "6"
select BR2_HOST_GCC_AT_LEAST_5
config BR2_HOST_GCC_AT_LEAST_7
bool
default y if BR2_HOST_GCC_VERSION = "7"
select BR2_HOST_GCC_AT_LEAST_6
# Hidden boolean selected by packages in need of Java in order to build
# (example: kodi)
# (example: xbmc)
config BR2_NEEDS_HOST_JAVA
bool
@@ -89,11 +79,6 @@ config BR2_HOSTARCH_NEEDS_IA32_LIBS
config BR2_HOSTARCH_NEEDS_IA32_COMPILER
bool
# Hidden boolean selected by packages that need the host to have an
# UTF8 locale.
config BR2_NEEDS_HOST_UTF8_LOCALE
bool
source "arch/Config.in"
menu "Build options"
@@ -106,7 +91,7 @@ config BR2_WGET
config BR2_SVN
string "Subversion (svn) command"
default "svn --non-interactive"
default "svn"
config BR2_BZR
string "Bazaar (bzr) command"
@@ -163,13 +148,6 @@ config BR2_XZCAT
Command to be used to extract a xz'ed file to stdout.
Default is "xzcat"
config BR2_LZCAT
string "lzcat command"
default "lzip -d -c"
help
Command to be used to extract a lzip'ed file to stdout.
Default is "lzip -d -c"
config BR2_TAR_OPTIONS
string "Tar options"
default ""
@@ -379,6 +357,40 @@ config BR2_CCACHE_USE_BASEDIR
endif
config BR2_DEPRECATED
bool "Show options and packages that are deprecated or obsolete"
help
This option shows outdated/obsolete versions of packages and
options that are otherwise hidden.
if BR2_DEPRECATED
config BR2_DEPRECATED_SINCE_2015_05
bool
default y
config BR2_DEPRECATED_SINCE_2015_08
bool
default y
config BR2_DEPRECATED_SINCE_2015_11
bool
default y
config BR2_DEPRECATED_SINCE_2016_02
bool
default y
config BR2_DEPRECATED_SINCE_2016_05
bool
default y
config BR2_DEPRECATED_SINCE_2016_08
bool
default y
endif
config BR2_ENABLE_DEBUG
bool "build packages with debugging symbols"
help
@@ -419,10 +431,13 @@ config BR2_DEBUG_3
endchoice
endif
choice
prompt "strip command for binaries on target"
default BR2_STRIP_strip
config BR2_STRIP_strip
bool "strip target binaries"
bool "strip"
depends on !BR2_PACKAGE_HOST_ELF2FLT
default y
help
Binaries and libraries in the target filesystem will be
stripped using the normal 'strip' command. This allows to save
@@ -430,9 +445,15 @@ config BR2_STRIP_strip
on the target are needed for native debugging, but not when
remote debugging is used.
config BR2_STRIP_none
bool "none"
help
Do not strip binaries and libraries in the target filesystem.
endchoice
config BR2_STRIP_EXCLUDE_FILES
string "executables that should not be stripped"
depends on BR2_STRIP_strip
depends on !BR2_STRIP_none
default ""
help
You may specify a space-separated list of binaries and
@@ -440,7 +461,7 @@ config BR2_STRIP_EXCLUDE_FILES
config BR2_STRIP_EXCLUDE_DIRS
string "directories that should be skipped when stripping"
depends on BR2_STRIP_strip
depends on !BR2_STRIP_none
default ""
help
You may specify a space-separated list of directories that
@@ -458,7 +479,7 @@ choice
config BR2_OPTIMIZE_0
bool "optimization level 0"
help
Do not optimize.
Do not optimize. This is the default.
config BR2_OPTIMIZE_1
bool "optimization level 1"
@@ -525,7 +546,6 @@ config BR2_OPTIMIZE_S
-falign-loops -falign-labels -freorder-blocks
-freorder-blocks-and-partition -fprefetch-loop-arrays
-ftree-vect-loop-version
This is the default.
endchoice
@@ -533,13 +553,8 @@ config BR2_GOOGLE_BREAKPAD_ENABLE
bool "Enable google-breakpad support"
select BR2_PACKAGE_GOOGLE_BREAKPAD
depends on BR2_INSTALL_LIBSTDCPP
depends on BR2_HOST_GCC_AT_LEAST_4_8 # C++11
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8 # C++11
depends on BR2_USE_WCHAR
depends on BR2_TOOLCHAIN_HAS_THREADS
depends on (BR2_TOOLCHAIN_USES_GLIBC || BR2_TOOLCHAIN_USES_UCLIBC)
depends on BR2_TOOLCHAIN_USES_GLIBC
depends on BR2_PACKAGE_GOOGLE_BREAKPAD_ARCH_SUPPORTS
depends on BR2_PACKAGE_HOST_GOOGLE_BREAKPAD_ARCH_SUPPORTS
help
This option will enable the use of google breakpad, a library
and tool suite that allows you to distribute an application to
@@ -567,6 +582,61 @@ config BR2_GOOGLE_BREAKPAD_INCLUDE_FILES
endif
choice
bool "build code with Stack Smashing Protection"
default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
depends on BR2_TOOLCHAIN_HAS_SSP
help
Enable stack smashing protection support using GCC's
-fstack-protector option family.
See
http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
for details.
Note that this requires the toolchain to have SSP support.
This is always the case for glibc and eglibc toolchain, but is
optional in uClibc toolchains.
config BR2_SSP_NONE
bool "None"
help
Disable stack-smashing protection.
config BR2_SSP_REGULAR
bool "-fstack-protector"
help
Emit extra code to check for buffer overflows, such as stack
smashing attacks. This is done by adding a guard variable to
functions with vulnerable objects. This includes functions
that call alloca, and functions with buffers larger than 8
bytes. The guards are initialized when a function is entered
and then checked when the function exits. If a guard check
fails, an error message is printed and the program exits.
config BR2_SSP_STRONG
bool "-fstack-protector-strong"
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
help
Like -fstack-protector but includes additional functions to be
protected - those that have local array definitions, or have
references to local frame addresses.
comment "Stack Smashing Protection strong needs a toolchain w/ gcc >= 4.9"
depends on !BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
config BR2_SSP_ALL
bool "-fstack-protector-all"
help
Like -fstack-protector except that all functions are
protected. This option might have a significant performance
impact on the compiled binaries.
endchoice
comment "Stack Smashing Protection needs a toolchain w/ SSP"
depends on !BR2_TOOLCHAIN_HAS_SSP
choice
bool "libraries"
default BR2_SHARED_LIBS if BR2_BINFMT_SUPPORTS_SHARED
@@ -658,152 +728,17 @@ config BR2_COMPILER_PARANOID_UNSAFE_PATH
config BR2_REPRODUCIBLE
bool "Make the build reproducible (experimental)"
# SOURCE_DATE_EPOCH support in toolchain-wrapper requires GCC 4.4
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_4
help
This option will remove all sources of non-reproducibility
from the build process. For a given Buildroot configuration,
this allows to generate exactly identical binaries from one
build to the other, including on different machines.
The current implementation is restricted to builds with the
same output directory. Many (absolute) paths are recorded in
intermediary files, and it is very likely that some of these
paths leak into the target rootfs. If you build with the
same O=... path, however, the result is identical.
This is labeled as an experimental feature, as not all
packages behave properly to ensure reproducibility.
endmenu
comment "Security Hardening Options"
choice
bool "Stack Smashing Protection"
default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
depends on BR2_TOOLCHAIN_HAS_SSP
help
Enable stack smashing protection support using GCC's
-fstack-protector option family.
See
http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
for details.
Note that this requires the toolchain to have SSP support.
This is always the case for glibc and eglibc toolchain, but is
optional in uClibc toolchains.
config BR2_SSP_NONE
bool "None"
help
Disable stack-smashing protection.
config BR2_SSP_REGULAR
bool "-fstack-protector"
help
Emit extra code to check for buffer overflows, such as stack
smashing attacks. This is done by adding a guard variable to
functions with vulnerable objects. This includes functions
that call alloca, and functions with buffers larger than 8
bytes. The guards are initialized when a function is entered
and then checked when the function exits. If a guard check
fails, an error message is printed and the program exits.
config BR2_SSP_STRONG
bool "-fstack-protector-strong"
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
help
Like -fstack-protector but includes additional functions to be
protected - those that have local array definitions, or have
references to local frame addresses.
comment "Stack Smashing Protection strong needs a toolchain w/ gcc >= 4.9"
depends on !BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
config BR2_SSP_ALL
bool "-fstack-protector-all"
help
Like -fstack-protector except that all functions are
protected. This option might have a significant performance
impact on the compiled binaries.
endchoice
comment "Stack Smashing Protection needs a toolchain w/ SSP"
depends on !BR2_TOOLCHAIN_HAS_SSP
choice
bool "RELRO Protection"
depends on BR2_SHARED_LIBS
help
Enable a link-time protection know as RELRO (RELocation Read Only)
which helps to protect from certain type of exploitation techniques
altering the content of some ELF sections.
config BR2_RELRO_NONE
bool "None"
help
Disables Relocation link-time protections.
config BR2_RELRO_PARTIAL
bool "Partial"
help
This option makes the dynamic section not writeable after
initialization (with almost no performance penalty).
config BR2_RELRO_FULL
bool "Full"
help
This option includes the partial configuration, but also
marks the GOT as read-only at the cost of initialization time
during program loading, i.e every time an executable is started.
endchoice
comment "RELocation Read Only (RELRO) needs shared libraries"
depends on !BR2_SHARED_LIBS
choice
bool "Buffer-overflow Detection (FORTIFY_SOURCE)"
depends on BR2_TOOLCHAIN_USES_GLIBC
depends on !BR2_OPTIMIZE_0
help
Enable the _FORTIFY_SOURCE macro which introduces additional
checks to detect buffer-overflows in the following standard library
functions: memcpy, mempcpy, memmove, memset, strcpy, stpcpy,
strncpy, strcat, strncat, sprintf, vsprintf, snprintf, vsnprintf,
gets.
NOTE: This feature requires an optimization level of s/1/2/3/g
Support for this feature has been present since GCC 4.x.
config BR2_FORTIFY_SOURCE_NONE
bool "None"
help
Disables additional checks to detect buffer-overflows.
config BR2_FORTIFY_SOURCE_1
bool "Conservative"
help
This option sets _FORTIFY_SOURCE to 1 and only introduces
checks that shouldn't change the behavior of conforming
programs. Adds checks at compile-time only.
config BR2_FORTIFY_SOURCE_2
bool "Aggressive"
help
This option sets _FORTIFY_SOURCES to 2 and some more
checking is added, but some conforming programs might fail.
Also adds checks at run-time (detected buffer overflow
terminates the program)
endchoice
comment "Fortify Source needs a glibc toolchain and optimization"
depends on (!BR2_TOOLCHAIN_USES_GLIBC || BR2_OPTIMIZE_0)
endmenu
source "toolchain/Config.in"
@@ -822,4 +757,9 @@ source "package/Config.in.host"
source "Config.in.legacy"
source "$BR2_BUILD_DIR/.br2-external.in"
menu "User-provided options"
depends on BR2_EXTERNAL != "support/dummy-external"
source "$BR2_EXTERNAL/Config.in"
endmenu

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1956
DEVELOPERS

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457
Makefile
View File

@@ -2,7 +2,7 @@
#
# Copyright (C) 1999-2005 by Erik Andersen <andersen@codepoet.org>
# Copyright (C) 2006-2014 by the Buildroot developers <buildroot@uclibc.org>
# Copyright (C) 2014-2018 by the Buildroot developers <buildroot@buildroot.org>
# Copyright (C) 2014-2016 by the Buildroot developers <buildroot@buildroot.org>
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -24,72 +24,29 @@
# You shouldn't need to mess with anything beyond this point...
#--------------------------------------------------------------
# Delete default rules. We don't use them. This saves a bit of time.
.SUFFIXES:
# we want bash as shell
SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
else if [ -x /bin/bash ]; then echo /bin/bash; \
else echo sh; fi; fi)
# Set O variable if not already done on the command line;
# or avoid confusing packages that can use the O=<dir> syntax for out-of-tree
# build by preventing it from being forwarded to sub-make calls.
ifneq ("$(origin O)", "command line")
O := $(CURDIR)/output
endif
# Check if the current Buildroot execution meets all the pre-requisites.
# If they are not met, Buildroot will actually do its job in a sub-make meeting
# its pre-requisites, which are:
# 1- Permissive enough umask:
# Wrong or too restrictive umask will prevent Buildroot and packages from
# creating files and directories.
# 2- Absolute canonical CWD (i.e. $(CURDIR)):
# Otherwise, some packages will use CWD as-is, others will compute its
# absolute canonical path. This makes harder tracking and fixing host
# machine path leaks.
# 3- Absolute canonical output location (i.e. $(O)):
# For the same reason as the one for CWD.
# Remove the trailing '/.' from $(O) as it can be added by the makefile wrapper
# installed in the $(O) directory.
# Also remove the trailing '/' the user can set when on the command line.
override O := $(patsubst %/,%,$(patsubst %.,%,$(O)))
# Make sure $(O) actually exists before calling realpath on it; this is to
# avoid empty CANONICAL_O in case on non-existing entry.
CANONICAL_O := $(shell mkdir -p $(O) >/dev/null 2>&1)$(realpath $(O))
CANONICAL_CURDIR = $(realpath $(CURDIR))
REQ_UMASK = 0022
# Make sure O= is passed (with its absolute canonical path) everywhere the
# toplevel makefile is called back.
EXTRAMAKEARGS := O=$(CANONICAL_O)
# Check Buildroot execution pre-requisites here.
ifneq ($(shell umask):$(CURDIR):$(O),$(REQ_UMASK):$(CANONICAL_CURDIR):$(CANONICAL_O))
# Trick for always running with a fixed umask
UMASK = 0022
ifneq ($(shell umask),$(UMASK))
.PHONY: _all $(MAKECMDGOALS)
$(MAKECMDGOALS): _all
@:
_all:
@umask $(REQ_UMASK) && \
$(MAKE) -C $(CANONICAL_CURDIR) --no-print-directory \
$(MAKECMDGOALS) $(EXTRAMAKEARGS)
@umask $(UMASK) && $(MAKE) --no-print-directory $(MAKECMDGOALS)
else # umask / $(CURDIR) / $(O)
else # umask
# This is our default rule, so must come first
all:
.PHONY: all
# Set and export the version string
export BR2_VERSION := 2018.02
# Actual time the release is cut (for reproducible builds)
BR2_VERSION_EPOCH = 1520198000
export BR2_VERSION := 2016.08.1
# Save running make version since it's clobbered by the make package
RUNNING_MAKE_VERSION := $(MAKE_VERSION)
@@ -126,11 +83,10 @@ DATE := $(shell date +%Y%m%d)
# Need to export it, so it can be got from environment in children (eg. mconf)
export BR2_VERSION_FULL := $(BR2_VERSION)$(shell $(TOPDIR)/support/scripts/setlocalversion)
# List of targets and target patterns for which .config doesn't need to be read in
noconfig_targets := menuconfig nconfig gconfig xconfig config oldconfig randconfig \
defconfig %_defconfig allyesconfig allnoconfig alldefconfig silentoldconfig release \
defconfig %_defconfig allyesconfig allnoconfig silentoldconfig release \
randpackageconfig allyespackageconfig allnopackageconfig \
print-version olddefconfig distclean manual manual-%
print-version olddefconfig
# Some global targets do not trigger a build, but are used to collect
# metadata, or do various checks. When such targets are triggered,
@@ -141,63 +97,80 @@ noconfig_targets := menuconfig nconfig gconfig xconfig config oldconfig randconf
# We're building in two situations: when MAKECMDGOALS is empty
# (default target is to build), or when MAKECMDGOALS contains
# something else than one of the nobuild_targets.
nobuild_targets := source %-source \
legal-info %-legal-info external-deps _external-deps \
clean distclean help show-targets graph-depends \
%-graph-depends %-show-depends %-show-version \
graph-build graph-size list-defconfigs \
savedefconfig printvars
nobuild_targets := source source-check \
legal-info external-deps _external-deps \
clean distclean help
ifeq ($(MAKECMDGOALS),)
BR_BUILDING = y
else ifneq ($(filter-out $(nobuild_targets),$(MAKECMDGOALS)),)
BR_BUILDING = y
endif
# We call make recursively to build packages. The command-line overrides that
# are passed to Buildroot don't apply to those package build systems. In
# particular, we don't want to pass down the O=<dir> option for out-of-tree
# builds, because the value specified on the command line will not be correct
# for packages.
MAKEOVERRIDES :=
# Strip quotes and then whitespaces
qstrip = $(strip $(subst ",,$(1)))
#"))
# Include some helper macros and variables
include support/misc/utils.mk
# Variables for use in Make constructs
comma := ,
empty :=
space := $(empty) $(empty)
# Set variables related to in-tree or out-of-tree build.
# Here, both $(O) and $(CURDIR) are absolute canonical paths.
ifeq ($(O),$(CURDIR)/output)
CONFIG_DIR := $(CURDIR)
ifneq ("$(origin O)", "command line")
O := output
CONFIG_DIR := $(TOPDIR)
NEED_WRAPPER =
else
# other packages might also support Linux-style out of tree builds
# with the O=<dir> syntax (E.G. BusyBox does). As make automatically
# forwards command line variable definitions those packages get very
# confused. Fix this by telling make to not do so
MAKEOVERRIDES =
# strangely enough O is still passed to submakes with MAKEOVERRIDES
# (with make 3.81 atleast), the only thing that changes is the output
# of the origin function (command line -> environment).
# Unfortunately some packages don't look at origin (E.G. uClibc 0.9.31+)
# To really make O go away, we have to override it.
override O := $(O)
CONFIG_DIR := $(O)
# we need to pass O= everywhere we call back into the toplevel makefile
EXTRAMAKEARGS = O=$(O)
NEED_WRAPPER = y
endif
# bash prints the name of the directory on 'cd <dir>' if CDPATH is
# set, so unset it here to not cause problems. Notice that the export
# line doesn't affect the environment of $(shell ..) calls.
# line doesn't affect the environment of $(shell ..) calls, so
# explictly throw away any output from 'cd' here.
export CDPATH :=
BASE_DIR := $(CANONICAL_O)
BASE_DIR := $(shell mkdir -p $(O) && cd $(O) >/dev/null && pwd)
$(if $(BASE_DIR),, $(error output directory "$(O)" does not exist))
# Handling of BR2_EXTERNAL.
#
# The value of BR2_EXTERNAL is stored in .br-external in the output directory.
# The location of the external.mk makefile fragments is computed in that file.
# On subsequent invocations of make, this file is read in. BR2_EXTERNAL can
# still be overridden on the command line, therefore the file is re-created
# every time make is run.
# On subsequent invocations of make, it is read in. It can still be overridden
# on the command line, therefore the file is re-created every time make is run.
#
# When BR2_EXTERNAL is set to an empty value (e.g. explicitly in command
# line), the .br-external file is removed and we point to
# support/dummy-external. This makes sure we can unconditionally include the
# Config.in and external.mk from the BR2_EXTERNAL directory. In this case,
# override is necessary so the user can clear BR2_EXTERNAL from the command
# line, but the dummy path is still used internally.
BR2_EXTERNAL_FILE = $(BASE_DIR)/.br-external.mk
BR2_EXTERNAL_FILE = $(BASE_DIR)/.br-external
-include $(BR2_EXTERNAL_FILE)
$(shell support/scripts/br2-external \
-m -o '$(BR2_EXTERNAL_FILE)' $(BR2_EXTERNAL))
BR2_EXTERNAL_ERROR =
include $(BR2_EXTERNAL_FILE)
ifneq ($(BR2_EXTERNAL_ERROR),)
$(error $(BR2_EXTERNAL_ERROR))
ifeq ($(BR2_EXTERNAL),)
override BR2_EXTERNAL = support/dummy-external
$(shell rm -f $(BR2_EXTERNAL_FILE))
else
_BR2_EXTERNAL = $(shell cd $(BR2_EXTERNAL) >/dev/null 2>&1 && pwd)
ifeq ($(_BR2_EXTERNAL),)
$(error BR2_EXTERNAL='$(BR2_EXTERNAL)' does not exist, relative to $(TOPDIR))
endif
override BR2_EXTERNAL := $(_BR2_EXTERNAL)
$(shell echo BR2_EXTERNAL ?= $(BR2_EXTERNAL) > $(BR2_EXTERNAL_FILE))
endif
# To make sure that the environment variable overrides the .config option,
@@ -228,18 +201,11 @@ LICENSE_FILES_DIR_TARGET = $(LEGAL_INFO_DIR)/licenses
LICENSE_FILES_DIR_HOST = $(LEGAL_INFO_DIR)/host-licenses
LEGAL_MANIFEST_CSV_TARGET = $(LEGAL_INFO_DIR)/manifest.csv
LEGAL_MANIFEST_CSV_HOST = $(LEGAL_INFO_DIR)/host-manifest.csv
LEGAL_LICENSES_TXT_TARGET = $(LEGAL_INFO_DIR)/licenses.txt
LEGAL_LICENSES_TXT_HOST = $(LEGAL_INFO_DIR)/host-licenses.txt
LEGAL_WARNINGS = $(LEGAL_INFO_DIR)/.warnings
LEGAL_REPORT = $(LEGAL_INFO_DIR)/README
################################################################################
#
# staging and target directories do NOT list these as
# dependencies anywhere else
#
################################################################################
$(BUILD_DIR) $(TARGET_DIR) $(HOST_DIR) $(BINARIES_DIR) $(LEGAL_INFO_DIR) $(REDIST_SOURCES_DIR_TARGET) $(REDIST_SOURCES_DIR_HOST):
@mkdir -p $@
BR2_CONFIG = $(CONFIG_DIR)/.config
# Pull in the user's configuration file
@@ -249,13 +215,9 @@ endif
# timezone and locale may affect build output
ifeq ($(BR2_REPRODUCIBLE),y)
export TZ = UTC
export LANG = C
export LC_ALL = C
export GZIP = -n
BR2_VERSION_GIT_EPOCH = $(shell GIT_DIR=$(TOPDIR)/.git $(GIT) log -1 --format=%at)
export SOURCE_DATE_EPOCH ?= $(if $(wildcard $(TOPDIR)/.git),$(BR2_VERSION_GIT_EPOCH),$(BR2_VERSION_EPOCH))
DEPENDENCIES_HOST_PREREQ += host-fakedate
export TZ=UTC
export LANG=C
export LC_ALL=C
endif
# To put more focus on warnings, be less verbose as default
@@ -324,7 +286,6 @@ HOSTLN := $(shell which $(HOSTLN) || type -p $(HOSTLN) || echo ln)
HOSTNM := $(shell which $(HOSTNM) || type -p $(HOSTNM) || echo nm)
HOSTOBJCOPY := $(shell which $(HOSTOBJCOPY) || type -p $(HOSTOBJCOPY) || echo objcopy)
HOSTRANLIB := $(shell which $(HOSTRANLIB) || type -p $(HOSTRANLIB) || echo ranlib)
SED := $(shell which sed || type -p sed) -i -e
export HOSTAR HOSTAS HOSTCC HOSTCXX HOSTLD
export HOSTCC_NOCCACHE HOSTCXX_NOCCACHE
@@ -363,22 +324,6 @@ ifneq ($(firstword $(HOSTCC_VERSION)),4)
HOSTCC_VERSION := $(firstword $(HOSTCC_VERSION))
endif
ifeq ($(BR2_NEEDS_HOST_UTF8_LOCALE),y)
# First, we try to use the user's configured locale (as that's the
# language they'd expect messages to be displayed), then we favour
# a non language-specific locale like C.UTF-8 if one is available,
# so we sort with the C locale to get it at the top.
# This is guaranteed to not be empty, because of the check in
# support/dependencies/dependencies.sh
HOST_UTF8_LOCALE := $(shell \
( echo $${LC_ALL:-$${LC_MESSAGES:-$${LANG}}}; \
locale -a 2>/dev/null | LC_ALL=C sort \
) \
| grep -i -E 'utf-?8$$' \
| head -n 1)
HOST_UTF8_LOCALE_ENV := LC_ALL=$(HOST_UTF8_LOCALE)
endif
# Make sure pkg-config doesn't look outside the buildroot tree
HOST_PKG_CONFIG_PATH := $(PKG_CONFIG_PATH)
unexport PKG_CONFIG_PATH
@@ -419,7 +364,6 @@ unexport QMAKESPEC
unexport TERMINFO
unexport MACHINE
unexport O
unexport GCC_COLORS
GNU_HOST_NAME := $(shell support/gnuconfig/config.guess)
@@ -439,7 +383,6 @@ KERNEL_ARCH := $(shell echo "$(ARCH)" | sed -e "s/-.*//" \
-e s/arm.*/arm/ -e s/sa110/arm/ \
-e s/aarch64.*/arm64/ \
-e s/bfin/blackfin/ \
-e s/or1k/openrisc/ \
-e s/parisc64/parisc/ \
-e s/powerpc64.*/powerpc/ \
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
@@ -449,21 +392,20 @@ KERNEL_ARCH := $(shell echo "$(ARCH)" | sed -e "s/-.*//" \
ZCAT := $(call qstrip,$(BR2_ZCAT))
BZCAT := $(call qstrip,$(BR2_BZCAT))
XZCAT := $(call qstrip,$(BR2_XZCAT))
LZCAT := $(call qstrip,$(BR2_LZCAT))
TAR_OPTIONS = $(call qstrip,$(BR2_TAR_OPTIONS)) -xf
# packages compiled for the host go here
HOST_DIR := $(call qstrip,$(BR2_HOST_DIR))
# Quotes are needed for spaces and all in the original PATH content.
BR_PATH = "$(HOST_DIR)/bin:$(HOST_DIR)/sbin:$(PATH)"
BR_PATH = "$(HOST_DIR)/bin:$(HOST_DIR)/sbin:$(HOST_DIR)/usr/bin:$(HOST_DIR)/usr/sbin:$(PATH)"
# Location of a file giving a big fat warning that output/target
# should not be used as the root filesystem.
TARGET_DIR_WARNING_FILE = $(TARGET_DIR)/THIS_IS_NOT_YOUR_ROOT_FILESYSTEM
ifeq ($(BR2_CCACHE),y)
CCACHE := $(HOST_DIR)/bin/ccache
CCACHE := $(HOST_DIR)/usr/bin/ccache
BR_CACHE_DIR ?= $(call qstrip,$(BR2_CCACHE_DIR))
export BR_CACHE_DIR
HOSTCC := $(CCACHE) $(HOSTCC)
@@ -493,19 +435,15 @@ all: world
# Include legacy before the other things, because package .mk files
# may rely on it.
ifneq ($(BR2_DEPRECATED),y)
include Makefile.legacy
endif
include system/system.mk
include package/Makefile.in
# arch/arch.mk.* must be after package/Makefile.in because it may need to
# complement variables defined therein, like BR_NO_CHECK_HASH_FOR.
-include $(sort $(wildcard arch/arch.mk.*))
include support/dependencies/dependencies.mk
PACKAGES += $(DEPENDENCIES_HOST_PREREQ)
include $(sort $(wildcard toolchain/*.mk))
include $(sort $(wildcard toolchain/*/*.mk))
include toolchain/*.mk
include toolchain/*/*.mk
# Include the package override file if one has been provided in the
# configuration.
@@ -520,15 +458,7 @@ include boot/common.mk
include linux/linux.mk
include fs/common.mk
# If using a br2-external tree, the BR2_EXTERNAL_$(NAME)_PATH variables
# are also present in the .config file. Since .config is included after
# we defined them in the Makefile, the values for those variables are
# quoted. We just include the generated Makefile fragment .br2-external.mk
# a third time, which will set those variables to the un-quoted values.
include $(BR2_EXTERNAL_FILE)
# Nothing to include if no BR2_EXTERNAL tree in use
include $(BR2_EXTERNAL_MKS)
include $(BR2_EXTERNAL)/external.mk
# Now we are sure we have all the packages scanned and defined. We now
# check for each package in the list of enabled packages, that all its
@@ -558,37 +488,28 @@ $(foreach pkg,$(call UPPERCASE,$(PACKAGES)),\
endif
.PHONY: dirs
dirs: $(BUILD_DIR) $(STAGING_DIR) $(TARGET_DIR) \
$(HOST_DIR) $(HOST_DIR)/usr $(HOST_DIR)/lib $(BINARIES_DIR)
$(HOST_DIR) $(BINARIES_DIR)
$(BUILD_DIR)/buildroot-config/auto.conf: $(BR2_CONFIG)
$(MAKE1) $(EXTRAMAKEARGS) HOSTCC="$(HOSTCC_NOCCACHE)" HOSTCXX="$(HOSTCXX_NOCCACHE)" silentoldconfig
.PHONY: prepare
prepare: $(BUILD_DIR)/buildroot-config/auto.conf
.PHONY: world
world: target-post-image
.PHONY: sdk
sdk: world
@$(call MESSAGE,"Rendering the SDK relocatable")
$(TOPDIR)/support/scripts/fix-rpath host
$(TOPDIR)/support/scripts/fix-rpath staging
$(INSTALL) -m 755 $(TOPDIR)/support/misc/relocate-sdk.sh $(HOST_DIR)/relocate-sdk.sh
echo $(HOST_DIR) > $(HOST_DIR)/share/buildroot/sdk-location
.PHONY: all world toolchain dirs clean distclean source outputmakefile \
legal-info legal-info-prepare legal-info-clean printvars help \
list-defconfigs target-finalize target-post-image source-check
# Compatibility symlink in case a post-build script still uses $(HOST_DIR)/usr
$(HOST_DIR)/usr: $(HOST_DIR)
@ln -snf . $@
$(HOST_DIR)/lib: $(HOST_DIR)
################################################################################
#
# staging and target directories do NOT list these as
# dependencies anywhere else
#
################################################################################
$(BUILD_DIR) $(TARGET_DIR) $(HOST_DIR) $(BINARIES_DIR) $(LEGAL_INFO_DIR) $(REDIST_SOURCES_DIR_TARGET) $(REDIST_SOURCES_DIR_HOST):
@mkdir -p $@
@case $(HOSTARCH) in \
(*64) ln -snf lib $(@D)/lib64;; \
(*) ln -snf lib $(@D)/lib32;; \
esac
# Populating the staging with the base directories is handled by the skeleton package
$(STAGING_DIR):
@@ -642,7 +563,7 @@ define GENERATE_GLIBC_LOCALES
fi ; \
echo "Generating locale $${inputfile}.$${charmap}" ; \
I18NPATH=$(STAGING_DIR)/usr/share/i18n:/usr/share/i18n \
$(HOST_DIR)/bin/localedef \
$(HOST_DIR)/usr/bin/localedef \
--prefix=$(TARGET_DIR) \
--$(call LOWERCASE,$(BR2_ENDIAN))-endian \
-i $${inputfile} -f $${charmap} \
@@ -692,19 +613,14 @@ endif
$(TARGETS_ROOTFS): target-finalize
.PHONY: target-finalize
target-finalize: $(PACKAGES)
@$(call MESSAGE,"Finalizing target directory")
# Check files that are touched by more than one package
./support/scripts/check-uniq-files -t target $(BUILD_DIR)/packages-file-list.txt
./support/scripts/check-uniq-files -t staging $(BUILD_DIR)/packages-file-list-staging.txt
./support/scripts/check-uniq-files -t host $(BUILD_DIR)/packages-file-list-host.txt
$(foreach hook,$(TARGET_FINALIZE_HOOKS),$($(hook))$(sep))
rm -rf $(TARGET_DIR)/usr/include $(TARGET_DIR)/usr/share/aclocal \
$(TARGET_DIR)/usr/lib/pkgconfig $(TARGET_DIR)/usr/share/pkgconfig \
$(TARGET_DIR)/usr/lib/cmake $(TARGET_DIR)/usr/share/cmake
find $(TARGET_DIR)/usr/{lib,share}/ -name '*.cmake' -print0 | xargs -0 rm -f
find $(TARGET_DIR)/lib/ $(TARGET_DIR)/usr/lib/ $(TARGET_DIR)/usr/libexec/ \
find $(TARGET_DIR)/lib $(TARGET_DIR)/usr/lib $(TARGET_DIR)/usr/libexec \
\( -name '*.a' -o -name '*.la' \) -print0 | xargs -0 rm -f
ifneq ($(BR2_PACKAGE_GDB),y)
rm -rf $(TARGET_DIR)/usr/share/gdb
@@ -719,20 +635,23 @@ endif
rm -rf $(TARGET_DIR)/usr/info $(TARGET_DIR)/usr/share/info
rm -rf $(TARGET_DIR)/usr/doc $(TARGET_DIR)/usr/share/doc
rm -rf $(TARGET_DIR)/usr/share/gtk-doc
rmdir $(TARGET_DIR)/usr/share 2>/dev/null || true
-rmdir $(TARGET_DIR)/usr/share 2>/dev/null
$(STRIP_FIND_CMD) | xargs -0 $(STRIPCMD) 2>/dev/null || true
if test -d $(TARGET_DIR)/lib/modules; then \
find $(TARGET_DIR)/lib/modules -type f -name '*.ko' -print0 | \
xargs -0 -r $(KSTRIPCMD); fi
# See http://sourceware.org/gdb/wiki/FAQ, "GDB does not see any threads
# besides the one in which crash occurred; or SIGTRAP kills my program when
# I set a breakpoint"
ifeq ($(BR2_TOOLCHAIN_HAS_THREADS),y)
find $(TARGET_DIR)/lib/ -type f -name 'libpthread*.so*' | \
find $(TARGET_DIR)/lib -type f -name 'libpthread*.so*' | \
xargs -r $(STRIPCMD) $(STRIP_STRIP_DEBUG)
endif
# Valgrind needs ld.so with enough information, so only strip
# debugging symbols.
find $(TARGET_DIR)/lib/ -type f -name 'ld-*.so*' | \
find $(TARGET_DIR)/lib -type f -name 'ld-*.so*' | \
xargs -r $(STRIPCMD) $(STRIP_STRIP_DEBUG)
test -f $(TARGET_DIR)/etc/ld.so.conf && \
{ echo "ERROR: we shouldn't have a /etc/ld.so.conf file"; exit 1; } || true
@@ -745,11 +664,7 @@ endif
echo "ID=buildroot"; \
echo "VERSION_ID=$(BR2_VERSION)"; \
echo "PRETTY_NAME=\"Buildroot $(BR2_VERSION)\"" \
) > $(TARGET_DIR)/usr/lib/os-release
ln -sf ../usr/lib/os-release $(TARGET_DIR)/etc
@$(call MESSAGE,"Sanitizing RPATH in target tree")
$(TOPDIR)/support/scripts/fix-rpath target
) > $(TARGET_DIR)/etc/os-release
@$(foreach d, $(call qstrip,$(BR2_ROOTFS_OVERLAY)), \
$(call MESSAGE,"Copying overlay $(d)"); \
@@ -761,35 +676,32 @@ endif
$(call MESSAGE,"Executing post-build script $(s)"); \
$(EXTRA_ENV) $(s) $(TARGET_DIR) $(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS))$(sep))
.PHONY: target-post-image
target-post-image: $(TARGETS_ROOTFS) target-finalize
@$(foreach s, $(call qstrip,$(BR2_ROOTFS_POST_IMAGE_SCRIPT)), \
$(call MESSAGE,"Executing post-image script $(s)"); \
$(EXTRA_ENV) $(s) $(BINARIES_DIR) $(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS))$(sep))
.PHONY: source
source: $(foreach p,$(PACKAGES),$(p)-all-source)
.PHONY: _external-deps external-deps
_external-deps: $(foreach p,$(PACKAGES),$(p)-all-external-deps)
external-deps:
@$(MAKE1) -Bs $(EXTRAMAKEARGS) _external-deps | sort -u
.PHONY: legal-info-clean
# check if download URLs are outdated
source-check: $(foreach p,$(PACKAGES),$(p)-all-source-check)
legal-info-clean:
@rm -fr $(LEGAL_INFO_DIR)
.PHONY: legal-info-prepare
legal-info-prepare: $(LEGAL_INFO_DIR)
@$(call MESSAGE,"Buildroot $(BR2_VERSION_FULL) Collecting legal info")
@$(call legal-license-file,buildroot,buildroot,support/legal-info,COPYING,COPYING,HOST)
@$(call MESSAGE,"Collecting legal info")
@$(call legal-license-file,buildroot,COPYING,COPYING,HOST)
@$(call legal-manifest,PACKAGE,VERSION,LICENSE,LICENSE FILES,SOURCE ARCHIVE,SOURCE SITE,TARGET)
@$(call legal-manifest,PACKAGE,VERSION,LICENSE,LICENSE FILES,SOURCE ARCHIVE,SOURCE SITE,HOST)
@$(call legal-manifest,buildroot,$(BR2_VERSION_FULL),GPL-2.0+,COPYING,not saved,not saved,HOST)
@$(call legal-manifest,buildroot,$(BR2_VERSION_FULL),GPLv2+,COPYING,not saved,not saved,HOST)
@$(call legal-warning,the Buildroot source code has not been saved)
@cp $(BR2_CONFIG) $(LEGAL_INFO_DIR)/buildroot.config
.PHONY: legal-info
legal-info: dirs legal-info-clean legal-info-prepare $(foreach p,$(PACKAGES),$(p)-all-legal-info) \
$(REDIST_SOURCES_DIR_TARGET) $(REDIST_SOURCES_DIR_HOST)
@cat support/legal-info/README.header >>$(LEGAL_REPORT)
@@ -804,14 +716,9 @@ legal-info: dirs legal-info-clean legal-info-prepare $(foreach p,$(PACKAGES),$(p
mv .legal-info.sha256 legal-info.sha256)
@echo "Legal info produced in $(LEGAL_INFO_DIR)"
.PHONY: show-targets
show-targets:
@echo $(sort $(PACKAGES)) $(sort $(TARGETS_ROOTFS))
@echo $(PACKAGES) $(TARGETS_ROOTFS)
.PHONY: show-build-order
show-build-order: $(patsubst %,%-show-build-order,$(PACKAGES))
.PHONY: graph-build
graph-build: $(O)/build/build-time.log
@install -d $(GRAPHS_DIR)
$(foreach o,name build duration,./support/scripts/graph-build-time \
@@ -823,22 +730,19 @@ graph-build: $(O)/build/build-time.log
--output=$(GRAPHS_DIR)/build.pie-$(t).$(BR_GRAPH_OUT) \
$(if $(BR2_GRAPH_ALT),--alternate-colors)$(sep))
.PHONY: graph-depends-requirements
graph-depends-requirements:
@dot -? >/dev/null 2>&1 || \
{ echo "ERROR: The 'dot' program from Graphviz is needed for graph-depends" >&2; exit 1; }
.PHONY: graph-depends
graph-depends: graph-depends-requirements
@$(INSTALL) -d $(GRAPHS_DIR)
@cd "$(CONFIG_DIR)"; \
$(TOPDIR)/support/scripts/graph-depends $(BR2_GRAPH_DEPS_OPTS) \
--direct -o $(GRAPHS_DIR)/$(@).dot
-o $(GRAPHS_DIR)/$(@).dot
dot $(BR2_GRAPH_DOT_OPTS) -T$(BR_GRAPH_OUT) \
-o $(GRAPHS_DIR)/$(@).$(BR_GRAPH_OUT) \
$(GRAPHS_DIR)/$(@).dot
.PHONY: graph-size
graph-size:
$(Q)mkdir -p $(GRAPHS_DIR)
$(Q)$(TOPDIR)/support/scripts/size-stats --builddir $(BASE_DIR) \
@@ -846,21 +750,13 @@ graph-size:
--file-size-csv $(GRAPHS_DIR)/file-size-stats.csv \
--package-size-csv $(GRAPHS_DIR)/package-size-stats.csv
.PHONY: check-dependencies
check-dependencies:
@cd "$(CONFIG_DIR)"; \
$(TOPDIR)/support/scripts/graph-depends -C
else # ifeq ($(BR2_HAVE_DOT_CONFIG),y)
# Some subdirectories are also package names. To avoid that "make linux"
# on an unconfigured tree produces "Nothing to be done", add an explicit
# rule for it.
# Also for 'all' we error out and ask the user to configure first.
.PHONY: linux toolchain
linux toolchain all: outputmakefile
$(error Please configure Buildroot first (e.g. "make menuconfig"))
@exit 1
all: menuconfig
endif # ifeq ($(BR2_HAVE_DOT_CONFIG),y)
@@ -870,9 +766,6 @@ endif # ifeq ($(BR2_HAVE_DOT_CONFIG),y)
HOSTCFLAGS = $(CFLAGS_FOR_BUILD)
export HOSTCFLAGS
.PHONY: prepare-kconfig
prepare-kconfig: outputmakefile $(BUILD_DIR)/.br2-external.in
$(BUILD_DIR)/buildroot-config/%onf:
mkdir -p $(@D)/lxdialog
PKG_CONFIG_PATH="$(HOST_PKG_CONFIG_PATH)" $(MAKE) CC="$(HOSTCC_NOCCACHE)" HOSTCC="$(HOSTCC_NOCCACHE)" \
@@ -888,23 +781,23 @@ COMMON_CONFIG_ENV = \
KCONFIG_AUTOHEADER=$(BUILD_DIR)/buildroot-config/autoconf.h \
KCONFIG_TRISTATE=$(BUILD_DIR)/buildroot-config/tristate.config \
BR2_CONFIG=$(BR2_CONFIG) \
BR2_EXTERNAL=$(BR2_EXTERNAL) \
HOST_GCC_VERSION="$(HOSTCC_VERSION)" \
BUILD_DIR=$(BUILD_DIR) \
SKIP_LEGACY=
xconfig: $(BUILD_DIR)/buildroot-config/qconf prepare-kconfig
xconfig: $(BUILD_DIR)/buildroot-config/qconf outputmakefile
@$(COMMON_CONFIG_ENV) $< $(CONFIG_CONFIG_IN)
gconfig: $(BUILD_DIR)/buildroot-config/gconf prepare-kconfig
gconfig: $(BUILD_DIR)/buildroot-config/gconf outputmakefile
@$(COMMON_CONFIG_ENV) srctree=$(TOPDIR) $< $(CONFIG_CONFIG_IN)
menuconfig: $(BUILD_DIR)/buildroot-config/mconf prepare-kconfig
menuconfig: $(BUILD_DIR)/buildroot-config/mconf outputmakefile
@$(COMMON_CONFIG_ENV) $< $(CONFIG_CONFIG_IN)
nconfig: $(BUILD_DIR)/buildroot-config/nconf prepare-kconfig
nconfig: $(BUILD_DIR)/buildroot-config/nconf outputmakefile
@$(COMMON_CONFIG_ENV) $< $(CONFIG_CONFIG_IN)
config: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
config: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@$(COMMON_CONFIG_ENV) $< $(CONFIG_CONFIG_IN)
# For the config targets that automatically select options, we pass
@@ -912,33 +805,64 @@ config: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
# no values are set for the legacy options so a subsequent oldconfig
# will query them. Therefore, run an additional olddefconfig.
randconfig allyesconfig alldefconfig allnoconfig: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
@$(COMMON_CONFIG_ENV) SKIP_LEGACY=y $< --$@ $(CONFIG_CONFIG_IN)
oldconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@$(COMMON_CONFIG_ENV) $< --oldconfig $(CONFIG_CONFIG_IN)
randconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@$(COMMON_CONFIG_ENV) SKIP_LEGACY=y $< --randconfig $(CONFIG_CONFIG_IN)
@$(COMMON_CONFIG_ENV) $< --olddefconfig $(CONFIG_CONFIG_IN) >/dev/null
randpackageconfig allyespackageconfig allnopackageconfig: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
allyesconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@$(COMMON_CONFIG_ENV) SKIP_LEGACY=y $< --allyesconfig $(CONFIG_CONFIG_IN)
@$(COMMON_CONFIG_ENV) $< --olddefconfig $(CONFIG_CONFIG_IN) >/dev/null
allnoconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@$(COMMON_CONFIG_ENV) SKIP_LEGACY=y $< --allnoconfig $(CONFIG_CONFIG_IN)
@$(COMMON_CONFIG_ENV) $< --olddefconfig $(CONFIG_CONFIG_IN) >/dev/null
randpackageconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@grep -v BR2_PACKAGE_ $(BR2_CONFIG) > $(CONFIG_DIR)/.config.nopkg
@$(COMMON_CONFIG_ENV) SKIP_LEGACY=y \
KCONFIG_ALLCONFIG=$(CONFIG_DIR)/.config.nopkg \
$< --$(subst package,,$@) $(CONFIG_CONFIG_IN)
$< --randconfig $(CONFIG_CONFIG_IN)
@rm -f $(CONFIG_DIR)/.config.nopkg
@$(COMMON_CONFIG_ENV) $< --olddefconfig $(CONFIG_CONFIG_IN) >/dev/null
oldconfig silentoldconfig olddefconfig: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
@$(COMMON_CONFIG_ENV) $< --$@ $(CONFIG_CONFIG_IN)
allyespackageconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@grep -v BR2_PACKAGE_ $(BR2_CONFIG) > $(CONFIG_DIR)/.config.nopkg
@$(COMMON_CONFIG_ENV) SKIP_LEGACY=y \
KCONFIG_ALLCONFIG=$(CONFIG_DIR)/.config.nopkg \
$< --allyesconfig $(CONFIG_CONFIG_IN)
@rm -f $(CONFIG_DIR)/.config.nopkg
@$(COMMON_CONFIG_ENV) $< --olddefconfig $(CONFIG_CONFIG_IN) >/dev/null
defconfig: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
allnopackageconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@grep -v BR2_PACKAGE_ $(BR2_CONFIG) > $(CONFIG_DIR)/.config.nopkg
@$(COMMON_CONFIG_ENV) SKIP_LEGACY=y \
KCONFIG_ALLCONFIG=$(CONFIG_DIR)/.config.nopkg \
$< --allnoconfig $(CONFIG_CONFIG_IN)
@rm -f $(CONFIG_DIR)/.config.nopkg
@$(COMMON_CONFIG_ENV) $< --olddefconfig $(CONFIG_CONFIG_IN) >/dev/null
silentoldconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
$(COMMON_CONFIG_ENV) $< --silentoldconfig $(CONFIG_CONFIG_IN)
olddefconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
$(COMMON_CONFIG_ENV) $< --olddefconfig $(CONFIG_CONFIG_IN)
defconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@$(COMMON_CONFIG_ENV) $< --defconfig$(if $(DEFCONFIG),=$(DEFCONFIG)) $(CONFIG_CONFIG_IN)
define percent_defconfig
# Override the BR2_DEFCONFIG from COMMON_CONFIG_ENV with the new defconfig
%_defconfig: $(BUILD_DIR)/buildroot-config/conf $(1)/configs/%_defconfig prepare-kconfig
@$$(COMMON_CONFIG_ENV) BR2_DEFCONFIG=$(1)/configs/$$@ \
$$< --defconfig=$(1)/configs/$$@ $$(CONFIG_CONFIG_IN)
endef
$(eval $(foreach d,$(call reverse,$(TOPDIR) $(BR2_EXTERNAL_DIRS)),$(call percent_defconfig,$(d))$(sep)))
%_defconfig: $(BUILD_DIR)/buildroot-config/conf $(TOPDIR)/configs/%_defconfig outputmakefile
@$(COMMON_CONFIG_ENV) BR2_DEFCONFIG=$(TOPDIR)/configs/$@ \
$< --defconfig=$(TOPDIR)/configs/$@ $(CONFIG_CONFIG_IN)
savedefconfig: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
%_defconfig: $(BUILD_DIR)/buildroot-config/conf $(BR2_EXTERNAL)/configs/%_defconfig outputmakefile
@$(COMMON_CONFIG_ENV) BR2_DEFCONFIG=$(BR2_EXTERNAL)/configs/$@ \
$< --defconfig=$(BR2_EXTERNAL)/configs/$@ $(CONFIG_CONFIG_IN)
savedefconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
@$(COMMON_CONFIG_ENV) $< \
--savedefconfig=$(if $(DEFCONFIG),$(DEFCONFIG),$(CONFIG_DIR)/defconfig) \
$(CONFIG_CONFIG_IN)
@@ -955,49 +879,37 @@ savedefconfig: $(BUILD_DIR)/buildroot-config/conf prepare-kconfig
# outputmakefile generates a Makefile in the output directory, if using a
# separate output directory. This allows convenient use of make in the
# output directory.
.PHONY: outputmakefile
outputmakefile:
ifeq ($(NEED_WRAPPER),y)
$(Q)$(TOPDIR)/support/scripts/mkmakefile $(TOPDIR) $(O)
endif
# Even though the target is a real file, we mark it as PHONY as we
# want it to be re-generated each time make is invoked, in case the
# value of BR2_EXTERNAL is changed.
.PHONY: $(BUILD_DIR)/.br2-external.in
$(BUILD_DIR)/.br2-external.in: $(BUILD_DIR)
$(Q)support/scripts/br2-external -k -o "$(@)" $(BR2_EXTERNAL)
# printvars prints all the variables currently defined in our
# Makefiles. Alternatively, if a non-empty VARS variable is passed,
# only the variables matching the make pattern passed in VARS are
# displayed.
.PHONY: printvars
printvars:
@:$(foreach V, \
@$(foreach V, \
$(sort $(if $(VARS),$(filter $(VARS),$(.VARIABLES)),$(.VARIABLES))), \
$(if $(filter-out environment% default automatic, \
$(origin $V)), \
$(if $(QUOTED_VARS),\
$(info $V='$(subst ','\'',$(if $(RAW_VARS),$(value $V),$($V)))'), \
$(info $V=$(if $(RAW_VARS),$(value $V),$($V))))))
# ' Syntax colouring...
$(info $V=$($V) ($(value $V)))))
.PHONY: clean
clean:
rm -rf $(TARGET_DIR) $(BINARIES_DIR) $(HOST_DIR) \
$(BUILD_DIR) $(BASE_DIR)/staging \
$(LEGAL_INFO_DIR) $(GRAPHS_DIR)
.PHONY: distclean
distclean: clean
ifeq ($(O),$(CURDIR)/output)
ifeq ($(DL_DIR),$(TOPDIR)/dl)
rm -rf $(DL_DIR)
endif
ifeq ($(O),output)
rm -rf $(O)
endif
rm -rf $(TOPDIR)/dl $(BR2_CONFIG) $(CONFIG_DIR)/.config.old $(CONFIG_DIR)/..config.tmp \
rm -rf $(BR2_CONFIG) $(CONFIG_DIR)/.config.old $(CONFIG_DIR)/..config.tmp \
$(CONFIG_DIR)/.auto.deps $(BR2_EXTERNAL_FILE)
.PHONY: help
help:
@echo 'Cleaning:'
@echo ' clean - delete all files created by build'
@@ -1006,7 +918,6 @@ help:
@echo 'Build:'
@echo ' all - make world'
@echo ' toolchain - build toolchain'
@echo ' sdk - build relocatable SDK'
@echo
@echo 'Configuration:'
@echo ' menuconfig - interactive curses-based configurator'
@@ -1022,7 +933,6 @@ help:
@echo ' savedefconfig - Save current config to BR2_DEFCONFIG (minimal config)'
@echo ' allyesconfig - New config where all options are accepted with yes'
@echo ' allnoconfig - New config where all options are answered with no'
@echo ' alldefconfig - New config where all options are set to default'
@echo ' randpackageconfig - New config with random answer to package options'
@echo ' allyespackageconfig - New config where pkg options are accepted with yes'
@echo ' allnopackageconfig - New config where package options are answered with no'
@@ -1035,10 +945,7 @@ help:
@echo ' <pkg>-depends - Build <pkg>'\''s dependencies'
@echo ' <pkg>-configure - Build <pkg> up to the configure step'
@echo ' <pkg>-build - Build <pkg> up to the build step'
@echo ' <pkg>-show-depends - List packages on which <pkg> depends'
@echo ' <pkg>-show-rdepends - List packages which have <pkg> as a dependency'
@echo ' <pkg>-graph-depends - Generate a graph of <pkg>'\''s dependencies'
@echo ' <pkg>-graph-rdepends - Generate a graph of <pkg>'\''s reverse dependencies'
@echo ' <pkg>-dirclean - Remove <pkg> build directory'
@echo ' <pkg>-reconfigure - Restart the build from the configure step'
@echo ' <pkg>-rebuild - Restart the build from the build step'
@@ -1061,9 +968,9 @@ help:
@echo
@echo 'Miscellaneous:'
@echo ' source - download all sources needed for offline-build'
@echo ' source-check - check selected packages for valid download URLs'
@echo ' external-deps - list external packages used'
@echo ' legal-info - generate info about license compliance'
@echo ' printvars - dump all the internal variables'
@echo
@echo ' make V=0|1 - 0 => quiet build (default), 1 => verbose build'
@echo ' make O=dir - Locate all output files in "dir", including .config'
@@ -1072,35 +979,17 @@ help:
@echo 'it on-line at http://buildroot.org/docs.html'
@echo
# List the defconfig files
# $(1): base directory
# $(2): br2-external name, empty for bundled
define list-defconfigs
@first=true; \
for defconfig in $(1)/configs/*_defconfig; do \
[ -f "$${defconfig}" ] || continue; \
if $${first}; then \
if [ "$(2)" ]; then \
printf 'External configs in "$(call qstrip,$(2))":\n'; \
else \
printf "Built-in configs:\n"; \
fi; \
first=false; \
fi; \
defconfig="$${defconfig##*/}"; \
printf " %-35s - Build for %s\n" "$${defconfig}" "$${defconfig%_defconfig}"; \
done; \
$${first} || printf "\n"
endef
# We iterate over BR2_EXTERNAL_NAMES rather than BR2_EXTERNAL_DIRS,
# because we want to display the name of the br2-external tree.
.PHONY: list-defconfigs
list-defconfigs:
$(call list-defconfigs,$(TOPDIR))
$(foreach name,$(BR2_EXTERNAL_NAMES),\
$(call list-defconfigs,$(BR2_EXTERNAL_$(name)_PATH),\
$(BR2_EXTERNAL_$(name)_DESC))$(sep))
@echo 'Built-in configs:'
@$(foreach b, $(sort $(notdir $(wildcard $(TOPDIR)/configs/*_defconfig))), \
printf " %-35s - Build for %s\\n" $(b) $(b:_defconfig=);)
ifneq ($(wildcard $(BR2_EXTERNAL)/configs/*_defconfig),)
@echo
@echo 'User-provided configs:'
@$(foreach b, $(sort $(notdir $(wildcard $(BR2_EXTERNAL)/configs/*_defconfig))), \
printf " %-35s - Build for %s\\n" $(b) $(b:_defconfig=);)
endif
@echo
release: OUT = buildroot-$(BR2_VERSION)
@@ -1118,15 +1007,9 @@ release:
print-version:
@echo $(BR2_VERSION_FULL)
.PHONY: .gitlab-ci.yml
.gitlab-ci.yml: .gitlab-ci.yml.in
cp $< $@
(cd configs; LC_ALL=C ls -1 *_defconfig) | sed 's/$$/: *defconfig/' >> $@
./support/testing/run-tests -l 2>&1 | sed -r -e '/^test_run \((.*)\).*/!d; s//\1: *runtime_test/' | LC_ALL=C sort >> $@
include docs/manual/manual.mk
-include $(foreach dir,$(BR2_EXTERNAL_DIRS),$(sort $(wildcard $(dir)/docs/*/*.mk)))
-include $(BR2_EXTERNAL)/docs/*/*.mk
.PHONY: $(noconfig_targets)
endif #umask / $(CURDIR) / $(O)
endif #umask

View File

@@ -4,6 +4,9 @@
# This file contains placeholders to detect backward-compatibility problems.
# When a buildroot "API" feature is being deprecated, a rule should be added
# here that issues an error when the old feature is used.
#
# This file is not included if BR2_DEPRECATED is selected, so it is possible
# to bypass the errors (although that's usually a bad idea).
ifeq ($(BR2_LEGACY),y)
$(error "You have legacy configuration in your .config! Please check your configuration.")

View File

@@ -79,22 +79,12 @@ config BR2_aarch64_be
config BR2_bfin
bool "Blackfin"
select BR2_ARCH_HAS_FDPIC_SUPPORT
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
help
The Blackfin is a family of 16 or 32-bit microprocessors developed,
manufactured and marketed by Analog Devices.
http://www.analog.com/
http://en.wikipedia.org/wiki/Blackfin
config BR2_csky
bool "csky"
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
select BR2_ARCH_HAS_MMU_MANDATORY
help
csky is processor IP from china.
http://www.c-sky.com/
http://www.github.com/c-sky
config BR2_i386
bool "i386"
select BR2_ARCH_HAS_MMU_MANDATORY
@@ -169,13 +159,6 @@ config BR2_nios2
http://www.altera.com/
http://en.wikipedia.org/wiki/Nios_II
config BR2_or1k
bool "OpenRISC"
select BR2_ARCH_HAS_MMU_MANDATORY
help
OpenRISC is a free and open processor for embedded system.
http://openrisc.io
config BR2_powerpc
bool "PowerPC"
select BR2_ARCH_HAS_MMU_MANDATORY
@@ -214,6 +197,16 @@ config BR2_sh
http://www.hitachi.com/
http://en.wikipedia.org/wiki/SuperH
config BR2_sh64
bool "SuperH64"
depends on BR2_DEPRECATED_SINCE_2015_05
select BR2_ARCH_HAS_MMU_MANDATORY
help
SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
http://www.hitachi.com/
http://en.wikipedia.org/wiki/SuperH
config BR2_sparc
bool "SPARC"
select BR2_ARCH_HAS_MMU_MANDATORY
@@ -252,37 +245,6 @@ config BR2_xtensa
endchoice
# For some architectures or specific cores, our internal toolchain
# backend is not suitable (like, missing support in upstream gcc, or
# no ChipCo fork exists...)
config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
bool
config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
bool
default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
# The following symbols are selected by the individual
# Config.in.$ARCH files
config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
bool
config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
# The following string values are defined by the individual
# Config.in.$ARCH files
config BR2_ARCH
@@ -297,12 +259,6 @@ config BR2_GCC_TARGET_ARCH
config BR2_GCC_TARGET_ABI
string
config BR2_GCC_TARGET_NAN
string
config BR2_GCC_TARGET_FP32_MODE
string
config BR2_GCC_TARGET_CPU
string
@@ -331,12 +287,6 @@ config BR2_GCC_TARGET_MODE
config BR2_BINFMT_SUPPORTS_SHARED
bool
# Must match the name of the architecture from readelf point of view,
# i.e the "Machine:" field of readelf output. See get_machine_name()
# in binutils/readelf.c for the list of possible values.
config BR2_READELF_ARCH_NAME
string
# Set up target binary format
choice
prompt "Target Binary Format"
@@ -414,18 +364,18 @@ if BR2_arcle || BR2_arceb
source "arch/Config.in.arc"
endif
if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
if BR2_arm || BR2_armeb
source "arch/Config.in.arm"
endif
if BR2_aarch64 || BR2_aarch64_be
source "arch/Config.in.aarch64"
endif
if BR2_bfin
source "arch/Config.in.bfin"
endif
if BR2_csky
source "arch/Config.in.csky"
endif
if BR2_m68k
source "arch/Config.in.m68k"
endif
@@ -442,15 +392,11 @@ if BR2_nios2
source "arch/Config.in.nios2"
endif
if BR2_or1k
source "arch/Config.in.or1k"
endif
if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
source "arch/Config.in.powerpc"
endif
if BR2_sh
if BR2_sh || BR2_sh64
source "arch/Config.in.sh"
endif

7
arch/Config.in.aarch64 Normal file
View File

@@ -0,0 +1,7 @@
config BR2_ARCH
default "aarch64" if BR2_aarch64
default "aarch64_be" if BR2_aarch64_be
config BR2_ENDIAN
default "LITTLE" if BR2_aarch64
default "BIG" if BR2_aarch64_be

View File

@@ -38,10 +38,6 @@ config BR2_GCC_TARGET_CPU
default "arc700" if BR2_arc770d
default "archs" if BR2_archs38
config BR2_READELF_ARCH_NAME
default "ARCompact" if BR2_arc750d || BR2_arc770d
default "ARCv2" if BR2_archs38
choice
prompt "MMU Page Size"
default BR2_ARC_PAGE_SIZE_8K

View File

@@ -31,10 +31,6 @@ config BR2_ARM_CPU_HAS_VFPV4
bool
select BR2_ARM_CPU_HAS_VFPV3
config BR2_ARM_CPU_HAS_FP_ARMV8
bool
select BR2_ARM_CPU_HAS_VFPV4
config BR2_ARM_CPU_HAS_ARM
bool
@@ -59,18 +55,13 @@ config BR2_ARM_CPU_ARMV7A
config BR2_ARM_CPU_ARMV7M
bool
config BR2_ARM_CPU_ARMV8A
bool
choice
prompt "Target Architecture Variant"
default BR2_cortex_a53 if BR2_ARCH_IS_64
depends on BR2_arm || BR2_armeb
default BR2_arm926t
help
Specific CPU variant to use
if !BR2_ARCH_IS_64
comment "armv4 cores"
config BR2_arm920t
bool "arm920t"
select BR2_ARM_CPU_HAS_ARM
@@ -83,18 +74,6 @@ config BR2_arm922t
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
comment "armv5 cores"
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_HAS_ARM
@@ -102,19 +81,6 @@ config BR2_arm926t
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_iwmmxt
bool "iwmmxt"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
comment "armv6 cores"
config BR2_arm1136j_s
bool "arm1136j-s"
select BR2_ARM_CPU_HAS_ARM
@@ -148,8 +114,6 @@ config BR2_arm11mpcore
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
select BR2_ARCH_HAS_MMU_OPTIONAL
comment "armv7a cores"
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_HAS_ARM
@@ -198,15 +162,6 @@ config BR2_cortex_a15
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a15_a7
bool "cortex-A15/A7 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_cortex_a17
bool "cortex-A17"
select BR2_ARM_CPU_HAS_ARM
@@ -215,24 +170,6 @@ config BR2_cortex_a17
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_cortex_a17_a7
bool "cortex-A17/A7 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
comment "armv7m cores"
config BR2_cortex_m3
bool "cortex-M3"
select BR2_ARM_CPU_HAS_THUMB2
@@ -241,197 +178,33 @@ config BR2_cortex_m4
bool "cortex-M4"
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7M
endif # !BR2_ARCH_IS_64
comment "armv8 cores"
config BR2_cortex_a32
bool "cortex-A32"
depends on !BR2_ARCH_IS_64
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a35
bool "cortex-A35"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a53
bool "cortex-A53"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a57
bool "cortex-A57"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a57_a53
bool "cortex-A57/A53 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
config BR2_iwmmxt
bool "iwmmxt"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a72
bool "cortex-A72"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_cortex_a72_a53
bool "cortex-A72/A53 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a73
bool "cortex-A73"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_cortex_a73_a35
bool "cortex-A73/A35 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_cortex_a73_a53
bool "cortex-A73/A53 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_exynos_m1
bool "exynos-m1"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_falkor
bool "falkor"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_qdf24xx
bool "qdf24xx"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
if BR2_ARCH_IS_64
config BR2_thunderx
bool "thunderx"
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_thunderxt81
bool "thunderxt81"
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderxt83
bool "thunderxt83"
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderxt88
bool "thunderxt88"
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderxt88p1
bool "thunderxt88p1"
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
endif # BR2_ARCH_IS_64
config BR2_xgene1
bool "xgene1"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
if BR2_ARCH_IS_64
comment "armv8.1a cores"
config BR2_thunderx2t99
bool "thunderx2t99"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderx2t99p1
bool "thunderx2t99p1"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_vulcan
bool "vulcan"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
endif # BR2_ARCH_IS_64
endchoice
config BR2_ARM_ENABLE_NEON
@@ -511,7 +284,7 @@ endchoice
choice
prompt "Floating point strategy"
default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
depends on BR2_ARM_EABI || BR2_ARM_EABIHF
default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
@@ -622,25 +395,10 @@ config BR2_ARM_FPU_NEON_VFPV4
example on Cortex-A5 and Cortex-A7, support for VFPv4 and
NEON is optional.
config BR2_ARM_FPU_FP_ARMV8
bool "FP-ARMv8"
depends on BR2_ARM_CPU_HAS_FP_ARMV8
help
This option allows to use the ARMv8 floating point unit.
config BR2_ARM_FPU_NEON_FP_ARMV8
bool "NEON/FP-ARMv8"
depends on BR2_ARM_CPU_HAS_FP_ARMV8
depends on BR2_ARM_CPU_HAS_NEON
help
This option allows to use both the ARMv8 floating point unit
and the NEON SIMD unit for floating point operations.
endchoice
choice
prompt "ARM instruction set"
depends on BR2_arm || BR2_armeb
config BR2_ARM_INSTRUCTIONS_ARM
bool "ARM"
@@ -676,86 +434,49 @@ config BR2_ARM_INSTRUCTIONS_THUMB2
endchoice
config BR2_ARCH
default "arm" if BR2_arm
default "armeb" if BR2_armeb
default "aarch64" if BR2_aarch64
default "aarch64_be" if BR2_aarch64_be
default "arm" if BR2_arm
default "armeb" if BR2_armeb
config BR2_ENDIAN
default "LITTLE" if (BR2_arm || BR2_aarch64)
default "BIG" if (BR2_armeb || BR2_aarch64_be)
default "LITTLE" if BR2_arm
default "BIG" if BR2_armeb
config BR2_GCC_TARGET_CPU
# armv4
default "arm920t" if BR2_arm920t
default "arm922t" if BR2_arm922t
default "fa526" if BR2_fa526
default "strongarm" if BR2_strongarm
# armv5
default "arm926ej-s" if BR2_arm926t
default "iwmmxt" if BR2_iwmmxt
default "xscale" if BR2_xscale
# armv6
default "arm1136j-s" if BR2_arm1136j_s
default "arm1136jf-s" if BR2_arm1136jf_s
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
default "mpcore" if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
default "mpcorenovfp" if BR2_arm11mpcore
# armv7a
default "cortex-a5" if BR2_cortex_a5
default "cortex-a7" if BR2_cortex_a7
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
default "cortex-a12" if BR2_cortex_a12
default "cortex-a15" if BR2_cortex_a15
default "cortex-a15.cortex-a7" if BR2_cortex_a15_a7
default "cortex-a17" if BR2_cortex_a17
default "cortex-a17.cortex-a7" if BR2_cortex_a17_a7
default "marvell-pj4" if BR2_pj4
# armv7m
default "cortex-m3" if BR2_cortex_m3
default "cortex-m4" if BR2_cortex_m4
# armv8a
default "cortex-a32" if BR2_cortex_a32
default "cortex-a35" if BR2_cortex_a35
default "cortex-a53" if BR2_cortex_a53
default "cortex-a57" if BR2_cortex_a57
default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53
default "cortex-a72" if BR2_cortex_a72
default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53
default "cortex-a73" if BR2_cortex_a73
default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35
default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53
default "exynos-m1" if BR2_exynos_m1
default "falkor" if BR2_falkor
default "qdf24xx" if BR2_qdf24xx
default "thunderx" if BR2_thunderx
default "thunderxt81" if BR2_thunderxt81
default "thunderxt83" if BR2_thunderxt83
default "thunderxt88" if BR2_thunderxt88
default "thunderxt88p1" if BR2_thunderxt88p1
default "xgene1" if BR2_xgene1
# armv8.1a
default "thunderx2t99" if BR2_thunderx2t99
default "thunderx2t99p1" if BR2_thunderx2t99p1
default "vulcan" if BR2_vulcan
default "fa526" if BR2_fa526
default "marvell-pj4" if BR2_pj4
default "strongarm" if BR2_strongarm
default "xscale" if BR2_xscale
default "iwmmxt" if BR2_iwmmxt
config BR2_GCC_TARGET_ABI
default "aapcs-linux" if BR2_arm || BR2_armeb
default "lp64" if BR2_aarch64 || BR2_aarch64_be
default "aapcs-linux"
config BR2_GCC_TARGET_FPU
depends on BR2_arm || BR2_armeb
default "vfp" if BR2_ARM_FPU_VFPV2
default "vfpv3" if BR2_ARM_FPU_VFPV3
default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
default "vfpv4" if BR2_ARM_FPU_VFPV4
default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
default "neon" if BR2_ARM_FPU_NEON
default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
default "fp-armv8" if BR2_ARM_FPU_FP_ARMV8
default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
default "vfpv4" if BR2_ARM_FPU_VFPV4
default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
default "neon" if BR2_ARM_FPU_NEON
default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
config BR2_GCC_TARGET_FLOAT_ABI
default "soft" if BR2_ARM_SOFT_FLOAT
@@ -765,7 +486,3 @@ config BR2_GCC_TARGET_FLOAT_ABI
config BR2_GCC_TARGET_MODE
default "arm" if BR2_ARM_INSTRUCTIONS_ARM
default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
config BR2_READELF_ARCH_NAME
default "ARM" if BR2_arm || BR2_armeb
default "AArch64" if BR2_aarch64 || BR2_aarch64_be

View File

@@ -4,6 +4,14 @@ choice
default BR2_bf532
help
Specify target CPU
config BR2_bf606
bool "bf606"
config BR2_bf607
bool "bf607"
config BR2_bf608
bool "bf608"
config BR2_bf609
bool "bf609"
config BR2_bf512
bool "bf512"
config BR2_bf514
@@ -97,6 +105,3 @@ config BR2_GCC_TARGET_CPU_REVISION
value of the -mcpu option. For example, if the selected CPU is
bf609, and then selected CPU revision is "0.0", then gcc will
receive the -mcpu=bf609-0.0 option.
config BR2_READELF_ARCH_NAME
default "Analog Devices Blackfin"

View File

@@ -1,48 +0,0 @@
choice
prompt "Target Architecture Variant"
default BR2_ck610
help
Specific CPU variant to use
config BR2_ck610
bool "ck610"
config BR2_ck807
bool "ck807"
config BR2_ck810
bool "ck810"
endchoice
config BR2_CSKY_FPU
bool "Enable FPU coprocessor"
depends on BR2_ck810 || BR2_ck807
help
You can say N here if your C-SKY CPU doesn't have a
Floating-Point Coprocessor or if you don't need FPU support
for your user-space programs.
config BR2_CSKY_DSP
bool "Enable DSP enhanced instructions"
depends on BR2_ck810 || BR2_ck807
config BR2_ARCH
default "csky"
config BR2_ENDIAN
default "LITTLE"
config BR2_GCC_TARGET_CPU
default "ck610" if (BR2_ck610 && !BR2_CSKY_FPU && !BR2_CSKY_DSP)
default "ck807" if (BR2_ck807 && !BR2_CSKY_FPU && !BR2_CSKY_DSP)
default "ck807e" if (BR2_ck807 && !BR2_CSKY_FPU && BR2_CSKY_DSP)
default "ck807f" if (BR2_ck807 && BR2_CSKY_FPU && !BR2_CSKY_DSP)
default "ck807ef" if (BR2_ck807 && BR2_CSKY_FPU && BR2_CSKY_DSP)
default "ck810" if (BR2_ck810 && !BR2_CSKY_FPU && !BR2_CSKY_DSP)
default "ck810e" if (BR2_ck810 && !BR2_CSKY_FPU && BR2_CSKY_DSP)
default "ck810f" if (BR2_ck810 && BR2_CSKY_FPU && !BR2_CSKY_DSP)
default "ck810ef" if (BR2_ck810 && BR2_CSKY_FPU && BR2_CSKY_DSP)
config BR2_READELF_ARCH_NAME
default "CSKY"

View File

@@ -35,6 +35,3 @@ endchoice
config BR2_GCC_TARGET_CPU
default "68040" if BR2_m68k_68040
default "5208" if BR2_m68k_cf5208
config BR2_READELF_ARCH_NAME
default "MC68000"

View File

@@ -6,9 +6,6 @@ config BR2_ENDIAN
default "LITTLE" if BR2_microblazeel
default "BIG" if BR2_microblazebe
config BR2_READELF_ARCH_NAME
default "Xilinx MicroBlaze"
config BR2_microblaze
bool
default y if BR2_microblazeel || BR2_microblazebe

View File

@@ -1,31 +1,3 @@
# mips default CPU ISAs
config BR2_MIPS_CPU_MIPS32
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R2
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS32R6
bool
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS64
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R2
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS64R6
bool
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
choice
prompt "Target Architecture Variant"
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
@@ -34,85 +6,27 @@ choice
help
Specific CPU variant to use
64bit cabable: 64, 64r2, 64r5, 64r6
non-64bit capable: 32, 32r2, 32r5, 32r6
64bit cabable: 64, 64r2, 64r6
non-64bit capable: 32, 32r2, 32r6
config BR2_mips_32
bool "Generic MIPS32"
bool "mips 32"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32
config BR2_mips_32r2
bool "Generic MIPS32R2"
bool "mips 32r2"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
config BR2_mips_32r5
bool "Generic MIPS32R5"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
config BR2_mips_32r6
bool "Generic MIPS32R6"
bool "mips 32r6"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R6
config BR2_mips_interaptiv
bool "interAptiv"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_m5150
bool "M5150"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_m6250
bool "M6250"
depends on !BR2_ARCH_IS_64
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
select BR2_MIPS_CPU_MIPS32R6
config BR2_mips_p5600
bool "P5600"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
select BR2_MIPS_NAN_2008
config BR2_mips_xburst
bool "XBurst"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
help
The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
bug in the FPU that can generate incorrect results in
certain cases. The problem shows up when you have several
fused madd instructions in sequence with dependant
operands. This requires the -mno-fused-madd compiler option
to be used in order to prevent emitting these instructions.
See http://www.ingenic.com/en/?xburst.html
config BR2_mips_64
bool "Generic MIPS64"
bool "mips 64"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64
config BR2_mips_64r2
bool "Generic MIPS64R2"
bool "mips 64r2"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R2
config BR2_mips_64r5
bool "Generic MIPS64R5"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R5
config BR2_mips_64r6
bool "Generic MIPS64R6"
bool "mips 64r6"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R6
config BR2_mips_i6400
bool "I6400"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R6
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_p6600
bool "P6600"
depends on BR2_ARCH_IS_64
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
select BR2_MIPS_CPU_MIPS64R6
endchoice
@@ -143,64 +57,6 @@ config BR2_MIPS_SOFT_FLOAT
floating point functions, then everything will need to be
compiled with soft floating point support (-msoft-float).
choice
prompt "FP mode"
depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
default BR2_MIPS_FP32_MODE_XX
help
MIPS32 supports different FP modes (32,xx,64). Information about FP
modes can be found here:
https://sourceware.org/binutils/docs/as/MIPS-Options.html
https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
config BR2_MIPS_FP32_MODE_32
bool "32"
depends on !BR2_MIPS_CPU_MIPS32R6
config BR2_MIPS_FP32_MODE_XX
bool "xx"
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_FP32_MODE_64
bool "64"
depends on !BR2_MIPS_CPU_MIPS32
endchoice
config BR2_GCC_TARGET_FP32_MODE
default "32" if BR2_MIPS_FP32_MODE_32
default "xx" if BR2_MIPS_FP32_MODE_XX
default "64" if BR2_MIPS_FP32_MODE_64
config BR2_MIPS_NAN_LEGACY
bool
config BR2_MIPS_NAN_2008
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
choice
prompt "Target NaN"
depends on BR2_mips_32r5 || BR2_mips_64r5
default BR2_MIPS_ENABLE_NAN_2008
help
MIPS supports two different NaN encodings, legacy and 2008.
Information about MIPS NaN encodings can be found here:
https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
config BR2_MIPS_ENABLE_NAN_LEGACY
bool "legacy"
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_ENABLE_NAN_2008
bool "2008"
depends on !BR2_MIPS_SOFT_FLOAT
select BR2_MIPS_NAN_2008
endchoice
config BR2_GCC_TARGET_NAN
default "legacy" if BR2_MIPS_NAN_LEGACY
default "2008" if BR2_MIPS_NAN_2008
config BR2_ARCH
default "mips" if BR2_mips
default "mipsel" if BR2_mipsel
@@ -209,24 +65,15 @@ config BR2_ARCH
config BR2_ENDIAN
default "LITTLE" if BR2_mipsel || BR2_mips64el
default "BIG" if BR2_mips || BR2_mips64
default "BIG" if BR2_mips || BR2_mips64
config BR2_GCC_TARGET_ARCH
default "mips32" if BR2_mips_32
default "mips32r2" if BR2_mips_32r2
default "mips32r5" if BR2_mips_32r5
default "mips32r6" if BR2_mips_32r6
default "interaptiv" if BR2_mips_interaptiv
default "m5101" if BR2_mips_m5150
default "m6201" if BR2_mips_m6250
default "p5600" if BR2_mips_p5600
default "mips32r2" if BR2_mips_xburst
default "mips64" if BR2_mips_64
default "mips64r2" if BR2_mips_64r2
default "mips64r5" if BR2_mips_64r5
default "mips64r6" if BR2_mips_64r6
default "i6400" if BR2_mips_i6400
default "p6600" if BR2_mips_p6600
config BR2_MIPS_OABI32
bool
@@ -236,6 +83,3 @@ config BR2_GCC_TARGET_ABI
default "32" if BR2_MIPS_OABI32
default "n32" if BR2_MIPS_NABI32
default "64" if BR2_MIPS_NABI64
config BR2_READELF_ARCH_NAME
default "MIPS R3000"

View File

@@ -3,6 +3,3 @@ config BR2_ARCH
config BR2_ENDIAN
default "LITTLE"
config BR2_READELF_ARCH_NAME
default "Altera Nios II"

View File

@@ -1,8 +0,0 @@
config BR2_ARCH
default "or1k"
config BR2_ENDIAN
default "BIG"
config BR2_READELF_ARCH_NAME
default "OpenRISC 1000"

View File

@@ -212,7 +212,3 @@ config BR2_GCC_TARGET_ABI
default "no-spe" if BR2_PPC_ABI_no-spe
default "ibmlongdouble" if BR2_PPC_ABI_ibmlongdouble
default "ieeelongdouble" if BR2_PPC_ABI_ieeelongdouble
config BR2_READELF_ARCH_NAME
default "PowerPC" if BR2_powerpc
default "PowerPC64" if BR2_powerpc64 || BR2_powerpc64le

View File

@@ -23,10 +23,8 @@ config BR2_ARCH
default "sh4eb" if BR2_sh4eb
default "sh4a" if BR2_sh4a
default "sh4aeb" if BR2_sh4aeb
default "sh64" if BR2_sh64
config BR2_ENDIAN
default "LITTLE" if BR2_sh4 || BR2_sh4a
default "LITTLE" if BR2_sh4 || BR2_sh4a || BR2_sh64
default "BIG" if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb
config BR2_READELF_ARCH_NAME
default "Renesas / SuperH SH"

View File

@@ -28,7 +28,3 @@ config BR2_GCC_TARGET_CPU
default "leon3" if BR2_sparc_leon3
default "v8" if BR2_sparc_v8
default "ultrasparc" if BR2_sparc_v9
config BR2_READELF_ARCH_NAME
default "Sparc" if BR2_sparc
default "Sparc v9" if BR2_sparc64

View File

@@ -129,15 +129,6 @@ config BR2_x86_atom
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
config BR2_x86_silvermont
bool "silvermont"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
config BR2_x86_k6
bool "k6"
select BR2_X86_CPU_HAS_MMX
@@ -238,7 +229,6 @@ config BR2_ARCH
default "i686" if BR2_x86_corei7_avx && BR2_i386
default "i686" if BR2_x86_corei7_avx2 && BR2_i386
default "i686" if BR2_x86_atom && BR2_i386
default "i686" if BR2_x86_silvermont && BR2_i386
default "i686" if BR2_x86_opteron && BR2_i386
default "i686" if BR2_x86_opteron_sse3 && BR2_i386
default "i686" if BR2_x86_barcelona && BR2_i386
@@ -271,7 +261,6 @@ config BR2_GCC_TARGET_ARCH
default "corei7-avx" if BR2_x86_corei7_avx
default "core-avx2" if BR2_x86_core_avx2
default "atom" if BR2_x86_atom
default "silvermont" if BR2_x86_silvermont
default "k8" if BR2_x86_opteron
default "k8-sse3" if BR2_x86_opteron_sse3
default "barcelona" if BR2_x86_barcelona
@@ -286,7 +275,3 @@ config BR2_GCC_TARGET_ARCH
default "c3" if BR2_x86_c3
default "c3-2" if BR2_x86_c32
default "geode" if BR2_x86_geode
config BR2_READELF_ARCH_NAME
default "Intel 80386" if BR2_i386
default "Advanced Micro Devices X86-64" if BR2_x86_64

View File

@@ -2,32 +2,39 @@ choice
prompt "Target Architecture Variant"
depends on BR2_xtensa
default BR2_xtensa_fsf
config BR2_XTENSA_CUSTOM
select BR2_ARCH_HAS_MMU_OPTIONAL
bool "Custom Xtensa processor configuration"
config BR2_xtensa_fsf
select BR2_ARCH_HAS_MMU_MANDATORY
bool "fsf - Default configuration"
endchoice
config BR2_XTENSA_OVERLAY_FILE
string "Overlay file for custom configuration"
config BR2_XTENSA_CUSTOM_NAME
string "Custom Xtensa processor configuration name"
depends on BR2_XTENSA_CUSTOM
default ""
help
Enter the path to the overlay tarball for a custom processor
configuration.
Name given to a custom Xtensa processor configuration.
config BR2_XTENSA_CORE_NAME
string
default BR2_XTENSA_CUSTOM_NAME if BR2_XTENSA_CUSTOM
default "" if BR2_xtensa_fsf
config BR2_XTENSA_OVERLAY_DIR
string "Overlay directory for custom configuration"
depends on BR2_XTENSA_CUSTOM
default ""
help
Provide the directory path that contains the overlay file
for a custom processor configuration. The path is relative
to the top directory of buildroot.
These overlay files are tar packages with updated configuration
files for various toolchain packages and Xtensa processor
configurations. They are provided by the processor vendor or
directly from Tensilica.
The path can be either absolute, or relative to the top directory
of buildroot.
choice
prompt "Target Architecture Endianness"
depends on BR2_XTENSA_CUSTOM
@@ -47,6 +54,3 @@ config BR2_ENDIAN
config BR2_ARCH
default "xtensa" if BR2_xtensa
config BR2_READELF_ARCH_NAME
default "Tensilica Xtensa Processor"

View File

@@ -1,36 +0,0 @@
################################################################################
# This variable can be used by packages that need to extract the overlay.
#
# ARCH_XTENSA_OVERLAY_FILE is the path to the overlay tarball; empty if not
# using any overlay
#
# Example:
# ifneq ($(ARCH_XTENSA_OVERLAY_FILE),)
# tar xf $(ARCH_XTENSA_OVERLAY_FILE) -C $(@D) --strip-components=1 gcc
# endif
################################################################################
BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
ifneq ($(filter http://% https://% ftp://% scp://%,$(BR_ARCH_XTENSA_OVERLAY_FILE)),)
ARCH_XTENSA_OVERLAY_URL = $(BR_ARCH_XTENSA_OVERLAY_FILE)
ARCH_XTENSA_OVERLAY_FILE = $(DL_DIR)/$(notdir $(BR_ARCH_XTENSA_OVERLAY_FILE))
# Do not check that file, we can't know its hash
BR_NO_CHECK_HASH_FOR += $(notdir $(ARCH_XTENSA_OVERLAY_URL))
else
ARCH_XTENSA_OVERLAY_FILE = $(BR_ARCH_XTENSA_OVERLAY_FILE)
endif
################################################################################
# arch-xtensa-overlay-extract -- extract an extensa overlay
#
# argument 1 is the path in which to extract
# argument 2 is the component to extract, one of: gcc, binutils, gdb, linux,
# u-boot
#
# Example:
# $(call arch-xtensa-overlay-extract,/path/to/overlay.tar,$(@D),gcc)
################################################################################
define arch-xtensa-overlay-extract
$(call suitable-extractor,$(ARCH_XTENSA_OVERLAY_FILE)) \
$(ARCH_XTENSA_OVERLAY_FILE) | \
$(TAR) --strip-components=1 -C $(1) $(TAR_OPTIONS) - $(2)
endef

View File

@@ -1,35 +0,0 @@
# Minimal SD card image for the Acmesystems Aria G25
image boot.vfat {
vfat {
file zImage {
image = "zImage"
}
file at91-ariag25.dtb {
image = "at91-ariag25.dtb"
}
file boot.bin {
image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.8.6.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

View File

@@ -1,14 +0,0 @@
#!/bin/sh
BOARD_DIR="$(dirname $0)"
GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
rm -rf "${GENIMAGE_TMP}"
genimage \
--rootpath "${TARGET_DIR}" \
--tmppath "${GENIMAGE_TMP}" \
--inputpath "${BINARIES_DIR}" \
--outputpath "${BINARIES_DIR}" \
--config "${GENIMAGE_CFG}"

View File

@@ -1,44 +1,51 @@
Acme Systems Aria G25
Build instructions
==================
To build an image for the Aria G25 choose the configuration
corresponding to the Aria variant.
As a regular user configure and then build:
For 128MB RAM variant type:
$ make acmesystems_aria_g25_128mb_defconfig
else for 256MB RAM variant type:
$ make acmesystems_aria_g25_256mb_defconfig
To customize the configuration choosed type:
$ make menuconfig
When you are ready to start building Buildroot type:
$ make acmesystems_aria_g25_128mb_defconfig (128MB RAM variant)
or...
$ make acmesystems_aria_g25_256mb_defconfig (256MB RAM variant)
$ make
How to write the microSD card
=============================
Writing to the MicroSD card
===========================
Once the build process is finished you will have an image called
"sdcard.img" in the output/images/ directory.
Assuming your Aria G25 baseboard has a MicroSD socket, for example with
the Terra baseboard, you'll need a blank MicroSD (obviously) initialized
in a particular way to be able to boot from it.
Write the bootable SD card image "sdcard.img" onto an SD card with
"dd" command:
Assuming the card is seen as /dev/sdb in your PC/laptop/other device
you'll need to run the following commands as root or via sudo.
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
Make sure all of the card partitions are unmounted before starting.
Assuming your Aria G25 baseboard has a MicroSD socket, for example
with the Terra baseboard, insert the microSD card into the baseboard
slot and power it.
First we'll need to create two partitions:
To get the kernel log messages you can use a DPI cable
(http://www.acmesystems.it/DPI)
# sfdisk -uM /dev/sdb <<EOF
,32,6
;
EOF
Then we'll need to create the empty filesystems:
# mkdosfs -n SD_BOOT /dev/sdb1
# mkfs.ext4 -L SD_ROOT /dev/sdb2
We'll populate the first partition (boot) with the relevant files:
# mount /dev/sdb1 /mnt
# cp output/images/at91bootstrap.bin /mnt/BOOT.BIN
# cp output/images/zImage /mnt
# cp output/images/at91-ariag25.dtb /mnt
# umount /mnt
And the root filesystem afterwards:
# mount /dev/sdb2 /mnt
# tar -C /mnt output/images/rootfs.tar
# umount /mnt
You're done, insert the MicroSD card in the slot and enjoy.
You can find additional informations, tutorials and a very
comprehensive documentation on http://www.acmesystems.it/aria.

View File

@@ -1,18 +1,18 @@
# Minimal SD card image for the Acmesystems Arietta G25
#
image boot.vfat {
vfat {
file zImage {
image = "zImage"
}
file acme-arietta.dtb {
image = "at91-ariettag25.dtb"
image = "at91-ariag25.dtb"
}
file boot.bin {
image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.8.6.bin"
}
image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.7.bin"
}
}
size = 16M
}

View File

@@ -6,9 +6,11 @@ GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
rm -rf "${GENIMAGE_TMP}"
genimage \
genimage \
--rootpath "${TARGET_DIR}" \
--tmppath "${GENIMAGE_TMP}" \
--inputpath "${BINARIES_DIR}" \
--outputpath "${BINARIES_DIR}" \
--config "${GENIMAGE_CFG}"
exit $?

View File

@@ -1,4 +1,4 @@
Acme Systems Arietta G25
Acmesystems Arietta G25
Intro
=====
@@ -13,8 +13,8 @@ documentation on http://www.acmesystems.it/arietta.
Build instructions
==================
To build an image for the Arietta G25 choose the configuration
corresponding to the Arietta variant.
To build an image for the arietta g25 choose the configuration
corresponding to the arietta variant.
For 128MB RAM variant type:
@@ -24,11 +24,7 @@ else for 256MB RAM variant type:
$ make acmesystems_arietta_g25_256mb_defconfig
To customize the configuration chosen type:
$ make menuconfig
When you are ready to start building Buildroot type:
then:
$ make
@@ -42,7 +38,7 @@ Copy the bootable "sdcard.img" onto an SD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
Insert the microSD card into the Arietta slot and power it.
Insert the microSD card into the arietta slot and power it.
The image just built is fairly basic and the only output
you will get is on serial console, please consider to use a DPI

8
board/altera/post-image.sh Executable file
View File

@@ -0,0 +1,8 @@
#!/bin/sh
# post-image.sh for SoCkit/SoCDK
# 2014, "Roman Diouskine" <roman.diouskine@savoirfairelinux.com>
# 2014, "Sebastien Bourdelin" <sebastien.bourdelin@savoirfairelinux.com>
# create a DTB file copy with the name expected by the u-boot config
# Name of the DTB is passed as the second argument to the script.
cp -af $BINARIES_DIR/${2}.dtb $BINARIES_DIR/socfpga.dtb

165
board/altera/readme.txt Normal file
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@@ -0,0 +1,165 @@
SoCkit, SoC Development Kit
Intro
=====
This is the buildroot board support for the Arrow SoCkit Evaluation Board
and the Altera Cyclone 5 Development Board.
A good source of information for Arrow SoCkit:
http://www.rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard
More information about SoC DK:
https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-cyclone-v-soc.html
How it works
============
Boot process:
-------------
In summary, the bootloader has multiple stages, an hardcoded boot routine is
loaded from an on-chip ROM.
- That first stage is scanning the SD card's partition table to find
partition having the 0xA2 type.
- This partition is expected to contain a boot image on its first 60 Kb,
because u-boot is bigger, we must fill it with a preloader (u-boot-spl)
which will load the u-boot image.
- Then the u-boot image will load the Linux kernel.
A good source of information for the boot process is:
http://xillybus.com/tutorials/u-boot-image-altera-soc
Note for the SPL:
The SPL generated by the u-boot from Rocketboards doesn't seems to work,
therefore we provide a patch for {uboot-PKG}/board/altera/socfpga_cyclone5/*
based on the files generated with the Altera example design.
For more information about this files please look at:
http://www.rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization#Common_Source_Code
How to build it
===============
Configure Buildroot
-------------------
The altera_sockit_defconfig configuration is a minimal configuration with
all that is required to bring the SoCkit:
$ make altera_sockit_defconfig
and for the SoC Development Board:
$ make altera_sockdk_defconfig
Build everything
----------------
Note: you will need to have access to the network, since Buildroot will
download the packages' sources.
$ make
Result of the build
-------------------
After building, you should obtain this tree:
output/images/
├── rootfs.ext2
├── rootfs.ext3 -> rootfs.ext2
├── rootfs.tar
├── socfpga_cyclone5_sockit.dtb or socfpga_cyclone5_socdk.dtb
├── socfpga.dtb
├── u-boot.img
├── u-boot-spl.bin
└── uImage
Signing the Preloader
---------------------
*** BEWARE ****
The u-boot-spl.bin must be signed using the Altera's tool "mkpimage".
This tool comes as a part of the Altera development environnment (SoC EDS).
A fork of this tool have been done by Maxime Hadjinlian and can be found here:
https://github.com/maximeh/mkpimage
Remember that without signing the u-boot-spl.bin, the board will not boot !!!
$ mkpimage u-boot-spl.bin -o u-boot-spl-signed.bin
Prepare your SDcard
===================
A good source of information for the partitioning process is:
http://www.rocketboards.org/foswiki/view/Projects/SoCKitLinaroLinuxDesktop#Partition_the_SD_Card
Create the SDcard partition table
----------------------------------
Determine the device associated to the SD card:
$ cat /proc/partitions
let's assume it is /dev/mmcblk0:
$ sudo fdisk /dev/mmcblk0
Delete all previous partitions with 'd' then create the new partition table,
using these options, pressing enter after each one:
* n p 1 9000000 +20480K t 1 b
* n p 2 4096 +4496384K t 83
* n p 3 2048 +1024K t 3 a2
Using the 'p' option, the SD card's partition must look like this:
Device Boot Start End Blocks Id System
/dev/mmcblk0p1 9000000 9041919 20960 b W95 FAT32
/dev/mmcblk0p2 4096 8996863 4496384 83 Linux
/dev/mmcblk0p3 2048 4095 1024 a2 Unknown
Then write the partition table using 'w' and exit.
Make partition one a DOS partition:
$ sudo mkdosfs /dev/mmcblk0p1
Install the binaries to the SDcard
----------------------------------
Remember your binaries are located in output/images/, go inside that directory:
$ cd output/images
The partition with type a2 is the partition scan by the first bootloader stage
in the SoCkit ROM to find the next bootloader stage so we must write the signed
preloader and the u-boot binaries in that partition:
$ sudo dd if=u-boot-spl-signed.bin of=/dev/mmcblk0p3 bs=64k seek=0
$ sudo dd if=u-boot.img of=/dev/mmcblk0p3 bs=64k seek=4
Copy the Linux kernel and its Device tree:
$ sudo mkdir /mnt/sdcard
$ sudo mount /dev/mmcblk0p1 /mnt/sdcard
$ sudo cp socfpga.dtb uImage /mnt/sdcard
$ sudo umount /mnt/sdcard
Copy the rootfs:
$ sudo dd if=rootfs.ext2 of=/dev/mmcblk0p2 bs=64k
$ sudo sync
It's Done!
Finish
======
Eject your SDcard, insert it in your SoCkit, and power it up.
if you want a serial console, you can plug a micro B USB cable on the USB-UART
port, the serial port config to used is 57600/8-N-1.

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@@ -0,0 +1,820 @@
From c70f2ebb350da20af1a0ed4b7960b8e5a1952713 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Date: Thu, 20 Feb 2014 11:51:31 -0500
Subject: [PATCH] board: add to sockit a working preloader design
---
board/altera/socfpga_cyclone5/build.h | 2 +-
board/altera/socfpga_cyclone5/iocsr_config.c | 314 ++++++++++-----------
board/altera/socfpga_cyclone5/pinmux_config.c | 32 +--
board/altera/socfpga_cyclone5/pinmux_config.h | 8 +-
board/altera/socfpga_cyclone5/sdram/sdram_config.h | 14 +-
.../altera/socfpga_cyclone5/sdram/sequencer_auto.h | 16 +-
.../sdram/sequencer_auto_ac_init.c | 16 +-
.../socfpga_cyclone5/sdram/sequencer_defines.h | 34 +--
8 files changed, 218 insertions(+), 218 deletions(-)
diff --git a/board/altera/socfpga_cyclone5/build.h b/board/altera/socfpga_cyclone5/build.h
index e5d9c3c..a369015 100644
--- a/board/altera/socfpga_cyclone5/build.h
+++ b/board/altera/socfpga_cyclone5/build.h
@@ -29,7 +29,7 @@
* Handoff files must provide user option whether to
* enable watchdog during preloader execution phase
*/
-#define CONFIG_PRELOADER_WATCHDOG_ENABLE (0)
+#define CONFIG_PRELOADER_WATCHDOG_ENABLE (1)
/*
* Handoff files must provide user option whether to enable
diff --git a/board/altera/socfpga_cyclone5/iocsr_config.c b/board/altera/socfpga_cyclone5/iocsr_config.c
index fa663e1..90fc154 100644
--- a/board/altera/socfpga_cyclone5/iocsr_config.c
+++ b/board/altera/socfpga_cyclone5/iocsr_config.c
@@ -7,113 +7,113 @@ const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
0xC0000000,
0x0000003F,
0x00008000,
- 0x00020080,
- 0x08020000,
- 0x08000000,
- 0x00018020,
+ 0x00060180,
+ 0x18060000,
+ 0x18000000,
+ 0x00018060,
0x00000000,
0x00004000,
- 0x00010040,
- 0x04010000,
- 0x04000000,
- 0x00000010,
- 0x00004010,
+ 0x000300C0,
+ 0x0C030000,
+ 0x0C000000,
+ 0x00000030,
+ 0x0000C030,
0x00002000,
- 0x00020000,
- 0x02008000,
- 0x02000000,
- 0x00000008,
- 0x00002008,
+ 0x00018060,
+ 0x06018000,
+ 0x06000000,
+ 0x00000018,
+ 0x00006018,
0x00001000,
};
const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = {
- 0x000C0300,
- 0x10040000,
- 0x100000C0,
- 0x00000040,
- 0x00010040,
+ 0x00100000,
+ 0x300C0000,
+ 0x300000C0,
+ 0x000000C0,
+ 0x000300C0,
0x00008000,
0x00080000,
- 0x18060000,
- 0x18000000,
- 0x00000060,
- 0x00018060,
+ 0x20000000,
+ 0x00000000,
+ 0x00000080,
+ 0x00020000,
0x00004000,
- 0x00010040,
+ 0x000300C0,
0x10000000,
- 0x04000000,
- 0x00000010,
- 0x00004010,
+ 0x0C000000,
+ 0x00000030,
+ 0x0000C030,
0x00002000,
- 0x06008020,
- 0x02008000,
+ 0x06018060,
+ 0x06018000,
0x01FE0000,
0xF8000000,
0x00000007,
0x00001000,
- 0x00004010,
- 0x01004000,
- 0x01000000,
- 0x00003004,
- 0x00001004,
+ 0x0000C030,
+ 0x0300C000,
+ 0x03000000,
+ 0x0000300C,
+ 0x0000300C,
0x00000800,
0x00000000,
0x00000000,
- 0x00800000,
- 0x00000002,
+ 0x01800000,
+ 0x00000006,
0x00002000,
0x00000400,
0x00000000,
- 0x00401000,
+ 0x00C03000,
0x00000003,
0x00000000,
0x00000000,
0x00000200,
- 0x00600802,
+ 0x00601806,
0x00000000,
- 0x80200000,
- 0x80000600,
- 0x00000200,
+ 0x80600000,
+ 0x80000601,
+ 0x00000601,
0x00000100,
- 0x00300401,
- 0xC0100400,
- 0x40100000,
- 0x40000300,
- 0x000C0100,
+ 0x00300C03,
+ 0xC0300C00,
+ 0xC0300000,
+ 0xC0000300,
+ 0x000C0300,
0x00000080,
};
const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = {
- 0x80040100,
+ 0x300C0300,
0x00000000,
0x0FF00000,
0x00000000,
- 0x0C010040,
+ 0x0C0300C0,
0x00008000,
- 0x18020080,
- 0x00000000,
- 0x08000000,
- 0x00040020,
- 0x06018060,
+ 0x18060180,
+ 0x18060000,
+ 0x18000000,
+ 0x00018060,
+ 0x00018060,
0x00004000,
- 0x0C010040,
- 0x04010000,
+ 0x000300C0,
+ 0x0C030000,
0x00000030,
0x00000000,
- 0x03004010,
+ 0x0300C030,
0x00002000,
- 0x06008020,
- 0x02008000,
- 0x02000018,
- 0x00006008,
- 0x01802008,
+ 0x00018060,
+ 0x06018000,
+ 0x06000000,
+ 0x00000018,
+ 0x00006018,
0x00001000,
- 0x03004010,
- 0x01004000,
- 0x0100000C,
- 0x00003004,
- 0x00C01004,
+ 0x0000C030,
+ 0x00000000,
+ 0x03000000,
+ 0x0000000C,
+ 0x00C0300C,
0x00000800,
};
@@ -170,14 +170,14 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xA0000034,
0x0D000001,
0x6068030C,
- 0xC7034018,
- 0x0E381A01,
+ 0xCF034059,
+ 0x1E781A03,
0x8030C0D0,
- 0x34018606,
- 0x01A01C70,
+ 0x34059606,
+ 0x01A03CF0,
0x0C0D0000,
- 0x18606803,
- 0x01C70340,
+ 0x59606803,
+ 0x03CF0340,
0xD000001A,
0x068030C0,
0x10040000,
@@ -244,15 +244,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xA0000034,
0x0D000001,
0x6068030C,
- 0xC7034018,
- 0x0E381A01,
+ 0xCF034059,
+ 0x1E781A03,
0x8030C0D0,
- 0x34018606,
+ 0x34059606,
0x01A00000,
0x0C0D0000,
- 0x18606803,
- 0x01C70340,
- 0xD00E381A,
+ 0x59606803,
+ 0x03CF0340,
+ 0xD01E781A,
0x068030C0,
0x10040000,
0x00200000,
@@ -273,7 +273,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -301,7 +301,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00010040,
@@ -321,15 +321,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
+ 0xF5DE791E,
+ 0x0356D348,
0x821A0000,
0x0000D000,
0x01860680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -347,7 +347,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -375,7 +375,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00015000,
@@ -395,15 +395,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
- 0x821A00C3,
+ 0xF5DE791E,
+ 0x0356D348,
+ 0x821A02CB,
0x0000D000,
0x00000680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -421,7 +421,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -449,7 +449,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00010040,
@@ -469,15 +469,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
+ 0xF5DE791E,
+ 0x0356D348,
0x821A0000,
0x0000D000,
0x00000680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -495,7 +495,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -523,7 +523,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00010040,
@@ -543,15 +543,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
+ 0xF5DE791E,
+ 0x0356D348,
0x821A0000,
0x0000D000,
0x00000680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -567,80 +567,80 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x04000002,
0x00820000,
0x00489000,
- 0x001A1A1A,
- 0x085506A0,
- 0x0000E1D4,
- 0x045506A0,
- 0x0000E1D4,
- 0x085506A0,
- 0x8000E1D4,
+ 0x801A1A1A,
+ 0x00000200,
+ 0x80000004,
+ 0x00000200,
+ 0x80000004,
+ 0x00000200,
+ 0x80000004,
0x00000200,
0x00000004,
- 0x04000000,
- 0x00000009,
- 0x00002410,
+ 0x00040000,
+ 0x10000000,
+ 0x00000000,
0x00000040,
- 0x41000000,
- 0x00002082,
- 0x00000350,
- 0x000000DA,
+ 0x00010000,
+ 0x40002000,
+ 0x00000100,
+ 0x40000002,
+ 0x00000100,
+ 0x40000002,
0x00000100,
0x40000002,
0x00000100,
0x00000002,
- 0x042A8350,
- 0x000070EA,
- 0x86000000,
- 0x08000004,
+ 0x00020000,
+ 0x08000000,
0x00000000,
- 0x00482000,
- 0x21800000,
- 0x00101061,
- 0x021541A8,
- 0x00003875,
- 0x011541A8,
- 0x00003875,
- 0x021541A8,
- 0x20003875,
+ 0x00000020,
+ 0x00008000,
+ 0x20001000,
+ 0x00000080,
+ 0x20000001,
+ 0x00000080,
+ 0x20000001,
+ 0x00000080,
+ 0x20000001,
0x00000080,
0x00000001,
- 0x41000000,
- 0x00000002,
- 0x00FF0904,
+ 0x00010000,
+ 0x04000000,
+ 0x00FF0000,
0x00000000,
- 0x90400000,
- 0x00000820,
+ 0x00004000,
+ 0x00000800,
0x80000001,
- 0x38D612AF,
- 0x86F8E38E,
- 0x0A0A78B4,
- 0x000D020A,
+ 0x00041419,
+ 0x40000000,
+ 0x04000816,
+ 0x000D0000,
0x00006800,
- 0x028A4320,
- 0xEBB4D23D,
- 0x8F65E791,
- 0xA47A0F3C,
- 0x0001A769,
- 0x00410D00,
+ 0x00000340,
+ 0xD000001A,
+ 0x06800000,
+ 0x00340000,
+ 0x0001A000,
+ 0x00000D00,
0x40000068,
- 0x3D000003,
- 0x91EBB4D2,
- 0x3C8F65E7,
- 0x69A47A0F,
- 0x000001A7,
+ 0x1A000003,
+ 0x00D00000,
+ 0x00068000,
+ 0x00003400,
+ 0x000001A0,
+ 0x00000401,
+ 0x00000008,
0x00000401,
0x00000008,
0x00000401,
0x00000008,
- 0x00000540,
- 0x000003A8,
- 0x10AA0D40,
- 0x8001C3A8,
+ 0x00000401,
+ 0x80000008,
0x0000007F,
+ 0x20000000,
0x00000000,
- 0x00004060,
- 0xE1208000,
+ 0xE0000080,
0x0000001F,
- 0x00004100,
+ 0x00004000,
};
diff --git a/board/altera/socfpga_cyclone5/pinmux_config.c b/board/altera/socfpga_cyclone5/pinmux_config.c
index 730067e..cfd74cd 100644
--- a/board/altera/socfpga_cyclone5/pinmux_config.c
+++ b/board/altera/socfpga_cyclone5/pinmux_config.c
@@ -23,7 +23,7 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
0, /* EMACIO18 */
0, /* EMACIO19 */
3, /* FLASHIO0 */
- 3, /* FLASHIO1 */
+ 0, /* FLASHIO1 */
3, /* FLASHIO2 */
3, /* FLASHIO3 */
0, /* FLASHIO4 */
@@ -34,25 +34,25 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
3, /* FLASHIO9 */
3, /* FLASHIO10 */
3, /* FLASHIO11 */
- 3, /* GENERALIO0 */
- 3, /* GENERALIO1 */
- 3, /* GENERALIO2 */
- 3, /* GENERALIO3 */
- 3, /* GENERALIO4 */
- 3, /* GENERALIO5 */
- 3, /* GENERALIO6 */
- 3, /* GENERALIO7 */
- 3, /* GENERALIO8 */
+ 0, /* GENERALIO0 */
+ 1, /* GENERALIO1 */
+ 1, /* GENERALIO2 */
+ 1, /* GENERALIO3 */
+ 1, /* GENERALIO4 */
+ 0, /* GENERALIO5 */
+ 0, /* GENERALIO6 */
+ 0, /* GENERALIO7 */
+ 0, /* GENERALIO8 */
3, /* GENERALIO9 */
3, /* GENERALIO10 */
3, /* GENERALIO11 */
3, /* GENERALIO12 */
- 2, /* GENERALIO13 */
- 2, /* GENERALIO14 */
- 3, /* GENERALIO15 */
- 3, /* GENERALIO16 */
- 2, /* GENERALIO17 */
- 2, /* GENERALIO18 */
+ 0, /* GENERALIO13 */
+ 0, /* GENERALIO14 */
+ 1, /* GENERALIO15 */
+ 1, /* GENERALIO16 */
+ 1, /* GENERALIO17 */
+ 1, /* GENERALIO18 */
0, /* GENERALIO19 */
0, /* GENERALIO20 */
0, /* GENERALIO21 */
diff --git a/board/altera/socfpga_cyclone5/pinmux_config.h b/board/altera/socfpga_cyclone5/pinmux_config.h
index fb483ab..64c750a 100644
--- a/board/altera/socfpga_cyclone5/pinmux_config.h
+++ b/board/altera/socfpga_cyclone5/pinmux_config.h
@@ -11,15 +11,15 @@
#define CONFIG_HPS_UART0 (1)
#define CONFIG_HPS_UART1 (0)
#define CONFIG_HPS_TRACE (0)
-#define CONFIG_HPS_I2C0 (1)
-#define CONFIG_HPS_I2C1 (0)
+#define CONFIG_HPS_I2C0 (0)
+#define CONFIG_HPS_I2C1 (1)
#define CONFIG_HPS_I2C2 (0)
#define CONFIG_HPS_I2C3 (0)
#define CONFIG_HPS_SPIM0 (1)
-#define CONFIG_HPS_SPIM1 (0)
+#define CONFIG_HPS_SPIM1 (1)
#define CONFIG_HPS_SPIS0 (0)
#define CONFIG_HPS_SPIS1 (0)
-#define CONFIG_HPS_CAN0 (1)
+#define CONFIG_HPS_CAN0 (0)
#define CONFIG_HPS_CAN1 (0)
#define CONFIG_HPS_SDMMC_BUSWIDTH (4)
diff --git a/board/altera/socfpga_cyclone5/sdram/sdram_config.h b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
index b90d6f3..dd027ef 100755
--- a/board/altera/socfpga_cyclone5/sdram/sdram_config.h
+++ b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
@@ -4,16 +4,16 @@
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE (2)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL (8)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER (0)
-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN (1)
-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN (1)
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN (0)
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN (0)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN (1)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT (10)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN (0)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS (0)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL (6)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL (8)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL (0)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL (7)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD (4)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL (11)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD (3)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW (12)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC (104)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI (3120)
@@ -21,7 +21,7 @@
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP (6)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR (6)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR (4)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP (4)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP (3)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS (14)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC (20)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD (4)
@@ -33,7 +33,7 @@
#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS (15)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS (3)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS (1)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH (40)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH (32)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH (8)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN (0)
#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL (2)
diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
index e8c5484..919676d 100644
--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
@@ -34,7 +34,7 @@
#define __RW_MGR_ac_read_en 0x21
#define __RW_MGR_ac_mrs3_mirr 0x0C
#define __RW_MGR_ac_mrs2 0x05
-#define __RW_MGR_CONTENT_ac_mrs1 0x10090044
+#define __RW_MGR_CONTENT_ac_mrs1 0x10090006
#define __RW_MGR_CONTENT_ac_mrs3 0x100B0000
#define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata_wl_1 0x18980000
#define __RW_MGR_CONTENT_ac_act_1 0x106B0000
@@ -46,8 +46,8 @@
#define __RW_MGR_CONTENT_ac_init_reset_0_cke_0 0x20700000
#define __RW_MGR_CONTENT_ac_read_bank_0_1_norden 0x10580008
#define __RW_MGR_CONTENT_ac_pre_all 0x10280400
-#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080431
-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080530
+#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080471
+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080570
#define __RW_MGR_CONTENT_ac_read_bank_0_0 0x13580000
#define __RW_MGR_CONTENT_ac_write_bank_0_col_1 0x1C980008
#define __RW_MGR_CONTENT_ac_read_bank_0_1 0x13580008
@@ -55,21 +55,21 @@
#define __RW_MGR_CONTENT_ac_write_bank_1_col_1 0x1C9B0008
#define __RW_MGR_CONTENT_ac_write_bank_0_col_0 0x1C980000
#define __RW_MGR_CONTENT_ac_read_bank_1_0 0x135B0000
-#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0024
+#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0006
#define __RW_MGR_CONTENT_ac_read_bank_1_1 0x135B0008
#define __RW_MGR_CONTENT_ac_des_odt_1 0x38780000
-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804C8
+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804E8
#define __RW_MGR_CONTENT_ac_zqcl 0x10380400
#define __RW_MGR_CONTENT_ac_write_predata 0x38F80000
-#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080449
+#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080469
#define __RW_MGR_CONTENT_ac_ref 0x10480000
#define __RW_MGR_CONTENT_ac_nop 0x30780000
#define __RW_MGR_CONTENT_ac_rdimm 0x10780000
-#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090010
+#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090218
#define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata 0x18180000
#define __RW_MGR_CONTENT_ac_read_en 0x33780000
#define __RW_MGR_CONTENT_ac_mrs3_mirr 0x100B0000
-#define __RW_MGR_CONTENT_ac_mrs2 0x100A0008
+#define __RW_MGR_CONTENT_ac_mrs2 0x100A0218
#define __RW_MGR_READ_B2B_WAIT2 0x6A
#define __RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x31
diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
index e16efa1..20b4ca1 100644
--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
@@ -6,16 +6,16 @@ const alt_u32 ac_rom_init[36] =
{
0x20700000,
0x20780000,
- 0x10080431,
- 0x10080530,
- 0x10090044,
- 0x100a0008,
+ 0x10080471,
+ 0x10080570,
+ 0x10090006,
+ 0x100a0218,
0x100b0000,
0x10380400,
- 0x10080449,
- 0x100804c8,
- 0x100a0024,
- 0x10090010,
+ 0x10080469,
+ 0x100804e8,
+ 0x100a0006,
+ 0x10090218,
0x100b0000,
0x30780000,
0x38780000,
diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
index 52faf3f..b85b85c 100644
--- a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
@@ -1,28 +1,28 @@
#ifndef _SEQUENCER_DEFINES_H_
#define _SEQUENCER_DEFINES_H_
-#define AC_ROM_MR1_MIRR 0000000100100
+#define AC_ROM_MR1_MIRR 0000000000110
#define AC_ROM_MR1_OCD_ENABLE
-#define AC_ROM_MR2_MIRR 0000000010000
+#define AC_ROM_MR2_MIRR 0001000011000
#define AC_ROM_MR3_MIRR 0000000000000
#define AC_ROM_MR0_CALIB
-#define AC_ROM_MR0_DLL_RESET_MIRR 0010011001000
-#define AC_ROM_MR0_DLL_RESET 0010100110000
-#define AC_ROM_MR0_MIRR 0010001001001
-#define AC_ROM_MR0 0010000110001
-#define AC_ROM_MR1 0000001000100
-#define AC_ROM_MR2 0000000001000
+#define AC_ROM_MR0_DLL_RESET_MIRR 0010011101000
+#define AC_ROM_MR0_DLL_RESET 0010101110000
+#define AC_ROM_MR0_MIRR 0010001101001
+#define AC_ROM_MR0 0010001110001
+#define AC_ROM_MR1 0000000000110
+#define AC_ROM_MR2 0001000011000
#define AC_ROM_MR3 0000000000000
#define AFI_CLK_FREQ 401
#define AFI_RATE_RATIO 1
#define ARRIAVGZ 0
#define ARRIAV 0
-#define AVL_CLK_FREQ 67
+#define AVL_CLK_FREQ 81
#define BFM_MODE 0
#define BURST2 0
#define CALIBRATE_BIT_SLIPS 0
-#define CALIB_LFIFO_OFFSET 7
-#define CALIB_VFIFO_OFFSET 5
+#define CALIB_LFIFO_OFFSET 11
+#define CALIB_VFIFO_OFFSET 9
#define CYCLONEV 1
#define DDR2 0
#define DDR3 1
@@ -89,20 +89,20 @@
#define RW_MGR_MEM_CHIP_SELECT_WIDTH 1
#define RW_MGR_MEM_CLK_EN_WIDTH 1
#define RW_MGR_MEM_CONTROL_WIDTH 1
-#define RW_MGR_MEM_DATA_MASK_WIDTH 5
-#define RW_MGR_MEM_DATA_WIDTH 40
+#define RW_MGR_MEM_DATA_MASK_WIDTH 4
+#define RW_MGR_MEM_DATA_WIDTH 32
#define RW_MGR_MEM_DQ_PER_READ_DQS 8
#define RW_MGR_MEM_DQ_PER_WRITE_DQS 8
-#define RW_MGR_MEM_IF_READ_DQS_WIDTH 5
-#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 5
+#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4
+#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4
#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
#define RW_MGR_MEM_NUMBER_OF_RANKS 1
#define RW_MGR_MEM_ODT_WIDTH 1
#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1
#define RW_MGR_MR0_BL 1
-#define RW_MGR_MR0_CAS_LATENCY 3
-#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 5
+#define RW_MGR_MR0_CAS_LATENCY 7
+#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4
#define RW_MGR_WRITE_TO_DEBUG_READ 1.0
#define SKEW_CALIBRATION 0
#define STATIC_FULL_CALIBRATION 1
--
1.9.0

View File

@@ -1,8 +0,0 @@
linux_load_address=0x100000
linux_dtb_load_address=0x100
linux_dtb=socfpga_cyclone5_socrates.dtb
linux_load=mmc rescan; fatload mmc 0:1 ${linux_load_address} zImage; fatload mmc 0:1 ${linux_dtb_load_address} ${linux_dtb}
bootargs=console=ttyS0,115200 root=/dev/mmcblk0p3 ro rootwait
source_env=fatload mmc 0:1 0x2000000 boot.scr; source 0x2000000
bootcmd=run linux_load; bootz ${linux_load_address} - ${linux_dtb_load_address}
bootdelay=1

View File

@@ -1,58 +0,0 @@
image boot.vfat {
vfat {
files = {
"zImage",
"socfpga_cyclone5_socrates.dtb"
}
}
size = 8M
}
image uboot.img {
hdimage {
partition-table = "no"
}
partition spl {
in-partition-table = "no"
image = "u-boot-spl.bin.crc"
offset = 0
size = 64k
}
partition uboot-full {
in-partition-table = "no"
image = "u-boot.img"
offset = 256k
}
size = 1M
}
image sdcard.img {
hdimage {
}
partition uboot-env {
in-partition-table = "no"
image = "uboot-env.bin"
offset = 17408 # 512 * 34 -> just after gpt
}
partition boot {
partition-type = 0xc
bootable = "true"
image = "boot.vfat"
}
partition uboot {
partition-type = 0xa2
image = "uboot.img"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext2"
size = 500M
}
}

View File

@@ -1,52 +0,0 @@
EBV SoCrates Evaluation Board
Intro
=====
More information about this board can be found here:
https://rocketboards.org/foswiki/Documentation/EBVSoCratesEvaluationBoard
Build
=====
First, load socrates config for buildroot
make socrates_cyclone5_defconfig
Build everything
make
Following files will be generated in output/images
.
├── boot.vfat
├── rootfs.ext2
├── rootfs.ext4 -> rootfs.ext2
├── rootfs.tar
├── sdcard.img
├── socfpga_cyclone5_socrates.dtb
├── u-boot-spl.bin
├── u-boot-spl.bin.crc
├── u-boot.bin
├── u-boot.img
├── uboot-env.bin
├── uboot.img
└── zImage
Creating bootable SD card
=========================
Simply invoke
dd if=output/images/sdcard.img of=/dev/sdX
Where X is your SD card device (not partition)
Booting
=======
Pins 6:8 on P18 selector is used to determine boot device. To boot socrates from
sdcard set these pins to value 0x5 (101b). Remaining pins are used to determine
how to configure FPGA and are not associated with booting into Linux kernel.

View File

@@ -1,53 +0,0 @@
From 35b7ce4f8f290794d3b89db7461e8c568b5defa1 Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Mon, 25 Apr 2016 09:19:17 -0700
Subject: powerpc/ptrace: Fix out of bounds array access warning
commit 1e407ee3b21f981140491d5b8a36422979ca246f upstream.
gcc-6 correctly warns about a out of bounds access
arch/powerpc/kernel/ptrace.c:407:24: warning: index 32 denotes an offset greater than size of 'u64[32][1] {aka long long unsigned int[32][1]}' [-Warray-bounds]
offsetof(struct thread_fp_state, fpr[32][0]));
^
check the end of array instead of beginning of next element to fix this
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Segher Boessenkool <segher@kernel.crashing.org>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
---
arch/powerpc/kernel/ptrace.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index f21897b..93f200f 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -376,7 +376,7 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
#else
BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
- offsetof(struct thread_fp_state, fpr[32][0]));
+ offsetof(struct thread_fp_state, fpr[32]));
return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
&target->thread.fp_state, 0, -1);
@@ -404,7 +404,7 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
return 0;
#else
BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
- offsetof(struct thread_fp_state, fpr[32][0]));
+ offsetof(struct thread_fp_state, fpr[32]));
return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&target->thread.fp_state, 0, -1);
--
cgit v1.1

View File

@@ -8,8 +8,8 @@ These instructions apply to all models of the ARM Juno:
- Juno r1 (supports PCIe)
- Juno r2 (Big Cluster with A72)
Buildroot will generate the kernel image, device tree blob, bootloader binaries
and a minimal root filesystem.
Buildroot will generate the kernel image, device tree blob and a
minimal root filesystem.
How to build it
===============
@@ -44,20 +44,6 @@ After building, you should obtain this tree:
+-- juno-r1.dtb (if Juno r1 is used)
+-- juno-r2.dtb (if Juno r2 is used)
+-- Image
+-- bl1.bin
+-- bl2.bin
+-- bl2u.bin
+-- bl31.bin
+-- fip.bin
+-- scp-fw.bin
+-- u-boot.bin
Preparing your rootfs
======================
Format your pen drive as a ext3 filesystem by executing:
$ mkfs.ext3 /dev/<your device>
Preparing your rootfs
======================
@@ -127,8 +113,7 @@ Installing kernel image and DTB
3. Open the software/ folder
4. Copy the 'Image' file to software/
5. Copy the 'juno-r1.dtb' (r1), 'juno.dtb' (r0) or juno-r2.dtb (r2) file to software/
6. Copy the bootloader binaries (bl1.bin and fip.bin) to software/
7. Press the red button in the front pannel of ARM Juno
6. Press the red button in the front pannel of ARM Juno
At this time, the board will erase the Flash entry for each new item and
replace it with the lastest ones.

View File

@@ -0,0 +1,224 @@
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CGROUPS=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MXC=y
CONFIG_MACH_IMX27_DT=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_SMSC_PHY=y
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RTL8192CU=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_IMX=m
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_PWC=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=m
CONFIG_VIDEO_MX2=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
# CONFIG_DVB_AU8522_V4L is not set
# CONFIG_DVB_TUNER_DIB0070 is not set
# CONFIG_DVB_TUNER_DIB0090 is not set
CONFIG_FB=y
# CONFIG_FB_MX3 is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_CHIPIDEA_DEBUG=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_MXC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1374=y
CONFIG_RTC_DRV_MXC=m
CONFIG_DMADEVICES=y
CONFIG_IMX_SDMA=y
CONFIG_IMX_DMA=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_MAX1027=y
CONFIG_MAX5821=y
CONFIG_PWM=y
CONFIG_PWM_IMX=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_DNOTIFY is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=m
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_FONTS=y
CONFIG_FONT_8x8=y

View File

@@ -1,216 +0,0 @@
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CGROUPS=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MXC=y
CONFIG_MACH_IMX27_DT=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_CAN=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_SMSC_PHY=y
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RTL8187=m
CONFIG_RTL8192CU=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_IMX=m
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_PWC=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_FB=y
# CONFIG_FB_MX3 is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_MXC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1374=y
CONFIG_RTC_DRV_MXC=m
CONFIG_DMADEVICES=y
CONFIG_IMX_DMA=y
CONFIG_IMX_SDMA=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_MAX1027=y
CONFIG_MAX5821=y
CONFIG_PWM=y
CONFIG_PWM_IMX=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_DNOTIFY is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=m
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y

View File

@@ -0,0 +1,185 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MXS=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_IDLE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_FLEXCAN=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_PID=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_M25P80=y
# CONFIG_M25PXX_USE_FAST_READ is not set
CONFIG_MTD_SST25L=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_GPMI_NAND=y
CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_NETDEVICES=y
CONFIG_RTL8187=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_SERIO_SERPORT is not set
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_MXS_AUART=y
CONFIG_TTY_PRINTK=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MXS=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=m
CONFIG_SPI_MXS=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_HWMON=m
CONFIG_WATCHDOG=y
CONFIG_STMP3XXX_RTC_WATCHDOG=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_FB=y
CONFIG_FB_MXS=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_MXS_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_ETH=m
CONFIG_MMC=y
CONFIG_MMC_MXS=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_STMP=y
CONFIG_DMADEVICES=y
CONFIG_MXS_DMA=y
CONFIG_STAGING=y
CONFIG_MXS_LRADC=y
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_MXS=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT2_FS_XIP=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_AUTOFS4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_FS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set

View File

@@ -0,0 +1,266 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_MXC_IRQ_PRIOR=y
CONFIG_MACH_IMX51_DT=y
CONFIG_ARM_THUMBEE=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_IMX=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_SUSPEND is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_RAW=m
CONFIG_CAN_BCM=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_L2CAP=y
CONFIG_BT_SCO=y
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_PID=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_MISC_DEVICES=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_SMSC_PHY=y
CONFIG_NET_ETHERNET=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=m
CONFIG_KEYBOARD_IMX=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_WM831X=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
CONFIG_INPUT_WM831X_ON=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_WM831X=m
CONFIG_POWER_SUPPLY=m
CONFIG_WM831X_BACKUP=m
CONFIG_WM831X_POWER=m
CONFIG_HWMON=m
CONFIG_SENSORS_AS1531=m
CONFIG_SENSORS_WM831X=m
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_WM831X_WATCHDOG=m
CONFIG_IMX2_WDT=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MFD_IMX_IPU_V3=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_VIDEO_DEV=m
# CONFIG_RC_CORE is not set
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
CONFIG_VIDEO_VIVI=m
CONFIG_USB_VIDEO_CLASS=m
# CONFIG_RADIO_ADAPTERS is not set
CONFIG_FB=y
CONFIG_FB_MX5=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_SND_SOC_APF51_DEV_WM8960=m
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_SUSPEND=y
CONFIG_USB_OTG=y
# CONFIG_USB_OTG_WHITELIST is not set
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=m
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_ETH=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SPI=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_WM831X_STATUS=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_MXC=y
CONFIG_RTC_DRV_WM831X=y
CONFIG_STAGING=y
CONFIG_IIO=m
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT2_FS_XIP=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_AUTOFS4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_CMODE_NONE=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_FS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set

View File

@@ -1,278 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_MXC_IRQ_PRIOR=y
CONFIG_SOC_IMX51=y
CONFIG_ARM_THUMBEE=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_IMX=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_SUSPEND is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_RAW=m
CONFIG_CAN_BCM=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_L2CAP=y
CONFIG_BT_SCO=y
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_PID=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_MISC_DEVICES=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_SMSC_PHY=y
CONFIG_NET_ETHERNET=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=m
CONFIG_KEYBOARD_IMX=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_WM831X=y
CONFIG_TOUCHSCREEN_MC13XXX=m
CONFIG_INPUT_MISC=y
CONFIG_INPUT_MC13783_PWRBUTTON=m
CONFIG_INPUT_UINPUT=m
CONFIG_INPUT_WM831X_ON=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_WM831X=m
CONFIG_POWER_SUPPLY=y
CONFIG_WM831X_BACKUP=m
CONFIG_WM831X_POWER=m
CONFIG_HWMON=m
CONFIG_SENSORS_AS1531=m
CONFIG_SENSORS_MC13783_ADC=m
CONFIG_SENSORS_WM831X=m
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_WM831X_WATCHDOG=m
CONFIG_IMX2_WDT=y
CONFIG_MFD_MC13XXX_I2C=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_MC13892=m
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
CONFIG_MFD_IMX_IPU_V3=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_VIDEO_DEV=m
# CONFIG_RC_CORE is not set
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
CONFIG_VIDEO_VIVI=m
CONFIG_USB_VIDEO_CLASS=m
# CONFIG_RADIO_ADAPTERS is not set
CONFIG_FB=y
CONFIG_FB_MX5=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_SND_SOC_APF51_DEV_WM8960=m
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_SUSPEND=y
CONFIG_USB_OTG=y
# CONFIG_USB_OTG_WHITELIST is not set
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_ETH=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SPI=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_WM831X_STATUS=m
CONFIG_LEDS_MC13783=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_MXC=y
CONFIG_RTC_DRV_WM831X=y
CONFIG_RTC_DRV_MC13XXX=m
CONFIG_STAGING=y
CONFIG_DRM_IMX=y
CONFIG_DRM_IMX_FB_HELPER=y
CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
CONFIG_DRM_IMX_TVE=y
CONFIG_DRM_IMX_IPUV3=y
CONFIG_IIO=m
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT2_FS_XIP=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_EXT4_FS=y
CONFIG_AUTOFS4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_FS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set

View File

@@ -13,6 +13,7 @@ Supported platforms
Buildroot currently supports the following Armadeus platforms with the
associated defconfigs:
* APF9328 SOM + devt boards -> armadeus_apf9328_defconfig
* APF27 SOM + devt board -> armadeus_apf27_defconfig
* APF51 SOM + devt board -> armadeus_apf51_defconfig
* APF28 SOM + devt board -> armadeus_apf28_defconfig
@@ -45,12 +46,15 @@ When the build is finished, you will end up with:
output/images/
├── imx**-apfxxdev.dtb [1]
├── rootfs.jffs2 [2]
├── rootfs.tar
├── rootfs.ubi
├── rootfs.ubifs
├── rootfs.ubi [2]
├── rootfs.ubifs [2]
└── uImage
[1] Only if the kernel version used uses a Device Tree.
[2] .ubi/.ubifs images are not available on APF9328 and replaced by a
.jffs2 one in this case.
Building U-Boot is currently not supported in these configurations.
@@ -65,6 +69,7 @@ it:
$ cp output/images/uImage /tftpboot/apfxx-linux.bin
$ cp output/images/*.dtb /tftpboot/
$ cp output/images/rootfs.ubi /tftpboot/apfxx-rootfs.ubi
$ cp output/images/rootfs.jffs2 /tftpboot/apfxx-rootfs.jffs2
where "apfxx" is the version of your SOM, as used with _defconfigs.

View File

@@ -0,0 +1,98 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_LZO=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9260=y
CONFIG_ARCH_AT91SAM9260_SAM9XE=y
CONFIG_MACH_AT91SAM9260EK=y
CONFIG_MACH_CAM60=y
CONFIG_MACH_SAM9_L9260=y
CONFIG_MACH_AFEB9260=y
CONFIG_MACH_USB_A9260=y
CONFIG_MACH_QIL_A9260=y
CONFIG_MACH_CPU9260=y
CONFIG_MACH_FLEXIBITY=y
CONFIG_MACH_SNAPPER_9260=y
CONFIG_MACH_AT91SAM_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
# CONFIG_ARM_THUMB is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_AT91SAM9X_WATCHDOG=y
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
CONFIG_USB_GADGET=y
CONFIG_USB_ZERO=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_EXT2_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_CRAMFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

View File

@@ -1,39 +0,0 @@
# Image for SD card boot on Atmel at91sam9x5ek boards
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91sam9g15ek.dtb",
"at91sam9g25ek.dtb",
"at91sam9g35ek.dtb",
"at91sam9x25ek.dtb",
"at91sam9x35ek.dtb",
"boot.bin",
"u-boot.bin"
}
file uboot.env {
image = "uboot-env.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

View File

@@ -1,7 +0,0 @@
bootargs=console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait video=Unknown-1:800x480-16
bootcmd=fatload mmc 0:1 0x21000000 at91sam9g35ek.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
bootdelay=1
ethact=gmac0
stderr=serial
stdin=serial
stdout=serial

View File

@@ -13,6 +13,7 @@ This guide covers the following configurations:
- atmel_sama5d3_xplained_dev_defconfig
- atmel_sama5d3_xplained_mmc_defconfig
- atmel_sama5d3_xplained_mmc_dev_defconfig
- atmel_sama5d4ek_defconfig
- atmel_sama5d4_xplained_defconfig
- atmel_sama5d4_xplained_dev_defconfig
- atmel_sama5d4_xplained_mmc_defconfig
@@ -44,7 +45,7 @@ using SAM-BA" section below.
For the Xplained boards, an alternative Buildroot configuration is
provided to boot from an SD card. Those configurations are labeled as
'mmc'. In this case, after building Buildroot, follow the instructions
in the "Preparing the SD card" section.
in the "Preparting the SD card" sction.
To configure and build Buildroot, run:

View File

@@ -1,34 +0,0 @@
# Image for SD card boot on Atmel SAMA5D2 Xplained boards
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91-sama5d27_som1_ek.dtb",
"at91-sama5d27_som1_ek_pda4.dtb",
"at91-sama5d27_som1_ek_pda7.dtb",
"at91-sama5d27_som1_ek_pda7b.dtb",
"boot.bin",
"u-boot.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

View File

@@ -23,7 +23,6 @@ image sdcard.img {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {

View File

@@ -23,7 +23,6 @@ image sdcard.img {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {

View File

@@ -0,0 +1,14 @@
#!/bin/sh
BOARD_DIR="$(dirname $0)"
GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
rm -rf "${GENIMAGE_TMP}"
genimage \
--rootpath "${TARGET_DIR}" \
--tmppath "${GENIMAGE_TMP}" \
--inputpath "${BINARIES_DIR}" \
--outputpath "${BINARIES_DIR}" \
--config "${GENIMAGE_CFG}"

View File

@@ -24,7 +24,6 @@ image sdcard.img {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {

View File

@@ -0,0 +1,14 @@
#!/bin/sh
BOARD_DIR="$(dirname $0)"
GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
rm -rf "${GENIMAGE_TMP}"
genimage \
--rootpath "${TARGET_DIR}" \
--tmppath "${GENIMAGE_TMP}" \
--inputpath "${BINARIES_DIR}" \
--outputpath "${BINARIES_DIR}" \
--config "${GENIMAGE_CFG}"

View File

@@ -1,7 +0,0 @@
setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
mmc dev 0
fatload mmc 0 $kernel_addr_r zImage
fatload mmc 0 $fdt_addr_r sun7i-a20-bananapi.dtb
bootz $kernel_addr_r - $fdt_addr_r

View File

@@ -1,33 +0,0 @@
image boot.vfat {
vfat {
files = {
"zImage",
"sun7i-a20-bananapi.dtb",
"boot.scr"
}
}
size = 64M
}
image sdcard.img {
hdimage {
}
partition u-boot {
in-partition-table = "no"
image = "u-boot-sunxi-with-spl.bin"
offset = 8192
size = 1040384 # 1MB - 8192
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
}
}

View File

@@ -1,37 +0,0 @@
Intro
=====
This default configuration will allow you to start experimenting with the
buildroot environment for the Bananapi M1. With the current configuration
it will bring-up the board, and allow access through the serial console.
Bananapi M1 link:
http://www.banana-pi.org/m1.html
Wiki link:
https://openedev.amarulasolutions.com/display/ODWIKI/Bananapi+M1
This configuration uses U-Boot mainline and kernel mainline.
How to build
============
$ make bananapi_m1_defconfig
$ make
Note: you will need access to the internet to download the required
sources.
How to write the SD card
========================
Once the build process is finished you will have an image called "sdcard.img"
in the output/images/ directory.
Copy the bootable "sdcard.img" onto an SD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
$ sudo sync
Insert the micro SDcard in your Bananapi M1 and power it up. The console
is on the serial line, 115200 8N1.

View File

@@ -1,6 +0,0 @@
setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
fatload mmc 0 $kernel_addr_r Image
fatload mmc 0 $fdt_addr_r sun50i-a64-bananapi-m64.dtb
booti $kernel_addr_r - $fdt_addr_r

View File

@@ -1,39 +0,0 @@
image boot.vfat {
vfat {
files = {
"Image",
"sun50i-a64-bananapi-m64.dtb",
"boot.scr"
}
}
size = 64M
}
image sdcard.img {
hdimage {
}
partition spl {
in-partition-table = "no"
image = "sunxi-spl.bin"
offset = 8192
}
partition u-boot {
in-partition-table = "no"
image = "u-boot.itb"
offset = 40K
size = 1M # 1MB - 40K
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
}
}

View File

@@ -1,37 +0,0 @@
Intro
=====
This default configuration will allow you to start experimenting with the
buildroot environment for the Bananapi M64. With the current configuration
it will bring-up the board, and allow access through the serial console.
Bananapi M64 link:
http://www.banana-pi.org/m64.html
Wiki link:
https://openedev.amarulasolutions.com/display/ODWIKI/Bananapi+M64
This configuration uses U-Boot mainline and kernel mainline.
How to build
============
$ make bananapi_m64_defconfig
$ make
Note: you will need access to the internet to download the required
sources.
How to write the SD card
========================
Once the build process is finished you will have an image called "sdcard.img"
in the output/images/ directory.
Copy the bootable "sdcard.img" onto an SD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
$ sudo sync
Insert the micro SDcard in your Bananapi M64 and power it up. The console
is on the serial line, 115200 8N1.

View File

@@ -1,26 +0,0 @@
image boot.vfat {
vfat {
files = {
"MLO",
"u-boot.img"
}
}
size = 4M
}
image sdcard.img {
hdimage {
}
partition u-boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

View File

@@ -1,15 +0,0 @@
#!/bin/sh
BOARD_DIR="$(dirname $0)"
GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
rm -rf "${GENIMAGE_TMP}"
genimage \
--rootpath "${TARGET_DIR}" \
--tmppath "${GENIMAGE_TMP}" \
--inputpath "${BINARIES_DIR}" \
--outputpath "${BINARIES_DIR}" \
--config "${GENIMAGE_CFG}"

View File

@@ -1,49 +0,0 @@
BeagleBoard X15
Intro
=====
This config currently supports the beagleboard x15,
and generates a barebone image.
The image must be flashed to a SD card to be used.
How to build it
===============
$ make beagleboardx15_defconfig
Then you can edit the build options using
$ make menuconfig
Compile all and build a sdcard image:
$ make
Result of the build
-------------------
After building, you should get a tree like this:
output/images/
├── am57xx-beagle-x15.dtb
├── am57xx-beagle-x15-revb1.dtb
├── boot.vfat
├── MLO
├── rootfs.ext2
├── rootfs.ext4
├── rootfs.tar
├── sdcard.img
├── u-boot.img
├── u-boot-spl.bin
└── zImage
How to write the microSD card
=============================
Once the build process is finished you will have an image called "sdcard.img"
in the output/images/ directory.
Copy the bootable "sdcard.img" onto an SD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX

View File

@@ -5,11 +5,8 @@ image boot.vfat {
"u-boot.img",
"zImage",
"uEnv.txt",
"am335x-evm.dtb",
"am335x-evmsk.dtb",
"am335x-bone.dtb",
"am335x-boneblack.dtb",
"am335x-bonegreen.dtb",
"am335x-boneblack.dtb"
}
}
size = 16M

View File

@@ -1,32 +0,0 @@
image boot.vfat {
vfat {
files = {
"MLO",
"u-boot.img",
"zImage",
"uEnv.txt",
"am335x-evm.dtb",
"am335x-evmsk.dtb",
"am335x-bone.dtb",
"am335x-boneblack.dtb",
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition u-boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

View File

@@ -0,0 +1,251 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP_RESET_CLOCKS=y
CONFIG_OMAP_MUX_DEBUG=y
CONFIG_ARCH_OMAP3=y
CONFIG_ARCH_OMAP4=y
CONFIG_SOC_AM43XX=y
# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
# CONFIG_SOC_TI81XX is not set
# CONFIG_MACH_OMAP3_BEAGLE is not set
# CONFIG_MACH_DEVKIT8000 is not set
# CONFIG_MACH_OMAP_LDP is not set
# CONFIG_MACH_OMAP3530_LV_SOM is not set
# CONFIG_MACH_OMAP3_TORPEDO is not set
# CONFIG_MACH_OVERO is not set
# CONFIG_MACH_OMAP3EVM is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
# CONFIG_MACH_TOUCHBOOK is not set
# CONFIG_MACH_OMAP_3430SDP is not set
# CONFIG_MACH_NOKIA_RM680 is not set
# CONFIG_MACH_NOKIA_RX51 is not set
# CONFIG_MACH_OMAP_ZOOM2 is not set
# CONFIG_MACH_OMAP_ZOOM3 is not set
# CONFIG_MACH_CM_T35 is not set
# CONFIG_MACH_CM_T3517 is not set
# CONFIG_MACH_IGEP0020 is not set
# CONFIG_MACH_IGEP0030 is not set
# CONFIG_MACH_SBC3530 is not set
# CONFIG_MACH_OMAP_3630SDP is not set
CONFIG_ARM_THUMBEE=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_GENERIC_CPUFREQ_CPU0=y
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
CONFIG_FPE_NWFPE=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_BINFMT_MISC=y
CONFIG_PM_RUNTIME=y
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_OMAP_OCP2SCP=y
CONFIG_CONNECTOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=16384
CONFIG_CROSSBAR=y
CONFIG_EEPROM_93CX6=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_MD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_TI_CPSW=y
CONFIG_TI_CPTS=y
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_AT803X_PHY=y
CONFIG_SMSC_PHY=y
# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_OMAP=y
CONFIG_SERIAL_OMAP_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_OMAP=y
CONFIG_SPI=y
CONFIG_SPI_OMAP24XX=y
CONFIG_SPI_TI_QSPI=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_W1=y
CONFIG_POWER_SUPPLY=y
CONFIG_THERMAL=y
CONFIG_THERMAL_GOV_FAIR_SHARE=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_CPU_THERMAL=y
CONFIG_TI_SOC_THERMAL=y
CONFIG_TI_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_OMAP_WATCHDOG=y
CONFIG_MFD_SYSCON=y
CONFIG_MFD_TPS65217=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_PBIAS=y
CONFIG_REGULATOR_TPS65023=y
CONFIG_REGULATOR_TPS6507X=y
CONFIG_REGULATOR_TPS65217=y
CONFIG_REGULATOR_TIAVSCLASS0=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_DA8XX=y
CONFIG_FB_DA8XX_TDA998X=y
CONFIG_OMAP2_DSS=y
CONFIG_OMAP2_DSS_SDI=y
CONFIG_OMAP2_DSS_DSI=y
CONFIG_FB_OMAP2=y
CONFIG_DISPLAY_CONNECTOR_HDMI=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_HDRC=m
CONFIG_USB_MUSB_OMAP2PLUS=m
CONFIG_USB_MUSB_DSPS=m
CONFIG_USB_TI_CPPI41_DMA=y
CONFIG_USB_STORAGE=y
CONFIG_AM335X_PHY_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_ETH_EEM=y
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_MMC=y
CONFIG_MMC_UNSAFE_RESUME=y
CONFIG_SDIO_UART=y
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_OMAP=y
CONFIG_DMADEVICES=y
CONFIG_TI_EDMA=y
CONFIG_DMA_OMAP=y
CONFIG_TI_CPPI41=y
CONFIG_COMMON_CLK_DEBUG=y
CONFIG_OMAP_USB2=y
CONFIG_OMAP_PIPE3=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_EXT4_FS=y
CONFIG_QUOTA=y
CONFIG_QFMT_V2=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
CONFIG_PROVE_LOCKING=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
CONFIG_AVERAGE=y

View File

@@ -1,12 +0,0 @@
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
CONFIG_OMAP2_DSS_INIT=y
CONFIG_OMAP_DSS_BASE=y
CONFIG_OMAP2_DSS=y
CONFIG_OMAP2_DSS_DPI=y
CONFIG_DRM_OMAP=y
CONFIG_DRM_OMAP_NUM_CRTCS=2
CONFIG_DRM_OMAP_WB_M2M=y
CONFIG_DRM_TILCDC=y
CONFIG_DRM_I2C_NXP_TDA998X=y
CONFIG_DRM=y

View File

@@ -1,16 +0,0 @@
This patch keeps the debugSS clock alive, it clocks the JTAG macro and enables
access to the SoC via JTAG after the kernel booted.
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
diff -Naur linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
--- linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c 2015-10-02 17:30:56.000000000 +0200
+++ linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c 2016-08-15 11:28:55.017617612 +0200
@@ -208,6 +208,7 @@
.name = "debugss",
.class = &am33xx_debugss_hwmod_class,
.clkdm_name = "l3_aon_clkdm",
+ .flags = (HWMOD_INIT_NO_IDLE|HWMOD_INIT_NO_RESET), /* keep debugSS clock alive for JTAG */
.main_clk = "trace_clk_div_ck",
.prcm = {
.omap4 = {

View File

@@ -0,0 +1,34 @@
From 29885f2f3d700341d322274db6ad085e601c0994 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <panto@antoniou-consulting.com>
Date: Fri, 4 Jan 2013 00:32:33 +0200
Subject: [PATCH 3/3] arm: Export cache flush management symbols when
!MULTI_CACHE
When compiling a kernel without CONFIG_MULTI_CACHE enabled the
dma access functions end up not being exported. Fix it.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
---
arch/arm/kernel/setup.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index da1d1aa..dcb678c 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -923,3 +923,12 @@ const struct seq_operations cpuinfo_op = {
.stop = c_stop,
.show = c_show
};
+
+/* export the cache management functions */
+#ifndef MULTI_CACHE
+
+EXPORT_SYMBOL(__glue(_CACHE,_dma_map_area));
+EXPORT_SYMBOL(__glue(_CACHE,_dma_unmap_area));
+EXPORT_SYMBOL(__glue(_CACHE,_dma_flush_range));
+
+#endif
--
1.7.10.4

View File

@@ -1,22 +1,13 @@
#!/bin/sh
# post-image.sh for CircuitCo BeagleBone and TI am335x-evm
# post-image.sh for BeagleBone
# 2014, Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
# 2016, Lothar Felten <lothar.felten@gmail.com>
BOARD_DIR="$(dirname $0)"
# copy the uEnv.txt to the output/images directory
cp board/beaglebone/uEnv.txt $BINARIES_DIR/uEnv.txt
# the 4.1 kernel does not provide a dtb for beaglebone green, so we
# use a different genimage config if am335x-bonegreen.dtb is not
# built:
if [ -e ${BINARIES_DIR}/am335x-bonegreen.dtb ] ; then
GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
else
GENIMAGE_CFG="${BOARD_DIR}/genimage_linux41.cfg"
fi
GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
rm -rf "${GENIMAGE_TMP}"

View File

@@ -1,52 +1,44 @@
CircuitCo BeagleBone
Texas Instuments AM335x Evaluation Module (TMDXEVM3358)
BeagleBone
Description
===========
This configuration will build a complete image for the beaglebone and
the TI AM335x-EVM, the board type is identified by the on-board
EEPROM. The configuration is based on the
ti-processor-sdk-02.00.00.00. Device tree blobs for beaglebone
variants and the evm-sk are built too.
For Qt5 support support use the beaglebone_qt5_defconfig.
Intro
=====
To be able to use BeagleBone board with the images generated by
Buildroot, you have to prepare the SDCard.
How to build it
===============
Select the default configuration for the target:
$ make beaglebone_defconfig
$ make beaglebone_defconfig
Optional: modify the configuration:
$ make menuconfig
Then you can edit the build options using
Build:
$ make
$ make menuconfig
Compile all and build rootfs image:
$ make
Result of the build
===================
output/images/
├── am335x-boneblack.dtb
├── am335x-bone.dtb
├── am335x-evm.dtb
├── am335x-evmsk.dtb
├── boot.vfat
├── MLO
├── rootfs.ext2
├── rootfs.tar
├── sdcard.img
├── u-boot.img
├── uEnv.txt
└── zImage
-------------------
To copy the image file to the sdcard use dd:
$ dd if=output/images/sdcard.img of=/dev/XXX
After building, you should get a tree like this:
Tested hardware
===============
am335x-evm (rev. 1.1A)
beagleboneblack (rev. A5A)
beaglebone (rev. A6)
output/images/
├── am335x-boneblack.dtb
├── am335x-bone.dtb
├── MLO
├── rootfs.ext2
├── sdcard.img
├── u-boot.img
├── uEnv.txt
└── zImage
2016, Lothar Felten <lothar.felten@gmail.com>
How to write the microSD card
=============================
Once the build process is finished you will have an image called "sdcard.img"
in the output/images/ directory.
Copy the bootable "sdcard.img" onto an SD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX

View File

@@ -1,4 +1,3 @@
bootpart=0:1
bootdir=
bootargs=console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
uenvcmd=run loadimage;run loadfdt;printenv bootargs;bootz ${loadaddr} - ${fdtaddr};
uenvcmd=run loadimage;run loadramdisk;run findfdt;run loadfdt;run ramboot

View File

@@ -92,12 +92,14 @@ fi
setenv bootargs "${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc"
bpart=1
if test "sata" = "${dtype}" ; then
setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
setenv bootargs "${bootargs} root=/dev/sda${bpart}" ;
elif test "usb" = "${dtype}" ; then
setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
setenv bootargs "${bootargs} root=/dev/sda${bpart}" ;
else
setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bootpart}"
setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bpart}"
fi
if itest.s "x" != "x${disable_giga}" ; then
@@ -106,7 +108,6 @@ fi
if itest.s "x" != "x${wlmac}" ; then
setenv bootargs ${bootargs} wlcore.mac=${wlmac}
setenv bootargs ${bootargs} wlan.mac=${wlmac}
fi
if itest.s "x" != "x${gpumem}" ; then

View File

@@ -1,155 +0,0 @@
setenv bootargs ''
setenv initrd_high 0xffffffff
m4=''
a_base=0x10000000
if itest.s x51 == "x${imx_cpu}" ; then
a_base=0x90000000
elif itest.s x53 == "x${imx_cpu}"; then
a_base=0x70000000
elif itest.s x6SX == "x${imx_cpu}" || itest.s x7D == "x${imx_cpu}"; then
a_base=0x80000000
if itest.s "x1" == "x$m4enabled" ; then
run m4boot;
m4='-m4';
fi
fi
setexpr a_script ${a_base} + 0x00800000
setexpr a_zImage ${a_base} + 0x00800000
setexpr a_fdt ${a_base} + 0x03000000
setexpr a_ramdisk ${a_base} + 0x03800000
setexpr a_initrd ${a_base} + 0x03a00000
setexpr a_reset_cause_marker ${a_base} + 0x80
setexpr a_reset_cause ${a_base} + 0x84
if itest.s "x" == "x${board}" ; then
echo "!!!! Error: Your u-boot is outdated. Please upgrade.";
exit;
fi
if itest.s "x" == "x${fdt_file}" ; then
if itest.s x6SOLO == "x${imx_cpu}" ; then
fdt_file=imx6dl-${board}.dtb;
elif itest.s x6DL == "x${imx_cpu}" ; then
fdt_file=imx6dl-${board}.dtb;
elif itest.s x6QP == "x${imx_cpu}" ; then
fdt_file=imx6qp-${board}.dtb;
elif itest.s x6SX == "x${imx_cpu}" ; then
fdt_file=imx6sx-${board}${m4}.dtb;
elif itest.s x7D == "x${imx_cpu}" ; then
fdt_file=imx7d-${board}${m4}.dtb;
elif itest.s x51 == "x${imx_cpu}" ; then
fdt_file=imx51-${board}${m4}.dtb;
elif itest.s x53 == "x${imx_cpu}" ; then
fdt_file=imx53-${board}${m4}.dtb;
else
fdt_file=imx6q-${board}.dtb;
fi
fi
if itest.s x${distro_bootpart} == x ; then
distro_bootpart=1
fi
if load ${devtype} ${devnum}:${distro_bootpart} ${a_script} uEnv.txt ; then
env import -t ${a_script} ${filesize}
fi
setenv bootargs ${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc cpu=${imx_cpu} board=${board}
if load ${devtype} ${devnum}:${distro_bootpart} ${a_fdt} ${prefix}${fdt_file} ; then
fdt addr ${a_fdt}
setenv fdt_high 0xffffffff
else
echo "!!!! Error loading ${prefix}${fdt_file}";
exit;
fi
cmd_xxx_present=
fdt resize
if itest.s "x" != "x${cmd_custom}" ; then
run cmd_custom
cmd_xxx_present=1;
fi
if itest.s "x" != "x${cmd_hdmi}" ; then
run cmd_hdmi
cmd_xxx_present=1;
if itest.s x == x${allow_noncea} ; then
setenv bootargs ${bootargs} mxc_hdmi.only_cea=1;
echo "only CEA modes allowed on HDMI port";
else
setenv bootargs ${bootargs} mxc_hdmi.only_cea=0;
echo "non-CEA modes allowed on HDMI, audio may be affected";
fi
fi
if itest.s "x" != "x${cmd_lcd}" ; then
run cmd_lcd
cmd_xxx_present=1;
fi
if itest.s "x" != "x${cmd_lcd2}" ; then
run cmd_lcd2
cmd_xxx_present=1;
fi
if itest.s "x" != "x${cmd_lvds}" ; then
run cmd_lvds
cmd_xxx_present=1;
fi
if itest.s "x" != "x${cmd_lvds2}" ; then
run cmd_lvds2
cmd_xxx_present=1;
fi
if itest.s "x" == "x${cmd_xxx_present}" ; then
echo "!!!!!!!!!!!!!!!!"
echo "warning: your u-boot may be outdated, please upgrade"
echo "!!!!!!!!!!!!!!!!"
fi
if test "sata" = "${devtype}" ; then
setenv bootargs "${bootargs} root=/dev/sda${distro_bootpart}" ;
elif test "usb" = "${devtype}" ; then
setenv bootargs "${bootargs} root=/dev/sda${distro_bootpart}" ;
else
setenv bootargs "${bootargs} root=/dev/mmcblk${devnum}p${distro_bootpart}"
fi
if itest.s "x" != "x${disable_msi}" ; then
setenv bootargs ${bootargs} pci=nomsi
fi;
if itest.s "x" != "x${disable_giga}" ; then
setenv bootargs ${bootargs} fec.disable_giga=1
fi
if itest.s "x" != "x${wlmac}" ; then
setenv bootargs ${bootargs} wlcore.mac=${wlmac}
setenv bootargs ${bootargs} wlan.mac=${wlmac}
fi
if itest.s "x" != "x${gpumem}" ; then
setenv bootargs ${bootargs} galcore.contiguousSize=${gpumem}
fi
if itest.s "x" != "x${cma}" ; then
setenv bootargs ${bootargs} cma=${cma}
fi
if itest.s "x" != "x${loglevel}" ; then
setenv bootargs ${bootargs} loglevel=${loglevel}
fi
if itest.s "x" != "x${show_fdt}" ; then
fdt print /
fi
if itest.s "x" != "x${show_env}" ; then
printenv
fi
if load ${devtype} ${devnum}:${distro_bootpart} ${a_zImage} ${prefix}zImage ; then
bootz ${a_zImage} - ${a_fdt}
fi
echo "Error loading kernel image"

View File

@@ -1,15 +1,13 @@
# Minimal SD card image for Boundary Devices platforms
#
# It does not need a boot section for a bootloader since it is booted
# from its NOR flash memory.
#
# To update the bootloader, execute the following from U-Boot prompt:
# => run upgradeu
image sdcard.img {
hdimage {
}
partition u-boot {
in-partition-table = "no"
image = "u-boot.imx"
offset = 1024
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"

View File

@@ -7,19 +7,14 @@
BOARD_DIR="$(dirname $0)"
# bd u-boot looks for standard bootscript
install -m 0644 -D $BINARIES_DIR/boot.scr $TARGET_DIR/boot/
# legacy 6x_bootscript script
$HOST_DIR/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
# bd u-boot looks for bootscript here
$HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
-n "boot script" -d $BOARD_DIR/6x_bootscript.txt $TARGET_DIR/6x_bootscript
# u-boot / update script for bd upgradeu command
if [ -e $BINARIES_DIR/u-boot.imx ];
then
install -D -m 0644 $BINARIES_DIR/u-boot.imx $TARGET_DIR/u-boot.imx
$HOST_DIR/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
-n "upgrade script" -d $BOARD_DIR/upgrade.cmd $TARGET_DIR/upgrade.scr
# legacy 6x_upgrade script
$HOST_DIR/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
$HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
-n "upgrade script" -d $BOARD_DIR/6x_upgrade.txt $TARGET_DIR/6x_upgrade
fi

View File

@@ -1,154 +0,0 @@
if itest.s a$uboot_defconfig == a; then
echo "Please set uboot_defconfig to the appropriate value"
exit
fi
offset=0x400
erase_size=0xC0000
qspi_offset=0x0
a_base=0x12000000
if itest.s x51 == "x${imx_cpu}"; then
a_base=0x92000000
elif itest.s x53 == "x${imx_cpu}"; then
a_base=0x72000000
elif itest.s x6SX == "x${imx_cpu}" || itest.s x7D == "x${imx_cpu}"; then
a_base=0x82000000
fi
qspi_match=1
setexpr a_qspi1 ${a_base}
setexpr a_qspi2 ${a_qspi1} + 0x400000
setexpr a_uImage1 ${a_qspi1} + 0x400
setexpr a_uImage2 ${a_qspi2} + 0x400
setexpr a_script ${a_base}
setenv stdout serial,vga
if sf probe || sf probe || sf probe 1 27000000 || sf probe 1 27000000 ; then
echo "probed SPI ROM" ;
else
echo "Error initializing EEPROM"
exit
fi
if itest.s x7D == "x${imx_cpu}"; then
echo "check qspi parameter block" ;
if ${fs}load ${devtype} ${devnum}:1 ${a_qspi1} qspi-${sfname}.${uboot_defconfig} ; then
else
echo "parameter file qspi-${sfname}.${uboot_defconfig} not found on SD card"
exit
fi
if itest ${filesize} != 0x200 ; then
echo "------- qspi-${sfname}.${uboot_defconfig} 0x${filesize} != 0x200 bytes" ;
exit
fi
setexpr a_marker ${a_qspi1} + 0x1fc
if itest *${a_marker} != c0ffee01 ; then
echo "------- qspi-${sfname}.${uboot_defconfig} c0ffee01 marker missing" ;
exit
fi
if sf read ${a_qspi2} ${qspi_offset} 0x200 ; then
else
echo "Error reading qspi parameter from EEPROM"
exit
fi
if cmp.b ${a_qspi1} ${a_qspi2} 0x200 ; then
echo "------- qspi parameters match"
else
echo "------- qspi parameters mismatch"
qspi_match=0
fi
fi
echo "check U-Boot" ;
if ${fs}load ${devtype} ${devnum}:1 ${a_uImage1} u-boot.$uboot_defconfig ; then
else
echo "File u-boot.$uboot_defconfig not found on SD card" ;
exit
fi
echo "read $filesize bytes from SD card" ;
if sf read ${a_uImage2} $offset $filesize ; then
else
echo "Error reading boot loader from EEPROM" ;
exit
fi
if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
echo "------- U-Boot versions match" ;
if itest.s "${qspi_match}" == "1" ; then
echo "------- upgrade not needed" ;
if itest.s "x" != "x${next}" ; then
if ${fs}load ${devtype} ${devnum}:1 ${a_script} ${next} ; then
source ${a_script}
else
echo "${next} not found on SD card"
fi
fi
exit
fi
erase_size=0x1000
if itest.s xMX25L6405D == "x${sfname}"; then
erase_size=0x10000
fi
setexpr filesize ${erase_size} - ${offset}
fi
echo "Need U-Boot upgrade" ;
echo "Program in 5 seconds" ;
for n in 5 4 3 2 1 ; do
echo $n ;
sleep 1 ;
done
echo "erasing" ;
sf erase 0 ${erase_size} ;
# two steps to prevent bricking
echo "programming" ;
setexpr a1 ${a_uImage1} + 0x400
setexpr o1 ${offset} + 0x400
setexpr s1 ${filesize} - 0x400
sf write ${a1} ${o1} ${s1} ;
sf write ${a_uImage1} $offset 0x400 ;
if itest.s x7D == "x${imx_cpu}"; then
sf write ${a_qspi1} ${qspi_offset} 0x200
fi
echo "verifying" ;
if sf read ${a_uImage2} $offset $filesize ; then
else
echo "Error re-reading EEPROM" ;
exit
fi
if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
else
echo "Read verification error" ;
exit
fi
if itest.s x7D == "x${imx_cpu}"; then
if sf read ${a_qspi2} ${qspi_offset} 0x200 ; then
else
echo "Error re-reading qspi" ;
exit
fi
if cmp.b ${a_qspi1} ${a_qspi2} 0x200 ; then
else
echo "qspi parameter block verification error" ;
exit
fi
fi
if itest.s "x" != "x${next}" ; then
if ${fs}load ${devtype} ${devnum}:1 ${a_script} ${next} ; then
source ${a_script}
else
echo "${next} not found on ${devtype} ${devnum}"
fi
fi
while echo "---- U-Boot upgraded. reset" ; do
sleep 120
done

View File

@@ -0,0 +1,111 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9260=y
CONFIG_MACH_QIL_A9260=y
CONFIG_AT91_SLOW_CLOCK=y
CONFIG_AT91_EARLY_USART0=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=64M console=ttyS1,115200"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_MMC=y
CONFIG_MMC_AT91=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_M41T94=y
CONFIG_EXT2_FS=y
CONFIG_FUSE_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_XATTR=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

View File

@@ -0,0 +1,603 @@
From a3e08beea8bf5e96e1237eef4a82f4a2fdd5286b Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Thu, 19 Jul 2012 14:19:59 +0200
Subject: [PATCH] Add support for the Calao-systems QIL-A9260
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
board/qil_a9260/nandflash/Makefile | 122 ++++++++++++++
board/qil_a9260/nandflash/qil-a9260.h | 109 ++++++++++++
board/qil_a9260/qil_a9260.c | 298 +++++++++++++++++++++++++++++++++
crt0_gnu.S | 7 +
include/part.h | 6 +-
5 files changed, 541 insertions(+), 1 deletions(-)
create mode 100644 board/qil_a9260/nandflash/Makefile
create mode 100644 board/qil_a9260/nandflash/qil-a9260.h
create mode 100644 board/qil_a9260/qil_a9260.c
diff --git a/board/qil_a9260/nandflash/Makefile b/board/qil_a9260/nandflash/Makefile
new file mode 100644
index 0000000..209a25f
--- /dev/null
+++ b/board/qil_a9260/nandflash/Makefile
@@ -0,0 +1,122 @@
+# TODO: set this appropriately for your local toolchain
+ifndef ERASE_FCT
+ERASE_FCT=rm -f
+endif
+ifndef CROSS_COMPILE
+CROSS_COMPILE=arm-elf-
+endif
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# NandFlashBoot Configuration for QIL-A9260
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9260
+# Board name (case sensitive!!!)
+BOARD=qil_a9260
+# Link Address and Top_of_Memory
+LINK_ADDR=0x200000
+TOP_OF_MEMORY=0x301000
+# Name of current directory
+PROJECT=nandflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ nandflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ $(ERASE_FCT) *.o *.bin *.elf *.map
diff --git a/board/qil_a9260/nandflash/qil-a9260.h b/board/qil_a9260/nandflash/qil-a9260.h
new file mode 100644
index 0000000..c87002e
--- /dev/null
+++ b/board/qil_a9260/nandflash/qil-a9260.h
@@ -0,0 +1,109 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : qil-a9260.h
+ * Object :
+ * Creation : GH July 19th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _QIL_A9260_H
+#define _QIL_A9260_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (180000000/2)
+#define PLL_LOCK_TIMEOUT 1000000
+
+#define PLLA_SETTINGS 0x20593F06
+#define PLLB_SETTINGS 0x10483F0E
+
+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* NandFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SMARTMEDIA_BASE 0x40000000
+
+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
+
+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
+
+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
+
+
+/* ******************************************************************** */
+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
+/* Please refer to SMC section in AT91SAM datasheet to learn how */
+/* to generate these values. */
+/* ******************************************************************** */
+#define AT91C_SM_NWE_SETUP (1 << 0)
+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
+#define AT91C_SM_NRD_SETUP (1 << 16)
+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
+
+#define AT91C_SM_NWE_PULSE (3 << 0)
+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
+#define AT91C_SM_NRD_PULSE (3 << 16)
+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
+
+#define AT91C_SM_NWE_CYCLE (5 << 0)
+#define AT91C_SM_NRD_CYCLE (5 << 16)
+#define AT91C_SM_TDF (2 << 16)
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
+
+#define MACH_TYPE 0x6AF /* QIL-A9260 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#undef CFG_DEBUG
+#undef CFG_DATAFLASH
+
+#define CFG_NANDFLASH
+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
+
+#define CFG_HW_INIT
+#define CFG_SDRAM
+
+#endif /* _QIL_A9260_H */
diff --git a/board/qil_a9260/qil_a9260.c b/board/qil_a9260/qil_a9260.c
new file mode 100644
index 0000000..ae122e7
--- /dev/null
+++ b/board/qil_a9260/qil_a9260.c
@@ -0,0 +1,298 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaiimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : qil_a9260.c
+ * Object :
+ * Creation : GH July 19th 2012
+ *-----------------------------------------------------------------------------
+ */
+#include "../../include/part.h"
+#include "../../include/gpio.h"
+#include "../../include/pmc.h"
+#include "../../include/debug.h"
+#include "../../include/sdramc.h"
+#include "../../include/main.h"
+#ifdef CFG_NANDFLASH
+#include "../../include/nandflash.h"
+#endif
+#ifdef CFG_DATAFLASH
+#include "../../include/dataflash.h"
+#endif
+
+static inline unsigned int get_cp15(void)
+{
+ unsigned int value;
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
+ return value;
+}
+
+static inline void set_cp15(unsigned int value)
+{
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
+}
+
+#ifdef CFG_HW_INIT
+/*----------------------------------------------------------------------------*/
+/* \fn hw_init */
+/* \brief This function performs very low level HW initialization */
+/* This function is invoked as soon as possible during the c_startup */
+/* The bss segment must be initialized */
+/*----------------------------------------------------------------------------*/
+void hw_init(void)
+{
+ unsigned int cp15;
+
+ /* Configure PIOs */
+ const struct pio_desc hw_pio[] = {
+#ifdef CFG_DEBUG
+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Disable watchdog */
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
+
+ /* At this stage the main oscillator is supposed to be enabled
+ * PCK = MCK = MOSC */
+
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* PCK = PLLA = 2 * MCK */
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
+ /* Switch MCK on PLLA output */
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure PLLB */
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure CP15 */
+ cp15 = get_cp15();
+ cp15 |= I_CACHE;
+ set_cp15(cp15);
+
+ /* Configure the PIO controller */
+ pio_setup(hw_pio);
+
+ /* Configure the EBI Slave Slot Cycle to 64 */
+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
+
+#ifdef CFG_DEBUG
+ /* Enable Debug messages on the DBGU */
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
+
+ dbg_print("Start AT91Bootstrap...\n\r");
+#endif /* CFG_DEBUG */
+
+#ifdef CFG_SDRAM
+ /* Initialize the matrix */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SDRAM Controller */
+ sdram_init( AT91C_SDRAMC_NC_9 |
+ AT91C_SDRAMC_NR_13 |
+ AT91C_SDRAMC_CAS_2 |
+ AT91C_SDRAMC_NB_4_BANKS |
+ AT91C_SDRAMC_DBW_32_BITS |
+ AT91C_SDRAMC_TWR_2 |
+ AT91C_SDRAMC_TRC_7 |
+ AT91C_SDRAMC_TRP_2 |
+ AT91C_SDRAMC_TRCD_2 |
+ AT91C_SDRAMC_TRAS_5 |
+ AT91C_SDRAMC_TXSR_8, /* Control Register */
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
+
+
+#endif /* CFG_SDRAM */
+}
+#endif /* CFG_HW_INIT */
+
+#ifdef CFG_SDRAM
+/*------------------------------------------------------------------------------*/
+/* \fn sdramc_hw_init */
+/* \brief This function performs SDRAMC HW initialization */
+/*------------------------------------------------------------------------------*/
+void sdramc_hw_init(void)
+{
+ /* Configure PIOs */
+/* const struct pio_desc sdramc_pio[] = {
+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+*/
+ /* Configure the SDRAMC PIO controller to output PCK0 */
+/* pio_setup(sdramc_pio); */
+
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
+
+}
+#endif /* CFG_SDRAM */
+
+#ifdef CFG_DATAFLASH
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_recovery */
+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+void df_recovery(AT91PS_DF pDf)
+{
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USR PB is pressed during Boot sequence */
+ /* Erase DataFlash Page 0*/
+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
+ df_page_erase(pDf, 0);
+#endif
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_hw_init */
+/* \brief This function performs DataFlash HW initialization */
+/*------------------------------------------------------------------------------*/
+void df_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc df_pio[] = {
+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ pio_setup(df_pio);
+}
+#endif /* CFG_DATAFLASH */
+
+
+
+#ifdef CFG_NANDFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn nand_recovery */
+/* \brief This function erases NandFlash Block 0 if USR PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+static void nand_recovery(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USR PB is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if (!pio_get_value(AT91C_PIN_PB(10)) )
+ AT91F_NandEraseBlock0();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_hw_init */
+/* \brief NandFlash HW init */
+/*------------------------------------------------------------------------------*/
+void nandflash_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc nand_pio[] = {
+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SMC CS3 */
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(nand_pio);
+
+ nand_recovery();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_16bits_dbw_init */
+/* \brief Configure SMC in 16 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_16bits_dbw_init(void)
+{
+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_8bits_dbw_init */
+/* \brief Configure SMC in 8 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_8bits_dbw_init(void)
+{
+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+
+#endif /* #ifdef CFG_NANDFLASH */
diff --git a/crt0_gnu.S b/crt0_gnu.S
index 042b617..002feef 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -106,6 +106,13 @@ _relocate_to_sram:
#endif /* CFG_NORFLASH */
_setup_clocks:
+/* Test if main osc is bypassed */
+ ldr r0,=AT91C_PMC_MOR
+ ldr r1, [r0]
+ ldr r2,=AT91C_CKGR_OSCBYPASS
+ ands r1, r1, r2
+ bne _init_data /* branch if OSCBYPASS=1 */
+
/* Test if main oscillator is enabled */
ldr r0,=AT91C_PMC_SR
ldr r1, [r0]
diff --git a/include/part.h b/include/part.h
index ba5985a..bbd33fe 100644
--- a/include/part.h
+++ b/include/part.h
@@ -35,7 +35,11 @@
#ifdef AT91SAM9260
#include "AT91SAM9260_inc.h"
-#include "at91sam9260ek.h"
+ #ifdef at91sam9260ek
+ #include "at91sam9260ek.h"
+ #elif qil_a9260
+ #include "qil-a9260.h"
+ #endif
#endif
#ifdef AT91SAM9XE
--
1.5.6.3

View File

@@ -0,0 +1,36 @@
From d076aa6182dc6df6bb311e60bbddb03573b9483b Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Fri, 3 Aug 2012 11:25:49 +0200
Subject: [PATCH] Enable pull-up on Rx serial ports for the CALAO MB-QIL-A9260
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boards/qil-a9260/init.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boards/qil-a9260/init.c b/arch/arm/boards/qil-a9260/init.c
index 305d733..b43cace 100644
--- a/arch/arm/boards/qil-a9260/init.c
+++ b/arch/arm/boards/qil-a9260/init.c
@@ -196,11 +196,17 @@ device_initcall(qil_a9260_devices_init);
static int qil_a9260_console_init(void)
{
at91_register_uart(0, 0);
+ at91_set_A_periph(AT91_PIN_PB14, 1); /* Enable pull-up on DRXD */
+
at91_register_uart(1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
+
at91_register_uart(2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+ at91_set_A_periph(AT91_PIN_PB7, 1); /* Enable pull-up on RXD1 */
+
at91_register_uart(3, ATMEL_UART_CTS | ATMEL_UART_RTS);
+ at91_set_A_periph(AT91_PIN_PB9, 1); /* Enable pull-up on RXD2 */
return 0;
}
--
1.5.6.3

View File

@@ -0,0 +1,27 @@
From fe6432a9728b62bce3db73c5a4efe026018fd495 Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Fri, 3 Aug 2012 16:45:37 +0200
Subject: [PATCH] QIL-A9260: rtc modalias m41t48 renamed to rtc-m41t48
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/mach-at91/board-qil-a9260.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index bf351e2..c0df05c 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -78,7 +78,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
static struct spi_board_info ek_spi_devices[] = {
#if defined(CONFIG_RTC_DRV_M41T94)
{ /* M41T94 RTC */
- .modalias = "m41t94",
+ .modalias = "rtc-m41t94",
.chip_select = 0,
.max_speed_hz = 1 * 1000 * 1000,
.bus_num = 0,
--
1.5.6.3

View File

@@ -0,0 +1,551 @@
From 53bd82b122f4530a98cba45795832820bb1d0b45 Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Mon, 13 Aug 2012 11:26:10 +0200
Subject: [PATCH] Add support for the Calao-systems TNY-A9G20-LPW
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
board/tny_a9g20_lpw/nandflash/Makefile | 121 ++++++++++++
board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h | 114 ++++++++++++
board/tny_a9g20_lpw/tny_a9g20_lpw.c | 243 +++++++++++++++++++++++++
crt0_gnu.S | 6 +
include/part.h | 6 +-
5 files changed, 489 insertions(+), 1 deletion(-)
create mode 100644 board/tny_a9g20_lpw/nandflash/Makefile
create mode 100644 board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
create mode 100644 board/tny_a9g20_lpw/tny_a9g20_lpw.c
diff --git a/board/tny_a9g20_lpw/nandflash/Makefile b/board/tny_a9g20_lpw/nandflash/Makefile
new file mode 100644
index 0000000..7efbea7
--- /dev/null
+++ b/board/tny_a9g20_lpw/nandflash/Makefile
@@ -0,0 +1,121 @@
+# TODO: set this appropriately for your local toolchain
+ifndef ERASE_FCT
+ERASE_FCT=rm -f
+endif
+ifndef CROSS_COMPILE
+CROSS_COMPILE=arm-elf-
+endif
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# NandFlashBoot Configuration for AT91SAM9260EK
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9G20
+# Board name (case sensitive!!!)
+BOARD=tny_a9g20_lpw
+# Link Address and Top_of_Memory
+LINK_ADDR=0x200000
+TOP_OF_MEMORY=0x301000
+# Name of current directory
+PROJECT=nandflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ nandflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ $(ERASE_FCT) *.o *.bin *.elf *.map
diff --git a/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
new file mode 100644
index 0000000..b1f8a1d
--- /dev/null
+++ b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
@@ -0,0 +1,114 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : tny-a9g20-lpw.h
+ * Object :
+ * Creation : GH August 13th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _TNY_A9G20_LPW_H
+#define _TNY_A9G20_LPW_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (100000000)
+#define PLL_LOCK_TIMEOUT 1000000
+
+/* set PLLA to 800Mhz from MAINCK= 12Mhz MULA=199 (0xC7+1= 200), DIVA=0x03 (Fplla=12Mhz x [(199+1)/3]=800Mhz) */
+#define PLLA_SETTINGS 0x20C73F03
+#define PLLB_SETTINGS 0x100F3F02
+
+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
+/* LP-SDRAM (fmax=100Mhz) PDIV=0 => PRESCALER CLK=PCLK; */
+/* MDIV = 2 => PRESCALER CLK / 4 = MCLK=100Mhz */
+/* PRESCALER CLK = PLLA (800Mhz) / 2 (PRES=1) = 400Mhz */
+#define MCKR_SETTINGS 0x0204
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* NandFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SMARTMEDIA_BASE 0x40000000
+
+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
+
+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
+
+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
+
+
+/* ******************************************************************** */
+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 100000000.*/
+/* Please refer to SMC section in AT91SAM9 datasheet to learn how */
+/* to generate these values. */
+/* ******************************************************************** */
+#define AT91C_SM_NWE_SETUP (1 << 0)
+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
+#define AT91C_SM_NRD_SETUP (1 << 16)
+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
+
+#define AT91C_SM_NWE_PULSE (3 << 0)
+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
+#define AT91C_SM_NRD_PULSE (3 << 16)
+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
+
+#define AT91C_SM_NWE_CYCLE (5 << 0)
+#define AT91C_SM_NRD_CYCLE (5 << 16)
+
+#define AT91C_SM_TDF (2 << 16)
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
+
+#define MACH_TYPE 0x80B /* TNY-A9G20 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#undef CFG_DEBUG
+#undef CFG_DATAFLASH
+
+#define CFG_NANDFLASH
+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
+
+#define CFG_SDRAM
+#define CFG_HW_INIT
+
+#endif /* _TNY_A9G20_LPW_H */
diff --git a/board/tny_a9g20_lpw/tny_a9g20_lpw.c b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
new file mode 100644
index 0000000..cef9055
--- /dev/null
+++ b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
@@ -0,0 +1,243 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : tny_a9g20_lpw.c
+ * Object :
+ * Creation : GH August 13th 2012
+ *-----------------------------------------------------------------------------
+ */
+#include "../../include/part.h"
+#include "../../include/gpio.h"
+#include "../../include/pmc.h"
+#include "../../include/debug.h"
+#include "../../include/sdramc.h"
+#include "../../include/main.h"
+#ifdef CFG_NANDFLASH
+#include "../../include/nandflash.h"
+#endif
+
+static inline unsigned int get_cp15(void)
+{
+ unsigned int value;
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
+ return value;
+}
+
+static inline void set_cp15(unsigned int value)
+{
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
+}
+
+#ifdef CFG_HW_INIT
+/*----------------------------------------------------------------------------*/
+/* \fn hw_init */
+/* \brief This function performs very low level HW initialization */
+/* This function is invoked as soon as possible during the c_startup */
+/* The bss segment must be initialized */
+/*----------------------------------------------------------------------------*/
+void hw_init(void)
+{
+ unsigned int cp15;
+
+ /* Configure PIOs */
+ const struct pio_desc hw_pio[] = {
+#ifdef CFG_DEBUG
+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Disable watchdog */
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
+
+ /* At this stage the main oscillator is supposed to be enabled
+ * PCK = MCK = MOSC */
+ writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
+
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* PCK = PLLA/2 = 3 * MCK */
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
+ /* Switch MCK on PLLA output */
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure PLLB */
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure CP15 */
+ cp15 = get_cp15();
+ cp15 |= I_CACHE;
+ set_cp15(cp15);
+
+ /* Configure the PIO controller */
+ pio_setup(hw_pio);
+
+ /* Configure the EBI Slave Slot Cycle to 64 */
+ writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
+
+#ifdef CFG_DEBUG
+ /* Enable Debug messages on the DBGU */
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
+
+ dbg_print("Start AT91Bootstrap...\n\r");
+#endif /* CFG_DEBUG */
+
+#ifdef CFG_SDRAM
+ /* Initialize the matrix (slow slew rate enabled and LPSDRAM memory voltage = 1.8V) */
+ writel(((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<17)) & ~0x00010000, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SDRAM Controller */
+ sdram_init( AT91C_SDRAMC_NC_9 |
+ AT91C_SDRAMC_NR_13 |
+ AT91C_SDRAMC_CAS_3 |
+ AT91C_SDRAMC_NB_4_BANKS |
+ AT91C_SDRAMC_DBW_32_BITS |
+ AT91C_SDRAMC_TWR_2 |
+ AT91C_SDRAMC_TRC_7 |
+ AT91C_SDRAMC_TRP_2 |
+ AT91C_SDRAMC_TRCD_2 |
+ AT91C_SDRAMC_TRAS_5 |
+ AT91C_SDRAMC_TXSR_8, /* Control Register */
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
+ AT91C_SDRAMC_MD_LOW_POWER_SDRAM); /* SDRAM (low power) */
+
+#endif /* CFG_SDRAM */
+}
+#endif /* CFG_HW_INIT */
+
+#ifdef CFG_SDRAM
+/*------------------------------------------------------------------------------*/
+/* \fn sdramc_hw_init */
+/* \brief This function performs SDRAMC HW initialization */
+/*------------------------------------------------------------------------------*/
+void sdramc_hw_init(void)
+{
+ /* Configure PIOs */
+/* const struct pio_desc sdramc_pio[] = {
+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+*/
+ /* Configure the SDRAMC PIO controller to output PCK0 */
+/* pio_setup(sdramc_pio); */
+
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
+
+}
+#endif /* CFG_SDRAM */
+
+#ifdef CFG_NANDFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn nand_recovery */
+/* \brief This function erases NandFlash Block 0 if BP4 is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+static void nand_recovery(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc bp4_pio[] = {
+ {"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(bp4_pio);
+
+ /* If BP4 is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if (!pio_get_value(AT91C_PIN_PA(31)) )
+ AT91F_NandEraseBlock0();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_hw_init */
+/* \brief NandFlash HW init */
+/*------------------------------------------------------------------------------*/
+void nandflash_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc nand_pio[] = {
+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SMC CS3 */
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(nand_pio);
+
+ nand_recovery();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_16bits_dbw_init */
+/* \brief Configure SMC in 16 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_16bits_dbw_init(void)
+{
+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_8bits_dbw_init */
+/* \brief Configure SMC in 8 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_8bits_dbw_init(void)
+{
+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+#endif /* #ifdef CFG_NANDFLASH */
diff --git a/crt0_gnu.S b/crt0_gnu.S
index 042b617..c6cd49d 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -106,6 +106,12 @@ _relocate_to_sram:
#endif /* CFG_NORFLASH */
_setup_clocks:
+/* Test if main osc is bypassed */
+ ldr r0,=AT91C_PMC_MOR
+ ldr r1, [r0]
+ ldr r2,=AT91C_CKGR_OSCBYPASS
+ ands r1, r1, r2
+ bne _init_data /* branch if OSCBYPASS=1 */
/* Test if main oscillator is enabled */
ldr r0,=AT91C_PMC_SR
ldr r1, [r0]
diff --git a/include/part.h b/include/part.h
index ba5985a..ab79af1 100644
--- a/include/part.h
+++ b/include/part.h
@@ -46,7 +46,11 @@
#ifdef AT91SAM9G20
#include "AT91SAM9260_inc.h"
-#include "at91sam9g20ek.h"
+ #ifdef at91sam9g20ek
+ #include "at91sam9g20ek.h"
+ #elif tny_a9g20_lpw
+ #include "tny-a9g20-lpw.h"
+ #endif
#endif
#ifdef AT91SAM9261
--
1.7.9.5

View File

@@ -0,0 +1,187 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_SOC_AT91SAM9260=y
CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y
CONFIG_SOC_AT91SAM9N12=y
CONFIG_MACH_AT91SAM_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_TIMER_HZ=128
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
CONFIG_EEPROM_93CX6=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_DAVICOM_PHY=y
CONFIG_MICREL_PHY=y
# CONFIG_WLAN is not set
CONFIG_INPUT_POLLDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_SERIO is not set
CONFIG_LEGACY_PTY_COUNT=4
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SSB=m
CONFIG_FB=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_ATMEL_LCDC=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_FONT_MINI_4x6=y
CONFIG_LOGO=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
CONFIG_USB_AT91=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_ACM_MS=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=y
CONFIG_MMC_SPI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_DMADEVICES=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ARC4=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=m
CONFIG_AVERAGE=y

View File

@@ -0,0 +1,603 @@
From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Tue, 2 Oct 2012 09:19:15 +0200
Subject: [PATCH] Add support for the USB-A9260
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
board/usb_a9260/nandflash/Makefile | 122 ++++++++++++++
board/usb_a9260/nandflash/usb-a9260.h | 109 ++++++++++++
board/usb_a9260/usb_a9260.c | 298 +++++++++++++++++++++++++++++++++
crt0_gnu.S | 7 +
include/part.h | 6 +-
5 files changed, 541 insertions(+), 1 deletion(-)
create mode 100644 board/usb_a9260/nandflash/Makefile
create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
create mode 100644 board/usb_a9260/usb_a9260.c
diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
new file mode 100644
index 0000000..02f4b50
--- /dev/null
+++ b/board/usb_a9260/nandflash/Makefile
@@ -0,0 +1,122 @@
+# TODO: set this appropriately for your local toolchain
+ifndef ERASE_FCT
+ERASE_FCT=rm -f
+endif
+ifndef CROSS_COMPILE
+CROSS_COMPILE=arm-elf-
+endif
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# NandFlashBoot Configuration for USB-A9260
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9260
+# Board name (case sensitive!!!)
+BOARD=usb_a9260
+# Link Address and Top_of_Memory
+LINK_ADDR=0x200000
+TOP_OF_MEMORY=0x301000
+# Name of current directory
+PROJECT=nandflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ nandflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ $(ERASE_FCT) *.o *.bin *.elf *.map
diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
new file mode 100644
index 0000000..2aaf759
--- /dev/null
+++ b/board/usb_a9260/nandflash/usb-a9260.h
@@ -0,0 +1,109 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb-a9260.h
+ * Object :
+ * Creation : GH Oct 1th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _USB_A9260_H
+#define _USB_A9260_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (180000000/2)
+#define PLL_LOCK_TIMEOUT 1000000
+
+#define PLLA_SETTINGS 0x20593F06
+#define PLLB_SETTINGS 0x10483F0E
+
+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* NandFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SMARTMEDIA_BASE 0x40000000
+
+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
+
+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
+
+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
+
+
+/* ******************************************************************** */
+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
+/* Please refer to SMC section in AT91SAM datasheet to learn how */
+/* to generate these values. */
+/* ******************************************************************** */
+#define AT91C_SM_NWE_SETUP (1 << 0)
+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
+#define AT91C_SM_NRD_SETUP (1 << 16)
+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
+
+#define AT91C_SM_NWE_PULSE (3 << 0)
+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
+#define AT91C_SM_NRD_PULSE (3 << 16)
+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
+
+#define AT91C_SM_NWE_CYCLE (5 << 0)
+#define AT91C_SM_NRD_CYCLE (5 << 16)
+#define AT91C_SM_TDF (2 << 16)
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
+
+#define MACH_TYPE 0x6AD /* USB-A9260 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#undef CFG_DEBUG
+#undef CFG_DATAFLASH
+
+#define CFG_NANDFLASH
+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
+
+#define CFG_HW_INIT
+#define CFG_SDRAM
+
+#endif /* _USB_A9260_H */
diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
new file mode 100644
index 0000000..de30f0b
--- /dev/null
+++ b/board/usb_a9260/usb_a9260.c
@@ -0,0 +1,298 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaiimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb_a9260.c
+ * Object :
+ * Creation : GH Oct 1th 2012
+ *-----------------------------------------------------------------------------
+ */
+#include "../../include/part.h"
+#include "../../include/gpio.h"
+#include "../../include/pmc.h"
+#include "../../include/debug.h"
+#include "../../include/sdramc.h"
+#include "../../include/main.h"
+#ifdef CFG_NANDFLASH
+#include "../../include/nandflash.h"
+#endif
+#ifdef CFG_DATAFLASH
+#include "../../include/dataflash.h"
+#endif
+
+static inline unsigned int get_cp15(void)
+{
+ unsigned int value;
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
+ return value;
+}
+
+static inline void set_cp15(unsigned int value)
+{
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
+}
+
+#ifdef CFG_HW_INIT
+/*----------------------------------------------------------------------------*/
+/* \fn hw_init */
+/* \brief This function performs very low level HW initialization */
+/* This function is invoked as soon as possible during the c_startup */
+/* The bss segment must be initialized */
+/*----------------------------------------------------------------------------*/
+void hw_init(void)
+{
+ unsigned int cp15;
+
+ /* Configure PIOs */
+ const struct pio_desc hw_pio[] = {
+#ifdef CFG_DEBUG
+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Disable watchdog */
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
+
+ /* At this stage the main oscillator is supposed to be enabled
+ * PCK = MCK = MOSC */
+
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* PCK = PLLA = 2 * MCK */
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
+ /* Switch MCK on PLLA output */
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure PLLB */
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure CP15 */
+ cp15 = get_cp15();
+ cp15 |= I_CACHE;
+ set_cp15(cp15);
+
+ /* Configure the PIO controller */
+ pio_setup(hw_pio);
+
+ /* Configure the EBI Slave Slot Cycle to 64 */
+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
+
+#ifdef CFG_DEBUG
+ /* Enable Debug messages on the DBGU */
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
+
+ dbg_print("Start AT91Bootstrap...\n\r");
+#endif /* CFG_DEBUG */
+
+#ifdef CFG_SDRAM
+ /* Initialize the matrix */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SDRAM Controller */
+ sdram_init( AT91C_SDRAMC_NC_9 |
+ AT91C_SDRAMC_NR_13 |
+ AT91C_SDRAMC_CAS_2 |
+ AT91C_SDRAMC_NB_4_BANKS |
+ AT91C_SDRAMC_DBW_32_BITS |
+ AT91C_SDRAMC_TWR_2 |
+ AT91C_SDRAMC_TRC_7 |
+ AT91C_SDRAMC_TRP_2 |
+ AT91C_SDRAMC_TRCD_2 |
+ AT91C_SDRAMC_TRAS_5 |
+ AT91C_SDRAMC_TXSR_8, /* Control Register */
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
+
+
+#endif /* CFG_SDRAM */
+}
+#endif /* CFG_HW_INIT */
+
+#ifdef CFG_SDRAM
+/*------------------------------------------------------------------------------*/
+/* \fn sdramc_hw_init */
+/* \brief This function performs SDRAMC HW initialization */
+/*------------------------------------------------------------------------------*/
+void sdramc_hw_init(void)
+{
+ /* Configure PIOs */
+/* const struct pio_desc sdramc_pio[] = {
+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+*/
+ /* Configure the SDRAMC PIO controller to output PCK0 */
+/* pio_setup(sdramc_pio); */
+
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
+
+}
+#endif /* CFG_SDRAM */
+
+#ifdef CFG_DATAFLASH
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_recovery */
+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+void df_recovery(AT91PS_DF pDf)
+{
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USR PB is pressed during Boot sequence */
+ /* Erase DataFlash Page 0*/
+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
+ df_page_erase(pDf, 0);
+#endif
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_hw_init */
+/* \brief This function performs DataFlash HW initialization */
+/*------------------------------------------------------------------------------*/
+void df_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc df_pio[] = {
+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ pio_setup(df_pio);
+}
+#endif /* CFG_DATAFLASH */
+
+
+
+#ifdef CFG_NANDFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn nand_recovery */
+/* \brief This function erases NandFlash Block 0 if USR PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+static void nand_recovery(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USR PB is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if (!pio_get_value(AT91C_PIN_PB(10)) )
+ AT91F_NandEraseBlock0();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_hw_init */
+/* \brief NandFlash HW init */
+/*------------------------------------------------------------------------------*/
+void nandflash_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc nand_pio[] = {
+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SMC CS3 */
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(nand_pio);
+
+ nand_recovery();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_16bits_dbw_init */
+/* \brief Configure SMC in 16 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_16bits_dbw_init(void)
+{
+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_8bits_dbw_init */
+/* \brief Configure SMC in 8 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_8bits_dbw_init(void)
+{
+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+
+#endif /* #ifdef CFG_NANDFLASH */
diff --git a/crt0_gnu.S b/crt0_gnu.S
index 042b617..002feef 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -106,6 +106,13 @@ _relocate_to_sram:
#endif /* CFG_NORFLASH */
_setup_clocks:
+/* Test if main osc is bypassed */
+ ldr r0,=AT91C_PMC_MOR
+ ldr r1, [r0]
+ ldr r2,=AT91C_CKGR_OSCBYPASS
+ ands r1, r1, r2
+ bne _init_data /* branch if OSCBYPASS=1 */
+
/* Test if main oscillator is enabled */
ldr r0,=AT91C_PMC_SR
ldr r1, [r0]
diff --git a/include/part.h b/include/part.h
index ba5985a..212789f 100644
--- a/include/part.h
+++ b/include/part.h
@@ -35,7 +35,11 @@
#ifdef AT91SAM9260
#include "AT91SAM9260_inc.h"
-#include "at91sam9260ek.h"
+ #ifdef at91sam9260ek
+ #include "at91sam9260ek.h"
+ #elif usb_a9260
+ #include "usb-a9260.h"
+ #endif
#endif
#ifdef AT91SAM9XE
--
1.7.9.5

View File

@@ -0,0 +1,97 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9260=y
CONFIG_MACH_USB_A9260=y
CONFIG_AT91_SLOW_CLOCK=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_EXT2_FS=y
CONFIG_FUSE_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

View File

@@ -0,0 +1,851 @@
From 74796655212d321f50ab89e8c5570245901f4cba Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Thu, 5 Jul 2012 18:44:07 +0200
Subject: [PATCH] Add support for the Calao-systems USB-A9263
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
board/usb_a9263/dataflash/Makefile | 115 +++++++++++++
board/usb_a9263/dataflash/usb-a9263.h | 97 +++++++++++
board/usb_a9263/nandflash/Makefile | 117 ++++++++++++++
board/usb_a9263/nandflash/usb-a9263.h | 116 +++++++++++++
board/usb_a9263/usb_a9263.c | 285 +++++++++++++++++++++++++++++++++
crt0_gnu.S | 7 +
driver/dataflash.c | 6 +-
include/part.h | 6 +-
8 files changed, 745 insertions(+), 4 deletions(-)
create mode 100644 board/usb_a9263/dataflash/Makefile
create mode 100644 board/usb_a9263/dataflash/usb-a9263.h
create mode 100644 board/usb_a9263/nandflash/Makefile
create mode 100644 board/usb_a9263/nandflash/usb-a9263.h
create mode 100644 board/usb_a9263/usb_a9263.c
diff --git a/board/usb_a9263/dataflash/Makefile b/board/usb_a9263/dataflash/Makefile
new file mode 100644
index 0000000..332685e
--- /dev/null
+++ b/board/usb_a9263/dataflash/Makefile
@@ -0,0 +1,115 @@
+# TODO: set this appropriately for your local toolchain
+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
+CROSS_COMPILE=arm-elf-
+#CROSS_COMPILE = arm-softfloat-linux-gnu-
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# DataFlashBoot Configuration for USB-A9263
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9263
+# Board name (case sensitive!!!)
+BOARD=usb_a9263
+# Link Address and Top_of_Memory
+LINK_ADDR=0x300000
+TOP_OF_MEMORY=0x314000
+# Name of current directory
+PROJECT=dataflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm9 -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ dataflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ rm -f *.o *.bin *.elf *.map
diff --git a/board/usb_a9263/dataflash/usb-a9263.h b/board/usb_a9263/dataflash/usb-a9263.h
new file mode 100644
index 0000000..40a3af8
--- /dev/null
+++ b/board/usb_a9263/dataflash/usb-a9263.h
@@ -0,0 +1,97 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb-a9263.h
+ * Object :
+ * Creation : GH Jun 28th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _USB_A9263_H
+#define _USB_A9263_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (180000000/2)
+#define PLL_LOCK_TIMEOUT 1000000
+
+#define PLLA_SETTINGS 0x20593F06
+#define PLLB_SETTINGS 0x10483F0E
+
+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* DataFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_BASE_SPI AT91C_BASE_SPI0
+#define AT91C_ID_SPI AT91C_ID_SPI0
+
+/* SPI CLOCK */
+#define AT91C_SPI_CLK 8000000
+/* AC characteristics */
+/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
+#define DATAFLASH_TCSS (0x1a << 16) /* 250ns min (tCSS) <=> 12/48000000 = 250ns */
+#define DATAFLASH_TCHS (0x1 << 24) /* 250ns min (tCSH) <=> (64*1+SCBR)/(2*48000000) */
+
+#define DF_CS_SETTINGS (AT91C_SPI_NCPHA | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | ((MASTER_CLOCK / AT91C_SPI_CLK) << 8))
+
+/* ******************************************************************* */
+/* SDRAMC Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_BASE_SDRAMC AT91C_BASE_SDRAMC0
+#define AT91C_EBI_SDRAM AT91C_EBI0_SDRAM
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SPI_PCS_DATAFLASH AT91C_SPI_PCS0_DATAFLASH /* Boot on SPI NCS0 */
+
+#define IMG_ADDRESS 0x4000 /* Image Address in DataFlash */
+#define IMG_SIZE 0x40000 /* Image Size in DataFlash */
+
+#define MACH_TYPE 0x6AE /* USB-A9263 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#define CFG_HW_INIT
+#define CFG_SDRAM
+#undef CFG_DEBUG
+
+#define CFG_DATAFLASH
+
+#endif /* _USB_A9263_H */
diff --git a/board/usb_a9263/nandflash/Makefile b/board/usb_a9263/nandflash/Makefile
new file mode 100644
index 0000000..c453098
--- /dev/null
+++ b/board/usb_a9263/nandflash/Makefile
@@ -0,0 +1,117 @@
+# TODO: set this appropriately for your local toolchain
+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
+CROSS_COMPILE=arm-elf-
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# NandFlashBoot Configuration for USB-A9263
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9263
+# Board name (case sensitive!!!)
+BOARD=usb_a9263
+# Link Address and Top_of_Memory
+LINK_ADDR=0x300000
+TOP_OF_MEMORY=0x314000
+# Name of current directory
+PROJECT=nandflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm9 -O0 -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ nandflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ rm -f *.o *.bin *.elf *.map
diff --git a/board/usb_a9263/nandflash/usb-a9263.h b/board/usb_a9263/nandflash/usb-a9263.h
new file mode 100644
index 0000000..24e2cf1
--- /dev/null
+++ b/board/usb_a9263/nandflash/usb-a9263.h
@@ -0,0 +1,116 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb-a9263.h
+ * Object :
+ * Creation : GH Jun 28th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _USB_A9263_H
+#define _USB_A9263_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (180000000/2)
+#define PLL_LOCK_TIMEOUT 1000000
+
+#define PLLA_SETTINGS 0x20593F06
+#define PLLB_SETTINGS 0x10483F0E
+
+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* NandFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SMARTMEDIA_BASE 0x40000000
+
+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
+
+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_SODR = AT91C_PIO_PD15;} while(0)
+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_CODR = AT91C_PIO_PD15;} while(0)
+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOA_PDSR & AT91C_PIO_PA22))
+
+/* ******************************************************************* */
+/* SDRAMC Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_BASE_SDRAMC AT91C_BASE_SDRAMC0
+#define AT91C_EBI_SDRAM AT91C_EBI0_SDRAM
+
+/* ******************************************************************** */
+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000. */
+/* Please refer to SMC section in AT91SAM9x datasheet to learn how */
+/* to generate these values. */
+/* ******************************************************************** */
+#define AT91C_SM_NWE_SETUP (1 << 0)
+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
+#define AT91C_SM_NRD_SETUP (1 << 16)
+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
+
+#define AT91C_SM_NWE_PULSE (3 << 0)
+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
+#define AT91C_SM_NRD_PULSE (3 << 16)
+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
+
+#define AT91C_SM_NWE_CYCLE (5 << 0)
+#define AT91C_SM_NRD_CYCLE (5 << 16)
+
+#define AT91C_SM_TDF (2 << 16)
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
+
+#define MACH_TYPE 0x6AE /* USB-A9263 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#undef CFG_DEBUG
+#undef CFG_DATAFLASH
+
+#define CFG_NANDFLASH
+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
+
+#define CFG_HW_INIT
+#define CFG_SDRAM
+
+
+#endif /* _USB_A9263_H */
diff --git a/board/usb_a9263/usb_a9263.c b/board/usb_a9263/usb_a9263.c
new file mode 100644
index 0000000..5630f99
--- /dev/null
+++ b/board/usb_a9263/usb_a9263.c
@@ -0,0 +1,285 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaiimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb_a9263.c
+ * Object :
+ * Creation : GH Jun 28th 2012
+ *-----------------------------------------------------------------------------
+ */
+#include "../../include/part.h"
+#include "../../include/gpio.h"
+#include "../../include/pmc.h"
+#include "../../include/debug.h"
+#include "../../include/sdramc.h"
+#include "../../include/main.h"
+#ifdef CFG_NANDFLASH
+#include "../../include/nandflash.h"
+#endif
+#ifdef CFG_DATAFLASH
+#include "../../include/dataflash.h"
+#endif
+
+static inline unsigned int get_cp15(void)
+{
+ unsigned int value;
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
+ return value;
+}
+
+static inline void set_cp15(unsigned int value)
+{
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
+}
+
+
+#ifdef CFG_HW_INIT
+/*---------------------------------------------------------------------------- */
+/* \fn hw_init */
+/* \brief This function performs very low level HW initialization */
+/* This function is invoked as soon as possible during the c_startup */
+/* The bss segment must be initialized */
+/*---------------------------------------------------------------------------- */
+void hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc hw_pio[] = {
+#ifdef CFG_DEBUG
+ {"RXD", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"TXD", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Disable watchdog */
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
+
+ /* At this stage the main oscillator is supposed to be enabled
+ * PCK = MCK = MOSC */
+
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* PCK = PLLA = 2 * MCK */
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
+ /* Switch MCK on PLLA output */
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
+
+
+ /* Configure PLLB */
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure the PIO controller to output PCK0 */
+ pio_setup(hw_pio);
+
+ /* Configure the EBI0 Slave Slot Cycle to 64 */
+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG4)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG4));
+
+#ifdef CFG_DEBUG
+ /* Enable Debug messages on the DBGU */
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
+ dbg_print("Start AT91Bootstrap...\n\r");
+#endif /* CFG_DEBUG */
+
+#ifdef CFG_SDRAM
+ /* Initialize the matrix */
+ /* VDDIOMSEL = 1 -> Memories are 3.3V powered */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | (1 << 16) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBI0CSA);
+
+ /* Configure SDRAM Controller */
+ sdram_init( AT91C_SDRAMC_NC_9 |
+ AT91C_SDRAMC_NR_13 |
+ AT91C_SDRAMC_CAS_2 |
+ AT91C_SDRAMC_NB_4_BANKS |
+ AT91C_SDRAMC_DBW_32_BITS |
+ AT91C_SDRAMC_TWR_2 |
+ AT91C_SDRAMC_TRC_7 |
+ AT91C_SDRAMC_TRP_2 |
+ AT91C_SDRAMC_TRCD_2 |
+ AT91C_SDRAMC_TRAS_5 |
+ AT91C_SDRAMC_TXSR_8, /* Control Register */
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
+#endif /* CFG_SDRAM */
+}
+#endif /* CFG_HW_INIT */
+
+
+#ifdef CFG_SDRAM
+//*----------------------------------------------------------------------------
+//* \fn sdramc_hw_init
+//* \brief This function performs SDRAMC HW initialization
+//*----------------------------------------------------------------------------*/
+void sdramc_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc sdramc_pio[] = {
+ {"D16", AT91C_PIN_PD(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D17", AT91C_PIN_PD(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D18", AT91C_PIN_PD(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D19", AT91C_PIN_PD(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D20", AT91C_PIN_PD(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D21", AT91C_PIN_PD(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D22", AT91C_PIN_PD(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D23", AT91C_PIN_PD(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D24", AT91C_PIN_PD(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D25", AT91C_PIN_PD(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D26", AT91C_PIN_PD(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D27", AT91C_PIN_PD(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D28", AT91C_PIN_PD(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D29", AT91C_PIN_PD(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D30", AT91C_PIN_PD(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D31", AT91C_PIN_PD(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the SDRAMC PIO controller */
+ pio_setup(sdramc_pio);
+}
+#endif
+
+#ifdef CFG_DATAFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn df_recovery */
+/* \brief This function erases DataFlash Page 0 if USER PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+void df_recovery(AT91PS_DF pDf)
+{
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USER PB is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
+ df_page_erase(pDf, 0);
+#endif
+}
+/*------------------------------------------------------------------------------*/
+/* \fn df_hw_init */
+/* \brief This function performs DataFlash HW initialization */
+/*------------------------------------------------------------------------------*/
+void df_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc df_pio[] = {
+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_B},
+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_B},
+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},
+ {"NPCS0", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_B},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ pio_setup(df_pio);
+}
+#endif /* CFG_DATAFLASH */
+
+
+#ifdef CFG_NANDFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn nand_recovery */
+/* \brief This function erases NandFlash Block 0 if USER PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+static void nand_recovery(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USER PB is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if (!pio_get_value(AT91C_PIN_PB(10)) )
+ AT91F_NandEraseBlock0();
+}
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_hw_init */
+/* \brief NandFlash HW init */
+/*------------------------------------------------------------------------------*/
+void nandflash_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc nand_pio[] = {
+ {"RDY_BSY", AT91C_PIN_PA(22), 0, PIO_PULLUP, PIO_INPUT},
+ {"NANDCS", AT91C_PIN_PD(15), 0, PIO_PULLUP, PIO_OUTPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBI0CSA);
+
+ /* Configure SMC CS3 */
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC0 + SMC_SETUP3);
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC0 + SMC_PULSE3);
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC0 + SMC_CYCLE3);
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC0 + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
+ writel((1 << AT91C_ID_PIOCDE), PMC_PCER + AT91C_BASE_PMC);
+
+ pio_setup(nand_pio);
+
+ nand_recovery();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_16bits_dbw_init */
+/* \brief Configure SMC in 16 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_16bits_dbw_init(void)
+{
+ writel(readl(AT91C_BASE_SMC0 + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_8bits_dbw_init */
+/* \brief Configure SMC in 8 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_8bits_dbw_init(void)
+{
+ writel((readl(AT91C_BASE_SMC0 + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
+}
+
+#endif /* #ifdef CFG_NANDFLASH */
+
+
diff --git a/crt0_gnu.S b/crt0_gnu.S
index 042b617..002feef 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -106,6 +106,13 @@ _relocate_to_sram:
#endif /* CFG_NORFLASH */
_setup_clocks:
+/* Test if main osc is bypassed */
+ ldr r0,=AT91C_PMC_MOR
+ ldr r1, [r0]
+ ldr r2,=AT91C_CKGR_OSCBYPASS
+ ands r1, r1, r2
+ bne _init_data /* branch if OSCBYPASS=1 */
+
/* Test if main oscillator is enabled */
ldr r0,=AT91C_PMC_SR
ldr r1, [r0]
diff --git a/driver/dataflash.c b/driver/dataflash.c
index e28e49e..4de295a 100644
--- a/driver/dataflash.c
+++ b/driver/dataflash.c
@@ -293,14 +293,14 @@ static int df_init (AT91PS_DF pDf)
pDf->dfDescription.pages_size = 264;
pDf->dfDescription.page_offset = 9;
break;
-
+*/
case AT45DB021B:
pDf->dfDescription.pages_number = 1024;
pDf->dfDescription.pages_size = 264;
pDf->dfDescription.page_offset = 9;
break;
- case AT45DB041B:
+/* case AT45DB041B:
pDf->dfDescription.pages_number = 2048;
pDf->dfDescription.pages_size = 264;
pDf->dfDescription.page_offset = 9;
@@ -373,7 +373,7 @@ int load_df(unsigned int pcs, unsigned int img_addr, unsigned int img_size, unsi
if (!df_init(pDf))
return -1;
-#if defined(AT91SAM9260) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
+#if defined(AT91SAM9260) || defined(AT91SAM9263) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
/* Test if a button has been pressed or not */
/* Erase Page 0 to avoid infinite loop */
df_recovery(pDf);
diff --git a/include/part.h b/include/part.h
index ba5985a..a1863d0 100644
--- a/include/part.h
+++ b/include/part.h
@@ -61,7 +61,11 @@
#ifdef AT91SAM9263
#include "AT91SAM9263_inc.h"
-#include "at91sam9263ek.h"
+ #ifdef at91sam9263ek
+ #include "at91sam9263ek.h"
+ #elif usb_a9263
+ #include "usb-a9263.h"
+ #endif
#endif
#ifdef AT91CAP9
--
1.5.6.3

View File

@@ -0,0 +1,102 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9263=y
CONFIG_MACH_USB_A9263=y
CONFIG_AT91_SLOW_CLOCK=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_EXT2_FS=y
CONFIG_FUSE_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_XATTR=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

View File

@@ -0,0 +1,105 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9G20=y
CONFIG_MACH_USB_A9G20=y
CONFIG_AT91_SLOW_CLOCK=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RV3029C2=y
CONFIG_EXT2_FS=y
CONFIG_FUSE_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_XATTR=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

View File

@@ -0,0 +1,610 @@
From 8d84757d5170969e8bdfebc7951f43c5aa2b05fd Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Fri, 6 Jul 2012 16:32:47 +0200
Subject: [PATCH] Add support for the Calao-systems USB-A9G20-LPW
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
board/usb_a9g20_lpw/nandflash/Makefile | 121 ++++++++++
board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h | 112 +++++++++
board/usb_a9g20_lpw/usb_a9g20_lpw.c | 303 +++++++++++++++++++++++++
crt0_gnu.S | 7 +
include/part.h | 6 +-
5 files changed, 548 insertions(+), 1 deletions(-)
create mode 100644 board/usb_a9g20_lpw/nandflash/Makefile
create mode 100644 board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
create mode 100644 board/usb_a9g20_lpw/usb_a9g20_lpw.c
diff --git a/board/usb_a9g20_lpw/nandflash/Makefile b/board/usb_a9g20_lpw/nandflash/Makefile
new file mode 100644
index 0000000..8c9d99a
--- /dev/null
+++ b/board/usb_a9g20_lpw/nandflash/Makefile
@@ -0,0 +1,121 @@
+# TODO: set this appropriately for your local toolchain
+ifndef ERASE_FCT
+ERASE_FCT=rm -f
+endif
+ifndef CROSS_COMPILE
+CROSS_COMPILE=arm-elf-
+endif
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# NandFlashBoot Configuration for USB-A9G20-LPW
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9G20
+# Board name (case sensitive!!!)
+BOARD=usb_a9g20_lpw
+# Link Address and Top_of_Memory
+LINK_ADDR=0x200000
+TOP_OF_MEMORY=0x301000
+# Name of current directory
+PROJECT=nandflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ nandflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ $(ERASE_FCT) *.o *.bin *.elf *.map
diff --git a/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
new file mode 100644
index 0000000..c0bdc6e
--- /dev/null
+++ b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
@@ -0,0 +1,112 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb-a9g20-lpw.h
+ * Object :
+ * Creation : GH July 6th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _USB_A9G20_LPW_H
+#define _USB_A9G20_LPW_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (133000000)
+#define PLL_LOCK_TIMEOUT 1000000
+
+/* Set PLLA to 798Mhz */
+#define PLLA_SETTINGS 0x20843F02
+#define PLLB_SETTINGS 0x100F3F02
+
+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
+#define MCKR_SETTINGS 0x1300
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* NandFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SMARTMEDIA_BASE 0x40000000
+
+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
+
+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
+
+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
+
+
+/* ******************************************************************** */
+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 133000000.*/
+/* Please refer to SMC section in AT91SAM9 datasheet to learn how */
+/* to generate these values. */
+/* ******************************************************************** */
+#define AT91C_SM_NWE_SETUP (2 << 0)
+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
+#define AT91C_SM_NRD_SETUP (2 << 16)
+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
+
+#define AT91C_SM_NWE_PULSE (4 << 0)
+#define AT91C_SM_NCS_WR_PULSE (4 << 8)
+#define AT91C_SM_NRD_PULSE (4 << 16)
+#define AT91C_SM_NCS_RD_PULSE (4 << 24)
+
+#define AT91C_SM_NWE_CYCLE (7 << 0)
+#define AT91C_SM_NRD_CYCLE (7 << 16)
+
+#define AT91C_SM_TDF (3 << 16)
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
+
+#define MACH_TYPE 0x731 /* USB-A9G20 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#undef CFG_DEBUG
+#undef CFG_DATAFLASH
+
+#define CFG_NANDFLASH
+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
+#undef CFG_NANDFLASH_RECOVERY
+
+#define CFG_SDRAM
+#define CFG_HW_INIT
+
+#endif /* _USB_A9G20_LPW_H */
diff --git a/board/usb_a9g20_lpw/usb_a9g20_lpw.c b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
new file mode 100644
index 0000000..c372307
--- /dev/null
+++ b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
@@ -0,0 +1,303 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb_a9g20_lpw.c
+ * Object :
+ * Creation : GH July 6th 2012
+ *-----------------------------------------------------------------------------
+ */
+#include "../../include/part.h"
+#include "../../include/gpio.h"
+#include "../../include/pmc.h"
+#include "../../include/debug.h"
+#include "../../include/sdramc.h"
+#include "../../include/main.h"
+#ifdef CFG_NANDFLASH
+#include "../../include/nandflash.h"
+#endif
+#ifdef CFG_DATAFLASH
+#include "../../include/dataflash.h"
+#endif
+
+static inline unsigned int get_cp15(void)
+{
+ unsigned int value;
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
+ return value;
+}
+
+static inline void set_cp15(unsigned int value)
+{
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
+}
+
+#ifdef CFG_HW_INIT
+/*----------------------------------------------------------------------------*/
+/* \fn hw_init */
+/* \brief This function performs very low level HW initialization */
+/* This function is invoked as soon as possible during the c_startup */
+/* The bss segment must be initialized */
+/*----------------------------------------------------------------------------*/
+void hw_init(void)
+{
+ unsigned int cp15;
+
+ /* Configure PIOs */
+ const struct pio_desc hw_pio[] = {
+#ifdef CFG_DEBUG
+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Disable watchdog */
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
+
+ /* At this stage the main oscillator is supposed to be enabled
+ * PCK = MCK = MOSC */
+ writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
+
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* PCK = PLLA/2 = 3 * MCK */
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
+ /* Switch MCK on PLLA output */
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure PLLB */
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure CP15 */
+ cp15 = get_cp15();
+ cp15 |= I_CACHE;
+ set_cp15(cp15);
+
+ /* Configure the PIO controller */
+ pio_setup(hw_pio);
+
+ /* Configure the EBI Slave Slot Cycle to 64 */
+ writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
+
+#ifdef CFG_DEBUG
+ /* Enable Debug messages on the DBGU */
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
+
+ dbg_print("Start AT91Bootstrap...\n\r");
+#endif /* CFG_DEBUG */
+
+#ifdef CFG_SDRAM
+ /* Initialize the matrix (VDDIOSEL=0: memory voltage = 1.8V ) */
+ writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA) & ~0x00010000) | AT91C_EBI_CS1A_SDRAMC , AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SDRAM Controller */
+ sdram_init( AT91C_SDRAMC_NC_9 |
+ AT91C_SDRAMC_NR_13 |
+ AT91C_SDRAMC_CAS_3 |
+ AT91C_SDRAMC_NB_4_BANKS |
+ AT91C_SDRAMC_DBW_32_BITS |
+ AT91C_SDRAMC_TWR_3 |
+ AT91C_SDRAMC_TRC_9 |
+ AT91C_SDRAMC_TRP_3 |
+ AT91C_SDRAMC_TRCD_3 |
+ AT91C_SDRAMC_TRAS_6 |
+ AT91C_SDRAMC_TXSR_10, /* Control Register */
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
+
+#endif /* CFG_SDRAM */
+}
+#endif /* CFG_HW_INIT */
+
+#ifdef CFG_SDRAM
+/*------------------------------------------------------------------------------*/
+/* \fn sdramc_hw_init */
+/* \brief This function performs SDRAMC HW initialization */
+/*------------------------------------------------------------------------------*/
+void sdramc_hw_init(void)
+{
+ /* Configure PIOs */
+/* const struct pio_desc sdramc_pio[] = {
+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+*/
+ /* Configure the SDRAMC PIO controller to output PCK0 */
+/* pio_setup(sdramc_pio); */
+
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
+
+}
+#endif /* CFG_SDRAM */
+
+#ifdef CFG_DATAFLASH
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_recovery */
+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+void df_recovery(AT91PS_DF pDf)
+{
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
+ /* Configure PIOs */
+ const struct pio_desc usrpb[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb);
+
+ /* If USR PB is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
+ df_page_erase(pDf, 0);
+#endif
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_hw_init */
+/* \brief This function performs DataFlash HW initialization */
+/*------------------------------------------------------------------------------*/
+void df_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc df_pio[] = {
+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
+ {"NPCS1", AT91C_PIN_PC(11), 0, PIO_DEFAULT, PIO_PERIPH_B},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ pio_setup(df_pio);
+}
+#endif /* CFG_DATAFLASH */
+
+
+
+#ifdef CFG_NANDFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn nand_recovery */
+/* \brief This function erases NandFlash Block 0 if USER PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+#ifdef CFG_NANDFLASH_RECOVERY
+static void nand_recovery(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc usrpb[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb);
+
+ /* If USER PB is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if (!pio_get_value(AT91C_PIN_PB(10)) )
+ AT91F_NandEraseBlock0();
+}
+#else
+static void nand_recovery(void) {}
+#endif
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_hw_init */
+/* \brief NandFlash HW init */
+/*------------------------------------------------------------------------------*/
+void nandflash_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc nand_pio[] = {
+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SMC CS3 */
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(nand_pio);
+
+ nand_recovery();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_16bits_dbw_init */
+/* \brief Configure SMC in 16 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_16bits_dbw_init(void)
+{
+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_8bits_dbw_init */
+/* \brief Configure SMC in 8 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_8bits_dbw_init(void)
+{
+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+#endif /* #ifdef CFG_NANDFLASH */
diff --git a/crt0_gnu.S b/crt0_gnu.S
index 042b617..002feef 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -106,6 +106,13 @@ _relocate_to_sram:
#endif /* CFG_NORFLASH */
_setup_clocks:
+/* Test if main osc is bypassed */
+ ldr r0,=AT91C_PMC_MOR
+ ldr r1, [r0]
+ ldr r2,=AT91C_CKGR_OSCBYPASS
+ ands r1, r1, r2
+ bne _init_data /* branch if OSCBYPASS=1 */
+
/* Test if main oscillator is enabled */
ldr r0,=AT91C_PMC_SR
ldr r1, [r0]
diff --git a/include/part.h b/include/part.h
index ba5985a..1d7392a 100644
--- a/include/part.h
+++ b/include/part.h
@@ -46,7 +46,11 @@
#ifdef AT91SAM9G20
#include "AT91SAM9260_inc.h"
-#include "at91sam9g20ek.h"
+ #ifdef at91sam9g20ek
+ #include "at91sam9g20ek.h"
+ #elif usb_a9g20_lpw
+ #include "usb-a9g20-lpw.h"
+ #endif
#endif
#ifdef AT91SAM9261
--
1.5.6.3

View File

@@ -0,0 +1,12 @@
diff --git a/arch/arm/configs/usb_a9g20_defconfig b/arch/arm/configs/usb_a9g20_defconfig
index 30bf380..7716e0e 100644
--- a/arch/arm/configs/usb_a9g20_defconfig
+++ b/arch/arm/configs/usb_a9g20_defconfig
@@ -15,6 +15,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
CONFIG_MENU=y
+# CONFIG_ERRNO_MESSAGES is not set
# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
CONFIG_CONSOLE_ACTIVATE_ALL=y
CONFIG_PARTITION=y

View File

@@ -14,8 +14,8 @@
# cgpt does not create protective MBR, and the kernel refuses to read
# GPT unless there's some kind of MBR in sector 0. So we need parted
# to write that single sector before doing anything with the GPT.
cgpt=$HOST_DIR/bin/cgpt
parted=$HOST_DIR/sbin/parted
cgpt=$HOST_DIR/usr/bin/cgpt
parted=$HOST_DIR/usr/sbin/parted
kernel=$BINARIES_DIR/uImage.kpart
rootfs=$BINARIES_DIR/rootfs.ext2

View File

@@ -88,7 +88,7 @@ you will probably want the rootfs to occupy the whole remaining space.
cgpt may be used to check current layout:
output/host/bin/cgpt show $SD
output/host/usr/bin/cgpt show $SD
All sizes and all offsets are in 512-byte blocks.

View File

@@ -5,9 +5,9 @@
# The resulting file is called uImage.kpart.
BOARD_DIR=$(dirname $0)
mkimage=$HOST_DIR/bin/mkimage
futility=$HOST_DIR/bin/futility
devkeys=$HOST_DIR/share/vboot/devkeys
mkimage=$HOST_DIR/usr/bin/mkimage
futility=$HOST_DIR/usr/bin/futility
devkeys=$HOST_DIR/usr/share/vboot/devkeys
run() { echo "$@"; "$@"; }
die() { echo "$@" >&2; exit 1; }

View File

@@ -1,29 +0,0 @@
image sdcard.img {
hdimage {
}
partition uboot-spl {
in-partition-table = "no"
image = "u-boot-spl.bin"
offset = 512
}
partition uboot {
in-partition-table = "no"
image = "u-boot.img"
offset = 14k
}
partition uboot-env {
in-partition-table = "no"
image = "uboot-env.bin"
offset = 526k
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
offset = 2M
size = 60M
}
}

View File

@@ -2,45 +2,41 @@
* MIPS Creator CI20 *
*********************
Introduction
============
The 'ci20_defconfig' will create a root filesystem and a kernel image
under the 'output/images/' directory. This document will try to explain how
to use them in order to run Buildroot in the MIPS Creator CI20 board.
How to build it
===============
Assuming you are at the U-Boot prompt of the MIPS Creator CI20, you have to
load the generated kernel image by using the 'tftpboot' command. In
order to do that, you will need to get the network working. Here you
have the instructions to set the ip address, netmask and gateway:
Configure Buildroot
-------------------
setenv ipaddr x.x.x.x
setenv netmask x.x.x.x
setenv gatewayip x.x.x.x
$ make ci20_defconfig
Now you have to set the ip for the TFTP server you are going to load the
kernel image from, and also the name of the kernel image file (we use
'uImage' as a filename in this example):
Build the rootfs
----------------
setenv serverip x.x.x.x
setenv bootfile uImage
Note: you will need to have access to the network, since Buildroot will
download the packages' sources.
And finally load the kernel image:
You may now build your rootfs with:
tftpboot
$ make
Now you have to extract the generated root filesystem into a USB drive
or SD-Card. Here you have the instructions to boot from the two of them.
You have to choose the one your prefer:
(This may take a while, consider getting yourself a coffee ;-) )
From USB
setenv bootargs console=ttyS4,115200 console=tty0 mem=256M@0x0
mem=768M@0x30000000 root=/dev/sda1
How to write the SD card
========================
From SD-Card
setenv bootargs console=ttyS4,115200 console=tty0 mem=256M@0x0
mem=768M@0x30000000 root=/dev/mmcblk0p1
Once the build process is finished you will have an image called
"sdcard.img" in the output/images/ directory.
Make sure the SD card is not mounted then copy the bootable "sdcard.img" onto
it with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
Insert the SDcard into your ci20, and power it up. Your new system
should come up now and start a console on the UART HEADER.
see: https://elinux.org/CI20_Hardware#Dedicated_UART_header
And finally run this command to boot the board:
bootm

View File

@@ -1,10 +0,0 @@
baudrate=115200
board_mfr=NP
bootargs=console=ttyS4,115200 console=tty0 mem=256M@0x0 mem=768M@0x30000000 rootwait root=/dev/mmcblk0p1 devtmpfs.mount=1 ip=dhcp
bootcmd=run ethargs; ext4load mmc 0:1 0x88000000 /boot/uImage; bootm 0x88000000
bootdelay=1
ethargs=env set bootargs ${bootargs}
loads_echo=1
stderr=eserial0,eserial4
stdin=eserial0,eserial4
stdout=eserial0,eserial4

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