buildroot: fix version for 2009.02-rc3

.defconfig

@@ -6,6 +6,7 @@ BR2_HAVE_DOT_CONFIG=y
 # BR2_alpha is not set
 # BR2_arm is not set
 # BR2_armeb is not set
+# BR2_avr32 is not set
 # BR2_cris is not set
 # BR2_ia64 is not set
 BR2_i386=y

.gitignore

@@ -1,15 +0,0 @@
-/output
-/dl
-/.auto.deps
-/.config.cmd
-/.config.old
-/..config.tmp
-/.config
-*.depend
-*.o
-/*.patch
-/*.diff
-*.orig
-*.rej
-*~
-*.pyc

COPYING

@@ -1,339 +0,0 @@
-		    GNU GENERAL PUBLIC LICENSE
-		       Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-			    Preamble
-
-  The licenses for most software are designed to take away your
-freedom to share and change it.  By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users.  This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
-using it.  (Some other Free Software Foundation software is covered by
-the GNU Lesser General Public License instead.)  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
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-(2) offer you this license which gives you legal permission to copy,
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-   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
-
-  0. This License applies to any program or other work which contains
-a notice placed by the copyright holder saying it may be distributed
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-covered by this License; they are outside its scope.  The act of
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-is covered only if its contents constitute a work based on the
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-Whether that is true depends on what the Program does.
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-along with the Program.
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-You may charge a fee for the physical act of transferring a copy, and
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-  2. You may modify your copy or copies of the Program or any portion
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-above, provided that you also meet all of these conditions:
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-with the Program (or with a work based on the Program) on a volume of
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-  `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
-  <signature of Ty Coon>, 1 April 1989
-  Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs.  If your program is a subroutine library, you may
-consider it more useful to permit linking proprietary applications with the
-library.  If this is what you want to do, use the GNU Lesser General
-Public License instead of this License.

Config.in

@@ -1,6 +1,6 @@
 #
 
-mainmenu "Buildroot $BR2_VERSION Configuration"
+mainmenu "Buildroot2 Configuration"
 
 config BR2_HAVE_DOT_CONFIG
 	bool
@@ -8,108 +8,28 @@ config BR2_HAVE_DOT_CONFIG
 
 config BR2_VERSION
 	string
-	option env="BR2_VERSION_FULL"
+	default "2009.02-rc3"
 
-config BR2_HOSTARCH
-	string
-	option env="HOSTARCH"
-
-config BR2_EXTERNAL
-	string
-	option env="BR2_EXTERNAL"
-
-# Hidden config symbols for packages to check system gcc version
-config BR2_HOST_GCC_VERSION
-	string
-	option env="HOST_GCC_VERSION"
-
-config BR2_HOST_GCC_AT_LEAST_4_7
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 7"
-
-config BR2_HOST_GCC_AT_LEAST_4_8
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 8"
-	select BR2_HOST_GCC_AT_LEAST_4_7
-
-config BR2_HOST_GCC_AT_LEAST_4_9
-	bool
-	default y if BR2_HOST_GCC_VERSION = "4 9"
-	select BR2_HOST_GCC_AT_LEAST_4_8
-
-config BR2_HOST_GCC_AT_LEAST_5
-	bool
-	default y if BR2_HOST_GCC_VERSION = "5"
-	select BR2_HOST_GCC_AT_LEAST_4_9
-
-# Hidden boolean selected by packages in need of Java in order to build
-# (example: xbmc)
-config BR2_NEEDS_HOST_JAVA
-	bool
-
-# Hidden boolean selected by packages in need of javac in order to build
-# (example: classpath)
-config BR2_NEEDS_HOST_JAVAC
-	bool
-
-# Hidden boolean selected by packages in need of jar in order to build
-# (example: classpath)
-config BR2_NEEDS_HOST_JAR
-	bool
-
-# Hidden boolean selected by pre-built packages for x86, when they
-# need to run on x86-64 machines (example: pre-built external
-# toolchains, binary tools like SAM-BA, etc.).
-config BR2_HOSTARCH_NEEDS_IA32_LIBS
-	bool
-
-# Hidden boolean selected by packages that need to build 32 bits
-# binaries with the host compiler, even on 64 bits build machines (e.g
-# bootloaders).
-config BR2_HOSTARCH_NEEDS_IA32_COMPILER
-	bool
-
-source "arch/Config.in"
+source "target/Config.in.arch"
+source "target/device/Config.in"
 
 menu "Build options"
 
-menu "Commands"
-
 config BR2_WGET
 	string "Wget command"
-	default "wget --passive-ftp -nd -t 3"
+	default "wget --passive-ftp -nd"
 
-config BR2_SVN
-	string "Subversion (svn) command"
-	default "svn"
+config BR2_SVN_CO
+	string "Subversion (svn) command to download source tree"
+	default "svn co"
 
-config BR2_BZR
-	string "Bazaar (bzr) command"
-	default "bzr"
+config BR2_SVN_UP
+	string "Subversion (svn) command to update source tree"
+	default "svn up"
 
 config BR2_GIT
-	string "Git command"
-	default "git"
-
-config BR2_CVS
-	string "CVS command"
-	default "cvs"
-
-config BR2_LOCALFILES
-	string "Local files retrieval command"
-	default "cp"
-
-config BR2_SCP
-	string "Secure copy (scp) command"
-	default "scp"
-
-config BR2_SSH
-	string "Secure shell (ssh) command"
-	default "ssh"
-
-config BR2_HG
-	string "Mercurial (hg) command"
-	default "hg"
+	string "Git command to download source tree"
+	default "git clone"
 
 config BR2_ZCAT
 	string "zcat command"
@@ -131,13 +51,6 @@ config BR2_BZCAT
 	  Default is "bzcat"
 	  Other possible values include "bunzip2 -c" or "bzip2 -d -c".
 
-config BR2_XZCAT
-	string "xzcat command"
-	default "xzcat"
-	help
-	  Command to be used to extract a xz'ed file to stdout.
-	  Default is "xzcat"
-
 config BR2_TAR_OPTIONS
 	string "Tar options"
 	default ""
@@ -146,236 +59,147 @@ config BR2_TAR_OPTIONS
 	  E.g. " -v --exclude='*.svn*'" to exclude all .svn internal files
 	  and to be verbose.
 
-endmenu
-
-config BR2_DEFCONFIG_FROM_ENV
-	string
-	option env="BR2_DEFCONFIG"
-
-config BR2_DEFCONFIG
-	string "Location to save buildroot config"
-	default BR2_DEFCONFIG_FROM_ENV if BR2_DEFCONFIG_FROM_ENV != ""
-	default "$(CONFIG_DIR)/defconfig"
-	help
-	  When running 'make savedefconfig', the defconfig file will be saved
-	  in this location.
-
 config BR2_DL_DIR
 	string "Download dir"
-	default "$(TOPDIR)/dl"
+	default "$(BASE_DIR)/dl"
 	help
 	  Directory to store all the source files that we need to fetch.
-	  If the Linux shell environment has defined the BR2_DL_DIR
+	  If the Linux shell environment has defined the BUILDROOT_DL_DIR
 	  environment variable, then this overrides this configuration item.
 
-	  The default is $(TOPDIR)/dl
+	  The default is $(BASE_DIR)/dl
 
-config BR2_HOST_DIR
-	string "Host dir"
-	default "$(BASE_DIR)/host"
-	help
-	  Directory to store all the binary files that are built for the host.
-	  This includes the cross compilation toolchain when building the
-	  internal buildroot toolchain.
-
-	  The default is $(BASE_DIR)/host
-
-menu "Mirrors and Download locations"
-
-config BR2_PRIMARY_SITE
-	string "Primary download site"
+config BR2_COPYTO
+	string "Copy result to..."
 	default ""
 	help
-	  Primary site to download from. If this option is set then buildroot
-	  will try to download package source first from this site and try the
-	  default if the file is not found.
-	  Valid URIs are:
-	    - URIs recognized by $(WGET)
-	    - local URIs of the form file://absolutepath
-	    - scp URIs of the form scp://[user@]host:path.
+	  Setting this variable will (eventually) override 
+	  any other copyto configurations in buildroot.
 
-config BR2_PRIMARY_SITE_ONLY
-	bool "Only allow downloads from primary download site"
-	depends on BR2_PRIMARY_SITE != ""
+source	"target/device/Config.in.mirrors"
+
+config BR2_STAGING_DIR
+	string "Toolchain and header file location?"
+	default "$(BUILD_DIR)/staging_dir"
 	help
-	  If this option is enabled, downloads will only be attempted
-	  from the primary download site. Other locations, like the
-	  package's official download location or the backup download
-	  site, will not be considered. Therefore, if the package is
-	  not present on the primary site, the download fails.
+	  This is the location where the toolchain will be installed.  The
+	  toolchain will not work if it is moved from this location.
+	  Therefore, if you wish to package up a uClibc toolchain, it is
+	  important that is is set to the final location where the toolchain
+	  will be used.
 
-	  This is useful for project developers who want to ensure
-	  that the project can be built even if the upstream tarball
-	  locations disappear.
+	  Most people will leave this set to the default value of
+	  "$(BUILD_DIR)/staging_dir".
 
-if !BR2_PRIMARY_SITE_ONLY
-
-config BR2_BACKUP_SITE
-	string "Backup download site"
-	default "http://sources.buildroot.net"
+config BR2_FPU_SUFFIX
+	bool "Add '_nofpu' suffix for softfloat toolchains"
 	help
-	  Backup site to download from. If this option is set then buildroot
-	  will fall back to download package sources from here if the
-	  normal location fails.
+	  If the toolchain is configured to use softfloat, then
+	  the "_nofpu" suffix will be added to the toolchain build
+	  directory name and to any rootfs image name
 
-config BR2_KERNEL_MIRROR
-	string "Kernel.org mirror"
-	default "https://www.kernel.org/pub"
+config BR2_TOPDIR_PREFIX
+	string "Custom build dir prefix"
+	default ""
 	help
-	  kernel.org is mirrored on a number of servers around the world.
-	  The following allows you to select your preferred mirror.
+	  Add a custom string to the beginning of the build directories.
 
-	  Have a look on the kernel.org site for a list of mirrors, then enter
-	  the URL to the base directory.  Examples:
+	  build_ARCH -> [PREFIX]_build_ARCH
+	  toolchain_build_ARCH -> [PREFIX]_toolchain_build_ARCH
 
-	     http://www.XX.kernel.org/pub (XX = country code)
-	     http://mirror.aarnet.edu.au/pub/ftp.kernel.org
-
-config BR2_GNU_MIRROR
-	string "GNU Software mirror"
-	default "http://ftp.gnu.org/pub/gnu"
+config BR2_TOPDIR_SUFFIX
+	string "Custom build dir suffix"
+	default ""
 	help
-	  GNU has multiple software mirrors scattered around the world.
-	  The following allows you to select your preferred mirror.
+	  Add a custom string to the end of the build directories.
 
-	  Have a look on the gnu.org site for a list of mirrors, then enter
-	  the URL to the base directory.  Examples:
+	  build_ARCH -> build_ARCH_[SUFFIX]
+	  toolchain_build_ARCH -> toolchain_build_ARCH_[SUFFIX]
 
-	     http://ftp.gnu.org/pub/gnu
-	     http://mirror.aarnet.edu.au/pub/gnu
-
-config BR2_LUAROCKS_MIRROR
-	string "LuaRocks mirror"
-	default "http://rocks.moonscript.org"
+config BR2_ROOTFS_PREFIX
+	string "Custom root fs prefix"
+	default "rootfs"
 	help
-	  LuaRocks repository.
+	  Add a custom string to the beginning of the root file system name.
 
-	  See http://luarocks.org
-
-config BR2_CPAN_MIRROR
-	string "CPAN mirror (Perl packages)"
-	default "http://cpan.metacpan.org"
+config BR2_ROOTFS_SUFFIX
+	string "Custom root fs suffix"
+	default ""
 	help
-	  CPAN (Comprehensive Perl Archive Network) is a repository
-	  of Perl packages. It has multiple software mirrors scattered
-	  around the world. This option allows you to select a mirror.
+	  Add a custom string to the end of the root file system name.
 
-	  The list of mirrors is available at:
-	  http://search.cpan.org/mirror
+config BR2_GNU_BUILD_SUFFIX
+	string "GNU build hostname suffix"
+	default "pc-linux-gnu"
+	help
+	  The string used to pass to configure scripts via the
+	  --build= option.  Just specify the suffix here, the leading
+	  arch will be filled in automatically.
 
-endif
+	  Here's some copy and paste build host options for you:
+	      linux:   pc-linux-gnu
+	      cygwin:  pc-cygwin
+	      os x:    apple-darwin7 / apple-darwin8
 
-endmenu
+config BR2_GNU_TARGET_SUFFIX
+	string "GNU target suffix"
+	default "linux-uclibcgnueabi" if BR2_ARM_EABI
+	default "linux-uclibc"
+	help
+	  The string used to pass to configure scripts via the
+	  --target= option.  Just specify the suffix here, the leading
+	  arch will be filled in automatically.
+
+	  Most users will want to stick with the default setting, though
+	  other users (most notably ARM EABI) like to add on to this in
+	  order to stay in line with gcc conventions.
+
+	  Default options are:
+	      linux-uclibcgnueabi for ARM EABI
+	      linux-uclibc for the rest
+	      gnuhurd-uclibc for the hurd
 
 config BR2_JLEVEL
-	int "Number of jobs to run simultaneously (0 for auto)"
-	default "0"
+	int "Number of jobs to run simultaneously"
+	default "1"
 	help
-	  Number of jobs to run simultaneously.  If 0, determine
-	  automatically according to number of CPUs on the host
-	  system.
+	  Number of jobs to run simultaneously
 
-config BR2_CCACHE
-	bool "Enable compiler cache"
+config BR2_PREFER_IMA
+	bool "prefer IMA compiles"
 	help
-	  This option will enable the use of ccache, a compiler
-	  cache. It will cache the result of previous builds to speed
-	  up future builds. By default, the cache is stored in
-	  $HOME/.buildroot-ccache.
+	  Where possible, compile package with Inter Module Analysis.
+	  This potentially uses alot of system resources on your compile
+	  host with the benefit of creating smaller binaries for the target.
 
-	  Note that Buildroot does not try to invalidate the cache
-	  contents when the compiler changes in an incompatible
-	  way. Therefore, if you make a change to the compiler version
-	  and/or configuration, you are responsible for purging the
-	  ccache cache by removing the $HOME/.buildroot-ccache
-	  directory.
+	  If unsure, say No.
 
-if BR2_CCACHE
-
-config BR2_CCACHE_DIR
-	string "Compiler cache location"
-	default "$(HOME)/.buildroot-ccache"
-	help
-	  Where ccache should store cached files.
-
-config BR2_CCACHE_INITIAL_SETUP
-	string "Compiler cache initial setup"
-	help
-	  Initial ccache settings to apply, such as --max-files or --max-size.
-
-	  For example, if your project is known to require more space than the
-	  default max cache size, then you might want to increase the cache size
-	  to a suitable amount using the -M (--max-size) option.
-
-	  The string you specify here is passed verbatim to ccache.  Refer to
-	  ccache documentation for more details.
-
-	  These initial settings are applied after ccache has been compiled.
-
-config BR2_CCACHE_USE_BASEDIR
-	bool "Use relative paths"
-	default y
-	help
-	  Allow ccache to convert absolute paths within the output
-	  directory into relative paths.
-
-	  During the build, many -I include directives are given with
-	  an absolute path. These absolute paths end up in the hashes
-	  that are computed by ccache. Therefore, when you build from a
-	  different directory, the hash will be different and the
-	  cached object will not be used.
-
-	  To improve cache performance, set this option to y. This
-	  allows ccache to rewrite absolute paths within the output
-	  directory into relative paths. Note that only paths within
-	  the output directory will be rewritten; therefore, if you
-	  change BR2_HOST_DIR to point outside the output directory and
-	  subsequently move it to a different location, this will lead
-	  to cache misses.
-
-	  This option has as a result that the debug information in the
-	  object files also has only relative paths. Therefore, make
-	  sure you cd to the build directory before starting gdb. See
-	  the section "COMPILING IN DIFFERENT DIRECTORIES" in the
-	  ccache manual for more information.
-
-endif
+	  WARNING: This is highly experimental at the moment.
 
 config BR2_DEPRECATED
-	bool "Show options and packages that are deprecated or obsolete"
+	bool "Show packages that are deprecated or obsolete"
 	help
-	  This option shows outdated/obsolete versions of packages and
-	  options that are otherwise hidden.
+	  This option hides outdated/obsolete versions of packages.
 
-if BR2_DEPRECATED
-
-config BR2_DEPRECATED_SINCE_2015_05
-	bool
+config BR2_RECENT
+	bool "Show packages that are of the latest major version"
 	default y
+	help
+	  This option show recent versions of packages.
 
-config BR2_DEPRECATED_SINCE_2015_08
-	bool
-	default y
-
-config BR2_DEPRECATED_SINCE_2015_11
-	bool
-	default y
-
-config BR2_DEPRECATED_SINCE_2016_02
-	bool
-	default y
-
-endif
+config BR2_CONFIG_CACHE
+	bool "Use a central configure cache file"
+	help
+	  This determines if a central config cache is used by
+	  packages, reducing the configure time for packages as each
+	  one caches its findings.
 
 config BR2_ENABLE_DEBUG
 	bool "build packages with debugging symbols"
+	select BR2_PACKAGE_GDB_SERVER
 	help
-	  Build packages with debugging symbols enabled. All libraries
-	  and binaries in the 'staging' directory will have debugging
-	  symbols, which allows remote debugging even if libraries and
-	  binaries are stripped on the target. Whether libraries and
-	  binaries are stripped on the target is controlled by the
-	  BR2_STRIP_* options below.
+	  Build packages with debugging symbols
+	  enabled
 
 if BR2_ENABLE_DEBUG
 choice
@@ -408,45 +232,34 @@ endchoice
 endif
 
 choice
-	prompt "strip command for binaries on target"
+	prompt "strip"
 	default BR2_STRIP_strip
+	help
+	  Select whether to strip binaries and libraries for the target
+	  or not.
+	  strip   is the normal strip command
+	  sstrip  is a strip that discards more than the normal strip
+	  none    do not strip (only for debugging!)
 
 config BR2_STRIP_strip
 	bool "strip"
-	depends on !BR2_PACKAGE_HOST_ELF2FLT
+	depends on !BR2_ENABLE_DEBUG && !BR2_ELF2FLT
 	help
-	  Binaries and libraries in the target filesystem will be
-	  stripped using the normal 'strip' command. This allows to
-	  save space, mainly by removing debugging symbols. Debugging
-	  symbols on the target are needed for native debugging, but
-	  not when remote debugging is used.
+	  strip   is the normal strip command
+
+config BR2_STRIP_sstrip
+	bool "sstrip"
+	select BR2_PACKAGE_SSTRIP_HOST
+	depends on !BR2_ENABLE_DEBUG && !BR2_ELF2FLT
+	help
+	  sstrip  is a strip that discards more than the normal strip
 
 config BR2_STRIP_none
 	bool "none"
 	help
-	  Do not strip binaries and libraries in the target
-	  filesystem.
+	  none    do not strip (only for debugging!)
 endchoice
 
-config BR2_STRIP_EXCLUDE_FILES
-	string "executables that should not be stripped"
-	depends on !BR2_STRIP_none
-	default ""
-	help
-	  You may specify a space-separated list of binaries and libraries
-	  here that should not be stripped on the target.
-
-config BR2_STRIP_EXCLUDE_DIRS
-	string "directories that should be skipped when stripping"
-	depends on !BR2_STRIP_none
-	default ""
-	help
-	  You may specify a space-separated list of directories that should
-	  be skipped when stripping. Binaries and libraries in these
-	  directories will not be touched.
-	  The directories should be specified relative to the target directory,
-	  without leading slash.
-
 choice
 	prompt "gcc optimization level"
 	default BR2_OPTIMIZE_S
@@ -455,11 +268,13 @@ choice
 
 config BR2_OPTIMIZE_0
 	bool "optimization level 0"
+	depends on !BR2_PACKAGE_LINUX
 	help
 	  Do not optimize. This is the default.
 
 config BR2_OPTIMIZE_1
 	bool "optimization level 1"
+	depends on !BR2_PACKAGE_LINUX
 	help
 	  Optimize. Optimizing compilation takes somewhat more time,
 	  and a lot more memory for a large function. With -O, the
@@ -513,204 +328,50 @@ config BR2_OPTIMIZE_S
 
 endchoice
 
-config BR2_GOOGLE_BREAKPAD_ENABLE
-	bool "Enable google-breakpad support"
-	select BR2_PACKAGE_GOOGLE_BREAKPAD
-	depends on BR2_INSTALL_LIBSTDCPP
-	depends on BR2_TOOLCHAIN_USES_GLIBC
-	depends on BR2_PACKAGE_GOOGLE_BREAKPAD_ARCH_SUPPORTS
+config BR2_PREFER_STATIC_LIB
+	bool "prefer static libraries"
 	help
-	  This option will enable the use of google breakpad, a
-	  library and tool suite that allows you to distribute an
-	  application to users with compiler-provided debugging
-	  information removed, record crashes in compact "minidump"
-	  files, send them back to your server and produce C and C++
-	  stack traces from these minidumps.  Breakpad can also write
-	  minidumps on request for programs that have not crashed.
-
-if BR2_GOOGLE_BREAKPAD_ENABLE
-
-config BR2_GOOGLE_BREAKPAD_INCLUDE_FILES
-	string "List of executables and libraries to extract symbols from"
-	default ""
-	help
-	  You may specify a space-separated list of binaries and
-	  libraries with full paths relative to $(TARGET_DIR) of which
-	  debug symbols will be dumped for further use with google
-	  breakpad.
-
-	  A directory structure that can be used by minidump-stackwalk
-	  will be created at:
-
-	  $(STAGING_DIR)/usr/share/google-breakpad-symbols
-
-endif
-
-choice
-	bool "build code with Stack Smashing Protection"
-	default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
-	depends on BR2_TOOLCHAIN_HAS_SSP
-	help
-	  Enable stack smashing protection support using GCC's
-	  -fstack-protector option family.
-
-	  See http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
-	  for details.
-
-	  Note that this requires the toolchain to have SSP
-	  support. This is always the case for glibc and eglibc
-	  toolchain, but is optional in uClibc toolchains.
-
-config BR2_SSP_NONE
-	bool "None"
-	help
-	  Disable stack-smashing protection.
-
-config BR2_SSP_REGULAR
-	bool "-fstack-protector"
-	help
-	  Emit extra code to check for buffer overflows, such as stack
-	  smashing attacks. This is done by adding a guard variable to
-	  functions with vulnerable objects. This includes functions
-	  that call alloca, and functions with buffers larger than 8
-	  bytes. The guards are initialized when a function is entered
-	  and then checked when the function exits. If a guard check
-	  fails, an error message is printed and the program exits.
-
-config BR2_SSP_STRONG
-	bool "-fstack-protector-strong"
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
-	help
-	  Like -fstack-protector but includes additional functions to be
-	  protected - those that have local array definitions, or have
-	  references to local frame addresses.
-
-comment "Stack Smashing Protection strong needs a toolchain w/ gcc >= 4.9"
-	depends on !BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
-
-config BR2_SSP_ALL
-	bool "-fstack-protector-all"
-	help
-	  Like -fstack-protector except that all functions are
-	  protected. This option might have a significant performance
-	  impact on the compiled binaries.
-
-endchoice
-
-comment "Stack Smashing Protection needs a toolchain w/ SSP"
-	depends on !BR2_TOOLCHAIN_HAS_SSP
-
-choice
-	bool "libraries"
-	default BR2_SHARED_LIBS if BR2_BINFMT_SUPPORTS_SHARED
-	default BR2_STATIC_LIBS if !BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  Select the type of libraries you want to use on the target.
-
+	  Where possible, build and use static libraries for the target.
+	  This potentially increases your code size and should only be
+	  used if you know what you do.
 	  The default is to build dynamic libraries and use those on
-	  the target filesystem, except when the architecture and/or
-	  the selected binary format does not support shared
-	  libraries.
+	  the target filesystem.
 
-config BR2_STATIC_LIBS
-	bool "static only"
+	  WARNING: This is highly experimental at the moment.
+
+config BR2_HAVE_MANPAGES
+	bool "manpages on the target"
 	help
-	  Build and use only static libraries. No shared libraries
-	  will be instaled on the target. This potentially increases
-	  your code size and should only be used if you know what you
-	  are doing. Note that some packages may not be available when
-	  this option is enabled, due to their need for dynamic
-	  library support.
+	  Leave the manpages on the target.
+	  If you say n here, your target will not contain any
+	  manpage.
 
-config BR2_SHARED_LIBS
-	bool "shared only"
-	depends on BR2_BINFMT_SUPPORTS_SHARED
+config BR2_HAVE_INFOPAGES
+	bool "infopages on the target"
 	help
-	  Build and use only shared libraries. This is the recommended
-	  solution as it saves space and build time.
+	  Leave the infopages on the target.
+	  If you say n here, your target will not contain any
+	  infopage.
 
-config BR2_SHARED_STATIC_LIBS
-	bool "both static and shared"
-	depends on BR2_BINFMT_SUPPORTS_SHARED
+config BR2_HAVE_DOCUMENTATION
+	bool "documentation on the target"
 	help
-	  Build both shared and static libraries, but link executables
-	  dynamically. While building both shared and static libraries
-	  take more time and more disk space, having static libraries
-	  may be useful to link some of the applications statically.
+	  Leave the documentation on the target.
+	  If you say n here, your target will not contain any
+	  documentation.
 
-endchoice
-
-
-config BR2_PACKAGE_OVERRIDE_FILE
-	string "location of a package override file"
-	default "$(CONFIG_DIR)/local.mk"
+config BR2_HAVE_DEVFILES
+	bool "development files in target filesystem"
 	help
-	  A package override file is a short makefile that contains
-	  variable definitions of the form <pkg>_OVERRIDE_SRCDIR,
-	  which allows to tell Buildroot to use an existing directory
-	  as the source directory for a particular package. See the
-	  Buildroot documentation for more details on this feature.
+	  Install headers and static libraries in the
+	  target filesystem
 
-config BR2_GLOBAL_PATCH_DIR
-	string "global patch directories"
-	help
-	  You may specify a space separated list of one or more directories
-	  containing global package patches. For a specific version
-	  <packageversion> of a specific package <packagename>, patches are
-	  applied as follows:
-
-	  First, the default Buildroot patch set for the package is applied
-	  from the package's directory in Buildroot.
-
-	  Then for every directory - <global-patch-dir> - that exists in
-	  BR2_GLOBAL_PATCH_DIR, if the directory
-	  <global-patch-dir>/<packagename>/<packageversion>/ exists, then all
-	  *.patch files in this directory will be applied.
-
-	  Otherwise, if the directory <global-patch-dir>/<packagename> exists,
-	  then all *.patch files in the directory will be applied.
-
-menu "Advanced"
-
-config BR2_COMPILER_PARANOID_UNSAFE_PATH
-	bool "paranoid check of library/header paths"
-	help
-	  By default, when this option is disabled, when the Buildroot
-	  cross-compiler will encounter an unsafe library or header
-	  path (such as /usr/include, or /usr/lib), the compiler will
-	  display a warning.
-
-	  By enabling this option, this warning is turned into an
-	  error, which will completely abort the build when such
-	  unsafe paths are encountered.
-
-	  Note that this mechanism is available for both the internal
-	  toolchain (through gcc and binutils patches) and external
-	  toolchain backends (through the external toolchain wrapper).
-
-endmenu
+source package/gnuconfig/Config.in
 
 endmenu
 
 source "toolchain/Config.in"
 
-source "system/Config.in"
-
-source "linux/Config.in"
-
 source "package/Config.in"
 
-source "fs/Config.in"
-
-source "boot/Config.in"
-
-source "package/Config.in.host"
-
-source "Config.in.legacy"
-
-menu "User-provided options"
-	depends on BR2_EXTERNAL != "support/dummy-external"
-
-source "$BR2_EXTERNAL/Config.in"
-
-endmenu
+source "target/Config.in"

Makefile.legacy

@@ -1,62 +0,0 @@
-#
-# Makefile.legacy - support for backward compatibility
-#
-# This file contains placeholders to detect backward-compatibility problems.
-# When a buildroot "API" feature is being deprecated, a rule should be added
-# here that issues an error when the old feature is used.
-#
-# This file is not included if BR2_DEPRECATED is selected, so it is possible
-# to bypass the errors (although that's usually a bad idea).
-
-ifeq ($(BR2_LEGACY),y)
-$(error "You have legacy configuration in your .config! Please check your configuration.")
-endif
-
-#
-# Legacy options from 2014.02
-#
-
-# The BUILDROOT_DL_DIR environment variable was renamed by BR2_DL_DIR. We
-# want to detect someone using the old variable, _except_ if also the new
-# variable was set. By the time we get here, however, we no longer have
-# access to the BR2_DL_DIR environment variable (because it has been overridden
-# by the .config inclusion). However, the environment variable (if defined) was
-# saved in DL_DIR, so we can use that.
-ifneq ($(BUILDROOT_DL_DIR),)
-ifneq ($(BUILDROOT_DL_DIR),$(DL_DIR))
-$(error "The BUILDROOT_DL_DIR environment variable was renamed to BR2_DL_DIR.")
-endif
-endif
-
-# If a script is using the deprecated BUILDROOT_CONFIG, make sure it fails.
-# Add some directories in front just in case someone used dirname on it.
-BUILDROOT_CONFIG_FAKE = /tmp/deprecated/The-BUILDROOT_CONFIG-environment-variable-was-renamed-to-BR2_CONFIG
-
-# Similar to above for BUILDROOT_CONFIG, but here we have no .config equivalent.
-ifneq ($(BUILDROOT_CONFIG),)
-ifneq ($(BUILDROOT_CONFIG),$(BR2_CONFIG))
-ifneq ($(BUILDROOT_CONFIG),$(BUILDROOT_CONFIG_FAKE))
-$(error "The BUILDROOT_CONFIG environment variable was renamed to BR2_CONFIG.")
-endif
-endif
-endif
-
-BUILDROOT_CONFIG = $(BUILDROOT_CONFIG_FAKE)
-export BUILDROOT_CONFIG
-
-#
-# Legacy options from 2012.08
-#
-
-host-pkg-config:
-	@$(call MESSAGE,host-pkg-config is replaced by host-pkgconf)
-	@$(call MESSAGE,please update your .mk files)
-	@false
-.PHONY: host-pkg-config
-
-#
-# Legacy options from 2012.05
-#
-GENTARGETS = $$(error The GENTARGETS macro no longer exists; use $$$$(eval $$$$(generic-package)) or $$$$(eval $$$$(host-generic-package)))
-AUTOTARGETS = $$(error The AUTOTARGETS macro no longer exists; use $$$$(eval $$$$(autotools-package)) or $$$$(eval $$$$(host-autotools-package)))
-CMAKETARGETS = $$(error The CMAKETARGETS macro no longer exists; use $$$$(eval $$$$(cmake-package)) or $$$$(eval $$$$(host-cmake-package)))

README

@@ -1,26 +0,0 @@
-Buildroot is a simple, efficient and easy-to-use tool to generate embedded
-Linux systems through cross-compilation.
-
-The documentation can be found in docs/manual. You can generate a text
-document with 'make manual-text' and read output/docs/manual/manual.text.
-Online documentation can be found at http://buildroot.org/docs.html
-
-To build and use the buildroot stuff, do the following:
-
-1) run 'make menuconfig'
-2) select the target architecture and the packages you wish to compile
-3) run 'make'
-4) wait while it compiles
-5) find the kernel, bootloader, root filesystem, etc. in output/images
-
-You do not need to be root to build or run buildroot.  Have fun!
-
-Buildroot comes with a basic configuration for a number of boards. Run
-'make list-defconfigs' to view the list of provided configurations.
-
-Please feed suggestions, bug reports, insults, and bribes back to the
-buildroot mailing list: buildroot@buildroot.org
-You can also find us on #buildroot on Freenode IRC.
-
-If you would like to contribute patches, please read
-https://buildroot.org/manual.html#submitting-patches

TODO

@@ -0,0 +1,14 @@
+Buildroot2 TODOs
+
+- fix packages/Makefile.autotools.in to use a package-imposed patchdir
+  (Ivan Kuten)
+- convert all packages that use autoconf to use the infrastructure of
+  packages/Makefile.autotools.in
+- fix setting of flags for packages
+
+- stabilize for a 0.10.0 release
+
+- think about using a common --config-cache for configure
+  Should take care of expanding TARGET_CONFIGURE_ARGS for cross compiles
+  to working presets.
+

arch/Config.in

@@ -1,409 +0,0 @@
-menu "Target options"
-
-config BR2_ARCH_IS_64
-	bool
-
-config BR2_KERNEL_64_USERLAND_32
-	bool
-
-config BR2_SOFT_FLOAT
-	bool
-
-config BR2_ARCH_HAS_MMU_MANDATORY
-	bool
-
-config BR2_ARCH_HAS_MMU_OPTIONAL
-	bool
-
-config BR2_ARCH_HAS_FDPIC_SUPPORT
-	bool
-
-choice
-	prompt "Target Architecture"
-	default BR2_i386
-	help
-	  Select the target architecture family to build for.
-
-config BR2_arcle
-	bool "ARC (little endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
-	  that can be used from deeply embedded to high performance host
-	  applications. Little endian.
-
-config BR2_arceb
-	bool "ARC (big endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
-	  that can be used from deeply embedded to high performance host
-	  applications. Big endian.
-
-config BR2_arm
-	bool "ARM (little endian)"
-	# MMU support is set by the subarchitecture file, arch/Config.in.arm
-	help
-	  ARM is a 32-bit reduced instruction set computer (RISC) instruction
-	  set architecture (ISA) developed by ARM Holdings. Little endian.
-	  http://www.arm.com/
-	  http://en.wikipedia.org/wiki/ARM
-
-config BR2_armeb
-	bool "ARM (big endian)"
-	# MMU support is set by the subarchitecture file, arch/Config.in.arm
-	help
-	  ARM is a 32-bit reduced instruction set computer (RISC) instruction
-	  set architecture (ISA) developed by ARM Holdings. Big endian.
-	  http://www.arm.com/
-	  http://en.wikipedia.org/wiki/ARM
-
-config BR2_aarch64
-	bool "AArch64 (little endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
-	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
-	  http://en.wikipedia.org/wiki/ARM
-
-config BR2_aarch64_be
-	bool "AArch64 (big endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
-	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
-	  http://en.wikipedia.org/wiki/ARM
-
-config BR2_bfin
-	bool "Blackfin"
-	select BR2_ARCH_HAS_FDPIC_SUPPORT
-	help
-	  The Blackfin is a family of 16 or 32-bit microprocessors developed,
-	  manufactured and marketed by Analog Devices.
-	  http://www.analog.com/
-	  http://en.wikipedia.org/wiki/Blackfin
-
-config BR2_i386
-	bool "i386"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Intel i386 architecture compatible microprocessor
-	  http://en.wikipedia.org/wiki/I386
-
-config BR2_m68k
-	bool "m68k"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	depends on BROKEN # ice in uclibc / inet_ntoa_r
-	help
-	  Motorola 68000 family microprocessor
-	  http://en.wikipedia.org/wiki/M68k
-
-config BR2_microblazeel
-	bool "Microblaze AXI (little endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
-	  based architecture (little endian)
-	  http://www.xilinx.com
-	  http://en.wikipedia.org/wiki/Microblaze
-
-config BR2_microblazebe
-	bool "Microblaze non-AXI (big endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
-	  based architecture (non-AXI, big endian)
-	  http://www.xilinx.com
-	  http://en.wikipedia.org/wiki/Microblaze
-
-config BR2_mips
-	bool "MIPS (big endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
-	  http://www.mips.com/
-	  http://en.wikipedia.org/wiki/MIPS_Technologies
-
-config BR2_mipsel
-	bool "MIPS (little endian)"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
-	  http://www.mips.com/
-	  http://en.wikipedia.org/wiki/MIPS_Technologies
-
-config BR2_mips64
-	bool "MIPS64 (big endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
-	  http://www.mips.com/
-	  http://en.wikipedia.org/wiki/MIPS_Technologies
-
-config BR2_mips64el
-	bool "MIPS64 (little endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
-	  http://www.mips.com/
-	  http://en.wikipedia.org/wiki/MIPS_Technologies
-
-config BR2_nios2
-	bool "Nios II"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  Nios II is a soft core processor from Altera Corporation.
-	  http://www.altera.com/
-	  http://en.wikipedia.org/wiki/Nios_II
-
-config BR2_powerpc
-	bool "PowerPC"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
-	  Big endian.
-	  http://www.power.org/
-	  http://en.wikipedia.org/wiki/Powerpc
-
-config BR2_powerpc64
-	bool "PowerPC64 (big endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
-	  Big endian.
-	  http://www.power.org/
-	  http://en.wikipedia.org/wiki/Powerpc
-
-config BR2_powerpc64le
-	bool "PowerPC64 (little endian)"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
-	  Little endian.
-	  http://www.power.org/
-	  http://en.wikipedia.org/wiki/Powerpc
-
-config BR2_sh
-	bool "SuperH"
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	help
-	  SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
-	  instruction set architecture (ISA) developed by Hitachi.
-	  http://www.hitachi.com/
-	  http://en.wikipedia.org/wiki/SuperH
-
-config BR2_sh64
-	bool "SuperH64"
-	depends on BR2_DEPRECATED_SINCE_2015_05
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
-	  instruction set architecture (ISA) developed by Hitachi.
-	  http://www.hitachi.com/
-	  http://en.wikipedia.org/wiki/SuperH
-
-config BR2_sparc
-	bool "SPARC"
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  SPARC (from Scalable Processor Architecture) is a RISC instruction
-	  set architecture (ISA) developed by Sun Microsystems.
-	  http://www.oracle.com/sun
-	  http://en.wikipedia.org/wiki/Sparc
-
-config BR2_sparc64
-	bool "SPARC64"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  SPARC (from Scalable Processor Architecture) is a RISC instruction
-	  set architecture (ISA) developed by Sun Microsystems.
-	  http://www.oracle.com/sun
-	  http://en.wikipedia.org/wiki/Sparc
-
-config BR2_x86_64
-	bool "x86_64"
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	help
-	  x86-64 is an extension of the x86 instruction set (Intel i386
-	  architecture compatible microprocessor).
-	  http://en.wikipedia.org/wiki/X86_64
-
-config BR2_xtensa
-	bool "Xtensa"
-	# MMU support is set by the subarchitecture file, arch/Config.in.xtensa
-	help
-	  Xtensa is a Tensilica processor IP architecture.
-	  http://en.wikipedia.org/wiki/Xtensa
-	  http://www.tensilica.com/
-
-endchoice
-
-# The following string values are defined by the individual
-# Config.in.$ARCH files
-config BR2_ARCH
-	string
-
-config BR2_ENDIAN
-	string
-
-config BR2_GCC_TARGET_ARCH
-	string
-
-config BR2_GCC_TARGET_ABI
-	string
-
-config BR2_GCC_TARGET_CPU
-	string
-
-config BR2_GCC_TARGET_CPU_REVISION
-	string
-
-# The value of this option will be passed as --with-fpu=<value> when
-# building gcc (internal backend) or -mfpu=<value> in the toolchain
-# wrapper (external toolchain)
-config BR2_GCC_TARGET_FPU
-	string
-
-# The value of this option will be passed as --with-float=<value> when
-# building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
-# wrapper (external toolchain)
-config BR2_GCC_TARGET_FLOAT_ABI
-	string
-
-# The value of this option will be passed as --with-mode=<value> when
-# building gcc (internal backend) or -m<value> in the toolchain
-# wrapper (external toolchain)
-config BR2_GCC_TARGET_MODE
-	string
-
-# Must be selected by binary formats that support shared libraries.
-config BR2_BINFMT_SUPPORTS_SHARED
-	bool
-
-# Set up target binary format
-choice
-	prompt "Target Binary Format"
-	default BR2_BINFMT_ELF if BR2_USE_MMU
-	default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
-	default BR2_BINFMT_FLAT
-
-config BR2_BINFMT_ELF
-	bool "ELF"
-	depends on BR2_USE_MMU
-	select BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  ELF (Executable and Linkable Format) is a format for libraries and
-	  executables used across different architectures and operating
-	  systems.
-
-config BR2_BINFMT_FDPIC
-	bool "FDPIC"
-	depends on BR2_ARCH_HAS_FDPIC_SUPPORT
-	select BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  ELF FDPIC binaries are based on ELF, but allow the individual load
-	  segments of a binary to be located in memory independently of each
-	  other. This makes this format ideal for use in environments where no
-	  MMU is available.
-
-config BR2_BINFMT_FLAT
-	bool "FLAT"
-	depends on !BR2_USE_MMU
-	help
-	  FLAT binary is a relatively simple and lightweight executable format
-	  based on the original a.out format. It is widely used in environment
-	  where no MMU is available.
-
-endchoice
-
-# Set up flat binary type
-choice
-	prompt "FLAT Binary type"
-	depends on BR2_BINFMT_FLAT
-	default BR2_BINFMT_FLAT_ONE
-
-config BR2_BINFMT_FLAT_ONE
-	bool "One memory region"
-	help
-	  All segments are linked into one memory region.
-
-config BR2_BINFMT_FLAT_SEP_DATA
-	bool "Separate data and code region"
-	help
-	  Allow for the data and text segments to be separated and placed in
-	  different regions of memory.
-
-config BR2_BINFMT_FLAT_SHARED
-	bool "Shared binary"
-	# Even though this really generates shared binaries, there is no libdl
-	# and dlopen() cannot be used. So packages that require shared
-	# libraries cannot be built. Therefore, we don't select
-	# BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
-	# Although this adds -static to the compilation, that's not a problem
-	# because the -mid-shared-library option overrides it.
-	help
-	  Allow to load and link indiviual FLAT binaries at run time.
-
-endchoice
-
-if BR2_arcle || BR2_arceb
-source "arch/Config.in.arc"
-endif
-
-if BR2_arm || BR2_armeb
-source "arch/Config.in.arm"
-endif
-
-if BR2_aarch64 || BR2_aarch64_be
-source "arch/Config.in.aarch64"
-endif
-
-if BR2_bfin
-source "arch/Config.in.bfin"
-endif
-
-if BR2_m68k
-source "arch/Config.in.m68k"
-endif
-
-if BR2_microblazeel || BR2_microblazebe
-source "arch/Config.in.microblaze"
-endif
-
-if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
-source "arch/Config.in.mips"
-endif
-
-if BR2_nios2
-source "arch/Config.in.nios2"
-endif
-
-if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
-source "arch/Config.in.powerpc"
-endif
-
-if BR2_sh || BR2_sh64
-source "arch/Config.in.sh"
-endif
-
-if BR2_sparc || BR2_sparc64
-source "arch/Config.in.sparc"
-endif
-
-if BR2_i386 || BR2_x86_64
-source "arch/Config.in.x86"
-endif
-
-if BR2_xtensa
-source "arch/Config.in.xtensa"
-endif
-
-endmenu # Target options

arch/Config.in.aarch64

@@ -1,7 +0,0 @@
-config BR2_ARCH
-	default "aarch64"	if BR2_aarch64
-	default "aarch64_be"	if BR2_aarch64_be
-
-config BR2_ENDIAN
-	default "LITTLE" if BR2_aarch64
-	default "BIG"	 if BR2_aarch64_be

arch/Config.in.arc

@@ -1,77 +0,0 @@
-choice
-	prompt "Target CPU"
-	depends on BR2_arc
-	default BR2_arc770d
-	help
-	    Specific CPU to use
-
-config BR2_arc750d
-	bool "ARC 750D"
-
-config BR2_arc770d
-	bool "ARC 770D"
-
-config BR2_archs38
-	bool "ARC HS38"
-
-endchoice
-
-# Choice of atomic instructions presence
-config BR2_ARC_ATOMIC_EXT
-	bool "Atomic extension (LLOCK/SCOND instructions)"
-	default y if BR2_arc770d || BR2_archs38
-
-config BR2_ARCH
-	default "arc"	if BR2_arcle
-	default "arceb"	if BR2_arceb
-
-config BR2_arc
-	bool
-	default y if BR2_arcle || BR2_arceb
-
-config BR2_ENDIAN
-	default "LITTLE" if BR2_arcle
-	default "BIG"	 if BR2_arceb
-
-config BR2_GCC_TARGET_CPU
-	default "arc700" if BR2_arc750d
-	default "arc700" if BR2_arc770d
-	default "archs"	 if BR2_archs38
-
-choice
-	prompt "MMU Page Size"
-	default BR2_ARC_PAGE_SIZE_8K
-	help
-	  MMU starting from version 3 (found in ARC 770) and now
-	  version 4 (found in ARC HS38) allows the selection of the
-	  page size during ASIC design creation.
-
-	  The following options are available for MMU v3 and v4: 4kB,
-	  8kB and 16 kB.
-
-	  The default is 8 kB (that really matches the only page size
-	  in MMU v2).  It is important to build a toolchain with page
-	  size matching the hardware configuration. Otherwise
-	  user-space applications will fail at runtime.
-
-config BR2_ARC_PAGE_SIZE_4K
-	bool "4KB"
-	depends on BR2_arc770d || BR2_archs38
-
-config BR2_ARC_PAGE_SIZE_8K
-	bool "8KB"
-	help
-	  This is the one and only option available for MMUv2 and
-	  default value for MMU v3 and v4.
-
-config BR2_ARC_PAGE_SIZE_16K
-	bool "16KB"
-	depends on BR2_arc770d || BR2_archs38
-
-endchoice
-
-config BR2_ARC_PAGE_SIZE
-	string
-	default "4K" if BR2_ARC_PAGE_SIZE_4K
-	default "8K" if BR2_ARC_PAGE_SIZE_8K
-	default "16K" if BR2_ARC_PAGE_SIZE_16K

arch/Config.in.arm

@@ -1,471 +0,0 @@
-# arm cpu features
-config BR2_ARM_CPU_HAS_NEON
-	bool
-
-# for some cores, NEON support is optional
-config BR2_ARM_CPU_MAYBE_HAS_NEON
-	bool
-
-# for some cores, VFPv2 is optional
-config BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	bool
-
-config BR2_ARM_CPU_HAS_VFPV2
-	bool
-
-# for some cores, VFPv3 is optional
-config BR2_ARM_CPU_MAYBE_HAS_VFPV3
-	bool
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
-
-config BR2_ARM_CPU_HAS_VFPV3
-	bool
-	select BR2_ARM_CPU_HAS_VFPV2
-
-# for some cores, VFPv4 is optional
-config BR2_ARM_CPU_MAYBE_HAS_VFPV4
-	bool
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV3
-
-config BR2_ARM_CPU_HAS_VFPV4
-	bool
-	select BR2_ARM_CPU_HAS_VFPV3
-
-config BR2_ARM_CPU_HAS_ARM
-	bool
-
-config BR2_ARM_CPU_HAS_THUMB
-	bool
-
-config BR2_ARM_CPU_HAS_THUMB2
-	bool
-
-config BR2_ARM_CPU_ARMV4
-	bool
-
-config BR2_ARM_CPU_ARMV5
-	bool
-
-config BR2_ARM_CPU_ARMV6
-	bool
-
-config BR2_ARM_CPU_ARMV7A
-	bool
-
-choice
-	prompt "Target Architecture Variant"
-	depends on BR2_arm || BR2_armeb
-	default BR2_arm926t
-	help
-	  Specific CPU variant to use
-
-config BR2_arm920t
-	bool "arm920t"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm922t
-	bool "arm922t"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm926t
-	bool "arm926t"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm1136j_s
-	bool "arm1136j-s"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm1136jf_s
-	bool "arm1136jf-s"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm1176jz_s
-	bool "arm1176jz-s"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm1176jzf_s
-	bool "arm1176jzf-s"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_arm11mpcore
-	bool "mpcore"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV6
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a5
-	bool "cortex-A5"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_MAYBE_HAS_NEON
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a7
-	bool "cortex-A7"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a8
-	bool "cortex-A8"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV3
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a9
-	bool "cortex-A9"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_MAYBE_HAS_NEON
-	select BR2_ARM_CPU_MAYBE_HAS_VFPV3
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a12
-	bool "cortex-A12"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_a15
-	bool "cortex-A15"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_NEON
-	select BR2_ARM_CPU_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_m3
-	bool "cortex-M3"
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_HAS_THUMB2
-config BR2_fa526
-	bool "fa526/626"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_pj4
-	bool "pj4"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_VFPV3
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_strongarm
-	bool "strongarm sa110/sa1100"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_xscale
-	bool "xscale"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_iwmmxt
-	bool "iwmmxt"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-endchoice
-
-config BR2_ARM_ENABLE_NEON
-	bool "Enable NEON SIMD extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_NEON
-	select BR2_ARM_CPU_HAS_NEON
-	help
-	  For some CPU cores, the NEON SIMD extension is optional.
-	  Select this option if you are certain your particular
-	  implementation has NEON support and you want to use it.
-
-config BR2_ARM_ENABLE_VFP
-	bool "Enable VFP extension support"
-	depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
-	select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
-	select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
-	help
-	  For some CPU cores, the VFP extension is optional. Select
-	  this option if you are certain your particular
-	  implementation has VFP support and you want to use it.
-
-choice
-	prompt "Target ABI"
-	depends on BR2_arm || BR2_armeb
-	default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
-	default BR2_ARM_EABI
-	help
-	  Application Binary Interface to use. The Application Binary
-	  Interface describes the calling conventions (how arguments
-	  are passed to functions, how the return value is passed, how
-	  system calls are made, etc.).
-
-config BR2_ARM_EABI
-	bool "EABI"
-	help
-	  The EABI is currently the standard ARM ABI, which is used in
-	  most projects. It supports both the 'soft' floating point
-	  model (in which floating point instructions are emulated in
-	  software) and the 'softfp' floating point model (in which
-	  floating point instructions are executed using an hardware
-	  floating point unit, but floating point arguments to
-	  functions are passed in integer registers).
-
-	  The 'softfp' floating point model is link-compatible with
-	  the 'soft' floating point model, i.e you can link a library
-	  built 'soft' with some other code built 'softfp'.
-
-	  However, passing the floating point arguments in integer
-	  registers is a bit inefficient, so if your ARM processor has
-	  a floating point unit, and you don't have pre-compiled
-	  'soft' or 'softfp' code, using the EABIhf ABI will provide
-	  better floating point performances.
-
-	  If your processor does not have a floating point unit, then
-	  you must use this ABI.
-
-config BR2_ARM_EABIHF
-	bool "EABIhf"
-	depends on BR2_ARM_CPU_HAS_VFPV2
-	help
-	  The EABIhf is an extension of EABI which supports the 'hard'
-	  floating point model. This model uses the floating point
-	  unit to execute floating point instructions, and passes
-	  floating point arguments in floating point registers.
-
-	  It is more efficient than EABI for floating point related
-	  workload. However, it does not allow to link against code
-	  that has been pre-built for the 'soft' or 'softfp' floating
-	  point models.
-
-	  If your processor has a floating point unit, and you don't
-	  depend on existing pre-compiled code, this option is most
-	  likely the best choice.
-
-endchoice
-
-choice
-	prompt "Floating point strategy"
-	depends on BR2_ARM_EABI || BR2_ARM_EABIHF
-	default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
-	default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
-	default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
-	default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
-
-config BR2_ARM_SOFT_FLOAT
-	bool "Soft float"
-	depends on BR2_ARM_EABI
-	select BR2_SOFT_FLOAT
-	help
-	  This option allows to use software emulated floating
-	  point. It should be used for ARM cores that do not include a
-	  Vector Floating Point unit, such as ARMv5 cores (ARM926 for
-	  example) or certain ARMv6 cores.
-
-config BR2_ARM_FPU_VFPV2
-	bool "VFPv2"
-	depends on BR2_ARM_CPU_HAS_VFPV2
-	help
-	  This option allows to use the VFPv2 floating point unit, as
-	  available in some ARMv5 processors (ARM926EJ-S) and some
-	  ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
-	  MPCore).
-
-	  Note that this option is also safe to use for newer cores
-	  such as Cortex-A, because the VFPv3 and VFPv4 units are
-	  backward compatible with VFPv2.
-
-config BR2_ARM_FPU_VFPV3
-	bool "VFPv3"
-	depends on BR2_ARM_CPU_HAS_VFPV3
-	help
-	  This option allows to use the VFPv3 floating point unit, as
-	  available in some ARMv7 processors (Cortex-A{8, 9}). This
-	  option requires a VFPv3 unit that has 32 double-precision
-	  registers, which is not necessarily the case in all SOCs
-	  based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
-	  instead, which is guaranteed to work on all Cortex-A{8, 9}.
-
-	  Note that this option is also safe to use for newer cores
-	  that have a VFPv4 unit, because VFPv4 is backward compatible
-	  with VFPv3. They must of course also have 32
-	  double-precision registers.
-
-config BR2_ARM_FPU_VFPV3D16
-	bool "VFPv3-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV3
-	help
-	  This option allows to use the VFPv3 floating point unit, as
-	  available in some ARMv7 processors (Cortex-A{8, 9}). This
-	  option requires a VFPv3 unit that has 16 double-precision
-	  registers, which is generally the case in all SOCs based on
-	  Cortex-A{8, 9}, even though VFPv3 is technically optional on
-	  Cortex-A9. This is the safest option for those cores.
-
-	  Note that this option is also safe to use for newer cores
-	  such that have a VFPv4 unit, because the VFPv4 is backward
-	  compatible with VFPv3.
-
-config BR2_ARM_FPU_VFPV4
-	bool "VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
-	help
-	  This option allows to use the VFPv4 floating point unit, as
-	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
-	  15}). This option requires a VFPv4 unit that has 32
-	  double-precision registers, which is not necessarily the
-	  case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
-	  unsure, you should probably use VFPv4-D16 instead.
-
-	  Note that if you want binary code that works on all ARMv7
-	  cores, including the earlier Cortex-A{8, 9}, you should
-	  instead select VFPv3.
-
-config BR2_ARM_FPU_VFPV4D16
-	bool "VFPv4-D16"
-	depends on BR2_ARM_CPU_HAS_VFPV4
-	help
-	  This option allows to use the VFPv4 floating point unit, as
-	  available in some ARMv7 processors (Cortex-A{5, 7, 12,
-	  15}). This option requires a VFPv4 unit that has 16
-	  double-precision registers, which is always available on
-	  Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
-	  Cortex-A7.
-
-	  Note that if you want binary code that works on all ARMv7
-	  cores, including the earlier Cortex-A{8, 9}, you should
-	  instead select VFPv3-D16.
-
-config BR2_ARM_FPU_NEON
-	bool "NEON"
-	depends on BR2_ARM_CPU_HAS_NEON
-	help
-	  This option allows to use the NEON SIMD unit, as available
-	  in some ARMv7 processors, as a floating-point unit. It
-	  should however be noted that using NEON for floating point
-	  operations doesn't provide a complete compatibility with the
-	  IEEE 754.
-
-config BR2_ARM_FPU_NEON_VFPV4
-	bool "NEON/VFPv4"
-	depends on BR2_ARM_CPU_HAS_VFPV4
-	depends on BR2_ARM_CPU_HAS_NEON
-	help
-	  This option allows to use both the VFPv4 and the NEON SIMD
-	  units for floating point operations. Note that some ARMv7
-	  cores do not necessarily have VFPv4 and/or NEON support, for
-	  example on Cortex-A5 and Cortex-A7, support for VFPv4 and
-	  NEON is optional.
-
-endchoice
-
-choice
-	prompt "ARM instruction set"
-
-config BR2_ARM_INSTRUCTIONS_ARM
-	bool "ARM"
-	depends on BR2_ARM_CPU_HAS_ARM
-	help
-	  This option instructs the compiler to generate regular ARM
-	  instructions, that are all 32 bits wide.
-
-config BR2_ARM_INSTRUCTIONS_THUMB
-	bool "Thumb"
-	depends on BR2_ARM_CPU_HAS_THUMB
-	# Thumb-1 and VFP are not compatible
-	depends on BR2_ARM_SOFT_FLOAT
-	help
-	  This option instructions the compiler to generate Thumb
-	  instructions, which allows to mix 16 bits instructions and
-	  32 bits instructions. This generally provides a much smaller
-	  compiled binary size.
-
-comment "Thumb1 is not compatible with VFP"
-	depends on BR2_ARM_CPU_HAS_THUMB
-	depends on !BR2_ARM_SOFT_FLOAT
-
-config BR2_ARM_INSTRUCTIONS_THUMB2
-	bool "Thumb2"
-	depends on BR2_ARM_CPU_HAS_THUMB2
-	help
-	  This option instructions the compiler to generate Thumb2
-	  instructions, which allows to mix 16 bits instructions and
-	  32 bits instructions. This generally provides a much smaller
-	  compiled binary size.
-
-endchoice
-
-config BR2_ARCH
-	default "arm"	if BR2_arm
-	default "armeb"	if BR2_armeb
-
-config BR2_ENDIAN
-	default "LITTLE" if BR2_arm
-	default "BIG"	 if BR2_armeb
-
-config BR2_GCC_TARGET_CPU
-	default "arm920t"	if BR2_arm920t
-	default "arm922t"	if BR2_arm922t
-	default "arm926ej-s"	if BR2_arm926t
-	default "arm1136j-s"	if BR2_arm1136j_s
-	default "arm1136jf-s"	if BR2_arm1136jf_s
-	default "arm1176jz-s"	if BR2_arm1176jz_s
-	default "arm1176jzf-s"	if BR2_arm1176jzf_s
-	default "mpcore"	if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
-	default "mpcorenovfp"	if BR2_arm11mpcore
-	default "cortex-a5"	if BR2_cortex_a5
-	default "cortex-a7"	if BR2_cortex_a7
-	default "cortex-a8"	if BR2_cortex_a8
-	default "cortex-a9"	if BR2_cortex_a9
-	default "cortex-a12"	if BR2_cortex_a12
-	default "cortex-a15"	if BR2_cortex_a15
-	default "cortex-m3"	if BR2_cortex_m3
-	default "fa526"		if BR2_fa526
-	default "marvell-pj4"	if BR2_pj4
-	default "strongarm"	if BR2_strongarm
-	default "xscale"	if BR2_xscale
-	default "iwmmxt"	if BR2_iwmmxt
-
-config BR2_GCC_TARGET_ABI
-	default "aapcs-linux"
-
-config BR2_GCC_TARGET_FPU
-	default "vfp"		if BR2_ARM_FPU_VFPV2
-	default "vfpv3"		if BR2_ARM_FPU_VFPV3
-	default "vfpv3-d16" 	if BR2_ARM_FPU_VFPV3D16
-	default "vfpv4" 	if BR2_ARM_FPU_VFPV4
-	default "vfpv4-d16" 	if BR2_ARM_FPU_VFPV4D16
-	default "neon" 		if BR2_ARM_FPU_NEON
-	default "neon-vfpv4" 	if BR2_ARM_FPU_NEON_VFPV4
-
-config BR2_GCC_TARGET_FLOAT_ABI
-	default "soft"		if BR2_ARM_SOFT_FLOAT
-	default "softfp"	if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
-	default "hard"		if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
-
-config BR2_GCC_TARGET_MODE
-	default "arm"		if BR2_ARM_INSTRUCTIONS_ARM
-	default "thumb"		if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2

arch/Config.in.bfin

@@ -1,107 +0,0 @@
-choice
-	prompt "Target CPU"
-	depends on BR2_bfin
-	default BR2_bf609
-	help
-	  Specify target CPU
-config BR2_bf606
-	bool "bf606"
-config BR2_bf607
-	bool "bf607"
-config BR2_bf608
-	bool "bf608"
-config BR2_bf609
-	bool "bf609"
-config BR2_bf512
-	bool "bf512"
-config BR2_bf514
-	bool "bf514"
-config BR2_bf516
-	bool "bf516"
-config BR2_bf518
-	bool "bf518"
-config BR2_bf522
-	bool "bf522"
-config BR2_bf523
-	bool "bf523"
-config BR2_bf524
-	bool "bf524"
-config BR2_bf525
-	bool "bf525"
-config BR2_bf526
-	bool "bf526"
-config BR2_bf527
-	bool "bf527"
-config BR2_bf531
-	bool "bf531"
-config BR2_bf532
-	bool "bf532"
-config BR2_bf533
-	bool "bf533"
-config BR2_bf534
-	bool "bf534"
-config BR2_bf536
-	bool "bf536"
-config BR2_bf537
-	bool "bf537"
-config BR2_bf538
-	bool "bf538"
-config BR2_bf539
-	bool "bf539"
-config BR2_bf542
-	bool "bf542"
-config BR2_bf544
-	bool "bf544"
-config BR2_bf547
-	bool "bf547"
-config BR2_bf548
-	bool "bf548"
-config BR2_bf549
-	bool "bf549"
-config BR2_bf561
-	bool "bf561"
-endchoice
-
-config BR2_ARCH
-	default "bfin"
-
-config BR2_ENDIAN
-	default "LITTLE"
-
-config BR2_GCC_TARGET_CPU
-	default bf606		if BR2_bf606
-	default bf607		if BR2_bf607
-	default bf608		if BR2_bf608
-	default bf609		if BR2_bf609
-	default bf512		if BR2_bf512
-	default bf514		if BR2_bf514
-	default bf516		if BR2_bf516
-	default bf518		if BR2_bf518
-	default bf522		if BR2_bf522
-	default bf523		if BR2_bf523
-	default bf524		if BR2_bf524
-	default bf525		if BR2_bf525
-	default bf526		if BR2_bf526
-	default bf527		if BR2_bf527
-	default bf531		if BR2_bf531
-	default bf532		if BR2_bf532
-	default bf533		if BR2_bf533
-	default bf534		if BR2_bf534
-	default bf536		if BR2_bf536
-	default bf537		if BR2_bf537
-	default bf538		if BR2_bf538
-	default bf539		if BR2_bf539
-	default bf542		if BR2_bf542
-	default bf544		if BR2_bf544
-	default bf547		if BR2_bf547
-	default bf548		if BR2_bf548
-	default bf549		if BR2_bf549
-	default bf561		if BR2_bf561
-
-config BR2_GCC_TARGET_CPU_REVISION
-	string "Target CPU revision"
-	help
-	  Specify a target CPU revision, which will be appended to the
-	  value of the -mcpu option. For example, if the selected CPU is
-	  bf609, and then selected CPU revision is "0.0", then gcc will
-	  receive the -mcpu=bf609-0.0 option.

arch/Config.in.m68k

@@ -1,13 +0,0 @@
-config BR2_ARCH
-	default "m68k"		if BR2_m68k
-
-config BR2_ENDIAN
-	default "BIG"
-
-config BR2_GCC_TARGET_ARCH
-	default "68000"		if BR2_m68k_68000
-	default "68010"		if BR2_m68k_68010
-	default "68020"		if BR2_m68k_68020
-	default "68030"		if BR2_m68k_68030
-	default "68040"		if BR2_m68k_68040
-	default "68060"		if BR2_m68k_68060

arch/Config.in.microblaze

@@ -1,11 +0,0 @@
-config BR2_ARCH
-	default "microblazeel"  if BR2_microblazeel
-	default "microblaze"    if BR2_microblazebe
-
-config BR2_ENDIAN
-	default "LITTLE" if BR2_microblazeel
-	default "BIG"	 if BR2_microblazebe
-
-config BR2_microblaze
-	bool
-	default y if BR2_microblazeel || BR2_microblazebe

arch/Config.in.mips

@@ -1,85 +0,0 @@
-choice
-	prompt "Target Architecture Variant"
-	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
-	default BR2_mips_32 if BR2_mips || BR2_mipsel
-	default BR2_mips_64 if BR2_mips64 || BR2_mips64el
-	help
-	  Specific CPU variant to use
-
-	  64bit cabable: 64, 64r2, 64r6
-	  non-64bit capable: 32, 32r2, 32r6
-
-config BR2_mips_32
-	bool "mips 32"
-	depends on !BR2_ARCH_IS_64
-config BR2_mips_32r2
-	bool "mips 32r2"
-	depends on !BR2_ARCH_IS_64
-config BR2_mips_32r6
-	bool "mips 32r6"
-	depends on !BR2_ARCH_IS_64
-config BR2_mips_64
-	bool "mips 64"
-	depends on BR2_ARCH_IS_64
-config BR2_mips_64r2
-	bool "mips 64r2"
-	depends on BR2_ARCH_IS_64
-config BR2_mips_64r6
-	bool "mips 64r6"
-	depends on BR2_ARCH_IS_64
-endchoice
-
-
-choice
-	prompt "Target ABI"
-	depends on BR2_mips64 || BR2_mips64el
-	default BR2_MIPS_NABI32
-
-	help
-	  Application Binary Interface to use
-
-config BR2_MIPS_NABI32
-	bool "n32"
-	depends on BR2_ARCH_IS_64
-	select BR2_KERNEL_64_USERLAND_32
-config BR2_MIPS_NABI64
-	bool "n64"
-	depends on BR2_ARCH_IS_64
-endchoice
-
-config BR2_MIPS_SOFT_FLOAT
-	bool "Use soft-float"
-	default y
-	select BR2_SOFT_FLOAT
-	help
-	  If your target CPU does not have a Floating Point Unit (FPU)
-	  or a kernel FPU emulator, but you still wish to support
-	  floating point functions, then everything will need to be
-	  compiled with soft floating point support (-msoft-float).
-
-config BR2_ARCH
-	default "mips"		if BR2_mips
-	default "mipsel"	if BR2_mipsel
-	default "mips64"	if BR2_mips64
-	default "mips64el"	if BR2_mips64el
-
-config BR2_ENDIAN
-	default "LITTLE"	if BR2_mipsel || BR2_mips64el
-	default "BIG" 	    	if BR2_mips || BR2_mips64
-
-config BR2_GCC_TARGET_ARCH
-	default "mips32"	if BR2_mips_32
-	default "mips32r2"	if BR2_mips_32r2
-	default "mips32r6"	if BR2_mips_32r6
-	default "mips64"	if BR2_mips_64
-	default "mips64r2"	if BR2_mips_64r2
-	default "mips64r6"	if BR2_mips_64r6
-
-config BR2_MIPS_OABI32
-	bool
-	default y		if BR2_mips || BR2_mipsel
-
-config BR2_GCC_TARGET_ABI
-	default "32"		if BR2_MIPS_OABI32
-	default "n32"		if BR2_MIPS_NABI32
-	default "64"		if BR2_MIPS_NABI64

arch/Config.in.nios2

@@ -1,5 +0,0 @@
-config BR2_ARCH
-	default "nios2"
-
-config BR2_ENDIAN
-	default "LITTLE"

arch/Config.in.powerpc

@@ -1,214 +0,0 @@
-config BR2_POWERPC_CPU_HAS_ALTIVEC
-	bool
-
-config BR2_POWERPC_CPU_HAS_SPE
-	bool
-
-choice
-	prompt "Target Architecture Variant"
-	default BR2_generic_powerpc
-	help
-	  Specific CPU variant to use
-config BR2_generic_powerpc
-	bool "generic"
-config BR2_powerpc_401
-	bool "401"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_403
-	bool "403"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_405
-	bool "405"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_405fp
-	bool "405 with FPU"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_440
-	bool "440"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_440fp
-	bool "440 with FPU"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_464
-	bool "464"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_464fp
-	bool "464 with FPU"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_476
-	bool "476"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_476fp
-	bool "476 with FPU"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_505
-	bool "505"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_601
-	bool "601"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_602
-	bool "602"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_603
-	bool "603"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_603e
-	bool "603e"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_604
-	bool "604"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_604e
-	bool "604e"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_620
-	bool "620"
-config BR2_powerpc_630
-	bool "630"
-config BR2_powerpc_740
-	bool "740"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_7400
-	bool "7400"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_7450
-	bool "7450"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_750
-	bool "750"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_821
-	bool "821"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_823
-	bool "823"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_860
-	bool "860"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_970
-	bool "970"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-config BR2_powerpc_8540
-	bool "8540 / e500v1"
-	depends on !BR2_ARCH_IS_64
-	select BR2_POWERPC_CPU_HAS_SPE
-config BR2_powerpc_8548
-	bool "8548 / e500v2"
-	depends on !BR2_ARCH_IS_64
-	select BR2_POWERPC_CPU_HAS_SPE
-config BR2_powerpc_e300c2
-	bool "e300c2"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_e300c3
-	bool "e300c3"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_e500mc
-	bool "e500mc"
-	depends on !BR2_ARCH_IS_64
-config BR2_powerpc_e5500
-	bool "e5500"
-	depends on !BR2_powerpc64le
-config BR2_powerpc_e6500
-	bool "e6500"
-	depends on !BR2_powerpc64le
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-config BR2_powerpc_power4
-	bool "power4"
-config BR2_powerpc_power5
-	bool "power5"
-config BR2_powerpc_power6
-	bool "power6"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-config BR2_powerpc_power7
-	bool "power7"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-config BR2_powerpc_power8
-	bool "power8"
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-endchoice
-
-choice
-	prompt "Target ABI"
-	default BR2_powerpc_SPE if BR2_POWERPC_CPU_HAS_SPE
-	default BR2_powerpc_CLASSIC
-	help
-	  Application Binary Interface to use
-
-config BR2_powerpc_CLASSIC
-	bool "Classic"
-	depends on !BR2_POWERPC_CPU_HAS_SPE
-config BR2_powerpc_SPE
-	bool "SPE"
-	depends on BR2_POWERPC_CPU_HAS_SPE
-endchoice
-
-config BR2_POWERPC_SOFT_FLOAT
-	bool "Use soft-float"
-	select BR2_SOFT_FLOAT
-	help
-	  If your target CPU does not have a Floating Point Unit (FPU)
-	  or a kernel FPU emulator, but you still wish to support
-	  floating point functions, then everything will need to be
-	  compiled with soft floating point support (-msoft-float).
-
-config BR2_ARCH
-	default "powerpc"	if BR2_powerpc
-	default "powerpc64"	if BR2_powerpc64
-	default "powerpc64le"	if BR2_powerpc64le
-
-config BR2_ENDIAN
-	default "BIG"    if BR2_powerpc || BR2_powerpc64
-	default "LITTLE" if BR2_powerpc64le
-
-config BR2_GCC_TARGET_CPU
-	default "401"		if BR2_powerpc_401
-	default "403"		if BR2_powerpc_403
-	default "405"		if BR2_powerpc_405
-	default "405fp"		if BR2_powerpc_405fp
-	default "440"		if BR2_powerpc_440
-	default "440fp"		if BR2_powerpc_440fp
-	default "464"		if BR2_powerpc_464
-	default "464fp"		if BR2_powerpc_464fp
-	default "476"		if BR2_powerpc_476
-	default "476fp"		if BR2_powerpc_476fp
-	default "505"		if BR2_powerpc_505
-	default "601"		if BR2_powerpc_601
-	default "602"		if BR2_powerpc_602
-	default "603"		if BR2_powerpc_603
-	default "603e"		if BR2_powerpc_603e
-	default "604"		if BR2_powerpc_604
-	default "604e"		if BR2_powerpc_604e
-	default "620"		if BR2_powerpc_620
-	default "630"		if BR2_powerpc_630
-	default "740"		if BR2_powerpc_740
-	default "7400"		if BR2_powerpc_7400
-	default "7450"		if BR2_powerpc_7450
-	default "750"		if BR2_powerpc_750
-	default "821"		if BR2_powerpc_821
-	default "823"		if BR2_powerpc_823
-	default "860"		if BR2_powerpc_860
-	default "970"		if BR2_powerpc_970
-	default "8540"		if BR2_powerpc_8540
-	default	"8548"		if BR2_powerpc_8548
-	default "e300c2"	if BR2_powerpc_e300c2
-	default "e300c3"	if BR2_powerpc_e300c3
-	default "e500mc"	if BR2_powerpc_e500mc
-	default "e5500"		if BR2_powerpc_e5500
-	default "e6500"		if BR2_powerpc_e6500
-	default "power4"	if BR2_powerpc_power4
-	default "power5"	if BR2_powerpc_power5
-	default "power6"	if BR2_powerpc_power6
-	default "power7"	if BR2_powerpc_power7
-	default "power8"	if BR2_powerpc_power8
-
-config BR2_GCC_TARGET_ABI
-	default "altivec"		if BR2_PPC_ABI_altivec
-	default "no-altivec"		if BR2_PPC_ABI_no-altivec
-	default "spe"			if BR2_PPC_ABI_spe
-	default "no-spe"		if BR2_PPC_ABI_no-spe
-	default "ibmlongdouble"		if BR2_PPC_ABI_ibmlongdouble
-	default "ieeelongdouble"	if BR2_PPC_ABI_ieeelongdouble

arch/Config.in.sh

@@ -1,30 +0,0 @@
-choice
-	prompt "Target Architecture Variant"
-	depends on BR2_sh
-	default BR2_sh4
-	help
-	  Specific CPU variant to use
-
-config BR2_sh2a
-	bool "sh2a (SH2A big endian)"
-config BR2_sh4
-	bool "sh4 (SH4 little endian)"
-config BR2_sh4eb
-	bool "sh4eb (SH4 big endian)"
-config BR2_sh4a
-	bool "sh4a (SH4A little endian)"
-config BR2_sh4aeb
-	bool "sh4aeb (SH4A big endian)"
-endchoice
-
-config BR2_ARCH
-	default "sh2a"		if BR2_sh2a
-	default "sh4"		if BR2_sh4
-	default "sh4eb"		if BR2_sh4eb
-	default "sh4a"		if BR2_sh4a
-	default "sh4aeb"	if BR2_sh4aeb
-	default "sh64"		if BR2_sh64
-
-config BR2_ENDIAN
-	default "LITTLE"	if BR2_sh4 || BR2_sh4a || BR2_sh64
-	default "BIG"		if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb

arch/Config.in.sparc

@@ -1,30 +0,0 @@
-choice
-	prompt "Target Architecture Variant"
-	depends on BR2_sparc || BR2_sparc64
-	default BR2_sparc_v8 if BR2_sparc
-	default BR2_sparc_v9 if BR2_sparc64
-	help
-	  Specific CPU variant to use
-
-config BR2_sparc_v8
-	bool "v8"
-	depends on BR2_sparc
-config BR2_sparc_leon3
-	bool "leon3"
-	depends on BR2_sparc
-config BR2_sparc_v9
-	bool "v9"
-	depends on BR2_sparc64
-endchoice
-
-config BR2_ARCH
-	default "sparc"	if BR2_sparc
-	default "sparc64" if BR2_sparc64
-
-config BR2_ENDIAN
-	default "BIG"
-
-config BR2_GCC_TARGET_CPU
-	default "leon3"		if BR2_sparc_leon3
-	default "v8"		if BR2_sparc_v8
-	default "ultrasparc"	if BR2_sparc_v9

arch/Config.in.x86

@@ -1,280 +0,0 @@
-# i386/x86_64 cpu features
-config BR2_X86_CPU_HAS_MMX
-	bool
-config BR2_X86_CPU_HAS_SSE
-	bool
-config BR2_X86_CPU_HAS_SSE2
-	bool
-config BR2_X86_CPU_HAS_SSE3
-	bool
-config BR2_X86_CPU_HAS_SSSE3
-	bool
-config BR2_X86_CPU_HAS_SSE4
-	bool
-config BR2_X86_CPU_HAS_SSE42
-	bool
-config BR2_X86_CPU_HAS_AVX
-	bool
-config BR2_X86_CPU_HAS_AVX2
-	bool
-
-choice
-	prompt "Target Architecture Variant"
-	depends on BR2_i386 || BR2_x86_64
-	default BR2_x86_i586 if BR2_i386
-	help
-	  Specific CPU variant to use
-
-config BR2_x86_i386
-	bool "i386"
-	depends on !BR2_x86_64
-config BR2_x86_i486
-	bool "i486"
-	depends on !BR2_x86_64
-config BR2_x86_i586
-	bool "i586"
-	depends on !BR2_x86_64
-config BR2_x86_x1000
-	bool "x1000"
-	depends on !BR2_x86_64
-	help
-	  The Intel X1000 is a Pentium class microprocessor in the
-	  Quark (sub-Atom) Product Line. The X1000 has a bug on the
-	  lock prefix requiring that prefix must be stripped at build
-	  time.
-
-	  See https://en.wikipedia.org/wiki/Intel_Quark
-
-config BR2_x86_i686
-	bool "i686"
-	depends on !BR2_x86_64
-config BR2_x86_pentiumpro
-	bool "pentium pro"
-	depends on !BR2_x86_64
-config BR2_x86_pentium_mmx
-	bool "pentium MMX"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-config BR2_x86_pentium_m
-	bool "pentium mobile"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	depends on !BR2_x86_64
-config BR2_x86_pentium2
-	bool "pentium2"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-config BR2_x86_pentium3
-	bool "pentium3"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	depends on !BR2_x86_64
-config BR2_x86_pentium4
-	bool "pentium4"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	depends on !BR2_x86_64
-config BR2_x86_prescott
-	bool "prescott"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	depends on !BR2_x86_64
-config BR2_x86_nocona
-	bool "nocona"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_core2
-	bool "core2"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-config BR2_x86_corei7
-	bool "corei7"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-config BR2_x86_corei7_avx
-	bool "corei7-avx"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-config BR2_x86_core_avx2
-	bool "core-avx2"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-config BR2_x86_atom
-	bool "atom"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-config BR2_x86_k6
-	bool "k6"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-config BR2_x86_k6_2
-	bool "k6-2"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-config BR2_x86_athlon
-	bool "athlon"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-config BR2_x86_athlon_4
-	bool "athlon-4"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	depends on !BR2_x86_64
-config BR2_x86_opteron
-	bool "opteron"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-config BR2_x86_opteron_sse3
-	bool "opteron w/ SSE3"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_barcelona
-	bool "barcelona"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_jaguar
-	bool "jaguar"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-config BR2_x86_steamroller
-	bool "steamroller"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-config BR2_x86_geode
-	bool "geode"
-	# Don't include MMX support because there several variant of geode
-	# processor, some with MMX support, some without.
-	# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
-	depends on !BR2_x86_64
-config BR2_x86_c3
-	bool "Via/Cyrix C3 (Samuel/Ezra cores)"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-config BR2_x86_c32
-	bool "Via C3-2 (Nehemiah cores)"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	depends on !BR2_x86_64
-config BR2_x86_winchip_c6
-	bool "IDT Winchip C6"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-config BR2_x86_winchip2
-	bool "IDT Winchip 2"
-	select BR2_X86_CPU_HAS_MMX
-	depends on !BR2_x86_64
-endchoice
-
-config BR2_ARCH
-	default "i386"		if BR2_x86_i386
-	default "i486"		if BR2_x86_i486
-	default "i586"		if BR2_x86_i586
-	default "i586"		if BR2_x86_x1000
-	default "i586"		if BR2_x86_pentium_mmx
-	default "i586"		if BR2_x86_geode
-	default "i586"		if BR2_x86_c3
-	default "i686"		if BR2_x86_c32
-	default "i586"		if BR2_x86_winchip_c6
-	default "i586"		if BR2_x86_winchip2
-	default "i686"		if BR2_x86_i686
-	default "i686"		if BR2_x86_pentium2
-	default "i686"		if BR2_x86_pentium3
-	default "i686"		if BR2_x86_pentium4
-	default "i686"		if BR2_x86_pentium_m
-	default "i686"		if BR2_x86_pentiumpro
-	default "i686"		if BR2_x86_prescott
-	default "i686"		if BR2_x86_nocona && BR2_i386
-	default "i686"		if BR2_x86_core2 && BR2_i386
-	default "i686"		if BR2_x86_corei7 && BR2_i386
-	default "i686"		if BR2_x86_atom && BR2_i386
-	default "i686"		if BR2_x86_opteron && BR2_i386
-	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
-	default "i686"		if BR2_x86_barcelona && BR2_i386
-	default "i686"		if BR2_x86_jaguar && BR2_i386
-	default "i686"		if BR2_x86_steamroller && BR2_i386
-	default "i686"		if BR2_x86_k6
-	default "i686"		if BR2_x86_k6_2
-	default "i686"		if BR2_x86_athlon
-	default "i686"		if BR2_x86_athlon_4
-	default "x86_64"	if BR2_x86_64
-
-config BR2_ENDIAN
-	default "LITTLE"
-
-config BR2_GCC_TARGET_ARCH
-	default "i386"		if BR2_x86_i386
-	default "i486"		if BR2_x86_i486
-	default "i586"		if BR2_x86_i586
-	default "i586"		if BR2_x86_x1000
-	default "pentium-mmx"	if BR2_x86_pentium_mmx
-	default "i686"		if BR2_x86_i686
-	default "pentiumpro"	if BR2_x86_pentiumpro
-	default "pentium-m"	if BR2_x86_pentium_m
-	default "pentium2"	if BR2_x86_pentium2
-	default "pentium3"	if BR2_x86_pentium3
-	default "pentium4"	if BR2_x86_pentium4
-	default "prescott"	if BR2_x86_prescott
-	default "nocona"	if BR2_x86_nocona
-	default "core2"		if BR2_x86_core2
-	default "corei7"	if BR2_x86_corei7
-	default "corei7-avx"	if BR2_x86_corei7_avx
-	default "core-avx2"	if BR2_x86_core_avx2
-	default "atom"		if BR2_x86_atom
-	default "k8"		if BR2_x86_opteron
-	default "k8-sse3"	if BR2_x86_opteron_sse3
-	default "barcelona"	if BR2_x86_barcelona
-	default "btver2"	if BR2_x86_jaguar
-	default "bdver3"	if BR2_x86_steamroller
-	default "k6"		if BR2_x86_k6
-	default "k6-2"		if BR2_x86_k6_2
-	default "athlon"	if BR2_x86_athlon
-	default "athlon-4"	if BR2_x86_athlon_4
-	default "winchip-c6"	if BR2_x86_winchip_c6
-	default "winchip2"	if BR2_x86_winchip2
-	default "c3"		if BR2_x86_c3
-	default "c3-2"		if BR2_x86_c32
-	default "geode"		if BR2_x86_geode

arch/Config.in.xtensa

@@ -1,56 +0,0 @@
-choice
-	prompt "Target Architecture Variant"
-	depends on BR2_xtensa
-	default BR2_xtensa_fsf
-config BR2_XTENSA_CUSTOM
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	bool "Custom Xtensa processor configuration"
-config BR2_xtensa_fsf
-	select BR2_ARCH_HAS_MMU_MANDATORY
-	bool "fsf - Default configuration"
-endchoice
-
-config BR2_XTENSA_CUSTOM_NAME
-	string "Custom Xtensa processor configuration name"
-	depends on BR2_XTENSA_CUSTOM
-	default ""
-	help
-	  Name given to a custom Xtensa processor configuration.
-
-config BR2_XTENSA_CORE_NAME
-	string
-	default BR2_XTENSA_CUSTOM_NAME	if BR2_XTENSA_CUSTOM
-	default ""			if BR2_xtensa_fsf
-
-config BR2_XTENSA_OVERLAY_DIR
-	string "Overlay directory for custom configuration"
-	depends on BR2_XTENSA_CUSTOM
-	default ""
-	help
-	  Provide the directory path that contains the overlay file
-	  for a custom processor configuration. The path is relative
-	  to the top directory of buildroot.
-	  These overlay files are tar packages with updated configuration
-	  files for various toolchain packages and Xtensa processor
-	  configurations. They are provided by the processor vendor or
-	  directly from Tensilica.
-
-choice
-	prompt "Target Architecture Endianness"
-	depends on BR2_XTENSA_CUSTOM
-	default BR2_XTENSA_LITTLE_ENDIAN
-
-config BR2_XTENSA_LITTLE_ENDIAN
-	bool "Little endian"
-
-config BR2_XTENSA_BIG_ENDIAN
-	bool "Big endian"
-
-endchoice
-
-config BR2_ENDIAN
-	default "LITTLE"	if BR2_XTENSA_LITTLE_ENDIAN
-	default "BIG"		if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
-
-config BR2_ARCH
-	default "xtensa"	if BR2_xtensa

board/acmesystems/aria-g25/readme.txt

@@ -1,51 +0,0 @@
-Build instructions
-==================
-
-As a regular user configure and then build:
-
-$ make acmesystems_aria_g25_128mb_defconfig (128MB RAM variant)
-  or...
-$ make acmesystems_aria_g25_256mb_defconfig (256MB RAM variant)
-
-$ make
-
-Writing to the MicroSD card
-===========================
-
-Assuming your Aria G25 baseboard has a MicroSD socket, for example with
-the Terra baseboard, you'll need a blank MicroSD (obviously) initialized
-in a particular way to be able to boot from it.
-
-Assuming the card is seen as /dev/sdb in your PC/laptop/other device
-you'll need to run the following commands as root or via sudo.
-
-Make sure all of the card partitions are unmounted before starting.
-
-First we'll need to create two partitions:
-
-# sfdisk -uM /dev/sdb <<EOF
-,32,6
-;
-EOF
-
-Then we'll need to create the empty filesystems:
-
-# mkdosfs -n SD_BOOT /dev/sdb1
-# mkfs.ext4 -L SD_ROOT /dev/sdb2
-
-We'll populate the first partition (boot) with the relevant files:
-
-# mount /dev/sdb1 /mnt
-# cp output/images/at91bootstrap.bin /mnt/BOOT.BIN
-# cp output/images/zImage /mnt
-# cp output/images/at91-ariag25.dtb /mnt
-# umount /mnt
-
-And the root filesystem afterwards:
-
-# mount /dev/sdb2 /mnt
-# tar -C /mnt output/images/rootfs.tar
-# umount /mnt
-
-You're done, insert the MicroSD card in the slot and enjoy.
-

board/altera/post-image.sh

@@ -1,8 +0,0 @@
-#!/bin/sh
-# post-image.sh for SoCkit/SoCDK
-# 2014, "Roman Diouskine" <roman.diouskine@savoirfairelinux.com>
-# 2014, "Sebastien Bourdelin" <sebastien.bourdelin@savoirfairelinux.com>
-
-# create a DTB file copy with the name expected by the u-boot config
-# Name of the DTB is passed as the second argument to the script.
-cp -af $BINARIES_DIR/${2}.dtb  $BINARIES_DIR/socfpga.dtb

board/altera/readme.txt

@@ -1,162 +0,0 @@
-SoCkit
-
-Intro
-=====
-
-This is the buildroot board support for the Arrow SoCkit Evaluation Board
-and the Altera Cyclone 5 Development Board.
-
-A good source of information is :
-http://www.rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard
-
-How it works
-============
-
-Boot process :
---------------
-
-In summary, the bootloader has multiple stages, an hardcoded boot routine is
-loaded from an on-chip ROM.
-
-  - That first stage is scanning the SD card's partition table to find
-    partition having the 0xA2 type.
-  - This partition is expected to contain a boot image on its first 60 Kb,
-    because u-boot is bigger, we must fill it with a preloader (u-boot-spl)
-    which will load the u-boot image.
-  - Then the u-boot image will load the Linux kernel.
-
-A good source of information for the boot process is :
-http://xillybus.com/tutorials/u-boot-image-altera-soc
-
-Note for the SPL :
-The SPL generated by the u-boot from Rocketboards doesn't seems to work,
-therefore we provide a patch for {uboot-PKG}/board/altera/socfpga_cyclone5/*
-based on the files generated with the Altera example design.
-
-For more information about this files please look at :
-http://www.rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization#Common_Source_Code
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-The altera_sockit_defconfig configuration is a minimal configuration with
-all that is required to bring the SoCkit :
-
-  $ make altera_sockit_defconfig
-
-and for the SoC Development Board :
-
-  $ make altera_sockdk_defconfig
-
-Build everything
-----------------
-
-Note: you will need to have access to the network, since Buildroot will
-download the packages' sources.
-
-  $ make
-
-Result of the build
--------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    ├── rootfs.ext2
-    ├── rootfs.ext3 -> rootfs.ext2
-    ├── rootfs.tar
-    ├── socfpga_cyclone5_sockit.dtb or socfpga_cyclone5_socdk.dtb
-    ├── socfpga.dtb
-    ├── u-boot.img
-    ├── u-boot-spl.bin
-    └── uImage
-
-
-Signing the Preloader
----------------------
-
-*** BEWARE ****
-The u-boot-spl.bin must be signed using the Altera's tool "mkpimage".
-This tool comes as a part of the Altera development environnment (SoC EDS).
-A fork of this tool have been done by Maxime Hadjinlian and can be found here :
-https://github.com/maximeh/mkpimage
-
-Remember that without signing the u-boot-spl.bin, the board will not boot !!!
-
-  $ mkpimage u-boot-spl.bin -o u-boot-spl-signed.bin
-
-Prepare your SDcard
-===================
-
-A good source of information for the partitioning process is :
-http://www.rocketboards.org/foswiki/view/Projects/SoCKitLinaroLinuxDesktop#Partition_the_SD_Card
-
-Create the SDcard partition table
-----------------------------------
-
-Determine the device associated to the SD card :
-
-  $ cat /proc/partitions
-
-let's assume it is /dev/mmcblk0 :
-
-  $ sudo fdisk /dev/mmcblk0
-
-Delete all previous partitions with 'd' then create the new partition table,
-using these options, pressing enter after each one:
-
-  * n p 1 9000000 +20480K t 1 b
-  * n p 2 4096 +4496384K t 83
-  * n p 3 2048 +1024K t 3 a2
-
-Using the 'p' option, the SD card's partition must look like this :
-
-Device         Boot     Start       End  Blocks  Id System
-/dev/mmcblk0p1        9000000   9041919   20960   b W95 FAT32
-/dev/mmcblk0p2           4096   8996863 4496384  83 Linux
-/dev/mmcblk0p3           2048      4095    1024  a2 Unknown
-
-Then write the partition table using 'w' and exit.
-
-Make partition one a DOS partition :
-
-  $ sudo mkdosfs /dev/mmcblk0p1
-
-Install the binaries to the SDcard
-----------------------------------
-
-Remember your binaries are located in output/images/, go inside that directory :
-
-  $ cd output/images
-
-The partition with type a2 is the partition scan by the first bootloader stage
-in the SoCkit ROM to find the next bootloader stage so we must write the signed
-preloader and the u-boot binaries in that partition :
-
-  $ sudo dd if=u-boot-spl-signed.bin of=/dev/mmcblk0p3 bs=64k seek=0
-  $ sudo dd if=u-boot.img of=/dev/mmcblk0p3 bs=64k seek=4
-
-Copy the Linux kernel and its Device tree :
-
-  $ sudo mkdir /mnt/sdcard
-  $ sudo mount /dev/mmcblk0p1 /mnt/sdcard
-  $ sudo cp socfpga.dtb uImage /mnt/sdcard
-  $ sudo umount /mnt/sdcard
-
-Copy the rootfs :
-
-  $ sudo dd if=rootfs.ext2 of=/dev/mmcblk0p2 bs=64k
-  $ sudo sync
-
-It's Done!
-
-Finish
-======
-
-Eject your SDcard, insert it in your SoCkit, and power it up.
-
-if you want a serial console, you can plug a micro B USB cable on the USB-UART
-port, the serial port config to used is 57600/8-N-1.

board/altera/sockit/uboot-sockit-preloader-sample-design.patch

@@ -1,820 +0,0 @@
-From c70f2ebb350da20af1a0ed4b7960b8e5a1952713 Mon Sep 17 00:00:00 2001
-From: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
-Date: Thu, 20 Feb 2014 11:51:31 -0500
-Subject: [PATCH] board: add to sockit a working preloader design
-
----
- board/altera/socfpga_cyclone5/build.h              |   2 +-
- board/altera/socfpga_cyclone5/iocsr_config.c       | 314 ++++++++++-----------
- board/altera/socfpga_cyclone5/pinmux_config.c      |  32 +--
- board/altera/socfpga_cyclone5/pinmux_config.h      |   8 +-
- board/altera/socfpga_cyclone5/sdram/sdram_config.h |  14 +-
- .../altera/socfpga_cyclone5/sdram/sequencer_auto.h |  16 +-
- .../sdram/sequencer_auto_ac_init.c                 |  16 +-
- .../socfpga_cyclone5/sdram/sequencer_defines.h     |  34 +--
- 8 files changed, 218 insertions(+), 218 deletions(-)
-
-diff --git a/board/altera/socfpga_cyclone5/build.h b/board/altera/socfpga_cyclone5/build.h
-index e5d9c3c..a369015 100644
---- a/board/altera/socfpga_cyclone5/build.h
-+++ b/board/altera/socfpga_cyclone5/build.h
-@@ -29,7 +29,7 @@
-  * Handoff files must provide user option whether to
-  * enable watchdog during preloader execution phase
-  */
--#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(0)
-+#define CONFIG_PRELOADER_WATCHDOG_ENABLE	(1)
- 
- /*
-  * Handoff files must provide user option whether to enable
-diff --git a/board/altera/socfpga_cyclone5/iocsr_config.c b/board/altera/socfpga_cyclone5/iocsr_config.c
-index fa663e1..90fc154 100644
---- a/board/altera/socfpga_cyclone5/iocsr_config.c
-+++ b/board/altera/socfpga_cyclone5/iocsr_config.c
-@@ -7,113 +7,113 @@ const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
- 	0xC0000000,
- 	0x0000003F,
- 	0x00008000,
--	0x00020080,
--	0x08020000,
--	0x08000000,
--	0x00018020,
-+	0x00060180,
-+	0x18060000,
-+	0x18000000,
-+	0x00018060,
- 	0x00000000,
- 	0x00004000,
--	0x00010040,
--	0x04010000,
--	0x04000000,
--	0x00000010,
--	0x00004010,
-+	0x000300C0,
-+	0x0C030000,
-+	0x0C000000,
-+	0x00000030,
-+	0x0000C030,
- 	0x00002000,
--	0x00020000,
--	0x02008000,
--	0x02000000,
--	0x00000008,
--	0x00002008,
-+	0x00018060,
-+	0x06018000,
-+	0x06000000,
-+	0x00000018,
-+	0x00006018,
- 	0x00001000,
- };
- 
- const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = {
--	0x000C0300,
--	0x10040000,
--	0x100000C0,
--	0x00000040,
--	0x00010040,
-+	0x00100000,
-+	0x300C0000,
-+	0x300000C0,
-+	0x000000C0,
-+	0x000300C0,
- 	0x00008000,
- 	0x00080000,
--	0x18060000,
--	0x18000000,
--	0x00000060,
--	0x00018060,
-+	0x20000000,
-+	0x00000000,
-+	0x00000080,
-+	0x00020000,
- 	0x00004000,
--	0x00010040,
-+	0x000300C0,
- 	0x10000000,
--	0x04000000,
--	0x00000010,
--	0x00004010,
-+	0x0C000000,
-+	0x00000030,
-+	0x0000C030,
- 	0x00002000,
--	0x06008020,
--	0x02008000,
-+	0x06018060,
-+	0x06018000,
- 	0x01FE0000,
- 	0xF8000000,
- 	0x00000007,
- 	0x00001000,
--	0x00004010,
--	0x01004000,
--	0x01000000,
--	0x00003004,
--	0x00001004,
-+	0x0000C030,
-+	0x0300C000,
-+	0x03000000,
-+	0x0000300C,
-+	0x0000300C,
- 	0x00000800,
- 	0x00000000,
- 	0x00000000,
--	0x00800000,
--	0x00000002,
-+	0x01800000,
-+	0x00000006,
- 	0x00002000,
- 	0x00000400,
- 	0x00000000,
--	0x00401000,
-+	0x00C03000,
- 	0x00000003,
- 	0x00000000,
- 	0x00000000,
- 	0x00000200,
--	0x00600802,
-+	0x00601806,
- 	0x00000000,
--	0x80200000,
--	0x80000600,
--	0x00000200,
-+	0x80600000,
-+	0x80000601,
-+	0x00000601,
- 	0x00000100,
--	0x00300401,
--	0xC0100400,
--	0x40100000,
--	0x40000300,
--	0x000C0100,
-+	0x00300C03,
-+	0xC0300C00,
-+	0xC0300000,
-+	0xC0000300,
-+	0x000C0300,
- 	0x00000080,
- };
- 
- const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = {
--	0x80040100,
-+	0x300C0300,
- 	0x00000000,
- 	0x0FF00000,
- 	0x00000000,
--	0x0C010040,
-+	0x0C0300C0,
- 	0x00008000,
--	0x18020080,
--	0x00000000,
--	0x08000000,
--	0x00040020,
--	0x06018060,
-+	0x18060180,
-+	0x18060000,
-+	0x18000000,
-+	0x00018060,
-+	0x00018060,
- 	0x00004000,
--	0x0C010040,
--	0x04010000,
-+	0x000300C0,
-+	0x0C030000,
- 	0x00000030,
- 	0x00000000,
--	0x03004010,
-+	0x0300C030,
- 	0x00002000,
--	0x06008020,
--	0x02008000,
--	0x02000018,
--	0x00006008,
--	0x01802008,
-+	0x00018060,
-+	0x06018000,
-+	0x06000000,
-+	0x00000018,
-+	0x00006018,
- 	0x00001000,
--	0x03004010,
--	0x01004000,
--	0x0100000C,
--	0x00003004,
--	0x00C01004,
-+	0x0000C030,
-+	0x00000000,
-+	0x03000000,
-+	0x0000000C,
-+	0x00C0300C,
- 	0x00000800,
- };
- 
-@@ -170,14 +170,14 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xA0000034,
- 	0x0D000001,
- 	0x6068030C,
--	0xC7034018,
--	0x0E381A01,
-+	0xCF034059,
-+	0x1E781A03,
- 	0x8030C0D0,
--	0x34018606,
--	0x01A01C70,
-+	0x34059606,
-+	0x01A03CF0,
- 	0x0C0D0000,
--	0x18606803,
--	0x01C70340,
-+	0x59606803,
-+	0x03CF0340,
- 	0xD000001A,
- 	0x068030C0,
- 	0x10040000,
-@@ -244,15 +244,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xA0000034,
- 	0x0D000001,
- 	0x6068030C,
--	0xC7034018,
--	0x0E381A01,
-+	0xCF034059,
-+	0x1E781A03,
- 	0x8030C0D0,
--	0x34018606,
-+	0x34059606,
- 	0x01A00000,
- 	0x0C0D0000,
--	0x18606803,
--	0x01C70340,
--	0xD00E381A,
-+	0x59606803,
-+	0x03CF0340,
-+	0xD01E781A,
- 	0x068030C0,
- 	0x10040000,
- 	0x00200000,
-@@ -273,7 +273,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -301,7 +301,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00010040,
-@@ -321,15 +321,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
-+	0xF5DE791E,
-+	0x0356D348,
- 	0x821A0000,
- 	0x0000D000,
- 	0x01860680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -347,7 +347,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -375,7 +375,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00015000,
-@@ -395,15 +395,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
--	0x821A00C3,
-+	0xF5DE791E,
-+	0x0356D348,
-+	0x821A02CB,
- 	0x0000D000,
- 	0x00000680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -421,7 +421,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -449,7 +449,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00010040,
-@@ -469,15 +469,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
-+	0xF5DE791E,
-+	0x0356D348,
- 	0x821A0000,
- 	0x0000D000,
- 	0x00000680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -495,7 +495,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0xAA0D4000,
--	0x01C3A808,
-+	0x01C3A810,
- 	0xAA0D4000,
- 	0x01C3A810,
- 	0x00040100,
-@@ -523,7 +523,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x2A835000,
- 	0x0070EA04,
- 	0x2A835000,
--	0x0070EA02,
-+	0x0070EA04,
- 	0x2A835000,
- 	0x0070EA04,
- 	0x00010040,
-@@ -543,15 +543,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x14864000,
- 	0x69A47A05,
- 	0xCBCF23D7,
--	0xF41E791E,
--	0x034ED348,
-+	0xF5DE791E,
-+	0x0356D348,
- 	0x821A0000,
- 	0x0000D000,
- 	0x00000680,
- 	0xD769A47A,
- 	0x1ECBCF23,
--	0x48F41E79,
--	0x00034ED3,
-+	0x48F5DE79,
-+	0x000356D3,
- 	0x00080200,
- 	0x00001000,
- 	0x00080200,
-@@ -567,80 +567,80 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
- 	0x04000002,
- 	0x00820000,
- 	0x00489000,
--	0x001A1A1A,
--	0x085506A0,
--	0x0000E1D4,
--	0x045506A0,
--	0x0000E1D4,
--	0x085506A0,
--	0x8000E1D4,
-+	0x801A1A1A,
-+	0x00000200,
-+	0x80000004,
-+	0x00000200,
-+	0x80000004,
-+	0x00000200,
-+	0x80000004,
- 	0x00000200,
- 	0x00000004,
--	0x04000000,
--	0x00000009,
--	0x00002410,
-+	0x00040000,
-+	0x10000000,
-+	0x00000000,
- 	0x00000040,
--	0x41000000,
--	0x00002082,
--	0x00000350,
--	0x000000DA,
-+	0x00010000,
-+	0x40002000,
-+	0x00000100,
-+	0x40000002,
-+	0x00000100,
-+	0x40000002,
- 	0x00000100,
- 	0x40000002,
- 	0x00000100,
- 	0x00000002,
--	0x042A8350,
--	0x000070EA,
--	0x86000000,
--	0x08000004,
-+	0x00020000,
-+	0x08000000,
- 	0x00000000,
--	0x00482000,
--	0x21800000,
--	0x00101061,
--	0x021541A8,
--	0x00003875,
--	0x011541A8,
--	0x00003875,
--	0x021541A8,
--	0x20003875,
-+	0x00000020,
-+	0x00008000,
-+	0x20001000,
-+	0x00000080,
-+	0x20000001,
-+	0x00000080,
-+	0x20000001,
-+	0x00000080,
-+	0x20000001,
- 	0x00000080,
- 	0x00000001,
--	0x41000000,
--	0x00000002,
--	0x00FF0904,
-+	0x00010000,
-+	0x04000000,
-+	0x00FF0000,
- 	0x00000000,
--	0x90400000,
--	0x00000820,
-+	0x00004000,
-+	0x00000800,
- 	0x80000001,
--	0x38D612AF,
--	0x86F8E38E,
--	0x0A0A78B4,
--	0x000D020A,
-+	0x00041419,
-+	0x40000000,
-+	0x04000816,
-+	0x000D0000,
- 	0x00006800,
--	0x028A4320,
--	0xEBB4D23D,
--	0x8F65E791,
--	0xA47A0F3C,
--	0x0001A769,
--	0x00410D00,
-+	0x00000340,
-+	0xD000001A,
-+	0x06800000,
-+	0x00340000,
-+	0x0001A000,
-+	0x00000D00,
- 	0x40000068,
--	0x3D000003,
--	0x91EBB4D2,
--	0x3C8F65E7,
--	0x69A47A0F,
--	0x000001A7,
-+	0x1A000003,
-+	0x00D00000,
-+	0x00068000,
-+	0x00003400,
-+	0x000001A0,
-+	0x00000401,
-+	0x00000008,
- 	0x00000401,
- 	0x00000008,
- 	0x00000401,
- 	0x00000008,
--	0x00000540,
--	0x000003A8,
--	0x10AA0D40,
--	0x8001C3A8,
-+	0x00000401,
-+	0x80000008,
- 	0x0000007F,
-+	0x20000000,
- 	0x00000000,
--	0x00004060,
--	0xE1208000,
-+	0xE0000080,
- 	0x0000001F,
--	0x00004100,
-+	0x00004000,
- };
- 
-diff --git a/board/altera/socfpga_cyclone5/pinmux_config.c b/board/altera/socfpga_cyclone5/pinmux_config.c
-index 730067e..cfd74cd 100644
---- a/board/altera/socfpga_cyclone5/pinmux_config.c
-+++ b/board/altera/socfpga_cyclone5/pinmux_config.c
-@@ -23,7 +23,7 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
- 	0, /* EMACIO18 */
- 	0, /* EMACIO19 */
- 	3, /* FLASHIO0 */
--	3, /* FLASHIO1 */
-+	0, /* FLASHIO1 */
- 	3, /* FLASHIO2 */
- 	3, /* FLASHIO3 */
- 	0, /* FLASHIO4 */
-@@ -34,25 +34,25 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
- 	3, /* FLASHIO9 */
- 	3, /* FLASHIO10 */
- 	3, /* FLASHIO11 */
--	3, /* GENERALIO0 */
--	3, /* GENERALIO1 */
--	3, /* GENERALIO2 */
--	3, /* GENERALIO3 */
--	3, /* GENERALIO4 */
--	3, /* GENERALIO5 */
--	3, /* GENERALIO6 */
--	3, /* GENERALIO7 */
--	3, /* GENERALIO8 */
-+	0, /* GENERALIO0 */
-+	1, /* GENERALIO1 */
-+	1, /* GENERALIO2 */
-+	1, /* GENERALIO3 */
-+	1, /* GENERALIO4 */
-+	0, /* GENERALIO5 */
-+	0, /* GENERALIO6 */
-+	0, /* GENERALIO7 */
-+	0, /* GENERALIO8 */
- 	3, /* GENERALIO9 */
- 	3, /* GENERALIO10 */
- 	3, /* GENERALIO11 */
- 	3, /* GENERALIO12 */
--	2, /* GENERALIO13 */
--	2, /* GENERALIO14 */
--	3, /* GENERALIO15 */
--	3, /* GENERALIO16 */
--	2, /* GENERALIO17 */
--	2, /* GENERALIO18 */
-+	0, /* GENERALIO13 */
-+	0, /* GENERALIO14 */
-+	1, /* GENERALIO15 */
-+	1, /* GENERALIO16 */
-+	1, /* GENERALIO17 */
-+	1, /* GENERALIO18 */
- 	0, /* GENERALIO19 */
- 	0, /* GENERALIO20 */
- 	0, /* GENERALIO21 */
-diff --git a/board/altera/socfpga_cyclone5/pinmux_config.h b/board/altera/socfpga_cyclone5/pinmux_config.h
-index fb483ab..64c750a 100644
---- a/board/altera/socfpga_cyclone5/pinmux_config.h
-+++ b/board/altera/socfpga_cyclone5/pinmux_config.h
-@@ -11,15 +11,15 @@
- #define CONFIG_HPS_UART0 (1)
- #define CONFIG_HPS_UART1 (0)
- #define CONFIG_HPS_TRACE (0)
--#define CONFIG_HPS_I2C0 (1)
--#define CONFIG_HPS_I2C1 (0)
-+#define CONFIG_HPS_I2C0 (0)
-+#define CONFIG_HPS_I2C1 (1)
- #define CONFIG_HPS_I2C2 (0)
- #define CONFIG_HPS_I2C3 (0)
- #define CONFIG_HPS_SPIM0 (1)
--#define CONFIG_HPS_SPIM1 (0)
-+#define CONFIG_HPS_SPIM1 (1)
- #define CONFIG_HPS_SPIS0 (0)
- #define CONFIG_HPS_SPIS1 (0)
--#define CONFIG_HPS_CAN0 (1)
-+#define CONFIG_HPS_CAN0 (0)
- #define CONFIG_HPS_CAN1 (0)
- 
- #define CONFIG_HPS_SDMMC_BUSWIDTH (4)
-diff --git a/board/altera/socfpga_cyclone5/sdram/sdram_config.h b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
-index b90d6f3..dd027ef 100755
---- a/board/altera/socfpga_cyclone5/sdram/sdram_config.h
-+++ b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
-@@ -4,16 +4,16 @@
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE			(2)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL			(8)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER		(0)
--#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(1)
--#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(1)
-+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN			(0)
-+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN		(0)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN		(1)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT		(10)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN			(0)
- #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS			(0)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(6)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL			(8)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL			(0)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(7)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(4)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL			(11)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD			(3)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW			(12)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC			(104)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI		(3120)
-@@ -21,7 +21,7 @@
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP		(6)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR		(6)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR		(4)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(4)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			(3)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS			(14)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC			(20)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD			(4)
-@@ -33,7 +33,7 @@
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS		(15)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS		(3)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS			(1)
--#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(40)
-+#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH		(32)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH		(8)
- #define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN			(0)
- #define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL			(2)
-diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
-index e8c5484..919676d 100644
---- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
-+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
-@@ -34,7 +34,7 @@
- #define __RW_MGR_ac_read_en 0x21
- #define __RW_MGR_ac_mrs3_mirr 0x0C
- #define __RW_MGR_ac_mrs2 0x05
--#define __RW_MGR_CONTENT_ac_mrs1 0x10090044
-+#define __RW_MGR_CONTENT_ac_mrs1 0x10090006
- #define __RW_MGR_CONTENT_ac_mrs3 0x100B0000
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata_wl_1 0x18980000
- #define __RW_MGR_CONTENT_ac_act_1 0x106B0000
-@@ -46,8 +46,8 @@
- #define __RW_MGR_CONTENT_ac_init_reset_0_cke_0 0x20700000
- #define __RW_MGR_CONTENT_ac_read_bank_0_1_norden 0x10580008
- #define __RW_MGR_CONTENT_ac_pre_all 0x10280400
--#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080431
--#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080530
-+#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080471
-+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080570
- #define __RW_MGR_CONTENT_ac_read_bank_0_0 0x13580000
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_1 0x1C980008
- #define __RW_MGR_CONTENT_ac_read_bank_0_1 0x13580008
-@@ -55,21 +55,21 @@
- #define __RW_MGR_CONTENT_ac_write_bank_1_col_1 0x1C9B0008
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_0 0x1C980000
- #define __RW_MGR_CONTENT_ac_read_bank_1_0 0x135B0000
--#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0024
-+#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0006
- #define __RW_MGR_CONTENT_ac_read_bank_1_1 0x135B0008
- #define __RW_MGR_CONTENT_ac_des_odt_1 0x38780000
--#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804C8
-+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804E8
- #define __RW_MGR_CONTENT_ac_zqcl 0x10380400
- #define __RW_MGR_CONTENT_ac_write_predata 0x38F80000
--#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080449
-+#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080469
- #define __RW_MGR_CONTENT_ac_ref 0x10480000
- #define __RW_MGR_CONTENT_ac_nop 0x30780000
- #define __RW_MGR_CONTENT_ac_rdimm 0x10780000
--#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090010
-+#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090218
- #define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata 0x18180000
- #define __RW_MGR_CONTENT_ac_read_en 0x33780000
- #define __RW_MGR_CONTENT_ac_mrs3_mirr 0x100B0000
--#define __RW_MGR_CONTENT_ac_mrs2 0x100A0008
-+#define __RW_MGR_CONTENT_ac_mrs2 0x100A0218
- 
- #define __RW_MGR_READ_B2B_WAIT2 0x6A
- #define __RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x31
-diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
-index e16efa1..20b4ca1 100644
---- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
-+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
-@@ -6,16 +6,16 @@ const alt_u32 ac_rom_init[36] =
- {
- 	0x20700000,
- 	0x20780000,
--	0x10080431,
--	0x10080530,
--	0x10090044,
--	0x100a0008,
-+	0x10080471,
-+	0x10080570,
-+	0x10090006,
-+	0x100a0218,
- 	0x100b0000,
- 	0x10380400,
--	0x10080449,
--	0x100804c8,
--	0x100a0024,
--	0x10090010,
-+	0x10080469,
-+	0x100804e8,
-+	0x100a0006,
-+	0x10090218,
- 	0x100b0000,
- 	0x30780000,
- 	0x38780000,
-diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
-index 52faf3f..b85b85c 100644
---- a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
-+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
-@@ -1,28 +1,28 @@
- #ifndef _SEQUENCER_DEFINES_H_
- #define _SEQUENCER_DEFINES_H_
- 
--#define AC_ROM_MR1_MIRR 0000000100100
-+#define AC_ROM_MR1_MIRR 0000000000110
- #define AC_ROM_MR1_OCD_ENABLE
--#define AC_ROM_MR2_MIRR 0000000010000
-+#define AC_ROM_MR2_MIRR 0001000011000
- #define AC_ROM_MR3_MIRR 0000000000000
- #define AC_ROM_MR0_CALIB
--#define AC_ROM_MR0_DLL_RESET_MIRR 0010011001000
--#define AC_ROM_MR0_DLL_RESET 0010100110000
--#define AC_ROM_MR0_MIRR 0010001001001
--#define AC_ROM_MR0 0010000110001
--#define AC_ROM_MR1 0000001000100
--#define AC_ROM_MR2 0000000001000
-+#define AC_ROM_MR0_DLL_RESET_MIRR 0010011101000
-+#define AC_ROM_MR0_DLL_RESET 0010101110000
-+#define AC_ROM_MR0_MIRR 0010001101001
-+#define AC_ROM_MR0 0010001110001
-+#define AC_ROM_MR1 0000000000110
-+#define AC_ROM_MR2 0001000011000
- #define AC_ROM_MR3 0000000000000
- #define AFI_CLK_FREQ 401
- #define AFI_RATE_RATIO 1
- #define ARRIAVGZ 0
- #define ARRIAV 0
--#define AVL_CLK_FREQ 67
-+#define AVL_CLK_FREQ 81
- #define BFM_MODE 0
- #define BURST2 0
- #define CALIBRATE_BIT_SLIPS 0
--#define CALIB_LFIFO_OFFSET 7
--#define CALIB_VFIFO_OFFSET 5
-+#define CALIB_LFIFO_OFFSET 11
-+#define CALIB_VFIFO_OFFSET 9
- #define CYCLONEV 1
- #define DDR2 0
- #define DDR3 1
-@@ -89,20 +89,20 @@
- #define RW_MGR_MEM_CHIP_SELECT_WIDTH 1
- #define RW_MGR_MEM_CLK_EN_WIDTH 1
- #define RW_MGR_MEM_CONTROL_WIDTH 1
--#define RW_MGR_MEM_DATA_MASK_WIDTH 5
--#define RW_MGR_MEM_DATA_WIDTH 40
-+#define RW_MGR_MEM_DATA_MASK_WIDTH 4
-+#define RW_MGR_MEM_DATA_WIDTH 32
- #define RW_MGR_MEM_DQ_PER_READ_DQS 8
- #define RW_MGR_MEM_DQ_PER_WRITE_DQS 8
--#define RW_MGR_MEM_IF_READ_DQS_WIDTH 5
--#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 5
-+#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4
-+#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4
- #define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
- #define RW_MGR_MEM_NUMBER_OF_RANKS 1
- #define RW_MGR_MEM_ODT_WIDTH 1
- #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
- #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1
- #define RW_MGR_MR0_BL 1
--#define RW_MGR_MR0_CAS_LATENCY 3
--#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 5
-+#define RW_MGR_MR0_CAS_LATENCY 7
-+#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4
- #define RW_MGR_WRITE_TO_DEBUG_READ 1.0
- #define SKEW_CALIBRATION 0
- #define STATIC_FULL_CALIBRATION 1
--- 
-1.9.0
-

board/arm/foundation-v8/readme.txt

@@ -1,19 +0,0 @@
-This is the support for the ARM Foundation v8 machine emulated by the
-ARM software simulator of the AArch64 architecture.
-
-First, one has to download the AArch64 software simulator from:
-
-  https://silver.arm.com/download/download.tm?pv=2482590
-
-Then, use the arm_foundationv8_defconfig configuration to build your
-Buildroot system.
-
-Finally, boot your system with:
-
- ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-4.1/Foundation_Platform \
-    --image output/images/linux-system.axf \
-    --block-device output/images/rootfs.ext2 \
-    --network=nat
-
-You can get network access from within the simulated environment
-by requesting an IP address using DHCP (run the command 'udhcpc').

board/arm/juno/linux-juno-defconfig

@@ -1,167 +0,0 @@
-CONFIG_SMP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_FHANDLE=y
-CONFIG_AUDIT=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_MEMCG=y
-CONFIG_MEMCG_SWAP=y
-CONFIG_MEMCG_KMEM=y
-CONFIG_CGROUP_HUGETLB=y
-CONFIG_SCHED_AUTOGROUP=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_PROFILING=y
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_ARCH_VEXPRESS=y
-CONFIG_PCI=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_HOST_GENERIC=y
-CONFIG_PCIEPORTBUS=y
-CONFIG_HOTPLUG_PCI_PCIE=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_NR_CPUS=6
-CONFIG_PREEMPT=y
-CONFIG_KSM=y
-CONFIG_TRANSPARENT_HUGEPAGE=y
-CONFIG_CMA=y
-CONFIG_CMDLINE="console=ttyAMA0"
-CONFIG_COMPAT=y
-CONFIG_CPU_IDLE=y
-CONFIG_ARM_CPUIDLE=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
-CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
-CONFIG_ARM_DT_BL_CPUFREQ=y
-CONFIG_ARM_SCPI_CPUFREQ=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_BPF_JIT=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_AHCI_XGENE=y
-CONFIG_PATA_PLATFORM=y
-CONFIG_PATA_OF_PLATFORM=y
-CONFIG_NETDEVICES=y
-CONFIG_TUN=y
-CONFIG_SKY2=y
-CONFIG_SMC91X=y
-CONFIG_SMSC911X=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_SERIO_AMBAKMI=y
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SERIAL_XILINX_PS_UART=y
-CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_I2C_SLAVE=y
-CONFIG_SPI=y
-CONFIG_SPI_PL022=y
-CONFIG_PTP_1588_CLOCK=m
-CONFIG_GPIO_PL061=y
-CONFIG_GPIO_XGENE=y
-CONFIG_POWER_RESET_XGENE=y
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_VEXPRESS=m
-CONFIG_DRM=y
-CONFIG_DRM_I2C_NXP_TDA998X=y
-CONFIG_DRM_ARM=y
-CONFIG_DRM_HDLCD=y
-CONFIG_DRM_VIRTUAL_HDLCD=y
-CONFIG_FB_ARMCLCD=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_HCD_PLATFORM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_ISP1760=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_ULPI=y
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SPI=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_EFI=y
-CONFIG_RTC_DRV_PL030=y
-CONFIG_RTC_DRV_PL031=y
-CONFIG_DMADEVICES=y
-CONFIG_PL330_DMA=y
-CONFIG_COMMON_CLK_SCPI=y
-CONFIG_ARM_TIMER_SP804=y
-CONFIG_MAILBOX=y
-CONFIG_ARM_MHU=y
-CONFIG_PHY_XGENE=y
-CONFIG_ARM_SCPI_PROTOCOL=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
-CONFIG_QUOTA=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_CUSE=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_HUGETLBFS=y
-CONFIG_EFIVAR_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_KVM=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOCKUP_DETECTOR=y
-CONFIG_SECURITY=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
-CONFIG_ARM64_CRYPTO=y
-CONFIG_CRYPTO_SHA1_ARM64_CE=y
-CONFIG_CRYPTO_SHA2_ARM64_CE=y
-CONFIG_CRYPTO_GHASH_ARM64_CE=y
-CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
-CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SOC=y
-CONFIG_SND_SIMPLE_CARD=y
-CONFIG_SND_DESIGNWARE_I2S=y

board/arm/juno/readme.txt

@@ -1,104 +0,0 @@
-ARM Juno r1/r0
-
-Intro
-=====
-
-These instructions apply to all models of the ARM Juno:
-  - Juno r0 (does not support PCIe)
-  - Juno r1 (supports PCIe)
-
-Buildroot will generate the kernel image, device tree blob and a
-minimal root filesystem.
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-Configuring Buildroot is pretty simple, just execute:
-
-  $ make arm_juno_defconfig
-
-Build the rootfs, kernel and DTB
---------------------------------
-
-Note: you will need to have access to the network, since Buildroot will
-download the packages' sources.
-
-You may now build your rootfs with:
-
-  $ make
-
-(This may take a while)
-
-Result of the build
--------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.tar
-    +-- juno.dtb (if Juno r0 is used)
-    +-- juno-r1.dtb (if Juno r1 is used)
-    +-- Image
-
-Preparing your rootfs
-======================
-
-Format your pen drive as a ext3 filesystem by executing:
-
-   $ mkfs.ext3 /dev/<your device>
-
-Installing your rootfs
-======================
-
-After mounting the pen drive please execute the following:
-
-   $ sudo tar -xvf output/images/rootfs.tar -C <pen drive mount path>
-
-When completed make sure to unmount the device:
-
-   $ umount <pen drive mount path>
-
-Insert the pen drive in one of the ARM Juno' USB type A connectors.
-
-Configure *.dtb in the boot configuration for Juno r0
-=====================================================
-
-SITE1/HBI0262B/images.txt
-.....
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x00C00000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno.dtb     ;Image File Name
-NOR3NAME: board.dtb              ;Specify Image name to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Configure *.dtb in the boot configuration for Juno r1
-=====================================================
-
-SITE1/HBI0262C/images.txt
-......
-NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
-NOR3ADDRESS: 0x00C00000          ;Image Flash Address
-NOR3FILE: \SOFTWARE\juno-r1.dtb  ;Image File Name
-NOR3NAME: board.dtb              ;Specify target filename to preserve file extension
-NOR3LOAD: 00000000               ;Image Load Address
-NOR3ENTRY: 00000000              ;Image Entry Point
-......
-
-Installing kernel image and DTB
-===============================
-
-1. Connect to the ARM Juno UART0 and execute USB_ON in the terminal
-2. Connect a USB cable between your PC and ARM Juno USB type B connector
-   A mass storage device should appear in your desktop.
-3. Open the software/ folder
-4. Copy the 'Image' file to software/
-5. Copy the 'juno-r1.dtb' (r1) or the 'juno.dtb' (r0) file to software/
-6. Press the red button in the front pannel of ARM Juno
-
-At this time, the board will erase the Flash entry for each new item and
-replace it with the lastest ones.

board/armadeus/apf27/linux-3.18.config

@@ -1,224 +0,0 @@
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MACH_IMX27_DT=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-CONFIG_SMSC_PHY=y
-CONFIG_RTL8187=m
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT2500USB=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RTL8192CU=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_KEYBOARD_IMX=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_W1=y
-CONFIG_W1_MASTER_MXC=y
-CONFIG_W1_SLAVE_THERM=y
-CONFIG_WATCHDOG=y
-CONFIG_IMX2_WDT=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_USB_PWC=m
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_SOC_CAMERA=m
-CONFIG_VIDEO_MX2=m
-# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-# CONFIG_DVB_AU8522_V4L is not set
-# CONFIG_DVB_TUNER_DIB0070 is not set
-# CONFIG_DVB_TUNER_DIB0090 is not set
-CONFIG_FB=y
-# CONFIG_FB_MX3 is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_CHIPIDEA_DEBUG=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_MXC=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_LEDS_TRIGGER_TRANSIENT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1374=y
-CONFIG_RTC_DRV_MXC=m
-CONFIG_DMADEVICES=y
-CONFIG_IMX_SDMA=y
-CONFIG_IMX_DMA=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_IIO=y
-CONFIG_MAX1027=y
-CONFIG_MAX5821=y
-CONFIG_PWM=y
-CONFIG_PWM_IMX=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=m
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y

board/armadeus/apf28/linux-3.12.config

@@ -1,185 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_IDLE=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_FLEXCAN=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_M25P80=y
-# CONFIG_M25PXX_USE_FAST_READ is not set
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPMI_NAND=y
-CONFIG_MTD_UBI=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_RTL8187=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_MXS_AUART=y
-CONFIG_TTY_PRINTK=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MXS=y
-CONFIG_SPI=y
-CONFIG_SPI_BITBANG=m
-CONFIG_SPI_MXS=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_HWMON=m
-CONFIG_WATCHDOG=y
-CONFIG_STMP3XXX_RTC_WATCHDOG=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_FB=y
-CONFIG_FB_MXS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_MXS_PHY=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_MXS=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_STMP=y
-CONFIG_DMADEVICES=y
-CONFIG_MXS_DMA=y
-CONFIG_STAGING=y
-CONFIG_MXS_LRADC=y
-CONFIG_IIO=y
-CONFIG_PWM=y
-CONFIG_PWM_MXS=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set

board/armadeus/apf51/linux-3.12.config

@@ -1,266 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_MXC=y
-CONFIG_MXC_IRQ_PRIOR=y
-CONFIG_MACH_IMX51_DT=y
-CONFIG_ARM_THUMBEE=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_IMX=y
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_SUSPEND is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_MCP251X=m
-CONFIG_BT=m
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIUART=m
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_BCSP=y
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_FW_LOADER=m
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_MXC=y
-CONFIG_MTD_UBI=y
-CONFIG_MISC_DEVICES=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_AT25=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_RTL8187=m
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_ZD1211RW=m
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=m
-CONFIG_KEYBOARD_IMX=m
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_WM831X=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-CONFIG_INPUT_WM831X_ON=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=m
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_SPI=y
-CONFIG_SPI_IMX=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_WM831X=m
-CONFIG_POWER_SUPPLY=m
-CONFIG_WM831X_BACKUP=m
-CONFIG_WM831X_POWER=m
-CONFIG_HWMON=m
-CONFIG_SENSORS_AS1531=m
-CONFIG_SENSORS_WM831X=m
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WM831X_WATCHDOG=m
-CONFIG_IMX2_WDT=y
-CONFIG_MFD_WM831X_I2C=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MFD_IMX_IPU_V3=y
-CONFIG_MEDIA_SUPPORT=m
-CONFIG_VIDEO_DEV=m
-# CONFIG_RC_CORE is not set
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5761 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_XC2028 is not set
-# CONFIG_MEDIA_TUNER_XC5000 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_MEDIA_TUNER_MAX2165 is not set
-# CONFIG_MEDIA_TUNER_TDA18218 is not set
-CONFIG_VIDEO_VIVI=m
-CONFIG_USB_VIDEO_CLASS=m
-# CONFIG_RADIO_ADAPTERS is not set
-CONFIG_FB=y
-CONFIG_FB_MX5=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_SND_SOC_APF51_DEV_WM8960=m
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_OTG=y
-# CONFIG_USB_OTG_WHITELIST is not set
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
-CONFIG_USB_ACM=y
-CONFIG_USB_PRINTER=y
-CONFIG_USB_WDM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_PHY=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_GPIO_VBUS=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ETH=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_MMC_SPI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_WM831X_STATUS=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_MXC=y
-CONFIG_RTC_DRV_WM831X=y
-CONFIG_STAGING=y
-CONFIG_IIO=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_CMODE_NONE=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set

board/atmel/at91sam9260ek/linux-3.9.config

@@ -1,98 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_KERNEL_LZO=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_ARCH_AT91SAM9260_SAM9XE=y
-CONFIG_MACH_AT91SAM9260EK=y
-CONFIG_MACH_CAM60=y
-CONFIG_MACH_SAM9_L9260=y
-CONFIG_MACH_AFEB9260=y
-CONFIG_MACH_USB_A9260=y
-CONFIG_MACH_QIL_A9260=y
-CONFIG_MACH_CPU9260=y
-CONFIG_MACH_FLEXIBITY=y
-CONFIG_MACH_SNAPPER_9260=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y

board/atmel/flasher.sh

@@ -1,136 +0,0 @@
-#!/usr/bin/env bash
-
-BUILDIR=$1
-TTY=$2
-BOARD=$3
-
-family_at91sam9g45m10ek="at91sam9m10g45ek"
-mach_at91sam9g45m10ek="at91sam9m10-g45-ek"
-dtb_at91sam9g45m10ek="at91sam9m10g45ek.dtb"
-
-family_at91sam9rlek="at91sam9rlek"
-mach_at91sam9rlek="at91sam9rl64-ek"
-dtb_at91sam9rlek="at91sam9rlek.dtb"
-
-family_at91sam9g15ek="at91sam9x5ek"
-mach_at91sam9g15ek="at91sam9g15-ek"
-dtb_at91sam9g15ek="at91sam9g15ek.dtb"
-
-family_at91sam9g25ek="at91sam9x5ek"
-mach_at91sam9g25ek="at91sam9g25-ek"
-dtb_at91sam9g25ek="at91sam9g25ek.dtb"
-
-family_at91sam9g35ek="at91sam9x5ek"
-mach_at91sam9g35ek="at91sam9g35-ek"
-dtb_at91sam9g35ek="at91sam9g35ek.dtb"
-
-family_at91sam9x25ek="at91sam9x5ek"
-mach_at91sam9x25ek="at91sam9x25-ek"
-dtb_at91sam9x25ek="at91sam9x25ek.dtb"
-
-family_at91sam9x35ek="at91sam9x5ek"
-mach_at91sam9x35ek="at91sam9x35-ek"
-dtb_at91sam9x35ek="at91sam9x35ek.dtb"
-
-family_sama5d31ek="sama5d3xek"
-mach_sama5d31ek="at91sama5d3x-ek"
-dtb_sama5d31ek="sama5d31ek.dtb"
-
-family_sama5d31ek_revc="sama5d3xek"
-mach_sama5d31ek_revc="at91sama5d3x-ek"
-dtb_sama5d31ek_revc="sama5d31ek_revc.dtb"
-
-family_sama5d33ek="sama5d3xek"
-mach_sama5d33ek="at91sama5d3x-ek"
-dtb_sama5d33ek="sama5d33ek.dtb"
-
-family_sama5d33ek_revc="sama5d3xek"
-mach_sama5d33ek_revc="at91sama5d3x-ek"
-dtb_sama5d33ek_revc="sama5d33ek_revc.dtb"
-
-family_sama5d34ek="sama5d3xek"
-mach_sama5d34ek="at91sama5d3x-ek"
-dtb_sama5d34ek="sama5d34ek.dtb"
-
-family_sama5d34ek_revc="sama5d3xek"
-mach_sama5d34ek_revc="at91sama5d3x-ek"
-dtb_sama5d34ek_revc="sama5d34ek_revc.dtb"
-
-family_sama5d35ek="sama5d3xek"
-mach_sama5d35ek="at91sama5d3x-ek"
-dtb_sama5d35ek="sama5d35ek.dtb"
-
-family_sama5d35ek_revc="sama5d3xek"
-mach_sama5d35ek_revc="at91sama5d3x-ek"
-dtb_sama5d35ek_revc="sama5d35ek_revc.dtb"
-
-family_sama5d36ek="sama5d3xek"
-mach_sama5d36ek="at91sama5d3x-ek"
-dtb_sama5d36ek="sama5d36ek.dtb"
-
-family_sama5d36ek_revc="sama5d3xek"
-mach_sama5d36ek_revc="at91sama5d3x-ek"
-dtb_sama5d36ek_revc="sama5d36ek_revc.dtb"
-
-family_sama5d3_xplained="sama5d3_xplained"
-mach_sama5d3_xplained="at91sama5d3x-xplained"
-dtb_sama5d3_xplained="at91-sama5d3_xplained.dtb"
-
-family_sama5d4ek="sama5d4ek"
-mach_sama5d4ek="at91sama5d4x-ek"
-dtb_sama5d4ek="at91-sama5d4ek.dtb"
-
-family_sama5d4_xplained="sama5d4_xplained"
-mach_sama5d4_xplained="at91sama5d4x-ek"
-dtb_sama5d4_xplained="at91-sama5d4_xplained.dtb"
-
-usage() {
-	cat << EOF
-Usage:
-  $0 <builddir_path> <interface> <board>
-
-Available boards:
-  at91sam9g45m10ek
-  at91sam9rlek
-  at91sam9g15ek
-  at91sam9g25ek
-  at91sam9x25ek
-  at91sam9g35ek
-  at91sam9x35ek
-  sama5d31ek
-  sama5d33ek
-  sama5d34ek
-  sama5d35ek
-  sama5d36ek
-  sama5d31ek_revc (Until rev. C)
-  sama5d33ek_revc (Until rev. C)
-  sama5d34ek_revc (Until rev. C)
-  sama5d35ek_revc (Until rev. C)
-  sama5d36ek_revc (Until rev. C)
-  sama5d3_xplained
-  sama5d4ek
-  sama5d4_xplained
-
-Example:
-  $0 ./output /dev/ttyACM0 at91sam9g45m10ek
-EOF
-}
-
-F="family_$BOARD"
-M="mach_$BOARD"
-D="dtb_$BOARD"
-
-if [[ $# != 3 || -z ${!F} ]]; then
-	usage
-	exit 1
-fi
-
-video_mode="video=LVDS-1:800x480-16"
-if [[ $BOARD == "*pda4" ]]; then
-	video_mode="video=LVDS-1:480x272-16"
-fi
-
-echo "Executing: ${!F} O=$1/images $1/host/opt/sam-ba/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode"
-export O=$1/images
-$1/host/opt/sam-ba/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode
-

board/atmel/nandflash.tcl

@@ -1,358 +0,0 @@
-# ----------------------------------------------------------------------------
-#         ATMEL Microcontroller
-# ----------------------------------------------------------------------------
-# Copyright (c) 2015, Atmel Corporation
-#
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-#
-# - Redistributions of source code must retain the above copyright notice,
-# this list of conditions and the disclaimer below.
-#
-# Atmel's name may not be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-# DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-# OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-# ----------------------------------------------------------------------------
-
-################################################################################
-#  Script data
-################################################################################
-# DBGU address for rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5
-set at91_base_dbgu0 0xfffff200
-# DBGU address for 9263, 9g45, sama5d3
-set at91_base_dbgu1 0xffffee00
-# DBGU address for sama5d4
-set at91_base_dbgu2 0xfc069000
-
-set arch_exid_offset 0x44
-
-# arch id
-set arch_id_at91sam9g20 0x019905a0
-set arch_id_at91sam9g45 0x819b05a0
-set arch_id_at91sam9x5  0x819a05a0
-set arch_id_at91sam9n12 0x819a07a0
-set arch_id_sama5d3     0x8a5c07c0
-
-## Find out at91sam9x5 variant to load the corresponding dtb file
-array set at91sam9x5_variant {
-   0x00000000 at91sam9g15
-   0x00000001 at91sam9g35
-   0x00000002 at91sam9x35
-   0x00000003 at91sam9g25
-   0x00000004 at91sam9x25
-}
-
-## Find out sama5d3 variant to load the corresponding dtb file
-array set sama5d3_variant {
-   0x00444300 sama5d31
-   0x00414300 sama5d33
-   0x00414301 sama5d34
-   0x00584300 sama5d35
-   0x00004301 sama5d36
-}
-
-## Find out sama5d4 variant
-array set sama5d4_variant {
-   0x00000001 sama5d41
-   0x00000002 sama5d42
-   0x00000003 sama5d43
-   0x00000004 sama5d44
-}
-
-################################################################################
-#  proc uboot_env: Convert u-boot variables in a string ready to be flashed
-#                  in the region reserved for environment variables
-################################################################################
-proc set_uboot_env {nameOfLstOfVar} {
-    upvar $nameOfLstOfVar lstOfVar
-
-    # sector size is the size defined in u-boot CFG_ENV_SIZE
-    set sectorSize [expr 0x20000 - 5]
-
-    set strEnv [join $lstOfVar "\0"]
-    while {[string length $strEnv] < $sectorSize} {
-        append strEnv "\0"
-    }
-    # \0 between crc and strEnv is the flag value for redundant environment
-    set strCrc [binary format i [::vfs::crc $strEnv]]
-    return "$strCrc\0$strEnv"
-}
-
-################################################################################
-proc find_variant_name {boardType} {
-   global at91_base_dbgu0
-   global at91_base_dbgu1
-   global at91_base_dbgu2
-   global arch_exid_offset
-   global at91sam9x5_variant
-   global sama5d3_variant
-   global sama5d4_variant
-   set socName "none"
-
-   switch $boardType {
-      at91sam9x5ek {
-         set exidAddr [expr {$at91_base_dbgu0 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get at91sam9x5_variant] {
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d3xek {
-         set exidAddr [expr {$at91_base_dbgu1 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d3_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d3_xplained {
-         set exidAddr [expr {$at91_base_dbgu1 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d3_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d4ek {
-         set exidAddr [expr {$at91_base_dbgu2 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d4_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-      sama5d4_xplained {
-         set exidAddr [expr {$at91_base_dbgu2 + $arch_exid_offset}]
-         set chip_variant [format "0x%08x" [read_int $exidAddr]]
-
-         foreach {key value} [array get sama5d4_variant] {
-            #puts "-I- === $chip_variant ? $key ($value) ==="
-            if {$key == $chip_variant} {
-               set socName "$value"
-               break;
-            }
-         }
-      }
-   }
-
-   return "$socName"
-}
-
-proc find_variant_ecc {boardType} {
-   set eccType "none"
-
-   switch $boardType {
-      at91sam9x5ek {
-         set eccType 0xc0c00405
-      }
-      at91sam9n12ek {
-         set eccType 0xc0c00405
-      }
-      sama5d3xek {
-         set eccType 0xc0902405
-      }
-      sama5d3_xplained {
-         set eccType 0xc0902405
-      }
-      sama5d4ek {
-         set eccType 0xc1e04e07
-      }
-      sama5d4_xplained {
-         set eccType 0xc1e04e07
-      }
-   }
-
-   puts "-I- === eccType is $eccType ==="
-   return $eccType
-}
-
-proc get_kernel_load_addr {boardType} {
-   set kernel_load_addr 0x22000000
-
-   switch $boardType {
-      at91sam9m10g45ek {
-         set kernel_load_addr 0x72000000
-      }
-   }
-
-   return $kernel_load_addr
-}
-
-proc get_dtb_load_addr {boardType} {
-   set dtb_load_addr 0x21000000
-
-   switch $boardType {
-      at91sam9m10g45ek {
-         set dtb_load_addr 0x71000000
-      }
-   }
-
-   return $dtb_load_addr
-}
-
-################################################################################
-#  Main script: Load the linux demo in NandFlash,
-#               Update the environment variables
-################################################################################
-
-################################################################################
-
-# check for proper variable initialization
-if {! [info exists boardFamily]} {
-   puts "-I- === Parsing script arguments ==="
-   if {! [info exists env(O)]} {
-      puts "-E- === Binaries path not defined ==="
-      exit
-   }
-
-   set bootstrapFile   "$env(O)/at91bootstrap.bin"
-   set ubootFile       "$env(O)/u-boot.bin"
-   set kernelFile      "$env(O)/zImage"
-   set rootfsFile      "$env(O)/rootfs.ubi"
-   set build_uboot_env "yes"
-
-   set i 1
-   foreach arg $::argv {
-      puts "argument $i is $arg"
-      switch $i {
-         4 { set boardFamily $arg }
-         5 { set dtbFile "$env(O)/$arg" }
-         6 { set videoMode $arg }
-      }
-      incr i
-    }
-}
-
-puts "-I- === Board Family is $boardFamily ==="
-
-set pmeccConfig [find_variant_ecc $boardFamily]
-
-## Now check for the needed files
-if {! [file exists $bootstrapFile]} {
-   puts "-E- === AT91Bootstrap file not found ==="
-   exit
-}
-
-if {! [file exists $ubootFile]} {
-   puts "-E- === U-Boot file not found ==="
-   exit
-}
-
-if {! [file exists $kernelFile]} {
-   puts "-E- === Linux kernel file not found ==="
-   exit
-}
-
-if {! [file exists $dtbFile]} {
-   puts "-E- === Device Tree binary: $dtbFile file not found ==="
-   exit
-}
-
-if {! [file exists $rootfsFile]} {
-   puts "-E- === Rootfs file not found ==="
-   exit
-}
-
-## NandFlash Mapping
-set bootStrapAddr	0x00000000
-set ubootAddr		0x00040000
-set ubootEnvAddr	0x000c0000
-set dtbAddr		0x00180000
-set kernelAddr		0x00200000
-set rootfsAddr		0x00800000
-
-## u-boot variable
-set kernelLoadAddr [get_kernel_load_addr $boardFamily]
-set dtbLoadAddr	[get_dtb_load_addr $boardFamily]
-
-## NandFlash Mapping
-set kernelSize	[format "0x%08X" [file size $kernelFile]]
-set dtbSize	[format "0x%08X" [file size $dtbFile]]
-set bootCmd "bootcmd=nand read $dtbLoadAddr $dtbAddr $dtbSize; nand read $kernelLoadAddr $kernelAddr $kernelSize; bootz $kernelLoadAddr - $dtbLoadAddr"
-set rootfsSize	[format "0x%08X" [file size $rootfsFile]]
-
-lappend u_boot_variables \
-    "bootdelay=1" \
-    "baudrate=115200" \
-    "stdin=serial" \
-    "stdout=serial" \
-    "stderr=serial" \
-    "bootargs=console=ttyS0,115200 mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw $videoMode" \
-    "$bootCmd"
-
-## Additional files to load
-set ubootEnvFile	"ubootEnvtFileNandFlash.bin"
-
-
-##  Start flashing procedure  ##################################################
-puts "-I- === Initialize the NAND access ==="
-NANDFLASH::Init
-
-if {$pmeccConfig != "none"} {
-   puts "-I- === Enable PMECC OS Parameters ==="
-   NANDFLASH::NandHeaderValue HEADER $pmeccConfig
-}
-
-puts "-I- === Erase all the NAND flash blocs and test the erasing ==="
-NANDFLASH::EraseAllNandFlash
-
-puts "-I- === Load AT91Bootstrap in the first sector ==="
-if {$pmeccConfig != "none"} {
-   NANDFLASH::SendBootFilePmeccCmd $bootstrapFile
-} else {
-   NANDFLASH::sendBootFile $bootstrapFile
-}
-
-puts "-I- === Load u-boot in the next sectors ==="
-send_file {NandFlash} "$ubootFile" $ubootAddr 0 
-
-if {$build_uboot_env == "yes"} {
-   puts "-I- === Load the u-boot environment variables ==="
-   set fh [open "$ubootEnvFile" w]
-   fconfigure $fh -translation binary
-   puts -nonewline $fh [set_uboot_env u_boot_variables]
-   close $fh
-   send_file {NandFlash} "$ubootEnvFile" $ubootEnvAddr 0
-}
-
-puts "-I- === Load the Kernel image and device tree database ==="
-send_file {NandFlash} "$dtbFile" $dtbAddr 0
-send_file {NandFlash} "$kernelFile" $kernelAddr 0
-
-if {$pmeccConfig != "none"} {
-   puts "-I- === Enable trimffs ==="
-   NANDFLASH::NandSetTrimffs 1
-}
-
-puts "-I- === Load the linux file system ==="
-send_file {NandFlash} "$rootfsFile" $rootfsAddr 0
-
-puts "-I- === DONE. ==="

board/atmel/readme.txt

@@ -1,107 +0,0 @@
-Flashing the NAND using SAM-BA
-==============================
-
-This document explains how to flash a basic Buildroot system on various
-Atmel boards. Additional details can
-also be found on the Linux4SAM website, in particular here:
-http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted
-
-This guide covers the following configurations:
- - at91sam9g45m10ek_defconfig
- - at91sam9rlek_defconfig
- - at91sam9x5ek_defconfig (at91sam9g15, at91sam9g25, at91sam9x25,
-   at91sam9g35 and at91sam9x35)
- - atmel_sama5d3xek_defconfig (sama5d31, sama5d33, sama5d34, sama5d35,
-   sama5d36)
- - atmel_sama5d3_xplained_defconfig
- - atmel_sama5d4ek_defconfig
- - atmel_sama5d4_xplained_defconfig
-
-These configurations will use AT91Bootstrap, u-boot and a linux kernel from
-the git trees maintained by Atmel. They also build u-boot SPL when
-available, it can replace AT91Bootstrap.
-
-
-Configuring and building Buildroot
-----------------------------------
-
-  make <board>_defconfig
-  make
-
-
-Flashing the board
-------------------
-
-Connect the board:
- o at91sam9g45m10ek: DBGU: J10, USB sam-ba: J14
- o at91sam9rlek: DBGU: J19, USB sam-ba: J21
- o at91sam9x5ek: DBGU: J11, USB sam-ba: J20
- o sama5d3xek: DBGU: J14, USB sam-ba: J20
- o sama5d3 Xplained: DBGU: J23, USB sam-ba: J6
- o sama5d4ek: DBGU: J22 or J24, USB sam-ba: J1
- o sama5d4 Xplained: DBGU: J1, USB sam-ba: J11
-
-Start the board in RomBOOT:
- o at91sam9g45m10ek:
-    1. open JP8, JP10 and JP12
-    2. start the board
-    3. close JP8, JP10 and JP12
-
- o at91sam9rlek:
-   1. J11 on 1-2 (BMS=1), open J12 and J13
-   2. start the board
-   3. close J12 and J13
-
- o at91sam9x5ek:
-   1. open JP9 and:
-      - Cogent: open *NCS jumper
-      - Embest: open SW1
-      - Ronetix: open J1 and J2
-   2. start the board
-   3. close JP9 and:
-      - Cogent: close *NCS jumper
-      - Embest: close SW1 (ON position)
-      - Ronetix: close J1 and J2
-
- o sama5d3xek:
-   1. start the board
-   2. push BP4 and BP1
-   3. release BP1
-   4. release BP4
-
- o sama5d3 Xplained:
-   1. open JP5 (NANDCS) and JP6 (SPICS)
-   2. start the board
-   3. close JP5 ans JP6
-
- o sama5d4ek:
-   1. start the board
-   2. push BP3 and BP4
-   3. release BP4
-   4. release BP3
-
- o sama5d4 Xplained:
-   1. close JP7 (BOOT_DIS)
-   2. start the board
-   3. open JP7
-
-"RomBOOT" should appear on your console (this should be ttyUSBx or ttyACMx)
-
-Now locate the USB sam-ba interface it should be ttyACMx, usually ttyACM0
-dmesg on your machine should give:
-usb 1-2.1.4: New USB device found, idVendor=03eb, idProduct=6124
-usb 1-2.1.4: New USB device strings: Mfr=0, Product=0, SerialNumber=0
-cdc_acm 1-2.1.4:1.0: ttyACM0: USB ACM device
-
-Look for idVendor=03eb, idProduct=6124, this is the interface you want to use.
-
-You can then flash the board using the provided flasher.sh script in board/atmel:
-
-board/atmel/flasher.sh <builddir_path> <interface> <board>
-
-For example, for an out of tree build made in
-/tmp/atmel_sama5d3_xplained/ for the sama5d3 Xplained, you would use:
-board/atmel/flasher.sh /tmp/atmel_sama5d3_xplained/ /dev/ttyACM0 sama5d3_xplained
-
-Reboot, the system should boot up to the buildroot login invite.
-

board/atmel/xplained/readme.txt

@@ -1,73 +0,0 @@
-Atmel SAMA5D3 Xplained board
-============================
-
-This document explains how to set up a basic Buildroot system on the
-Atmel SAMA5D3 Xplained board, whose main site is
-http://www.atmel.com/tools/ATSAMA5D3-XPLD.aspx. Additional details can
-also be found on the http://www.at91.com/linux4sam/bin/view/Linux4SAM/
-web site.
-
-Note that the default Buildroot configuration is prepared to boot from
-an SD card: the first stage bootloader, second stage bootloader,
-kernel image and root filesystem are all located on the SD card. Some
-adjustments in the bootloader configuration will be needed to boot
-from NAND flash, see board/atmel/readme.txt
-
-Configuring and building Buildroot
-----------------------------------
-
-  make atmel_sama5d3_xplained_mmc_defconfig
-  make
-
-Preparing the SD card
----------------------
-
-The SD card must be partitioned with at least two partitions: one
-FAT16 partition for the bootloaders, kernel image and Device Tree
-blob, and one ext4 partition for the root filesystem. To partition the
-SD card:
-
-sudo sfdisk -uM /dev/mmcblk0 <<EOF
-,64,6
-;
-EOF
-
-This creates a 64 MB partition for the FAT16 filesystem (type 6) and
-uses the rest for the ext4 filesystem used for the root filesystem.
-
-Then, format both partitions:
-
-sudo mkfs.msdos -n boot /dev/mmcblk0p1
-sudo mkfs.ext4 -L rootfs -O ^huge_file /dev/mmcblk0p2
-
- Note: the -O ^huge_file option is needed to avoid enabling the huge
- files features of ext4 (to support files larges than 2 TB), which
- needs the kernel option CONFIG_LBDAF to be enabled.
-
-Mount both partitions (if not done automatically by your system):
-
-sudo mount /dev/mmcblk0p1 /media/boot
-sudo mount /dev/mmcblk0p2 /media/rootfs
-
-Copy the bootloaders, kernel image and Device Tree blob to the first
-partition:
-
-cp output/images/u-boot-spl.bin /media/boot/boot.bin
-cp output/images/u-boot.img /media/boot/u-boot.img
-cp output/images/zImage /media/boot/zImage
-cp output/images/at91-sama5d3_xplained.dtb /media/boot/at91-sama5d3_xplained.dtb
-
-Extract the root filesystem to the second partition:
-
-sudo tar -C /media/rootfs -xf output/images/rootfs.tar
-
-Unmount both partitions:
-
-sudo umount /media/boot
-sudo umount /media/rootfs
-
-Insert your SD card in your Xplained board, and enjoy. The default
-U-Boot environment will properly load the kernel and Device Tree blob
-from the first partition of the SD card, so everything works
-automatically.
-

board/avnet/microzed/readme.txt

@@ -1,68 +0,0 @@
-This is the buildroot board support for the Avnet Microzed. The Microzed is
-a development board based on the Xilinx Zynq-7000 based All-Programmable
-System-On-Chip.
-
-Microzed information including schematics, reference designs, and manuals are
-available from http://www.zedboard.org .
-
-Steps to create a working system for Microzed:
-
-1) make microzed_defconfig
-2) make
-3) copy files BOOT.BIN, u-boot-dtb.img, rootfs.cpio.uboot,
-	uImage, zynq-zed.dtb into your SD card
-4) boot your Microzed
-
-The expected output:
-
- U-Boot SPL 2015.07 (Sep 15 2015 - 16:10:56)
- mmc boot
- reading system.dtb
- spl_load_image_fat_os: error reading image system.dtb, err - -1
- reading u-boot-dtb.img
- reading u-boot-dtb.img
-
-
- U-Boot 2015.07 (Sep 15 2015 - 16:10:56 +0200)
-
- Model: Zynq MicroZED Board
- I2C:   ready
- DRAM:  ECC disabled 1 GiB
- MMC:   zynq_sdhci: 0
- Using default environment
- ...
-
-When using an older U-Boot then 2015.07, a working ps7_init.c
-file is required to be installed into the U-Boot directory
-structure. From 2015.07, the major Zynq-based boards are
-supported without any manual intervention.
-
-Resulting system
-----------------
-A FAT32 partition should be created at the beginning of the SD Card
-and the following files should be installed:
-	/BOOT.BIN
-	/zynq-zed.dtb
-	/uImage
-	/rootfs-cpio.uboot
-	/u-boot-dtb.img
-
-All needed files can be taken from output/images/
-
-BOOT.BIN, uImage and u-boot-dtb.img are direct copies of the same files
-available on output/images/.
-
-Note th at the DTB (zynq-zed.dtb) is the same as the one used for the
-Zedboard, and that this is the recommended solution, see
-https://forums.xilinx.com/t5/Embedded-Linux/Microzed-default-device-tree-dts/td-p/432856.
-
-There is a patch attached that redefines the U-Boot's environment
-to work with Buildroot out-of-the-box.
-
-You can alter the booting procedure by creating a file uEnv.txt
-in the root of the SD card. It is a plain text file in format
-<key>=<value> one per line:
-
-kernel_image=myimage
-modeboot=myboot
-myboot=...

board/avnet/microzed/uboot/0001-zynq-Create-microzed-specific-U-Boot-environment.patch

@@ -1,41 +0,0 @@
-From a4c0058967a551385da5e16d2787d9f704cab225 Mon Sep 17 00:00:00 2001
-From: Jan Viktorin <viktorin@rehivetech.com>
-Date: Thu, 18 Jun 2015 16:26:02 +0200
-Subject: [PATCH] zynq: Create microzed-specific U-Boot environment
-
-This is a copy of the patch supplied for Zedboard.
-
-Signed-off-by: Davide Viti <d.viti@infosolution.it>
-
---- a/include/configs/zynq_microzed.h	2015-07-14 19:32:21.000000000 +0200
-+++ b/include/configs/zynq_microzed.h	2015-09-02 12:19:35.728503472 +0200
-@@ -22,4 +22,29 @@
- 
- #include <configs/zynq-common.h>
- 
-+#undef CONFIG_EXTRA_ENV_SETTINGS
-+#define CONFIG_EXTRA_ENV_SETTINGS \
-+	"envload=mmc info && if fatload mmc 0 0x1000 uEnv.txt;"\
-+	" then echo Importing uEnv.txt; env import -t 0x1000"  \
-+	" $filesize; fi;\0"                                    \
-+	"bootcmd=run $modeboot\0"                              \
-+	"modeboot=sdboot\0"                                    \
-+	"baudrate=115200\0"                                    \
-+	"bootenv=uEnv.txt\0"                                   \
-+	"devicetree_image=zynq-zed.dtb\0"                      \
-+	"kernel_image=uImage\0"                                \
-+	"ramdisk_image=rootfs.cpio.uboot\0"                    \
-+	"fpga_image=system.bit\0"                              \
-+	"sdboot=echo Booting from SD...;"                      \
-+	" run envload; run fpgaboot;"                          \
-+	" fatload mmc 0 0x1000000 ${kernel_image}"             \
-+	" && fatload mmc 0 0x2000000 ${ramdisk_image}"         \
-+	" && fatload mmc 0 0x3000000 ${devicetree_image}"      \
-+	" && bootm 0x1000000 0x2000000 0x3000000\0"            \
-+	"fpgaboot=if fatload mmc 0 0x1000000 ${fpga_image};"   \
-+	" then echo Booting FPGA from ${fpga_image};"          \
-+	" fpga info 0 && fpga loadb 0 0x1000000 $filesize;"    \
-+	" else echo FPGA image ${fpga_image} was not found,"   \
-+	" skipping...; fi;\0"
-+
- #endif /* __CONFIG_ZYNQ_MICROZED_H */

board/avnet/s6lx9_microboard/lx9_mmu.dts

@@ -1,247 +0,0 @@
-/*
- * Device Tree Generator version: 1.3
- *
- * (C) Copyright 2007-2008 Xilinx, Inc.
- * (C) Copyright 2007-2009 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * CAUTION: This file is automatically generated by libgen.
- * Version: Xilinx EDK 13.2 EDK_O.61xd
- *
- * XPS project directory: device-tree_bsp_230-orig
- */
-
-/dts-v1/;
-/ {
-    #address-cells = <1>;
-    #size-cells = <1>;
-    compatible = "xlnx,microblaze";
-    model = "testing";
-    MCB3_LPDDR: memory@80000000 {
-        device_type = "memory";
-        reg = < 0x80000000 0x4000000 >;
-    } ;
-    aliases {
-        ethernet0 = &Ethernet_MAC;
-        serial0 = &USB_Uart;
-    } ;
-    chosen {
-        bootargs = "console=ttyUL0";
-        linux,stdout-path = "/axi@0/serial@40600000";
-    } ;
-    cpus {
-        #address-cells = <1>;
-        #cpus = <0x1>;
-        #size-cells = <0>;
-        microblaze_0: cpu@0 {
-            clock-frequency = <66666667>;
-            compatible = "xlnx,microblaze-8.20.a";
-            d-cache-baseaddr = <0x80000000>;
-            d-cache-highaddr = <0x83ffffff>;
-            d-cache-line-size = <0x10>;
-            d-cache-size = <0x2000>;
-            device_type = "cpu";
-            i-cache-baseaddr = <0x80000000>;
-            i-cache-highaddr = <0x83ffffff>;
-            i-cache-line-size = <0x10>;
-            i-cache-size = <0x2000>;
-            model = "microblaze,8.20.a";
-            reg = <0>;
-            timebase-frequency = <66666667>;
-            xlnx,addr-tag-bits = <0xd>;
-            xlnx,allow-dcache-wr = <0x1>;
-            xlnx,allow-icache-wr = <0x1>;
-            xlnx,area-optimized = <0x0>;
-            xlnx,avoid-primitives = <0x0>;
-            xlnx,branch-target-cache-size = <0x0>;
-            xlnx,cache-byte-size = <0x2000>;
-            xlnx,d-axi = <0x1>;
-            xlnx,d-lmb = <0x1>;
-            xlnx,d-plb = <0x0>;
-            xlnx,data-size = <0x20>;
-            xlnx,dcache-addr-tag = <0xd>;
-            xlnx,dcache-always-used = <0x1>;
-            xlnx,dcache-byte-size = <0x2000>;
-            xlnx,dcache-data-width = <0x0>;
-            xlnx,dcache-force-tag-lutram = <0x0>;
-            xlnx,dcache-interface = <0x0>;
-            xlnx,dcache-line-len = <0x4>;
-            xlnx,dcache-use-fsl = <0x0>;
-            xlnx,dcache-use-writeback = <0x0>;
-            xlnx,dcache-victims = <0x0>;
-            xlnx,debug-enabled = <0x1>;
-            xlnx,div-zero-exception = <0x0>;
-            xlnx,dynamic-bus-sizing = <0x1>;
-            xlnx,ecc-use-ce-exception = <0x0>;
-            xlnx,edge-is-positive = <0x1>;
-            xlnx,endianness = <0x1>;
-            xlnx,family = "spartan6";
-            xlnx,fault-tolerant = <0x0>;
-            xlnx,fpu-exception = <0x0>;
-            xlnx,freq = <0x3f940ab>;
-            xlnx,fsl-data-size = <0x20>;
-            xlnx,fsl-exception = <0x0>;
-            xlnx,fsl-links = <0x0>;
-            xlnx,i-axi = <0x0>;
-            xlnx,i-lmb = <0x1>;
-            xlnx,i-plb = <0x0>;
-            xlnx,icache-always-used = <0x1>;
-            xlnx,icache-data-width = <0x0>;
-            xlnx,icache-force-tag-lutram = <0x0>;
-            xlnx,icache-interface = <0x0>;
-            xlnx,icache-line-len = <0x4>;
-            xlnx,icache-streams = <0x0>;
-            xlnx,icache-use-fsl = <0x0>;
-            xlnx,icache-victims = <0x0>;
-            xlnx,ill-opcode-exception = <0x0>;
-            xlnx,instance = "microblaze_0";
-            xlnx,interconnect = <0x2>;
-            xlnx,interconnect-m-axi-dc-aw-register = <0x0>;
-            xlnx,interconnect-m-axi-dc-read-issuing = <0x2>;
-            xlnx,interconnect-m-axi-dc-w-register = <0x0>;
-            xlnx,interconnect-m-axi-dc-write-issuing = <0x20>;
-            xlnx,interconnect-m-axi-dp-read-issuing = <0x1>;
-            xlnx,interconnect-m-axi-dp-write-issuing = <0x1>;
-            xlnx,interconnect-m-axi-ic-read-issuing = <0x2>;
-            xlnx,interconnect-m-axi-ip-read-issuing = <0x1>;
-            xlnx,interrupt-is-edge = <0x0>;
-            xlnx,lockstep-slave = <0x0>;
-            xlnx,mmu-dtlb-size = <0x1>;
-            xlnx,mmu-itlb-size = <0x1>;
-            xlnx,mmu-privileged-instr = <0x0>;
-            xlnx,mmu-tlb-access = <0x3>;
-            xlnx,mmu-zones = <0x2>;
-            xlnx,number-of-pc-brk = <0x1>;
-            xlnx,number-of-rd-addr-brk = <0x0>;
-            xlnx,number-of-wr-addr-brk = <0x0>;
-            xlnx,opcode-0x0-illegal = <0x0>;
-            xlnx,optimization = <0x0>;
-            xlnx,pvr = <0x0>;
-            xlnx,pvr-user1 = <0x0>;
-            xlnx,pvr-user2 = <0x0>;
-            xlnx,reset-msr = <0x0>;
-            xlnx,sco = <0x0>;
-            xlnx,stream-interconnect = <0x0>;
-            xlnx,unaligned-exceptions = <0x0>;
-            xlnx,use-barrel = <0x1>;
-            xlnx,use-branch-target-cache = <0x0>;
-            xlnx,use-dcache = <0x1>;
-            xlnx,use-div = <0x0>;
-            xlnx,use-ext-brk = <0x1>;
-            xlnx,use-ext-nm-brk = <0x1>;
-            xlnx,use-extended-fsl-instr = <0x0>;
-            xlnx,use-fpu = <0x0>;
-            xlnx,use-hw-mul = <0x1>;
-            xlnx,use-icache = <0x1>;
-            xlnx,use-interrupt = <0x1>;
-            xlnx,use-mmu = <0x3>;
-            xlnx,use-msr-instr = <0x1>;
-            xlnx,use-pcmp-instr = <0x0>;
-            xlnx,use-stack-protection = <0x0>;
-        } ;
-    } ;
-    axi4lite_0: axi@0 {
-        #address-cells = <1>;
-        #size-cells = <1>;
-        compatible = "xlnx,axi-interconnect-1.03.a", "simple-bus";
-        ranges ;
-        Ethernet_MAC: ethernet@40e00000 {
-            compatible = "xlnx,axi-ethernetlite-1.00.a", "xlnx,xps-ethernetlite-1.00.a";
-            device_type = "network";
-            interrupt-parent = <&microblaze_0_intc>;
-            interrupts = < 2 0 >;
-            local-mac-address = [ 00 0a 35 aa de 00 ];
-//            phy-handle = <&phy0>;
-            reg = < 0x40e00000 0x10000 >;
-            xlnx,duplex = <0x1>;
-            xlnx,family = "spartan6";
-            xlnx,include-global-buffers = <0x0>;
-            xlnx,include-internal-loopback = <0x0>;
-            xlnx,include-mdio = <0x1>;
-            xlnx,include-phy-constraints = <0x1>;
-            xlnx,interconnect-s-axi-read-acceptance = <0x1>;
-            xlnx,interconnect-s-axi-write-acceptance = <0x1>;
-            xlnx,rx-ping-pong = <0x0>;
-            xlnx,s-axi-aclk-period-ps = <0x3a98>;
-            xlnx,s-axi-id-width = <0x1>;
-            xlnx,s-axi-supports-narrow-burst = <0x0>;
-            xlnx,tx-ping-pong = <0x0>;
-/*
-            mdio {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                phy0: phy@7 {
-                    compatible = "marvell,88e1111";
-                    device_type = "ethernet-phy";
-                    reg = <7>;
-                } ;
-            } ;
-*/
-        } ;
-        SPI_FLASH: spi@40a00000 {
-            compatible = "xlnx,axi-spi-1.01.a", "xlnx,xps-spi-2.00.a";
-            interrupt-parent = <&microblaze_0_intc>;
-            interrupts = < 1 2 >;
-            reg = < 0x40a00000 0x10000 >;
-            xlnx,family = "spartan6";
-            xlnx,fifo-exist = <0x1>;
-            xlnx,num-ss-bits = <0x1>;
-            xlnx,num-transfer-bits = <0x8>;
-            xlnx,sck-ratio = <0x4>;
-        } ;
-        USB_Uart: serial@40600000 {
-            clock-frequency = <66666667>;
-            compatible = "xlnx,axi-uartlite-1.02.a", "xlnx,xps-uartlite-1.00.a";
-            current-speed = <115200>;
-            device_type = "serial";
-            interrupt-parent = <&microblaze_0_intc>;
-            interrupts = < 3 0 >;
-            port-number = <0>;
-            reg = < 0x40600000 0x10000 >;
-            xlnx,baudrate = <0x1c200>;
-            xlnx,data-bits = <0x8>;
-            xlnx,family = "spartan6";
-            xlnx,odd-parity = <0x1>;
-            xlnx,s-axi-aclk-freq-hz = <0x3f940ab>;
-            xlnx,use-parity = <0x0>;
-        } ;
-        microblaze_0_intc: interrupt-controller@41200000 {
-            #interrupt-cells = <0x2>;
-            compatible = "xlnx,axi-intc-1.01.a", "xlnx,xps-intc-1.00.a";
-            interrupt-controller ;
-            reg = < 0x41200000 0x10000 >;
-            xlnx,kind-of-intr = <0xc>;
-            xlnx,num-intr-inputs = <0x4>;
-        } ;
-        system_timer: timer@41c00000 {
-            clock-frequency = <66666667>;
-            compatible = "xlnx,axi-timer-1.02.a", "xlnx,xps-timer-1.00.a";
-            interrupt-parent = <&microblaze_0_intc>;
-            interrupts = < 0 2 >;
-            reg = < 0x41c00000 0x10000 >;
-            xlnx,count-width = <0x20>;
-            xlnx,family = "spartan6";
-            xlnx,gen0-assert = <0x1>;
-            xlnx,gen1-assert = <0x1>;
-            xlnx,one-timer-only = <0x0>;
-            xlnx,trig0-assert = <0x1>;
-            xlnx,trig1-assert = <0x1>;
-        } ;
-    } ;
-} ;

board/avnet/s6lx9_microboard/lx9_mmu_defconfig

@@ -1,68 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
-CONFIG_INITRAMFS_COMPRESSION_GZIP=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_BASE_FULL is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-# CONFIG_SIGNALFD is not set
-# CONFIG_SHMEM is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_OPT_LIB_ASM is not set
-CONFIG_KERNEL_BASE_ADDR=0x80000000
-CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6"
-CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
-# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set
-CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
-CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
-CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a"
-CONFIG_HZ_100=y
-CONFIG_MMU=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE_FORCE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_XILINX_EMACLITE=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_UARTLITE=y
-CONFIG_SERIAL_UARTLITE_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_CIFS=y
-CONFIG_CIFS_STATS=y
-CONFIG_CIFS_STATS2=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEBUG_SLAB=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_INFO=y
-CONFIG_EARLY_PRINTK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set

board/avnet/s6lx9_microboard/readme.txt

@@ -1,70 +0,0 @@
-This is the buildroot board support for the Avnet Spartan6 LX9 MicroBoard.
-
-The Avnet S6LX9 Microboard is a small USB-Stick sized module containing
-a Spartan6 FPGA capable of running the Microblaze softcore processor
-together with RAM and FLASH memory.
-
-The board can be bought from Avnet (avnet.com) or from Trenz Electronic
-(www.trenz-electronic.de) for a low price.
-
-To run the Linux built with buildroot you have to install the FPGA bitfile
-and u-boot as described in the tutorial AvtS6LX9MicroBoard_SW302_PetaLinux
-available on http://www.em.avnet.com/s6microboard
-
-On this site also is a forum containing information on how to build your own
-Microblaze processor for the Microboard.
-
-The image file (default name is simpleImage.lx9_mmu.ub) has to be copied
-to your tftp folder (often /tftpboot/) or can be programmed into the
-board's SPI flash.
-
-Sample session:
-
-$ make s6lx9_microboard_defconfig
-$ make
-$ cp build/linux-<version>/arch/microblaze/boot/simpleImage.lx9_mmu.ub /tftpboot/br12.2a.ub
-$ minicom
-<hit the reset button on the S6LX9 Microboard>
-
-                Icache:ON
-                Dcache:ON
-        U-Boot Start:0x83f00000
-SF: Got idcode 20 ba 18 10 01
-*** Warning - bad CRC, using default environment
-
-Net:   Xilinx_Emaclite
-MAC:   00:0a:35:00:63:37
-U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1
-
-BOOTP broadcast 1
-DHCP client bound to address 192.168.11.122
-Hit any key to stop autoboot:  0
-U-Boot-PetaLinux> tftp br12.2a.ub
-Using Xilinx_Emaclite device
-TFTP from server 192.168.11.10; our IP address is 192.168.11.122
-Filename 'br12.2a.ub'.
-Load address: 0x80002000
-Loading: #################################################################
-         #################################################################
-         #################################################################
-         #################################################################
-         #################################################################
-         ##############################
-done
-Bytes transferred = 5207724 (4f76ac hex)
-U-Boot-PetaLinux> bootm
-## Booting kernel from Legacy Image at 80002000 ...
-   Image Name:   Linux-3.1.0
-   Image Type:   MicroBlaze Linux Kernel Image (uncompressed)
-   Data Size:    5207660 Bytes =  5 MB
-   Load Address: 80000000
-   Entry Point:  80000000
-   Verifying Checksum ... OK
-   Loading Kernel Image ... OK
-OK
-## Transferring control to Linux (at address 80000000), 0x80000000 ramdisk 0x00000000, FDT 0x00000000...
-Early console on uartlite at 0x40600000
-..... boot log skipped
-
-Welcome to Microblaze Buildroot
-Microblaze login:

board/avnet/zedboard/readme.txt

@@ -1,64 +0,0 @@
-This is the buildroot board support for the Avnet Zedboard. The Zedboard is
-a development board based on the Xilinx Zynq-7000 based All-Programmable
-System-On-Chip.
-
-Zedboard information including schematics, reference designs, and manuals are
-available from http://www.zedboard.org .
-
-Steps to create a working system for Zedboard:
-
-1) make zedboard_defconfig
-2) make
-3) copy files BOOT.BIN, u-boot-dtb.img, rootfs.cpio.uboot,
-	uImage, zynq-zed.dtb into your SD card
-4) boot your Zedboard
-
-The expected output:
-
- U-Boot SPL 2015.07 (Jul 22 2015 - 12:01:55)
- mmc boot
- reading system.dtb
- spl_load_image_fat_os: error reading image system.dtb, err - -1
- reading u-boot-dtb.img
- reading u-boot-dtb.img
-
- U-Boot 2015.07 (Jul 22 2015 - 12:01:55 +0200)
-
- Model: Zynq ZED Board
- I2C:   ready
- DRAM:  ECC disabled 512 MiB
- MMC:   zynq_sdhci: 0
- Using default environment
- ...
-
-When using an older U-Boot then 2015.07, a working ps7_init.c
-file is required to be installed into the U-Boot directory
-structure. From 2015.07, the major Zynq-based boards are
-supported without any manual intervention.
-
-Resulting system
-----------------
-A FAT32 partition should be created at the beginning of the SD Card
-and the following files should be installed:
-	/BOOT.BIN
-	/zynq-zed.dtb
-	/uImage
-	/rootfs-cpio.uboot
-	/u-boot-dtb.img
-
-
-All needed files can be taken from output/images/
-
-BOOT.BIN, uImage and u-boot-dtb.img are direct copies of the same files
-available on output/images/
-
-There is a patch attached that redefines the U-Boot's environment
-to work with Buildroot out-of-the-box.
-
-You can alter the booting procedure by creating a file uEnv.txt
-in the root of the SD card. It is a plain text file in format
-<key>=<value> one per line:
-
-kernel_image=myimage
-modeboot=myboot
-myboot=...

board/avnet/zedboard/uboot/0001-zynq-Create-zedboard-specific-U-Boot-environment.patch

@@ -1,45 +0,0 @@
-From a4c0058967a551385da5e16d2787d9f704cab225 Mon Sep 17 00:00:00 2001
-From: Jan Viktorin <viktorin@rehivetech.com>
-Date: Thu, 18 Jun 2015 16:26:02 +0200
-Subject: [PATCH 2/2] zynq: Create zedboard-specific U-Boot environment
-
----
- include/configs/zynq_zed.h | 25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
-diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h
-index 946de95..2400a88 100644
---- a/include/configs/zynq_zed.h
-+++ b/include/configs/zynq_zed.h
-@@ -24,4 +24,28 @@
-
- #include <configs/zynq-common.h>
-
-+#undef CONFIG_EXTRA_ENV_SETTINGS
-+#define CONFIG_EXTRA_ENV_SETTINGS \
-+	"envload=mmc info && if fatload mmc 0 0x1000 uEnv.txt;"\
-+	" then echo Importing uEnv.txt; env import -t 0x1000"  \
-+	" $filesize; fi;\0"                                    \
-+	"bootcmd=run envload; run $modeboot\0"                 \
-+	"modeboot=sdboot\0"                                    \
-+	"baudrate=115200\0"                                    \
-+	"bootenv=uEnv.txt\0"                                   \
-+	"devicetree_image=zynq-zed.dtb\0"                      \
-+	"kernel_image=uImage\0"                                \
-+	"ramdisk_image=rootfs.cpio.uboot\0"                    \
-+	"fpga_image=system.bit\0"                              \
-+	"sdboot=echo Booting from SD...; run fpgaboot;"        \
-+	" fatload mmc 0 0x1000000 ${kernel_image}"             \
-+	" && fatload mmc 0 0x2000000 ${ramdisk_image}"         \
-+	" && fatload mmc 0 0x3000000 ${devicetree_image}"      \
-+	" && bootm 0x1000000 0x2000000 0x3000000\0"            \
-+	"fpgaboot=if fatload mmc 0 0x1000000 ${fpga_image};"   \
-+	" then echo Booting FPGA from ${fpga_image};"          \
-+	" fpga info 0 && fpga loadb 0 0x1000000 $filesize;"    \
-+	" else echo FPGA image ${fpga_image} was not found,"   \
-+	" skipping...; fi;\0"
-+
- #endif /* __CONFIG_ZYNQ_ZED_H */
---
-2.4.3
-

board/beaglebone/linux-3.12.config

@@ -1,251 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_OMAP_RESET_CLOCKS=y
-CONFIG_OMAP_MUX_DEBUG=y
-CONFIG_ARCH_OMAP3=y
-CONFIG_ARCH_OMAP4=y
-CONFIG_SOC_AM43XX=y
-# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
-# CONFIG_SOC_TI81XX is not set
-# CONFIG_MACH_OMAP3_BEAGLE is not set
-# CONFIG_MACH_DEVKIT8000 is not set
-# CONFIG_MACH_OMAP_LDP is not set
-# CONFIG_MACH_OMAP3530_LV_SOM is not set
-# CONFIG_MACH_OMAP3_TORPEDO is not set
-# CONFIG_MACH_OVERO is not set
-# CONFIG_MACH_OMAP3EVM is not set
-# CONFIG_MACH_OMAP3_PANDORA is not set
-# CONFIG_MACH_TOUCHBOOK is not set
-# CONFIG_MACH_OMAP_3430SDP is not set
-# CONFIG_MACH_NOKIA_RM680 is not set
-# CONFIG_MACH_NOKIA_RX51 is not set
-# CONFIG_MACH_OMAP_ZOOM2 is not set
-# CONFIG_MACH_OMAP_ZOOM3 is not set
-# CONFIG_MACH_CM_T35 is not set
-# CONFIG_MACH_CM_T3517 is not set
-# CONFIG_MACH_IGEP0020 is not set
-# CONFIG_MACH_IGEP0030 is not set
-# CONFIG_MACH_SBC3530 is not set
-# CONFIG_MACH_OMAP_3630SDP is not set
-CONFIG_ARM_THUMBEE=y
-CONFIG_HAVE_ARM_ARCH_TIMER=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
-CONFIG_KEXEC=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_GENERIC_CPUFREQ_CPU0=y
-# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
-CONFIG_FPE_NWFPE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM_RUNTIME=y
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_OMAP_OCP2SCP=y
-CONFIG_CONNECTOR=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_CROSSBAR=y
-CONFIG_EEPROM_93CX6=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_MD=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_TI_CPSW=y
-CONFIG_TI_CPTS=y
-# CONFIG_NET_VENDOR_VIA is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-CONFIG_AT803X_PHY=y
-CONFIG_SMSC_PHY=y
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=32
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_SERIAL_OMAP=y
-CONFIG_SERIAL_OMAP_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_OMAP=y
-CONFIG_SPI=y
-CONFIG_SPI_OMAP24XX=y
-CONFIG_SPI_TI_QSPI=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_W1=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_GOV_FAIR_SHARE=y
-CONFIG_THERMAL_GOV_USER_SPACE=y
-CONFIG_CPU_THERMAL=y
-CONFIG_TI_SOC_THERMAL=y
-CONFIG_TI_THERMAL=y
-CONFIG_WATCHDOG=y
-CONFIG_OMAP_WATCHDOG=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MFD_TPS65217=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_PBIAS=y
-CONFIG_REGULATOR_TPS65023=y
-CONFIG_REGULATOR_TPS6507X=y
-CONFIG_REGULATOR_TPS65217=y
-CONFIG_REGULATOR_TIAVSCLASS0=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_DA8XX=y
-CONFIG_FB_DA8XX_TDA998X=y
-CONFIG_OMAP2_DSS=y
-CONFIG_OMAP2_DSS_SDI=y
-CONFIG_OMAP2_DSS_DSI=y
-CONFIG_FB_OMAP2=y
-CONFIG_DISPLAY_CONNECTOR_HDMI=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_HDRC=m
-CONFIG_USB_MUSB_OMAP2PLUS=m
-CONFIG_USB_MUSB_DSPS=m
-CONFIG_USB_TI_CPPI41_DMA=y
-CONFIG_USB_STORAGE=y
-CONFIG_AM335X_PHY_USB=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_EEM=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_OMAP=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_OMAP=y
-CONFIG_DMADEVICES=y
-CONFIG_TI_EDMA=y
-CONFIG_DMA_OMAP=y
-CONFIG_TI_CPPI41=y
-CONFIG_COMMON_CLK_DEBUG=y
-CONFIG_OMAP_USB2=y
-CONFIG_OMAP_PIPE3=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=y
-CONFIG_QUOTA=y
-CONFIG_QFMT_V2=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_SCHEDSTATS=y
-CONFIG_TIMER_STATS=y
-CONFIG_PROVE_LOCKING=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_CRYPTO_MANAGER=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRC_ITU_T=y
-CONFIG_CRC7=y
-CONFIG_LIBCRC32C=y
-CONFIG_AVERAGE=y

board/beaglebone/patches/linux/linux-0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch

@@ -1,34 +0,0 @@
-From 29885f2f3d700341d322274db6ad085e601c0994 Mon Sep 17 00:00:00 2001
-From: Pantelis Antoniou <panto@antoniou-consulting.com>
-Date: Fri, 4 Jan 2013 00:32:33 +0200
-Subject: [PATCH 3/3] arm: Export cache flush management symbols when
- !MULTI_CACHE
-
-When compiling a kernel without CONFIG_MULTI_CACHE enabled the
-dma access functions end up not being exported. Fix it.
-
-Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
----
- arch/arm/kernel/setup.c |    9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index da1d1aa..dcb678c 100644
---- a/arch/arm/kernel/setup.c
-+++ b/arch/arm/kernel/setup.c
-@@ -923,3 +923,12 @@ const struct seq_operations cpuinfo_op = {
- 	.stop	= c_stop,
- 	.show	= c_show
- };
-+
-+/* export the cache management functions */
-+#ifndef MULTI_CACHE
-+
-+EXPORT_SYMBOL(__glue(_CACHE,_dma_map_area));
-+EXPORT_SYMBOL(__glue(_CACHE,_dma_unmap_area));
-+EXPORT_SYMBOL(__glue(_CACHE,_dma_flush_range));
-+
-+#endif
--- 
-1.7.10.4
-

board/beaglebone/post-image.sh

@@ -1,6 +0,0 @@
-#!/bin/sh
-# post-image.sh for BeagleBone
-# 2014, Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
-
-# copy the uEnv.txt to the output/images directory
-cp board/beaglebone/uEnv.txt $BINARIES_DIR/uEnv.txt

board/beaglebone/readme.txt

@@ -1,62 +0,0 @@
-BeagleBone
-
-Intro
-=====
-To be able to use BeagleBone board with the images generated by
-Buildroot, you have to prepare the SDCard.
-
-How to build it
-===============
-
-  $ make beaglebone_defconfig
-
-Then you can edit the build options using
-
-  $ make menuconfig
-
-Compile all and build rootfs image:
-
-  $ make
-
-Result of the build
--------------------
-
-After building, you should get a tree like this:
-
-  output/images/
-  ├── am335x-boneblack.dtb
-  ├── am335x-bone.dtb
-  ├── MLO
-  ├── rootfs.ext2
-  ├── u-boot.img
-  ├── uEnv.txt
-  └── zImage
-
-
-Prepare your SDCard
-===================
-
-You need to prepare first partition in fat32 and marked as bootable,
-and second where you will write rootfs.
-
-Copy the files to boot partition
-
-  $ cp MLO u-boot.img zImage uEnv.txt *.dtb /media/zzzzz
-
-where /media/zzzzz is the mount point.
-Then you need to write the rootfs image onto SDCard:
-
-  # dd if=rootfs.ext2 of=/dev/xxxxx
-
-where /dev/xxxxx is the second partition. Use:
-
-  # fdisk -l
-
-to check for correct one.
-
-Finish
-======
-
-Unmount all mounted SDCard partitions and insert the card to BeagleBone.
-Hold the "BOOT" button and apply power. Then release the "BOOT" button.
-The output is available on the serial console.

board/beaglebone/uEnv.txt

@@ -1,3 +0,0 @@
-bootpart=0:1
-bootdir=
-uenvcmd=run loadimage;run loadramdisk;run findfdt;run loadfdt;run ramboot

board/boundarydevices/nitrogen6x/6x_bootscript.txt

@@ -1,131 +0,0 @@
-setenv bootargs ''
-
-a_script=0x10800000
-a_zImage=0x10800000
-a_fdt=0x13000000
-
-setenv initrd_high 0xffffffff
-if itest.s "x" == "x${dtbname}" ; then
-	if itest.s x6SOLO == "x${cpu}" ; then
-		dtbname=imx6dl-${board}.dtb;
-	elif itest.s x6DL == "x${cpu}" ; then
-		dtbname=imx6dl-${board}.dtb;
-	elif itest.s x6QP == "x${cpu}" ; then
-		dtbname=imx6qp-${board}.dtb;
-	elif itest.s x6SX == "x${cpu}" ; then
-		if itest.s "x1" != "x$m4enabled" ; then
-			dtbname=imx6sx-${board}.dtb;
-		else
-			run m4boot;
-			dtbname=imx6sx-${board}-m4.dtb;
-		fi
-		a_script=0x80800000
-		a_zImage=0x80800000
-		a_fdt=0x83000000
-	else
-		dtbname=imx6q-${board}.dtb;
-	fi
-fi
-
-if load ${dtype} ${disk}:1 ${a_script} uEnv.txt ; then
-    env import -t ${a_script} ${filesize}
-fi
-
-if itest.s x == x${bootdir} ; then
-	bootdir=/boot/
-fi
-
-if itest.s x${bootpart} == x ; then
-	bootpart=1
-fi
-
-if load ${dtype} ${disk}:${bootpart} ${a_fdt} ${bootdir}${dtbname} ; then
-	fdt addr ${a_fdt}
-	setenv fdt_high 0xffffffff
-else
-	echo "!!!! Error loading ${bootdir}${dtbname}";
-	exit;
-fi
-
-# first enable tfp410
-i2c dev 1
-i2c mw 38 8.1 bd
-
-cmd_xxx_present=
-fdt resize
-if itest.s "x" != "x${cmd_custom}" ; then
-	run cmd_custom
-	cmd_xxx_present=1;
-fi
-
-if itest.s "x" != "x${cmd_hdmi}" ; then
-	run cmd_hdmi
-	cmd_xxx_present=1;
-	if itest.s x == x${allow_noncea} ; then
-		setenv bootargs ${bootargs} mxc_hdmi.only_cea=1;
-		echo "only CEA modes allowed on HDMI port";
-	else
-		setenv bootargs ${bootargs} mxc_hdmi.only_cea=0;
-		echo "non-CEA modes allowed on HDMI, audio may be affected";
-	fi
-fi
-
-if itest.s "x" != "x${cmd_lcd}" ; then
-	run cmd_lcd
-	cmd_xxx_present=1;
-fi
-if itest.s "x" != "x${cmd_lvds}" ; then
-	run cmd_lvds
-	cmd_xxx_present=1;
-fi
-if itest.s "x" != "x${cmd_lvds2}" ; then
-	run cmd_lvds2
-	cmd_xxx_present=1;
-fi
-
-if itest.s "x" == "x${cmd_xxx_present}" ; then
-	echo "!!!!!!!!!!!!!!!!"
-	echo "warning: your u-boot may be outdated, please upgrade"
-	echo "!!!!!!!!!!!!!!!!"
-fi
-
-setenv bootargs "${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc"
-
-bpart=1
-
-if test "sata" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bpart}" ;
-elif test "usb" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bpart}" ;
-else
-	setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bpart}"
-fi
-
-if itest.s "x" != "x${disable_giga}" ; then
-	setenv bootargs ${bootargs} fec.disable_giga=1
-fi
-
-if itest.s "x" != "x${wlmac}" ; then
-	setenv bootargs ${bootargs} wlcore.mac=${wlmac}
-fi
-
-if itest.s "x" != "x${gpumem}" ; then
-	setenv bootargs ${bootargs} galcore.contiguousSize=${gpumem}
-fi
-
-if itest.s "x" != "x${cma}" ; then
-	setenv bootargs ${bootargs} cma=${cma}
-fi
-
-if itest.s "x" != "x${show_fdt}" ; then
-	fdt print /
-fi
-
-if itest.s "x" != "x${show_env}" ; then
-	printenv
-fi
-
-if load ${dtype} ${disk}:${bootpart} ${a_zImage} ${bootdir}/zImage ; then
-	bootz ${a_zImage} - ${a_fdt}
-fi
-echo "Error loading kernel image"

board/boundarydevices/nitrogen6x/6x_upgrade.txt

@@ -1,69 +0,0 @@
-if itest.s a$uboot_defconfig == a; then
-        echo "Please set uboot_defconfig to the appropriate value"
-        exit
-fi
-
-offset=0x400
-a_uImage1=0x12000000
-a_uImage2=0x12400000
-
-if itest.s x6SX == "x$cpu" ; then
-	a_uImage1=0x82000000
-	a_uImage2=0x82400000
-fi
-
-setenv stdout serial,vga
-echo "check U-Boot" ;
-
-if load ${dtype} ${disk}:1 ${a_uImage1} u-boot.$uboot_defconfig ; then
-else
-	echo "No U-Boot image found on SD card" ;
-	exit
-fi
-echo "read $filesize bytes from SD card" ;
-if sf probe || sf probe || sf probe 1 27000000 || sf probe 1 27000000 ; then
-	echo "probed SPI ROM" ;
-else
-	echo "Error initializing EEPROM" ;
-	exit
-fi ;
-if sf read ${a_uImage2} $offset $filesize ; then
-else
-	echo "Error reading boot loader from EEPROM" ;
-	exit
-fi
-if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
-	echo "------- U-Boot versions match" ;
-	exit
-fi
-echo "Need U-Boot upgrade" ;
-echo "Program in 5 seconds" ;
-for n in 5 4 3 2 1 ; do
-	echo $n ;
-	sleep 1 ;
-done
-echo "erasing" ;
-sf erase 0 0xC0000 ;
-
-# two steps to prevent bricking
-echo "programming" ;
-setexpr a1 ${a_uImage1} + 0x400
-setexpr o1 ${offset} + 0x400
-setexpr s1 ${filesize} - 0x400
-sf write ${a1} ${o1} ${s1} ;
-sf write ${a_uImage1} $offset 0x400 ;
-
-echo "verifying" ;
-if sf read ${a_uImage2} $offset $filesize ; then
-else
-	echo "Error re-reading EEPROM" ;
-	exit
-fi
-if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then
-else
-	echo "Read verification error" ;
-	exit
-fi
-while echo "---- U-Boot upgraded. reset" ; do
-	sleep 120
-done

board/boundarydevices/nitrogen6x/genimage.cfg

@@ -1,16 +0,0 @@
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		in-partition-table = "no"
-		image = "u-boot.imx"
-		offset = 1024
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/boundarydevices/nitrogen6x/post-build.sh

@@ -1,20 +0,0 @@
-#!/bin/sh
-# post-build fixups
-# for further details, see
-#
-#  http://boundarydevices.com/u-boot-on-i-mx6/
-#
-
-BOARD_DIR="$(dirname $0)"
-
-# bd u-boot looks for bootscript here
-$HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
--n "boot script" -d $BOARD_DIR/6x_bootscript.txt $TARGET_DIR/6x_bootscript
-
-# u-boot / update script for bd upgradeu command
-if [ -e $BINARIES_DIR/u-boot.imx ];
-then
-    install -D -m 0644 $BINARIES_DIR/u-boot.imx $TARGET_DIR/u-boot.imx
-    $HOST_DIR/usr/bin/mkimage -A arm -O linux -T script -C none -a 0 -e 0 \
-    -n "upgrade script" -d $BOARD_DIR/6x_upgrade.txt $TARGET_DIR/6x_upgrade
-fi

board/boundarydevices/nitrogen6x/post-image.sh

@@ -1,16 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                           \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"
-
-exit $?

board/boundarydevices/nitrogen6x/readme.txt

@@ -1,13 +0,0 @@
-Buildroot for Boundary Devices Nitrogen6X:
-
-http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/
-
-To install, simply copy the image to a uSD card:
-
-sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Where 'sdX' is the device node of the uSD partition.
-
-To upgrade u-boot, cancel autoboot and type:
-
-run upgradeu

board/calao/qil-a9260/linux-3.4.7.config

@@ -1,111 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_MACH_QIL_A9260=y
-CONFIG_AT91_SLOW_CLOCK=y
-CONFIG_AT91_EARLY_USART0=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS1,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_AT91=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_M41T94=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y

board/calao/qil-a9260/patches/at91bootstrap/0001-qil-a9260.patch

@@ -1,603 +0,0 @@
-From a3e08beea8bf5e96e1237eef4a82f4a2fdd5286b Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Thu, 19 Jul 2012 14:19:59 +0200
-Subject: [PATCH] Add support for the Calao-systems QIL-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/qil_a9260/nandflash/Makefile    |  122 ++++++++++++++
- board/qil_a9260/nandflash/qil-a9260.h |  109 ++++++++++++
- board/qil_a9260/qil_a9260.c           |  298 +++++++++++++++++++++++++++++++++
- crt0_gnu.S                            |    7 +
- include/part.h                        |    6 +-
- 5 files changed, 541 insertions(+), 1 deletions(-)
- create mode 100644 board/qil_a9260/nandflash/Makefile
- create mode 100644 board/qil_a9260/nandflash/qil-a9260.h
- create mode 100644 board/qil_a9260/qil_a9260.c
-
-diff --git a/board/qil_a9260/nandflash/Makefile b/board/qil_a9260/nandflash/Makefile
-new file mode 100644
-index 0000000..209a25f
---- /dev/null
-+++ b/board/qil_a9260/nandflash/Makefile
-@@ -0,0 +1,122 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for QIL-A9260
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9260
-+# Board name (case sensitive!!!)
-+BOARD=qil_a9260
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/qil_a9260/nandflash/qil-a9260.h b/board/qil_a9260/nandflash/qil-a9260.h
-new file mode 100644
-index 0000000..c87002e
---- /dev/null
-+++ b/board/qil_a9260/nandflash/qil-a9260.h
-@@ -0,0 +1,109 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : qil-a9260.h
-+ * Object              :
-+ * Creation            : GH July 19th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _QIL_A9260_H
-+#define _QIL_A9260_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
-+/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
-+
-+#define MACH_TYPE       	0x6AF		/* QIL-A9260 */
-+#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+#endif	/* _QIL_A9260_H */
-diff --git a/board/qil_a9260/qil_a9260.c b/board/qil_a9260/qil_a9260.c
-new file mode 100644
-index 0000000..ae122e7
---- /dev/null
-+++ b/board/qil_a9260/qil_a9260.c
-@@ -0,0 +1,298 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : qil_a9260.c
-+ * Object              :
-+ * Creation            : GH July 19th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA = 2 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_2 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
-+
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase DataFlash Page 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..bbd33fe 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -35,7 +35,11 @@
- 
- #ifdef AT91SAM9260
- #include "AT91SAM9260_inc.h"
--#include "at91sam9260ek.h"
-+	#ifdef at91sam9260ek
-+	#include "at91sam9260ek.h"
-+	#elif qil_a9260
-+	#include "qil-a9260.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9XE
--- 
-1.5.6.3
-

board/calao/qil-a9260/patches/barebox/0001-qil-a9260.patch

@@ -1,36 +0,0 @@
-From d076aa6182dc6df6bb311e60bbddb03573b9483b Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 3 Aug 2012 11:25:49 +0200
-Subject: [PATCH] Enable pull-up on Rx serial ports for the CALAO MB-QIL-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- arch/arm/boards/qil-a9260/init.c |    6 ++++++
- 1 files changed, 6 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/boards/qil-a9260/init.c b/arch/arm/boards/qil-a9260/init.c
-index 305d733..b43cace 100644
---- a/arch/arm/boards/qil-a9260/init.c
-+++ b/arch/arm/boards/qil-a9260/init.c
-@@ -196,11 +196,17 @@ device_initcall(qil_a9260_devices_init);
- static int qil_a9260_console_init(void)
- {
- 	at91_register_uart(0, 0);
-+	at91_set_A_periph(AT91_PIN_PB14, 1);    /* Enable pull-up on DRXD */
-+
- 	at91_register_uart(1, ATMEL_UART_CTS | ATMEL_UART_RTS
- 			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
- 			   | ATMEL_UART_RI);
-+
- 	at91_register_uart(2, ATMEL_UART_CTS | ATMEL_UART_RTS);
-+	at91_set_A_periph(AT91_PIN_PB7, 1);	/* Enable pull-up on RXD1 */
-+
- 	at91_register_uart(3, ATMEL_UART_CTS | ATMEL_UART_RTS);
-+	at91_set_A_periph(AT91_PIN_PB9, 1);	/* Enable pull-up on RXD2 */
- 
- 	return 0;
- }
--- 
-1.5.6.3
-

board/calao/qil-a9260/patches/linux/0001-qil-a9260.patch

@@ -1,27 +0,0 @@
-From fe6432a9728b62bce3db73c5a4efe026018fd495 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 3 Aug 2012 16:45:37 +0200
-Subject: [PATCH] QIL-A9260: rtc modalias m41t48 renamed to rtc-m41t48
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- arch/arm/mach-at91/board-qil-a9260.c |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
-index bf351e2..c0df05c 100644
---- a/arch/arm/mach-at91/board-qil-a9260.c
-+++ b/arch/arm/mach-at91/board-qil-a9260.c
-@@ -78,7 +78,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
- static struct spi_board_info ek_spi_devices[] = {
- #if defined(CONFIG_RTC_DRV_M41T94)
- 	{	/* M41T94 RTC */
--		.modalias	= "m41t94",
-+		.modalias	= "rtc-m41t94",
- 		.chip_select	= 0,
- 		.max_speed_hz	= 1 * 1000 * 1000,
- 		.bus_num	= 0,
--- 
-1.5.6.3
-

board/calao/snowball/linux-3.4.patch

@@ -1,45 +0,0 @@
-From 3d1a9b44b9dcd2c0f5d54c09596c96c0524d8340 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Tue, 13 Nov 2012 11:47:41 +0100
-Subject: [PATCH] trace-debug[stm]: Fix for BT/WLAN instability
-
-Pins under mop500_ske_pins array are used for different
-functionalities in snowball. Ex: GPIO161 pin configured
-for keypad here must stay configured as GPIO alternate
-function for operating PMU_EN pin of BT/WLAN chip in snowball.
-So forbid configuring these pins, for snowball
-
-Signed-off-by: Rajanikanth H.V <rajanikanth.hv@stericsson.com>
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- arch/arm/mach-ux500/board-mop500-stm.c |    7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-ux500/board-mop500-stm.c b/arch/arm/mach-ux500/board-mop500-stm.c
-index 1bef2a0..532fb9e 100644
---- a/arch/arm/mach-ux500/board-mop500-stm.c
-+++ b/arch/arm/mach-ux500/board-mop500-stm.c
-@@ -121,7 +121,9 @@ static int stm_ste_disable_ape_on_mipi60(void)
- 	if (retval)
- 		STM_ERR("Failed to disable MIPI60\n");
- 	else {
--		retval = nmk_config_pins(ARRAY_AND_SIZE(mop500_ske_pins));
-+		if (!machine_is_snowball())
-+			retval = nmk_config_pins(
-+				ARRAY_AND_SIZE(mop500_ske_pins));
- 		if (retval)
- 			STM_ERR("Failed to enable SKE gpio\n");
- 	}
-@@ -314,7 +316,8 @@ static int stm_ste_connection(enum stm_connection_type con_type)
- 		/* Enable altC3 on GPIO70-74 (STMMOD) and GPIO75-76 (UARTMOD) */
- 		prcmu_enable_stm_mod_uart();
- 		/* Enable APE on MIPI60 */
--		retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
-+		if (!machine_is_snowball())
-+			retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
- 		if (retval)
- 			STM_ERR("Failed to disable SKE GPIO\n");
- 		else {
--- 
-1.7.9.5
-

board/calao/tny-a9g20-lpw/at91bootstrap-1.16-tny-a9g20-lpw.patch

@@ -1,551 +0,0 @@
-From 53bd82b122f4530a98cba45795832820bb1d0b45 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Mon, 13 Aug 2012 11:26:10 +0200
-Subject: [PATCH] Add support for the Calao-systems TNY-A9G20-LPW
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/tny_a9g20_lpw/nandflash/Makefile        |  121 ++++++++++++
- board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h |  114 ++++++++++++
- board/tny_a9g20_lpw/tny_a9g20_lpw.c           |  243 +++++++++++++++++++++++++
- crt0_gnu.S                                    |    6 +
- include/part.h                                |    6 +-
- 5 files changed, 489 insertions(+), 1 deletion(-)
- create mode 100644 board/tny_a9g20_lpw/nandflash/Makefile
- create mode 100644 board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
- create mode 100644 board/tny_a9g20_lpw/tny_a9g20_lpw.c
-
-diff --git a/board/tny_a9g20_lpw/nandflash/Makefile b/board/tny_a9g20_lpw/nandflash/Makefile
-new file mode 100644
-index 0000000..7efbea7
---- /dev/null
-+++ b/board/tny_a9g20_lpw/nandflash/Makefile
-@@ -0,0 +1,121 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for AT91SAM9260EK
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9G20
-+# Board name (case sensitive!!!)
-+BOARD=tny_a9g20_lpw
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
-new file mode 100644
-index 0000000..b1f8a1d
---- /dev/null
-+++ b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
-@@ -0,0 +1,114 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : tny-a9g20-lpw.h
-+ * Object              :
-+ * Creation            : GH August 13th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _TNY_A9G20_LPW_H
-+#define _TNY_A9G20_LPW_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(100000000)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+/* set PLLA to 800Mhz from MAINCK= 12Mhz MULA=199 (0xC7+1= 200), DIVA=0x03 (Fplla=12Mhz x [(199+1)/3]=800Mhz) */
-+#define PLLA_SETTINGS   0x20C73F03
-+#define PLLB_SETTINGS   0x100F3F02
-+
-+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
-+/* LP-SDRAM (fmax=100Mhz) PDIV=0 => PRESCALER CLK=PCLK; */
-+/* MDIV = 2 => PRESCALER CLK / 4 = MCLK=100Mhz */
-+/* PRESCALER CLK = PLLA (800Mhz) / 2 (PRES=1) = 400Mhz */
-+#define MCKR_SETTINGS           0x0204 
-+#define MCKR_CSS_SETTINGS       (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 100000000.*/
-+/* Please refer to SMC section in AT91SAM9 datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000			/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000			/* Image Size in NandFlash */
-+
-+#define MACH_TYPE		0x80B			/* TNY-A9G20 */
-+#define JUMP_ADDR		0x23F00000		/* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define	CFG_SDRAM
-+#define	CFG_HW_INIT
-+
-+#endif	/* _TNY_A9G20_LPW_H */
-diff --git a/board/tny_a9g20_lpw/tny_a9g20_lpw.c b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
-new file mode 100644
-index 0000000..cef9055
---- /dev/null
-+++ b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
-@@ -0,0 +1,243 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : tny_a9g20_lpw.c
-+ * Object              :
-+ * Creation            : GH August 13th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+	writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA/2 = 3 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix (slow slew rate enabled and LPSDRAM memory voltage = 1.8V) */
-+	writel(((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<17)) & ~0x00010000, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_3 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+                                AT91C_SDRAMC_MD_LOW_POWER_SDRAM); /* SDRAM (low power)   */
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if BP4 is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc bp4_pio[] = {
-+		{"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(bp4_pio);
-+	
-+	/* If BP4 is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PA(31)) )
-+		AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..c6cd49d 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,12 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..ab79af1 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -46,7 +46,11 @@
- 
- #ifdef AT91SAM9G20
- #include "AT91SAM9260_inc.h"
--#include "at91sam9g20ek.h"
-+	#ifdef at91sam9g20ek
-+	#include "at91sam9g20ek.h"
-+	#elif tny_a9g20_lpw
-+	#include "tny-a9g20-lpw.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9261
--- 
-1.7.9.5
-

board/calao/tny-a9g20-lpw/linux-3.9.config

@@ -1,187 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_SOC_AT91SAM9260=y
-CONFIG_SOC_AT91SAM9263=y
-CONFIG_SOC_AT91SAM9G45=y
-CONFIG_SOC_AT91SAM9X5=y
-CONFIG_SOC_AT91SAM9N12=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_AT91_TIMER_HZ=128
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
-CONFIG_KEXEC=y
-CONFIG_AUTO_ZRELADDR=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-CONFIG_IPV6_SIT_6RD=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=4
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_PWM=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_93CX6=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_DAVICOM_PHY=y
-CONFIG_MICREL_PHY=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_POLLDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=4
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-CONFIG_SSB=m
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_AT91=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_ACM_MS=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=y
-CONFIG_MMC_SPI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91RM9200=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_DMADEVICES=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_ARC4=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_AVERAGE=y

board/calao/usb-a9260/at91bootstrap-1.16-usb-a9260.patch

@@ -1,603 +0,0 @@
-From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Tue, 2 Oct 2012 09:19:15 +0200
-Subject: [PATCH] Add support for the USB-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/usb_a9260/nandflash/Makefile    |  122 ++++++++++++++
- board/usb_a9260/nandflash/usb-a9260.h |  109 ++++++++++++
- board/usb_a9260/usb_a9260.c           |  298 +++++++++++++++++++++++++++++++++
- crt0_gnu.S                            |    7 +
- include/part.h                        |    6 +-
- 5 files changed, 541 insertions(+), 1 deletion(-)
- create mode 100644 board/usb_a9260/nandflash/Makefile
- create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
- create mode 100644 board/usb_a9260/usb_a9260.c
-
-diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
-new file mode 100644
-index 0000000..02f4b50
---- /dev/null
-+++ b/board/usb_a9260/nandflash/Makefile
-@@ -0,0 +1,122 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9260
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9260
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9260
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
-new file mode 100644
-index 0000000..2aaf759
---- /dev/null
-+++ b/board/usb_a9260/nandflash/usb-a9260.h
-@@ -0,0 +1,109 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9260.h
-+ * Object              :
-+ * Creation            : GH Oct 1th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9260_H
-+#define _USB_A9260_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
-+/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
-+
-+#define MACH_TYPE       	0x6AD		/* USB-A9260 */
-+#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+#endif	/* _USB_A9260_H */
-diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
-new file mode 100644
-index 0000000..de30f0b
---- /dev/null
-+++ b/board/usb_a9260/usb_a9260.c
-@@ -0,0 +1,298 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb_a9260.c
-+ * Object              :
-+ * Creation            : GH Oct 1th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA = 2 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_2 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
-+
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase DataFlash Page 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..212789f 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -35,7 +35,11 @@
- 
- #ifdef AT91SAM9260
- #include "AT91SAM9260_inc.h"
--#include "at91sam9260ek.h"
-+	#ifdef at91sam9260ek
-+	#include "at91sam9260ek.h"
-+	#elif usb_a9260
-+	#include "usb-a9260.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9XE
--- 
-1.7.9.5
-

board/calao/usb-a9260/linux-3.7.4.config

@@ -1,97 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_MACH_USB_A9260=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y

board/calao/usb-a9263/at91bootstrap-1.16-usb-a9263.patch

@@ -1,851 +0,0 @@
-From 74796655212d321f50ab89e8c5570245901f4cba Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Thu, 5 Jul 2012 18:44:07 +0200
-Subject: [PATCH] Add support for the Calao-systems USB-A9263
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/usb_a9263/dataflash/Makefile    |  115 +++++++++++++
- board/usb_a9263/dataflash/usb-a9263.h |   97 +++++++++++
- board/usb_a9263/nandflash/Makefile    |  117 ++++++++++++++
- board/usb_a9263/nandflash/usb-a9263.h |  116 +++++++++++++
- board/usb_a9263/usb_a9263.c           |  285 +++++++++++++++++++++++++++++++++
- crt0_gnu.S                            |    7 +
- driver/dataflash.c                    |    6 +-
- include/part.h                        |    6 +-
- 8 files changed, 745 insertions(+), 4 deletions(-)
- create mode 100644 board/usb_a9263/dataflash/Makefile
- create mode 100644 board/usb_a9263/dataflash/usb-a9263.h
- create mode 100644 board/usb_a9263/nandflash/Makefile
- create mode 100644 board/usb_a9263/nandflash/usb-a9263.h
- create mode 100644 board/usb_a9263/usb_a9263.c
-
-diff --git a/board/usb_a9263/dataflash/Makefile b/board/usb_a9263/dataflash/Makefile
-new file mode 100644
-index 0000000..332685e
---- /dev/null
-+++ b/board/usb_a9263/dataflash/Makefile
-@@ -0,0 +1,115 @@
-+# TODO: set this appropriately for your local toolchain
-+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
-+CROSS_COMPILE=arm-elf-
-+#CROSS_COMPILE = arm-softfloat-linux-gnu-
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# DataFlashBoot Configuration for USB-A9263
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9263
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9263
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x300000
-+TOP_OF_MEMORY=0x314000
-+# Name of current directory
-+PROJECT=dataflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm9 -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	dataflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+	
-+	
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	rm -f *.o *.bin *.elf *.map
-diff --git a/board/usb_a9263/dataflash/usb-a9263.h b/board/usb_a9263/dataflash/usb-a9263.h
-new file mode 100644
-index 0000000..40a3af8
---- /dev/null
-+++ b/board/usb_a9263/dataflash/usb-a9263.h
-@@ -0,0 +1,97 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9263.h
-+ * Object              :
-+ * Creation            : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9263_H
-+#define _USB_A9263_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* DataFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SPI	AT91C_BASE_SPI0
-+#define AT91C_ID_SPI	AT91C_ID_SPI0
-+
-+/* SPI CLOCK */
-+#define AT91C_SPI_CLK 		 8000000
-+/* AC characteristics */
-+/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
-+#define DATAFLASH_TCSS		(0x1a << 16)	/* 250ns min (tCSS) <=> 12/48000000 = 250ns */
-+#define DATAFLASH_TCHS		(0x1 << 24)	/* 250ns min (tCSH) <=> (64*1+SCBR)/(2*48000000) */
-+
-+#define DF_CS_SETTINGS 		(AT91C_SPI_NCPHA | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | ((MASTER_CLOCK / AT91C_SPI_CLK) << 8))
-+
-+/* ******************************************************************* */
-+/* SDRAMC Settings                                                     */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SDRAMC 	AT91C_BASE_SDRAMC0
-+#define AT91C_EBI_SDRAM		AT91C_EBI0_SDRAM
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SPI_PCS_DATAFLASH		AT91C_SPI_PCS0_DATAFLASH	/* Boot on SPI NCS0 */
-+
-+#define IMG_ADDRESS 			0x4000			/* Image Address in DataFlash */
-+#define	IMG_SIZE			0x40000			/* Image Size in DataFlash    */
-+
-+#define MACH_TYPE       		0x6AE       		/* USB-A9263 */
-+#define JUMP_ADDR			0x23F00000		/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+#undef	CFG_DEBUG
-+
-+#define CFG_DATAFLASH
-+
-+#endif	/* _USB_A9263_H */
-diff --git a/board/usb_a9263/nandflash/Makefile b/board/usb_a9263/nandflash/Makefile
-new file mode 100644
-index 0000000..c453098
---- /dev/null
-+++ b/board/usb_a9263/nandflash/Makefile
-@@ -0,0 +1,117 @@
-+# TODO: set this appropriately for your local toolchain
-+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
-+CROSS_COMPILE=arm-elf-
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9263
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9263
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9263
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x300000
-+TOP_OF_MEMORY=0x314000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm9 -O0 -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+	
-+	
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	rm -f *.o *.bin *.elf *.map
-diff --git a/board/usb_a9263/nandflash/usb-a9263.h b/board/usb_a9263/nandflash/usb-a9263.h
-new file mode 100644
-index 0000000..24e2cf1
---- /dev/null
-+++ b/board/usb_a9263/nandflash/usb-a9263.h
-@@ -0,0 +1,116 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9263.h
-+ * Object              :
-+ * Creation            : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9263_H
-+#define _USB_A9263_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_SODR = AT91C_PIO_PD15;} while(0)
-+#define NAND_ENABLE_CE()  do { *(volatile unsigned int *)AT91C_PIOD_CODR = AT91C_PIO_PD15;} while(0)
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOA_PDSR & AT91C_PIO_PA22))
-+
-+/* ******************************************************************* */
-+/* SDRAMC Settings                                                     */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SDRAMC 	AT91C_BASE_SDRAMC0
-+#define AT91C_EBI_SDRAM		AT91C_EBI0_SDRAM
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000. */
-+/* Please refer to SMC section in AT91SAM9x datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 	0x20000		/* Image Address in NandFlash */
-+#define	IMG_SIZE	0x40000		/* Image Size in NandFlash    */
-+
-+#define MACH_TYPE       0x6AE  		/* USB-A9263 */
-+#define JUMP_ADDR	0x23F00000	/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+
-+#endif	/* _USB_A9263_H */
-diff --git a/board/usb_a9263/usb_a9263.c b/board/usb_a9263/usb_a9263.c
-new file mode 100644
-index 0000000..5630f99
---- /dev/null
-+++ b/board/usb_a9263/usb_a9263.c
-@@ -0,0 +1,285 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb_a9263.c
-+ * Object              :
-+ * Creation            : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+
-+#ifdef CFG_HW_INIT
-+/*---------------------------------------------------------------------------- */
-+/* \fn    hw_init							       */
-+/* \brief This function performs very low level HW initialization	       */
-+/* This function is invoked as soon as possible during the c_startup	       */
-+/* The bss segment must be initialized					       */
-+/*---------------------------------------------------------------------------- */
-+void hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA = 2 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure the PIO controller to output PCK0 */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI0 Slave Slot Cycle to 64 */
-+	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG4)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG4));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix */
-+	/* VDDIOMSEL = 1 -> Memories are 3.3V powered */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | (1 << 16) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBI0CSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_2 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register       */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
-+#endif	/* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+
-+#ifdef CFG_SDRAM
-+//*----------------------------------------------------------------------------
-+//* \fn    sdramc_hw_init
-+//* \brief This function performs SDRAMC HW initialization
-+//*----------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PD(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PD(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PD(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PD(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PD(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PD(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PD(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PD(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PD(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PD(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PD(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PD(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PD(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PD(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PD(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PD(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the SDRAMC PIO controller */
-+	pio_setup(sdramc_pio);
-+}
-+#endif
-+
-+#ifdef CFG_DATAFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USER PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USER PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{"NPCS0", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery								*/
-+/* \brief This function erases NandFlash Block 0 if USER PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USER PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PA(22), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PD(15), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBI0CSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC0 + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC0 + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC0 + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC0 + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
-+	writel((1 << AT91C_ID_PIOCDE), PMC_PCER + AT91C_BASE_PMC);
-+
-+	pio_setup(nand_pio);
-+
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC0 + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC0 + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-+
-+
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/driver/dataflash.c b/driver/dataflash.c
-index e28e49e..4de295a 100644
---- a/driver/dataflash.c
-+++ b/driver/dataflash.c
-@@ -293,14 +293,14 @@ static int df_init (AT91PS_DF pDf)
- 			pDf->dfDescription.pages_size = 264;
- 			pDf->dfDescription.page_offset = 9;
- 			break;
--
-+*/
- 		case AT45DB021B:
- 			pDf->dfDescription.pages_number = 1024;
- 			pDf->dfDescription.pages_size = 264;
- 			pDf->dfDescription.page_offset = 9;
- 			break;
- 
--		case AT45DB041B:
-+/*		case AT45DB041B:
- 			pDf->dfDescription.pages_number = 2048;
- 			pDf->dfDescription.pages_size = 264;
- 			pDf->dfDescription.page_offset = 9;
-@@ -373,7 +373,7 @@ int load_df(unsigned int pcs, unsigned int img_addr, unsigned int img_size, unsi
-     if (!df_init(pDf))
-         return -1;
- 
--#if defined(AT91SAM9260) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
-+#if defined(AT91SAM9260) || defined(AT91SAM9263) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
-     /* Test if a button has been pressed or not */
-     /* Erase Page 0 to avoid infinite loop */
-     df_recovery(pDf);
-diff --git a/include/part.h b/include/part.h
-index ba5985a..a1863d0 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -61,7 +61,11 @@
- 
- #ifdef AT91SAM9263
- #include "AT91SAM9263_inc.h"
--#include "at91sam9263ek.h"
-+	#ifdef at91sam9263ek
-+	#include "at91sam9263ek.h"
-+	#elif usb_a9263
-+	#include "usb-a9263.h"
-+	#endif
- #endif
- 
- #ifdef AT91CAP9
--- 
-1.5.6.3
-

board/calao/usb-a9263/linux-3.4.4.config

@@ -1,102 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9263=y
-CONFIG_MACH_USB_A9263=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y

board/calao/usb-a9g20-lpw/linux-3.4.4.config

@@ -1,105 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9G20=y
-CONFIG_MACH_USB_A9G20=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_RV3029C2=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y

board/calao/usb-a9g20-lpw/patches/at91bootstrap/0001-usb-a9g20-lpw.patch

@@ -1,610 +0,0 @@
-From 8d84757d5170969e8bdfebc7951f43c5aa2b05fd Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 6 Jul 2012 16:32:47 +0200
-Subject: [PATCH] Add support for the Calao-systems USB-A9G20-LPW
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/usb_a9g20_lpw/nandflash/Makefile        |  121 ++++++++++
- board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h |  112 +++++++++
- board/usb_a9g20_lpw/usb_a9g20_lpw.c           |  303 +++++++++++++++++++++++++
- crt0_gnu.S                                    |    7 +
- include/part.h                                |    6 +-
- 5 files changed, 548 insertions(+), 1 deletions(-)
- create mode 100644 board/usb_a9g20_lpw/nandflash/Makefile
- create mode 100644 board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
- create mode 100644 board/usb_a9g20_lpw/usb_a9g20_lpw.c
-
-diff --git a/board/usb_a9g20_lpw/nandflash/Makefile b/board/usb_a9g20_lpw/nandflash/Makefile
-new file mode 100644
-index 0000000..8c9d99a
---- /dev/null
-+++ b/board/usb_a9g20_lpw/nandflash/Makefile
-@@ -0,0 +1,121 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9G20-LPW
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9G20
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9g20_lpw
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
-new file mode 100644
-index 0000000..c0bdc6e
---- /dev/null
-+++ b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
-@@ -0,0 +1,112 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9g20-lpw.h
-+ * Object              :
-+ * Creation            : GH July 6th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9G20_LPW_H
-+#define _USB_A9G20_LPW_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(133000000)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+/* Set PLLA to 798Mhz */
-+#define PLLA_SETTINGS	0x20843F02
-+#define PLLB_SETTINGS	0x100F3F02
-+
-+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
-+#define MCKR_SETTINGS		0x1300
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 133000000.*/
-+/* Please refer to SMC section in AT91SAM9 datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(2 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(2 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(4 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(4 << 8)
-+#define AT91C_SM_NRD_PULSE	(4 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(4 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(7 << 0)
-+#define AT91C_SM_NRD_CYCLE	(7 << 16)
-+
-+#define AT91C_SM_TDF	        (3 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000			/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000			/* Image Size in NandFlash */
-+
-+#define MACH_TYPE		0x731			/* USB-A9G20 */
-+#define JUMP_ADDR		0x23F00000		/* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+#undef  CFG_NANDFLASH_RECOVERY
-+
-+#define	CFG_SDRAM
-+#define	CFG_HW_INIT
-+
-+#endif	/* _USB_A9G20_LPW_H */
-diff --git a/board/usb_a9g20_lpw/usb_a9g20_lpw.c b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
-new file mode 100644
-index 0000000..c372307
---- /dev/null
-+++ b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
-@@ -0,0 +1,303 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb_a9g20_lpw.c
-+ * Object              :
-+ * Creation            : GH July 6th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+	writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA/2 = 3 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix (VDDIOSEL=0: memory voltage = 1.8V ) */
-+	writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA) & ~0x00010000) | AT91C_EBI_CS1A_SDRAMC , AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_3 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_3 |
-+				AT91C_SDRAMC_TRC_9 |
-+				AT91C_SDRAMC_TRP_3 |
-+				AT91C_SDRAMC_TRCD_3 |
-+				AT91C_SDRAMC_TRAS_6 |
-+				AT91C_SDRAMC_TXSR_10,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+                                AT91C_SDRAMC_MD_SDRAM);         /* SDRAM (no low power)   */
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
-+		{"NPCS1", AT91C_PIN_PC(11), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if USER PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+#ifdef CFG_NANDFLASH_RECOVERY
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb);
-+	
-+	/* If USER PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+#else
-+static void nand_recovery(void) {}
-+#endif
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..1d7392a 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -46,7 +46,11 @@
- 
- #ifdef AT91SAM9G20
- #include "AT91SAM9260_inc.h"
--#include "at91sam9g20ek.h"
-+	#ifdef at91sam9g20ek
-+	#include "at91sam9g20ek.h"
-+	#elif usb_a9g20_lpw
-+	#include "usb-a9g20-lpw.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9261
--- 
-1.5.6.3
-

board/calao/usb-a9g20-lpw/patches/barebox/0001-usb-a9g20-lpw.patch

@@ -1,12 +0,0 @@
-diff --git a/arch/arm/configs/usb_a9g20_defconfig b/arch/arm/configs/usb_a9g20_defconfig
-index 30bf380..7716e0e 100644
---- a/arch/arm/configs/usb_a9g20_defconfig
-+++ b/arch/arm/configs/usb_a9g20_defconfig
-@@ -15,6 +15,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
- CONFIG_CMDLINE_EDITING=y
- CONFIG_AUTO_COMPLETE=y
- CONFIG_MENU=y
-+# CONFIG_ERRNO_MESSAGES is not set
- # CONFIG_CONSOLE_ACTIVATE_FIRST is not set
- CONFIG_CONSOLE_ACTIVATE_ALL=y
- CONFIG_PARTITION=y

board/ci20/readme.txt

@@ -1,42 +0,0 @@
-*********************
-* MIPS Creator CI20 *
-*********************
-
-The 'ci20_defconfig' will create a root filesystem and a kernel image
-under the 'output/images/' directory. This document will try to explain how
-to use them in order to run Buildroot in the MIPS Creator CI20 board.
-
-Assuming you are at the U-Boot prompt of the MIPS Creator CI20, you have to
-load the generated kernel image by using the 'tftpboot' command. In
-order to do that, you will need to get the network working. Here you
-have the instructions to set the ip address, netmask and gateway:
-
-  setenv ipaddr x.x.x.x
-  setenv netmask x.x.x.x
-  setenv gatewayip x.x.x.x
-
-Now you have to set the ip for the TFTP server you are going to load the
-kernel image from, and also the name of the kernel image file (we use
-'uImage' as a filename in this example):
-
-  setenv serverip x.x.x.x
-  setenv bootfile uImage
-
-And finally load the kernel image:
-
-  tftpboot
-
-Now you have to extract the generated root filesystem into a USB drive
-or SD-Card. Here you have the instructions to boot from the two of them.
-You have to choose the one your prefer:
-
-From USB
-  setenv bootargs console=ttyS4,115200 console=tty0 mem=256M@0x0
-mem=768M@0x30000000 root=/dev/sda1
-
-From SD-Card
-  setenv bootargs console=ttyS4,115200 console=tty0 mem=256M@0x0
-mem=768M@0x30000000 root=/dev/mmcblk0p1
-
-And finally run this command to boot the board:
-  bootm

board/congatec/qmx6/readme.txt

@@ -1,36 +0,0 @@
-This is the minimal buildroot support for the Congatec QMX6 Qseven CoM
-
-conga-QMX6 is based on the freescale iMX6 SoC. For more information please
-have a look at http://www.congatec.com/products/qseven/conga-qmx6.html
-
-The configuration is based on the currently latest kernel release from
-Congatec's git repository which is based on 3.0.35. The bootloader u-boot
-is preconfigured on the CPU module and does not need to be replaced.
-
-To build the default configuration you only have to:
-
-	make qmx6_defconfig && make
-
-You will need a microSD card of sufficient size and the first or only
-partition configured as Linux type.
-
-To transfer the system to the card do:
-
-	$ sudo dd if=output/images/rootfs.ext2 of=/dev/sdX1
-
-You can optionally extend the filesystem size to the whole partition:
-
-	$ sudo resize2fs /dev/sdX1
-
-You can also update the card image without completely rewriting it:
-
-	$ sudo mount /dev/sdX1 /mnt
-	$ sudo tar xf output/images/rootfs.tar -C /mnt
-	$ sudo umount /mnt
-
-Connect a terminal program to the rs232 connector marked "CONSOLE"
-with baudrate set to 115200, insert the microSD card into the socket
-on the CPU module and power the board to watch the system boot.
-
-Booting from the SD card slot on the base board is currently not
-supported.

board/cubietech/cubieboard/boot.cmd

@@ -1,4 +0,0 @@
-setenv bootargs console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait panic=10 ${extra}
-fatload mmc 0 0x43000000 script.bin
-fatload mmc 0 0x48000000 uImage
-bootm 0x48000000

board/cubietech/cubieboard/linux-cubieboard2.config

@@ -1,749 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_AUDIT=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_RCU_FAST_NO_HZ=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=19
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CPUSETS=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_MEM_RES_CTLR=y
-CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
-CONFIG_CGROUP_MEM_RES_CTLR_KMEM=y
-CONFIG_CGROUP_PERF=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_CFS_BANDWIDTH=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_BLK_CGROUP=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_PERF_COUNTERS=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_BLK_DEV_BSGLIB=y
-CONFIG_BLK_DEV_INTEGRITY=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_OSF_PARTITION=y
-CONFIG_AMIGA_PARTITION=y
-CONFIG_MAC_PARTITION=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_MINIX_SUBPARTITION=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_UNIXWARE_DISKLABEL=y
-CONFIG_SGI_PARTITION=y
-CONFIG_SUN_PARTITION=y
-CONFIG_KARMA_PARTITION=y
-CONFIG_EFI_PARTITION=y
-CONFIG_CFQ_GROUP_IOSCHED=y
-CONFIG_ARCH_SUN7I=y
-CONFIG_SUNXI_SCALING_MIN=408
-# CONFIG_CACHE_L2X0 is not set
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-CONFIG_ARM_ARCH_TIMER=y
-CONFIG_NR_CPUS=2
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_HIGHMEM=y
-CONFIG_COMPACTION=y
-CONFIG_KSM=y
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/mmc0p1 rw init=/init loglevel=8"
-CONFIG_KEXEC=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT=m
-CONFIG_CPU_FREQ_DEFAULT_GOV_FANTASY=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
-CONFIG_CPU_FREQ_USR_EVNT_NOTIFY=y
-CONFIG_CPU_FREQ_DVFS=y
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM_RUNTIME=y
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_FIB_TRIE_STATS=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=y
-CONFIG_NET_IPGRE_DEMUX=m
-CONFIG_NET_IPGRE=m
-CONFIG_NET_IPGRE_BROADCAST=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_ARPD=y
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=y
-CONFIG_INET_ESP=y
-CONFIG_INET_IPCOMP=y
-CONFIG_INET_DIAG=m
-CONFIG_INET_UDP_DIAG=m
-CONFIG_TCP_CONG_ADVANCED=y
-CONFIG_TCP_CONG_BIC=y
-CONFIG_TCP_CONG_WESTWOOD=y
-CONFIG_TCP_CONG_HTCP=y
-CONFIG_TCP_CONG_HSTCP=y
-CONFIG_TCP_CONG_HYBLA=y
-CONFIG_TCP_CONG_SCALABLE=y
-CONFIG_TCP_CONG_LP=y
-CONFIG_TCP_CONG_VENO=y
-CONFIG_TCP_CONG_YEAH=y
-CONFIG_TCP_CONG_ILLINOIS=y
-CONFIG_TCP_MD5SIG=y
-CONFIG_IPV6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_INET6_XFRM_MODE_TRANSPORT=m
-CONFIG_INET6_XFRM_MODE_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_BEET=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_SIT=m
-CONFIG_IPV6_SIT_6RD=y
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_IPV6_MROUTE=y
-CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
-CONFIG_IPV6_PIMSM_V2=y
-# CONFIG_ANDROID_PARANOID_NETWORK is not set
-CONFIG_NETWORK_SECMARK=y
-CONFIG_NETWORK_PHY_TIMESTAMPING=y
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_ZONES=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CONNTRACK_TIMEOUT=y
-CONFIG_NF_CONNTRACK_TIMESTAMP=y
-CONFIG_NF_CT_PROTO_DCCP=m
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_SNMP=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NF_CT_NETLINK_TIMEOUT=m
-CONFIG_NETFILTER_TPROXY=m
-CONFIG_NETFILTER_XT_SET=m
-CONFIG_NETFILTER_XT_TARGET_AUDIT=m
-CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
-CONFIG_NETFILTER_XT_TARGET_CT=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
-CONFIG_NETFILTER_XT_TARGET_LED=m
-CONFIG_NETFILTER_XT_TARGET_LOG=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
-CONFIG_NETFILTER_XT_TARGET_TEE=m
-CONFIG_NETFILTER_XT_TARGET_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
-CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
-CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
-CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_CPU=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
-CONFIG_NETFILTER_XT_MATCH_IPVS=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_NFACCT=m
-CONFIG_NETFILTER_XT_MATCH_OSF=m
-CONFIG_NETFILTER_XT_MATCH_OWNER=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA2=m
-CONFIG_NETFILTER_XT_MATCH_RATEEST=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_RECENT=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_SOCKET=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_TIME=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_IP_SET=m
-CONFIG_IP_SET_BITMAP_IP=m
-CONFIG_IP_SET_BITMAP_IPMAC=m
-CONFIG_IP_SET_BITMAP_PORT=m
-CONFIG_IP_SET_HASH_IP=m
-CONFIG_IP_SET_HASH_IPPORT=m
-CONFIG_IP_SET_HASH_IPPORTIP=m
-CONFIG_IP_SET_HASH_IPPORTNET=m
-CONFIG_IP_SET_HASH_NET=m
-CONFIG_IP_SET_HASH_NETPORT=m
-CONFIG_IP_SET_HASH_NETIFACE=m
-CONFIG_IP_SET_LIST_SET=m
-CONFIG_IP_VS=m
-CONFIG_IP_VS_IPV6=y
-CONFIG_IP_VS_PROTO_TCP=y
-CONFIG_IP_VS_PROTO_UDP=y
-CONFIG_IP_VS_PROTO_ESP=y
-CONFIG_IP_VS_PROTO_AH=y
-CONFIG_IP_VS_PROTO_SCTP=y
-CONFIG_IP_VS_RR=m
-CONFIG_IP_VS_WRR=m
-CONFIG_IP_VS_LC=m
-CONFIG_IP_VS_WLC=m
-CONFIG_IP_VS_LBLC=m
-CONFIG_IP_VS_LBLCR=m
-CONFIG_IP_VS_DH=m
-CONFIG_IP_VS_SH=m
-CONFIG_IP_VS_SED=m
-CONFIG_IP_VS_NQ=m
-CONFIG_IP_VS_FTP=m
-CONFIG_IP_VS_PE_SIP=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_RPFILTER=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_REJECT_SKERR=y
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_RPFILTER=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_BRIDGE_NF_EBTABLES=m
-CONFIG_BRIDGE_EBT_BROUTE=m
-CONFIG_BRIDGE_EBT_T_FILTER=m
-CONFIG_BRIDGE_EBT_T_NAT=m
-CONFIG_BRIDGE_EBT_802_3=m
-CONFIG_BRIDGE_EBT_AMONG=m
-CONFIG_BRIDGE_EBT_ARP=m
-CONFIG_BRIDGE_EBT_IP=m
-CONFIG_BRIDGE_EBT_IP6=m
-CONFIG_BRIDGE_EBT_LIMIT=m
-CONFIG_BRIDGE_EBT_MARK=m
-CONFIG_BRIDGE_EBT_PKTTYPE=m
-CONFIG_BRIDGE_EBT_STP=m
-CONFIG_BRIDGE_EBT_VLAN=m
-CONFIG_BRIDGE_EBT_ARPREPLY=m
-CONFIG_BRIDGE_EBT_DNAT=m
-CONFIG_BRIDGE_EBT_MARK_T=m
-CONFIG_BRIDGE_EBT_REDIRECT=m
-CONFIG_BRIDGE_EBT_SNAT=m
-CONFIG_BRIDGE_EBT_LOG=m
-CONFIG_BRIDGE_EBT_ULOG=m
-CONFIG_BRIDGE_EBT_NFLOG=m
-CONFIG_L2TP=m
-CONFIG_L2TP_V3=y
-CONFIG_L2TP_IP=m
-CONFIG_L2TP_ETH=m
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_VLAN_8021Q_GVRP=y
-CONFIG_BATMAN_ADV=m
-CONFIG_OPENVSWITCH=m
-CONFIG_NETPRIO_CGROUP=m
-CONFIG_NET_PKTGEN=m
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-CONFIG_IRTTY_SIR=m
-CONFIG_KINGSUN_DONGLE=m
-CONFIG_KSDAZZLE_DONGLE=m
-CONFIG_KS959_DONGLE=m
-CONFIG_USB_IRDA=m
-CONFIG_SIGMATEL_FIR=m
-CONFIG_MCS_FIR=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIBTSDIO=m
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_MRVL=m
-CONFIG_BT_MRVL_SDIO=m
-CONFIG_BT_ATH3K=m
-CONFIG_AF_RXRPC=m
-CONFIG_RXKAD=m
-CONFIG_CFG80211=y
-CONFIG_CFG80211_DEVELOPER_WARNINGS=y
-CONFIG_WIRELESS_EXT_SYSFS=y
-CONFIG_LIB80211=m
-CONFIG_CFG80211_ALLOW_RECONNECT=y
-CONFIG_MAC80211=m
-CONFIG_MAC80211_MESH=y
-CONFIG_WIMAX=m
-CONFIG_RFKILL=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_CONNECTOR=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_SUNXI_DBGREG=m
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_SW_SATA_AHCI_PLATFORM=y
-CONFIG_NETDEVICES=y
-CONFIG_BONDING=m
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_SUNXI_EMAC=y
-CONFIG_PHYLIB=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPPOLAC=m
-CONFIG_PPPOPNS=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_USB_IPHETH=m
-CONFIG_ATH_COMMON=m
-CONFIG_ATH9K=m
-CONFIG_RTL8192CU=m
-CONFIG_RTL8192CU_SW=m
-CONFIG_RTL8188EU=m
-CONFIG_RTXX7X_SW=m
-CONFIG_INPUT_POLLDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_KEYRESET=y
-CONFIG_KEYBOARD_HV2605_KEYBOARD=m
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_GT801=m
-CONFIG_TOUCHSCREEN_GT811=m
-CONFIG_TOUCHSCREEN_GT818=m
-CONFIG_TOUCHSCREEN_FT5X_TS=m
-CONFIG_TOUCHSCREEN_ZT8031=m
-CONFIG_GSENSOR=y
-CONFIG_SENSORS_BMA250=m
-CONFIG_MEMSIC_ECOMPASS=m
-CONFIG_SENSORS_MXC622X=m
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=8
-CONFIG_SERIAL_8250_RUNTIME_UARTS=8
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_DEBUG=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_SUNXI=m
-CONFIG_POWER_SUPPLY=y
-CONFIG_AW_AXP=y
-# CONFIG_HWMON is not set
-CONFIG_REGULATOR=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_MEDIA_TUNER_CUSTOMISE=y
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_MEDIA_TUNER_MAX2165 is not set
-# CONFIG_MEDIA_TUNER_TDA18218 is not set
-# CONFIG_MEDIA_TUNER_TDA18212 is not set
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_USB_M5602=m
-CONFIG_USB_STV06XX=m
-CONFIG_USB_GL860=m
-CONFIG_USB_GSPCA_BENQ=m
-CONFIG_USB_GSPCA_CONEX=m
-CONFIG_USB_GSPCA_CPIA1=m
-CONFIG_USB_GSPCA_ETOMS=m
-CONFIG_USB_GSPCA_FINEPIX=m
-CONFIG_USB_GSPCA_JEILINJ=m
-CONFIG_USB_GSPCA_JL2005BCD=m
-CONFIG_USB_GSPCA_KINECT=m
-CONFIG_USB_GSPCA_KONICA=m
-CONFIG_USB_GSPCA_MARS=m
-CONFIG_USB_GSPCA_MR97310A=m
-CONFIG_USB_GSPCA_NW80X=m
-CONFIG_USB_GSPCA_OV519=m
-CONFIG_USB_GSPCA_OV534=m
-CONFIG_USB_GSPCA_OV534_9=m
-CONFIG_USB_GSPCA_PAC207=m
-CONFIG_USB_GSPCA_PAC7302=m
-CONFIG_USB_GSPCA_PAC7311=m
-CONFIG_USB_GSPCA_SE401=m
-CONFIG_USB_GSPCA_SN9C2028=m
-CONFIG_USB_GSPCA_SN9C20X=m
-CONFIG_USB_GSPCA_SONIXB=m
-CONFIG_USB_GSPCA_SONIXJ=m
-CONFIG_USB_GSPCA_SPCA500=m
-CONFIG_USB_GSPCA_SPCA501=m
-CONFIG_USB_GSPCA_SPCA505=m
-CONFIG_USB_GSPCA_SPCA506=m
-CONFIG_USB_GSPCA_SPCA508=m
-CONFIG_USB_GSPCA_SPCA561=m
-CONFIG_USB_GSPCA_SPCA1528=m
-CONFIG_USB_GSPCA_SQ905=m
-CONFIG_USB_GSPCA_SQ905C=m
-CONFIG_USB_GSPCA_SQ930X=m
-CONFIG_USB_GSPCA_STK014=m
-CONFIG_USB_GSPCA_STV0680=m
-CONFIG_USB_GSPCA_SUNPLUS=m
-CONFIG_USB_GSPCA_T613=m
-CONFIG_USB_GSPCA_TOPRO=m
-CONFIG_USB_GSPCA_TV8532=m
-CONFIG_USB_GSPCA_VC032X=m
-CONFIG_USB_GSPCA_VICAM=m
-CONFIG_USB_GSPCA_XIRLINK_CIT=m
-CONFIG_USB_GSPCA_ZC3XX=m
-CONFIG_VIDEO_PVRUSB2=m
-CONFIG_VIDEO_HDPVR=m
-CONFIG_VIDEO_EM28XX=m
-CONFIG_VIDEO_EM28XX_ALSA=m
-CONFIG_VIDEO_CX231XX=m
-CONFIG_VIDEO_CX231XX_ALSA=m
-CONFIG_VIDEO_TM6000=m
-CONFIG_VIDEO_TM6000_ALSA=m
-CONFIG_VIDEO_USBVISION=m
-CONFIG_USB_ET61X251=m
-CONFIG_USB_SN9C102=m
-CONFIG_USB_PWC=m
-CONFIG_VIDEO_CPIA2=m
-CONFIG_USB_ZR364XX=m
-CONFIG_USB_STKWEBCAM=m
-CONFIG_USB_S2255=m
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_SOC_CAMERA=m
-CONFIG_SOC_CAMERA_IMX074=m
-CONFIG_SOC_CAMERA_MT9M001=m
-CONFIG_SOC_CAMERA_MT9M111=m
-CONFIG_SOC_CAMERA_MT9T031=m
-CONFIG_SOC_CAMERA_MT9T112=m
-CONFIG_SOC_CAMERA_MT9V022=m
-CONFIG_SOC_CAMERA_RJ54N1=m
-CONFIG_SOC_CAMERA_TW9910=m
-CONFIG_SOC_CAMERA_PLATFORM=m
-CONFIG_SOC_CAMERA_OV2640=m
-CONFIG_SOC_CAMERA_OV5642=m
-CONFIG_SOC_CAMERA_OV6650=m
-CONFIG_SOC_CAMERA_OV772X=m
-CONFIG_SOC_CAMERA_OV9640=m
-CONFIG_SOC_CAMERA_OV9740=m
-CONFIG_V4L_MEM2MEM_DRIVERS=y
-# CONFIG_VIDEO_CSI_SUN4I is not set
-CONFIG_RADIO_SI470X=y
-CONFIG_USB_SI470X=m
-CONFIG_I2C_SI470X=m
-CONFIG_USB_MR800=m
-CONFIG_USB_DSBR=m
-CONFIG_RADIO_SI4713=m
-CONFIG_USB_KEENE=m
-CONFIG_RADIO_TEA5764=m
-CONFIG_RADIO_SAA7706H=m
-CONFIG_RADIO_TEF6862=m
-CONFIG_RADIO_WL1273=m
-CONFIG_AUDIO_ENGINE=y
-CONFIG_PA_CONTROL=y
-CONFIG_DRM=m
-CONFIG_DRM_MALI=m
-CONFIG_DRM_UDL=m
-CONFIG_MALI=m
-CONFIG_MALI400_DEBUG=y
-CONFIG_MALI400_GPU_UTILIZATION=y
-CONFIG_FB=y
-CONFIG_FB_SUNXI=y
-CONFIG_FB_SUNXI_LCD=y
-CONFIG_FB_SUNXI_HDMI=y
-CONFIG_HDMI_CEC=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
-CONFIG_SND_HRTIMER=m
-CONFIG_SND_VERBOSE_PRINTK=y
-CONFIG_SND_ALOOP=m
-CONFIG_SND_USB_AUDIO=m
-CONFIG_SND_SOC=y
-CONFIG_SND_SUNXI_SOC_SPDIF=y
-CONFIG_HIDRAW=y
-CONFIG_UHID=y
-CONFIG_HID_PID=y
-CONFIG_USB_HIDDEV=y
-CONFIG_HID_KYE=y
-CONFIG_HID_LOGITECH_DJ=y
-CONFIG_LOGITECH_FF=y
-# CONFIG_LOGIWHEELS_FF is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_REALTEK=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_ISD200=y
-CONFIG_USB_STORAGE_USBAT=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_USB_STORAGE_ALAUDA=y
-CONFIG_USB_STORAGE_ONETOUCH=y
-CONFIG_USB_STORAGE_KARMA=y
-CONFIG_USB_STORAGE_CYPRESS_ATACB=y
-CONFIG_USB_STORAGE_ENE_UB6250=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_CONSOLE=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_GADGET=y
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_USB_FILE_STORAGE_TEST=y
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_USHC=y
-CONFIG_MMC_SUNXI_POWER_CONTROL=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_SUNXI=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_SUN4I=y
-CONFIG_STAGING=y
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ANDROID_LOGGER=y
-CONFIG_ANDROID_RAM_CONSOLE=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_REISERFS_FS=y
-CONFIG_QUOTA=y
-CONFIG_QUOTA_NETLINK_INTERFACE=y
-# CONFIG_PRINT_QUOTA_WARNING is not set
-CONFIG_QFMT_V2=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_CUSE=y
-CONFIG_FSCACHE=y
-CONFIG_FSCACHE_STATS=y
-CONFIG_CACHEFILES=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-CONFIG_NTFS_FS=y
-CONFIG_NTFS_RW=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_HFS_FS=y
-CONFIG_HFSPLUS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="y"
-CONFIG_ROOT_NFS=y
-CONFIG_NFS_USE_LEGACY_DNS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_NFSD_FAULT_INJECTION=y
-CONFIG_CIFS=y
-CONFIG_CIFS_DFS_UPCALL=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_936=y
-CONFIG_NLS_CODEPAGE_950=y
-CONFIG_NLS_CODEPAGE_932=y
-CONFIG_NLS_CODEPAGE_949=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-CONFIG_FRAME_WARN=2048
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_SECTION_MISMATCH=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SHIRQ=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_SCHEDSTATS=y
-CONFIG_TIMER_STATS=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LIST=y
-CONFIG_BOOT_PRINTK_DELAY=y
-CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
-# CONFIG_FTRACE is not set
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_STRICT_DEVMEM=y
-CONFIG_DEBUG_LL=y
-CONFIG_SECURITYFS=y
-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
-CONFIG_CRYPTO_GF128MUL=y
-CONFIG_CRYPTO_SEQIV=y
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ZLIB=y
-CONFIG_CRYPTO_LZO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_LIBCRC32C=y

board/cubietech/cubieboard/mkcubiecard.sh

@@ -1,124 +0,0 @@
-#! /bin/sh
-# mkCubieCard.sh v0.1:
-# 2013, Carlo Caione <carlo.caione@gmail.com>
-# heavely based on :
-# mkA10card.sh v0.1
-# 2012, Jason Plum <jplum@archlinuxarm.org>
-# loosely based on :
-# mkcard.sh v0.5
-# (c) Copyright 2009 Graeme Gregory <dp@xora.org.uk>
-# Licensed under terms of GPLv2
-#
-# Parts of the procudure base on the work of Denys Dmytriyenko
-# http://wiki.omap.com/index.php/MMC_Boot_Format
-
-IMAGES_DIR=$1
-SPL_IMG=$IMAGES_DIR/sunxi-spl.bin
-SPL_UBOOT=$IMAGES_DIR/u-boot-sunxi-with-spl.bin
-UBOOT_IMG=$IMAGES_DIR/u-boot.bin
-UIMAGE=$IMAGES_DIR/uImage
-BIN_BOARD_FILE=$IMAGES_DIR/script.bin
-ROOTFS=$IMAGES_DIR/rootfs.tar
-BOOT_CMD_H=$IMAGES_DIR/boot.scr
-
-export LC_ALL=C
-
-if [ $# -ne 2 ]; then
-	echo "Usage: $0 <images_dir> <drive>"
-	exit 1;
-fi
-
-if [ `id -u` -ne 0 ]; then
-	echo "This script must be run as root" 1>&2
-	exit 1
-fi
-
-if [ ! -f $SPL_IMG  -a ! -f $SPL_UBOOT ] ||
-   [ ! -f $UBOOT_IMG ] ||
-   [ ! -f $UIMAGE ] ||
-   [ ! -f $BIN_BOARD_FILE ] ||
-   [ ! -f $ROOTFS ] ||
-   [ ! -f $BOOT_CMD_H ]; then
-	echo "File(s) missing."
-	exit 1
-fi
-
-DRIVE=$2
-P1=`mktemp -d`
-P2=`mktemp -d`
-
-dd if=/dev/zero of=$DRIVE bs=1M count=3
-
-SIZE=`fdisk -l $DRIVE | grep Disk | grep bytes | awk '{print $5}'`
-
-echo DISK SIZE - $SIZE bytes
-
-
-# ~2048, 16MB, FAT, bootable
-# ~rest of drive, Ext4
-{
-echo 32,512,0x0C,*
-echo 544,,,-
-} | sfdisk -D $DRIVE
-
-sleep 1
-
-if [ -b ${DRIVE}1 ]; then
-	D1=${DRIVE}1
-	umount ${DRIVE}1
-	mkfs.vfat -n "boot" ${DRIVE}1
-else
-	if [ -b ${DRIVE}p1 ]; then
-		D1=${DRIVE}p1
-		umount ${DRIVE}p1
-		mkfs.vfat -n "boot" ${DRIVE}p1
-	else
-		echo "Cant find boot partition in /dev"
-		exit 1
-	fi
-fi
-
-
-if [ -b ${DRIVE}2 ]; then
-	D2=${DRIVE}2
-	umount ${DRIVE}2
-	mkfs.ext4 -L "Cubie" ${DRIVE}2
-else
-	if [ -b ${DRIVE}p2 ]; then
-		D2=${DRIVE}p2
-		umount ${DRIVE}p2
-		mkfs.ext4 -L "Cubie" ${DRIVE}p2
-	else
-		echo "Cant find rootfs partition in /dev"
-		exit 1
-	fi
-fi
-
-mount $D1 $P1
-mount $D2 $P2
-
-# write uImage
-cp $UIMAGE $P1
-# write board file
-cp $BIN_BOARD_FILE $P1
-# write u-boot script
-cp $BOOT_CMD_H $P1
-# write rootfs
-tar -C $P2 -xvf $ROOTFS
-
-sync
-
-umount $D1
-umount $D2
-
-rm -fr $P1
-rm -fr $P2
-
-if [ -e $SPL_UBOOT ]; then
-	dd if=$SPL_UBOOT of=$DRIVE bs=1024 seek=8
-else
-	# write SPL
-	dd if=$SPL_IMG of=$DRIVE bs=1024 seek=8
-	# write mele u-boot
-	dd if=$UBOOT_IMG of=$DRIVE bs=1024 seek=32
-fi

board/cubietech/cubieboard/post-build.sh

@@ -1,14 +0,0 @@
-#!/bin/sh
-# post-build.sh for CubieBoard
-# 2013, Carlo Caione <carlo.caione@gmail.com>
-
-BOARD_DIR="$(dirname $0)"
-MKIMAGE=$HOST_DIR/usr/bin/mkimage
-BOOT_CMD=$BOARD_DIR/boot.cmd
-BOOT_CMD_H=$BINARIES_DIR/boot.scr
-
-# U-Boot script
-if [ -e $MKIMAGE -a -e $BOOT_CMD ];
-then
-	$MKIMAGE -C none -A arm -T script -d $BOOT_CMD $BOOT_CMD_H
-fi

board/cubietech/cubieboard/readme.txt

@@ -1,62 +0,0 @@
-cubieboard and cubieboard2
-
------
-Intro
------
-
-To be able to use your cubieboard board with the images generated by
-Buildroot you have to correctly setup the SD card.
-
-For more information, please see http://linux-sunxi.org/FirstSteps
-
----------------
-How to build it
----------------
-
-You need to use the cubieboard_defconfig or cubieboard2_defconfig, to do so:
- * make cubieboard_defconfig
-or
- * make cubieboard2_defconfig
-
-And to compile:
- * make
-
------------------
-What is generated
------------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.tar
-    +-- boot.scr
-    +-- script.bin
-    +-- sunxi-spl.bin
-    +-- u-boot.bin
-    +-- u-boot-sunxi-with-spl.bin (optional)
-    `-- uImage
-
---------------------------
-How setting up the SD card
---------------------------
-
-Depending on the rootfs size, you might want to use a 2GB or larger SD-card.
-The script mkcubiecard.sh will take care of partitioning and formatting
-the SD-card.
-
-BEWARE! This process will erase your SD card.
-
-Use dmesg to find out where the SD card is attached in the /dev tree
-(<device>) and then:
-
-# sudo ./mkcubiecard.sh <images_dir> <device>
-
-where:
- - <images_dir> is the directory containing the generated files (usually
-   output/images)
- - <device> is the device file of the SD card (usually /dev/sdX)
-
-
-
---
-Carlo Caione <carlo.caione@gmail.com>

board/cubietech/cubieboard2/boot.cmd

@@ -1,5 +0,0 @@
-setenv fdt_high ffffffff
-setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
-fatload mmc 0 $kernel_addr_r zImage
-fatload mmc 0 $fdt_addr_r sun7i-a20-cubieboard2.dtb
-bootz $kernel_addr_r - $fdt_addr_r

board/cubietech/cubieboard2/genimage.cfg

@@ -1,36 +0,0 @@
-# Minimal SD card image for the Cubieboard2
-# Based in the Orange Pi genimage.cfg
-
-image boot.vfat {
-	vfat {
-		files = {
-			"zImage",
-			"sun7i-a20-cubieboard2.dtb",
-			"boot.scr"
-		}
-	}
-	size = 10M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		in-partition-table = "no"
-		image = "u-boot-sunxi-with-spl.bin"
-		offset = 8192
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 512M
-	}
-}

board/cubietech/cubieboard2/post-build.sh

@@ -1,11 +0,0 @@
-#!/bin/sh
-# post-build.sh for Cubieboard2
-# 2013, Carlo Caione <carlo.caione@gmail.com>
-
-BOARD_DIR="$(dirname $0)"
-MKIMAGE=$HOST_DIR/usr/bin/mkimage
-BOOT_CMD=$BOARD_DIR/boot.cmd
-BOOT_CMD_H=$BINARIES_DIR/boot.scr
-
-# U-Boot script
-$MKIMAGE -C none -A arm -T script -d $BOOT_CMD $BOOT_CMD_H

board/cubietech/cubieboard2/post-image.sh

@@ -1,16 +0,0 @@
-#!/bin/sh
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage                           \
-	--rootpath "${TARGET_DIR}"     \
-	--tmppath "${GENIMAGE_TMP}"    \
-	--inputpath "${BINARIES_DIR}"  \
-	--outputpath "${BINARIES_DIR}" \
-	--config "${GENIMAGE_CFG}"
-
-exit $?

board/embest/riotboard/readme.txt

@@ -1,46 +0,0 @@
-Buildroot for Embest RIoTboard
-==============================
-
-1. Compiling buildroot
-----------------------
-
-make riotboard_defconfig
-make
-
-2. Installing buildroot
------------------------
-
-Prepare an SD-card and plug it into your card reader. Write the bootloader to
-your SD-card:
-
-sudo dd if=output/images/u-boot.imx of=/dev/sdX bs=1k seek=1
-
-Create 1 partition on the SD-card using your favourite tool. The
-partition should be big enough to hold your rootfs, for example
-128MiB. Here's an example partition layout:
-
-   Device Boot      Start         End      Blocks   Id  System
-/dev/sdX1            2048      264191      131072   83  Linux
-
-Format the SD-card partition with your favourite filesystem:
-
-sudo mkfs.ext2 /dev/sdX1
-
-Deploy your rootfs to the SD-card:
-
-sudo mkdir /mnt/sdcard/
-sudo mount /dev/sdX1 /mnt/sdcard/
-sudo tar xf output/images/rootfs.tar -C /mnt/sdcard/
-sudo umount /dev/sdX1
-
-3. Running buildroot
---------------------
-
-Position the board so you can read the label "RIoTboard" on the right side of
-SW1 DIP switches. Configure the SW1 swiches like this:
-
-10100101 (1 means ON position, 0 means OFF position)
-
-Now plug your prepared SD-card in slot J6. Connect a serial console (115200, 8,
-N, 1) to header J18. Connect a 5V/1A power supply to the board and enjoy your
-new toy.

board/embest/riotboard/rootfs_overlay/boot/extlinux/extlinux.conf

@@ -1,6 +0,0 @@
-default buildroot
-
-label buildroot
-kernel /boot/uImage
-devicetree /boot/imx6dl-riotboard.dtb
-append console=ttymxc1,115200 root=/dev/mmcblk0p1 rw

board/freescale/create-boot-sd.sh

@@ -1,93 +0,0 @@
-#!/bin/sh
-
-set -u
-set -e
-
-PROGNAME=$(basename $0)
-
-usage()
-{
-    echo "Create an SD card that boots on an i.MX53/6 board."
-    echo
-    echo "Note: all data on the the card will be completely deleted!"
-    echo "Use with care!"
-    echo "Superuser permissions may be required to write to the device."
-    echo
-    echo "Usage: ${PROGNAME} <sd_block_device>"
-    echo "Arguments:"
-    echo "  <sd_block_device>     The device to be written to"
-    echo
-    echo "Example: ${PROGNAME} /dev/mmcblk0"
-    echo
-}
-
-if [ $# -ne 1 ]; then
-    usage
-    exit 1
-fi
-
-if [ $(id -u) -ne 0 ]; then
-    echo "${PROGNAME} must be run as root"
-    exit 1
-fi
-
-DEV=${1}
-
-# The partition name prefix depends on the device name:
-# - /dev/sde -> /dev/sde1
-# - /dev/mmcblk0 -> /dev/mmcblk0p1
-if echo ${DEV}|grep -q mmcblk ; then
-    PART="p"
-else
-    PART=""
-fi
-
-PART1=${DEV}${PART}1
-PART2=${DEV}${PART}2
-
-# Unmount the partitions if mounted
-umount ${PART1} || true
-umount ${PART2} || true
-
-# First, clear the card
-dd if=/dev/zero of=${DEV} bs=1M count=20
-
-sync
-
-# Partition the card.
-# SD layout for i.MX6 boot:
-# - Bootloader at offset 1024
-# - FAT partition starting at 1MB offset, containing uImage and *.dtb
-# - ext2/3 partition formatted as ext2 or ext3, containing the root filesystem.
-sfdisk ${DEV} <<EOF
-32,480,b
-512,,L
-EOF
-
-sync
-
-# Copy the bootloader at offset 1024
-dd if=output/images/u-boot.imx of=${DEV} obs=512 seek=2
-
-# Prepare a temp dir for mounting partitions
-TMPDIR=$(mktemp -d)
-
-# FAT partition: kernel and DTBs
-mkfs.vfat ${PART1}
-mount ${PART1} ${TMPDIR}
-cp output/images/*Image ${TMPDIR}/
-cp output/images/*.dtb  ${TMPDIR}/ || true
-sync
-umount ${TMPDIR}
-
-# ext2 partition: root filesystem
-mkfs.ext2 ${PART2}
-mount ${PART2} ${TMPDIR}
-tar -C ${TMPDIR}/ -xf output/images/rootfs.tar
-sync
-umount ${TMPDIR}
-
-# Cleanup
-rmdir ${TMPDIR}
-sync
-echo Done

board/freescale/imx28evk/create-boot-sd.sh

@@ -1,97 +0,0 @@
-#!/bin/sh
-
-set -u
-set -e
-
-PROGNAME=$(basename $0)
-
-usage()
-{
-    echo "Create an SD card that boots on an i.MX28 EVK board."
-    echo
-    echo "Note: all data on the the card will be completely deleted!"
-    echo "Use with care!"
-    echo "Superuser permissions may be required to write to the device."
-    echo
-    echo "Usage: ${PROGNAME} <sd_block_device>"
-    echo "Arguments:"
-    echo "  <sd_block_device>     The device to be written to"
-    echo
-    echo "Example: ${PROGNAME} /dev/mmcblk0"
-    echo
-}
-
-if [ $# -ne 1 ]; then
-    usage
-    exit 1
-fi
-
-if [ $(id -u) -ne 0 ]; then
-    echo "${PROGNAME} must be run as root"
-    exit 1
-fi
-
-DEV=${1}
-
-# The partition name prefix depends on the device name:
-# - /dev/sde -> /dev/sde1
-# - /dev/mmcblk0 -> /dev/mmcblk0p1
-if echo ${DEV}|grep -q mmcblk ; then
-    PART="p"
-else
-    PART=""
-fi
-
-PART1=${DEV}${PART}1
-PART2=${DEV}${PART}2
-PART3=${DEV}${PART}3
-
-# Unmount the partitions if mounted
-umount ${PART1} || true
-umount ${PART2} || true
-umount ${PART3} || true
-
-# First, clear the card
-dd if=/dev/zero of=${DEV} bs=1M count=20
-
-sync
-
-# Partition the card.
-# SD layout for i.MX28 boot:
-# - Special partition type 53 at sector 2048, containing an SD-SB-encapsulated u-boot
-# - FAT partition containing zImage
-# - ext2/3 partition formatted as ext2 or ext3, containing the root filesystem.
-sfdisk --force -u S ${DEV} <<EOF
-2048,2000,53
-4048,16000,b
-20048,,L
-EOF
-
-sync
-
-# Copy the bootloader at offset 2048
-# (We need to skip the partition table in the .sd, too.)
-dd if=output/images/u-boot.sd of=${DEV}1 bs=1M
-
-# Prepare a temp dir for mounting partitions
-TMPDIR=$(mktemp -d)
- 
-# FAT partition: kernel
-mkfs.vfat ${PART2}
-mount ${PART2} ${TMPDIR}
-cp output/images/*Image ${TMPDIR}/
-cp output/images/*.dtb  ${TMPDIR}/ || true
-sync
-umount ${TMPDIR}
-
-# ext2 partition: root filesystem
-mkfs.ext2 ${PART3}
-mount ${PART3} ${TMPDIR}
-tar -C ${TMPDIR}/ -xf output/images/rootfs.tar
-sync
-umount ${TMPDIR}
-
-# Cleanup
-rmdir ${TMPDIR}
-sync
-echo Done

board/freescale/imx28evk/readme.txt

@@ -1,58 +0,0 @@
-**************************
-Freescale i.MX28 EVK board
-**************************
-
-This file documents the Buildroot support for the Freescale i.MX28 EVK board.
-
-Read the i.MX28 Evaluation Kit Quick Start Guide [1] for an introduction to the
-board.
-
-Build
-=====
-
-First, configure Buildroot for your i.MX28 EVK board:
-
-  make freescale_imx28evk_defconfig
-
-Build all components:
-
-  make
-
-You will find in ./output/images/ the following files:
-  - imx28-evk.dtb
-  - rootfs.tar
-  - u-boot.sd
-  - zImage
-
-Create a bootable SD card
-=========================
-
-To determine the device associated to the SD card have a look in the
-/proc/partitions file:
-
-  cat /proc/partitions
-
-Run the following script as root on your SD card. This will partition the card
-and copy the bootloader, kernel and root filesystem as needed.
-
-*** WARNING! The script will destroy all the card content. Use with care! ***
-
-  ./board/freescale/imx28evk/create-boot-sd.sh <your-sd-device>
-
-Boot the i.MX28 EVK board
-=========================
-
-To boot your newly created system (refer to the i.MX28 EVK Quick Start Guide
-[1] for guidance):
-- insert the SD card in the SD Card Socket 0 of the board;
-- verify that your i.MX28 EVK board jumpers and switches are set as mentioned
-  in the i.MX28 EVK Quick Start Guide [1];
-- connect an RS232 UART cable to the Debug UART Port and connect using a
-  terminal emulator at 115200 bps, 8n1;
-- power on the board.
-
-Enjoy!
-
-References
-==========
-[1] http://cache.freescale.com/files/32bit/doc/user_guide/EVK_imx28_QuickStart.pdf

board/freescale/imx31_3stack/readme.txt

@@ -1,92 +0,0 @@
-**************************************
-Freescale i.MX31 PDK development board
-**************************************
-
-This file documents the Buildroot support for the Freescale i.MX31 PDK in "3
-stack" configuration.
-
-The i.MX31 Product Development Kit (or PDK) is Freescale development board [1]
-based on the i.MX31 application processor [2].
-
-For more details on the i.MX31 PDK board, refer to the User's Guide [3].
-
-Build
-=====
-
-First, configure Buildroot for your i.MX31 PDK board:
-
-  make freescale_imx31_3stack_defconfig
-
-Build all components:
-
-  make
-
-You will find in ./output/images/ the following files:
-  - rootfs.cpio
-  - rootfs.cpio.gz
-  - rootfs.tar
-  - zImage
-
-The generated zImage does include the rootfs.
-
-Boot the PDK board
-==================
-
-The i.MX31 PDK contains a RedBoot bootloader in flash, which can be used to
-boot the newly created Buildroot images from the network.
-
-This necessitates to setup a TFTP server first. This setup is explained for
-example in Freescale i.MX31 PDK 1.5 Linux User's Guide [4].
-
-Here is a sample RedBoot configuration, for proper network boot of Buildroot on
-the i.MX31 PDK:
-
-    RedBoot> fconfig -l
-    Run script at boot: true
-    Boot script:
-    .. load -r -b 0x100000 zImage
-    .. exec -c "console=ttymxc0,115200"
-
-    Boot script timeout (1000ms resolution): 2
-    Use BOOTP for network configuration: false
-    Gateway IP address: <your gateway IP address>
-    Local IP address: <your PDK IP address>
-    Local IP address mask: 255.255.255.0
-    Default server IP address: <your TFTP server IP address>
-    Board specifics: 0
-    Console baud rate: 115200
-    Set eth0 network hardware address [MAC]: false
-    GDB connection port: 9000
-    Force console for special debug messages: false
-    Network debug at boot time: false
-
-Adapt those settings to your network configuration by replacing the appropriate
-network addresses where necessary.
-
-You might want to verify that your i.MX31 PDK switches settings are the correct
-ones for UART, power, boot mode, etc. Here is a reference switches
-configuration:
-
-    SW4
-    1   2   3   4   5   6   7  8
-    ON off off off off off off ON
-
-    SW5 SW6 SW7 SW8 SW9 SW10
-     0   1   0   0   0    0
-
-See the i.MX31 PDK Linux Quick Start Guide [5] for more details on the switches
-settings.
-
-Connect a serial terminal set to 115200n8 and power on the i.MX31 PDK board.
-Buildroot will present a login prompt on the serial port.
-
-Enjoy!
-
-References
-==========
-
-[1] http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX31PDK
-[2] http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX31
-[3] http://cache.freescale.com/files/32bit/doc/user_guide/pdk15_imx31_Hardware_UG.pdf
-[4] http://cache.freescale.com/files/32bit/doc/support_info/IMX31_PDK15_LINUXDOCS_BUNDLE.zip, pdk15_imx31__Linux_UG.pdf
-[5] http://www.freescale.com/files/32bit/doc/quick_ref_guide/PDK14LINUXQUICKSTART.pdf

board/freescale/imx53loco/create-boot-sd.sh

@@ -1 +0,0 @@
-../create-boot-sd.sh

board/freescale/imx6sabre/patches/uboot/uboot-0001-mx6qsabre_common-boot-Linux-to-init-in-mfgtools-mode.patch

@@ -1,36 +0,0 @@
-From 90ecc0ad14337898b75843efc6530fc4a34f7808 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= <vincent.stehle@freescale.com>
-Date: Tue, 12 Aug 2014 10:17:31 +0200
-Subject: [PATCH] mx6qsabre_common: boot Linux to /init in mfgtools mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Buildroot supplies a nice /init wrapper script to use when booting from a
-ramdisk.
-
-This patch tells u-boot to tell the kernel to boot into /init (instead of
-/linuxrc) on i.MX6, when booting in mfgtools mode. This way we can boot a
-buildroot system entirely through USB.
-
-Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
----
- include/configs/mx6sabre_common.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
-index 93d4c4b..d2e7efd 100644
---- a/include/configs/mx6sabre_common.h
-+++ b/include/configs/mx6sabre_common.h
-@@ -106,7 +106,7 @@
- 
- #define CONFIG_MFG_ENV_SETTINGS \
- 	"mfgtool_args=setenv bootargs console=" CONFIG_CONSOLE_DEV ",115200 " \
--		"rdinit=/linuxrc " \
-+		"rdinit=/init " \
- 		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
- 		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
- 		"g_mass_storage.iSerialNumber=\"\" "\
--- 
-2.1.4
-

board/freescale/imx6sabre/readme.txt

@@ -1,146 +0,0 @@
-********************************************************
-Freescale i.MX6 Q, DL and SoloX SABRE development boards
-********************************************************
-
-This file documents the Buildroot support for the Freescale SABRE Board
-for Smart Devices Based on the i.MX 6 and i.MX 6SoloX Series (SABRESD),
-as well as the Freescale SABRE Board for Automotive Infotainment.
-
-Read the i.MX 6 SABRESD Quick Start Guide for an introduction to the
-board:
-http://cache.freescale.com/files/32bit/doc/quick_start_guide/SABRESDB_IMX6_QSG.pdf
-
-Read the i.MX 6 SoloX SABRESD Quick Start Guide for an introduction to
-the board:
-http://cache.freescale.com/files/32bit/doc/user_guide/IMX6SOLOXQSG.pdf
-
-Read the SABRE for Automotive Infotainment Quick Start Guide for an
-introduction to the board:
-http://cache.freescale.com/files/32bit/doc/user_guide/IMX6SABREINFOQSG.pdf
-
-Build
-=====
-
-First, configure Buildroot for your SABRE board.
-For i.MX6Q SABRE SD board:
-
-  make freescale_imx6qsabresd_defconfig
-
-For i.MX6DL SABRE SD board:
-
-  make freescale_imx6dlsabresd_defconfig
-
-For i.MX6 SoloX SABRE SD board:
-
-  make freescale_imx6sxsabresd_defconfig
-
-For i.MX6Q SABRE Auto board:
-
-  make freescale_imx6qsabreauto_defconfig
-
-For i.MX6DL SABRE Auto board:
-
-  make freescale_imx6dlsabreauto_defconfig
-
-Build all components:
-
-  make
-
-You will find in ./output/images/ the following files:
-  - imx6dl-sabresd.dtb or imx6q-sabresd.dtb or imx6sx-sdb.dtb or
-    imx6q-sabreauto.dtb or imx6dl-sabreauto.dtb
-  - rootfs.ext2
-  - rootfs.tar
-  - u-boot.imx
-  - uImage, or zImage for i.MX6 SoloX
-
-Create a bootable SD card
-=========================
-
-To determine the device associated to the SD card have a look in the
-/proc/partitions file:
-
-  cat /proc/partitions
-
-Run the following script as root on your SD card. This will partition the card
-and copy the bootloader, kernel, DTBs and root filesystem as needed.
-
-*** WARNING! The script will destroy all the card content. Use with care! ***
-
-  ./board/freescale/create-boot-sd.sh <your-sd-device>
-
-Boot the SABRE board
-====================
-
-i.MX6 SABRE SD
---------------
-
-To boot your newly created system on an i.MX6 SABRE SD Board (refer to
-the i.MX6 SABRE SD Quick Start Guide for guidance):
-- insert the SD card in the SD3 slot of the board;
-- locate the BOOT dip switches (SW6), set dips 2 and 7 to ON, all others to OFF;
-- connect a Micro USB cable to Debug Port and connect using a terminal emulator
-  at 115200 bps, 8n1;
-- power on the board.
-
-i.MX6 SoloX SABRE SD
---------------------
-
-To boot your newly created system on an i.MX6 SoloX SABRE SD Board
-(refer to the i.MX6 SoloX SABRE SD Quick Start Guide for guidance):
-- insert the SD card in the J4-SD4 socket at the bottom of the board;
-- Set the SW10, SW11 and SW12 DIP switches at the top of the board in
-  their default position, to boot from SD card. Reference configuration:
-
-    SW10
-     1   2   3   4   5   6   7   8
-    off off off off off off off off
-
-    SW11
-     1   2  3  4  5   6   7   8
-    off off ON ON ON off off off
-
-    SW12
-     1  2   3   4   5   6   7   8
-    off ON off off off off off off
-
-- connect a Micro USB cable to the J16 Debug Port at the bottom of the
-  board. This is a dual UART debug port; connect to the first tty using
-  a terminal emulator at 115200 bps, 8n1;
-- power on the board with the SW1-PWR switch at the top of the board.
-
-SABRE Auto
-----------
-
-To boot your newly created system on a SABRE Auto Board (refer to the SABRE for
-Automotive Infotainment Quick Start Guide for guidance):
-- insert the SD card in the CPU card SD card socket J14;
-- Set the S1, S2 and S3 DIP switches and J3 jumper to boot from SD on CPU card.
-  Reference configuration:
-
-    S1
-     1  2   3   4  5   6   7   8   9  10
-    off ON off off ON off off off off off
-
-    S2
-     1   2  3   4
-    off off ON off
-
-    S3
-     1   2  3  4
-    off off ON ON
-
-    J3: 1-2
-
-- connect an RS-232 UART cable to CPU card debug port J18 UART DB9 and
-  connect using a terminal emulator at 115200 bps, 8n1;
-- power on the board.
-
-Enjoy!
-
-References
-==========
-
-https://community.freescale.com/docs/DOC-95015
-https://community.freescale.com/docs/DOC-95017
-https://community.freescale.com/docs/DOC-99218

board/freescale/imx6ulevk/genimage.cfg

@@ -1,41 +0,0 @@
-# Minimal microSD card image for the Freescale's i.MX6UL EVK board
-#
-# We mimic the .sdcard Freescale's image format for i.MX6UL:
-# * the microSD card must have 1 kB free space at the beginning,
-# * U-Boot is dumped as is,
-# * a FAT partition at offset 8 MB is containing zImage and dtbs,
-# * a single root filesystem partition is required (Ext2 in this case).
-#
-
-image boot.vfat {
-  vfat {
-    files = {
-      "imx6ul-14x14-evk.dtb",
-      "zImage"
-    }
-  }
-  size = 16M
-}
-
-image sdcard.img {
-  hdimage {
-  }
-
-  partition u-boot {
-    in-partition-table = "no"
-    image = "u-boot.imx"
-    offset = 1024
-  }
-
-  partition boot {
-    partition-type = 0xC
-    bootable = "true"
-    image = "boot.vfat"
-    offset = 8M
-  }
-
-  partition rootfs {
-    partition-type = 0x83
-    image = "rootfs.ext2"
-  }
-}

board/freescale/imx6ulevk/post-image.sh

@@ -1,15 +0,0 @@
-#!/usr/bin/env bash
-
-GENIMAGE_CFG="board/freescale/imx6ulevk/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-  --rootpath "${TARGET_DIR}" \
-  --tmppath "${GENIMAGE_TMP}" \
-  --inputpath "${BINARIES_DIR}" \
-  --outputpath "${BINARIES_DIR}" \
-  --config "${GENIMAGE_CFG}"
-
-exit $?

board/freescale/imx6ulevk/readme.txt

@@ -1,64 +0,0 @@
-***************************
-Freescale i.MX6UL EVK board
-***************************
-
-This file documents the Buildroot support for the Freescale i.MX6UL EVK board.
-
-Please read the i.MX6UL Evaluation Kit Quick Start Guide [1] for an
-introduction to the board.
-
-Build
-=====
-
-First, configure Buildroot for your i.MX6UL EVK board:
-
-  make freescale_imx6ulevk_defconfig
-
-Build all components:
-
-  make
-
-You will find in ./output/images/ the following files:
-  - imx6ul-14x14-evk.dtb
-  - rootfs.ext2
-  - rootfs.tar
-  - sdcard.img
-  - u-boot.imx
-  - zImage
-
-Create a bootable microSD card
-==============================
-
-To determine the device associated to the microSD card have a look in the
-/proc/partitions file:
-
-  cat /proc/partitions
-
-Buildroot prepares a bootable "sdcard.img" image in the output/images/
-directory, ready to be dumped on a microSD card. Launch the following
-command as root:
-
-  dd if=./output/images/sdcard.img of=/dev/<your-microsd-device>
-
-*** WARNING! This will destroy all the card content. Use with care! ***
-
-For details about the medium image layout, see the definition in
-board/freescale/imx6ulevk/genimage.cfg.
-
-Boot the i.MX6UL EVK board
-=========================
-
-To boot your newly created system (refer to the i.MX6UL EVK Quick Start Guide
-[1] for guidance):
-- insert the microSD card in the microSD slot of the board;
-- verify that your i.MX6UL EVK board jumpers and switches are set as mentioned
-  in the i.MX6UL EVK Quick Start Guide [1];
-- put a micro USB cable into the Debug USB Port and connect using a terminal
-  emulator at 115200 bps, 8n1;
-- power on the board.
-
-Enjoy!
-
-References
-==========
-[1] http://cache.freescale.com/files/32bit/doc/quick_start_guide/IMX6ULTRALITEQSG.pdf

board/freescale/mpc8315erdb/linux-4.2.config

@@ -1,70 +0,0 @@
-CONFIG_FSL_EMB_PERFMON=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_MODULES=y
-# CONFIG_PPC_CHRP is not set
-# CONFIG_PPC_PMAC is not set
-CONFIG_PPC_83xx=y
-CONFIG_MPC831x_RDB=y
-CONFIG_MCU_MPC8349EMITX=y
-CONFIG_PCI=y
-CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIEASPM is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_SCSI_MQ_DEFAULT=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_ATA=y
-CONFIG_SATA_FSL=y
-CONFIG_NETDEVICES=y
-CONFIG_GIANFAR=y
-CONFIG_REALTEK_PHY=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MPC=y
-CONFIG_SPI=y
-CONFIG_SPI_FSL_SPI=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_MPC8XXX=y
-CONFIG_WATCHDOG=y
-CONFIG_8xxx_WDT=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_FSL=y
-CONFIG_USB_STORAGE=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_GENERIC=y
-CONFIG_DMADEVICES=y
-CONFIG_FSL_DMA=y
-CONFIG_ASYNC_TX_DMA=y
-CONFIG_EXT4_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_SQUASHFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_CRYPTO_DEV_TALITOS=y

board/freescale/mpc8315erdb/readme.txt

@@ -1,62 +0,0 @@
-
-******************** WARNING ********************
-The compiled U-Boot binary is intended for NAND flash only!
-It won't work for NOR and will brick that bootloader!
-
-Also don't go playing around with different U-boot versions or flash targets
-unless you've got the necessary hardware and/or know-how to unbrick your kit.
-
-2014.04 is known good for NAND.
-******************** WARNING ********************
-
-You'll need to program the files created by buildroot into the flash.
-The fast way is to tftp transfer the files via one of the network interfaces.
-
-Alternatively you can transfer the files via serial console with an Ymodem
-file transfer from your terminal program by using a "loady" command
-from the u-boot prompt instead of the "tftp ..." commands stated below.
-Beware that serial console file transfers are quite slow!
-
-Remember to set the MPC8315ERDB switches to NAND boot if you want to use
-your newly built U-Boot.
-
-1. Program the new U-Boot binary to NAND flash (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    => tftp $loadaddr u-boot-nand.bin
-    => nand erase 0 0x80000
-    => nand write $loadaddr 0 0x80000 $filesize
-
-2. Program the kernel to NAND flash
-
-    => tftp $loadaddr uImage
-    => nand erase 0x100000 0x1e0000
-    => nand write $loadaddr 0x100000 0x1e0000
-
-3. Program the DTB to NAND flash
-
-    => tftp $loadaddr mpc8315erdb.dtb
-    => nand erase 0x2e0000 0x20000
-    => nand write $loadaddr 0x2e0000 0x20000
-
-4. Program the root filesystem to NAND flash
-
-    => tftp $loadaddr rootfs.jffs2
-    => nand erase 0x400000 0x1c00000
-    => nand write $loadaddr 0x400000 $filesize
-
-5. Booting your new system
-
-    => setenv nandboot 'setenv bootargs root=/dev/mtdblock3 rootfstype=jffs2 console=$consoledev,$baudrate;nand read $fdtaddr 0x2e0000 0x20000;nand read $loadaddr 0x100000 0x1e0000;bootm $loadaddr - $fdtaddr'
-
-    If you want to set this boot option as default:
-
-    => setenv bootcmd 'run nandboot'
-    => saveenv
-
-    ...or for a single boot:
-
-    => run nandboot
-
-    You can login with user "root".

board/freescale/p1010rdb/linux-4.1.config

@@ -1,70 +0,0 @@
-CONFIG_PPC_85xx=y
-CONFIG_PHYS_64BIT=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-CONFIG_MODULES=y
-CONFIG_P1010_RDB=y
-CONFIG_HIGHMEM=y
-CONFIG_SWIOTLB=y
-CONFIG_FORCE_MAX_ZONEORDER=12
-CONFIG_PCI=y
-CONFIG_PCI_MSI=y
-CONFIG_RAPIDIO=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_DEVTMPFS=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_FTL=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_MTD_NAND_FSL_IFC=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_ATA=y
-CONFIG_SATA_FSL=y
-CONFIG_NETDEVICES=y
-CONFIG_GIANFAR=y
-CONFIG_VITESSE_PHY=y
-CONFIG_FIXED_PHY=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_NVRAM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MPC=y
-CONFIG_SPI=y
-CONFIG_SPI_FSL_SPI=y
-CONFIG_SPI_FSL_ESPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_FSL=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_CMOS=y
-CONFIG_DMADEVICES=y
-CONFIG_FSL_DMA=y
-CONFIG_EXT4_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_SQUASHFS=y
-CONFIG_CRYPTO_DEV_FSL_CAAM=y

board/freescale/p1010rdb/readme.txt

@@ -1,77 +0,0 @@
-
-******************** WARNING ********************
-The compiled U-Boot binary is intended for NOR flash only!
-It won't work for NAND or SPI and will brick those bootloaders!
-
-Also don't go playing around with different U-boot versions or flash targets
-unless you've got the necessary hardware and/or know-how to unbrick your kit.
-
-2014.01 is known good for NOR on the P1010RDB-PA kit.
-
-Freescale released a revised version of the kit with a faster processor and
-some other hardware changes named P1010RDB-PB. U-Boot needs to be configured
-differently for this kit hence this default config WILL NOT WORK.
-This is ONLY related to U-Boot, otherwise the configuration is the same,
-you can perfectly use the generated kernel and rootfs.
-
-IF you want to build an U-Boot for the new kit just change
-BR2_TARGET_UBOOT_BOARDNAME from P1010RDB-PA_NOR to P1010RDB-PB_NOR.
-!!!!! THIS IS COMPLETELY UNTESTED BY BR DEVS SO YOU ARE ON YOUR OWN !!!!!
-If it works we'd like to know so drop an email to the mailing list. Thanks.
-
-If your kit doesn't mention PA nor PB in their shipping inventory then it's
-the old version (PA).
-******************** WARNING ********************
-
-You'll need to program the files created by buildroot into the flash.
-The fast way is to tftp transfer the files via one of the network interfaces.
-
-Alternatively you can transfer the files via serial console with an Ymodem
-file transfer from your terminal program by using a "loady" command
-from the u-boot prompt instead of the "tftp ..." commands stated below.
-Beware that serial console file transfers are quite slow!
-
-Remember to set the P1010RDB switches to NOR boot if you want to use
-your newly built U-Boot.
-
-1. Program the new U-Boot binary to NOR flash (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    => tftp $loadaddr u-boot.bin
-    => protect off 0xeff80000 +$filesize
-    => erase 0xeff80000 +$filesize
-    => cp.b $loadaddr 0xeff80000 $filesize
-
-2. Program the DTB to NOR flash
-
-    => tftp $loadaddr p1010rdb-pa.dtb
-    => erase 0xee000000 +$filesize
-    => cp.b $loadaddr 0xee000000 $filesize
-
-3. Program the kernel to NOR flash
-
-    => tftp $loadaddr uImage
-    => erase 0xee080000 +$filesize
-    => cp.b $loadaddr 0xee080000 $filesize
-
-4. Program the root filesystem to NOR flash
-
-    => tftp $loadaddr rootfs.jffs2
-    => erase 0xee800000 0xeff5ffff
-    => cp.b $loadaddr 0xee800000 $filesize
-
-5. Booting your new system
-
-    => setenv norboot 'setenv bootargs root=/dev/mtdblock2 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xee080000 - 0xee000000'
-
-    If you want to set this boot option as default:
-
-    => setenv bootcmd 'run norboot'
-    => saveenv
-
-    ...or for a single boot:
-
-    => run norboot
-
-    You can login with user "root".

board/freescale/p2020ds/linux-3.12.config

@@ -1,374 +0,0 @@
-CONFIG_PPC_85xx=y
-CONFIG_PHYS_64BIT=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=8
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_FHANDLE=y
-CONFIG_AUDIT=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_CGROUPS=y
-CONFIG_NAMESPACES=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_POWERNV_MSI is not set
-CONFIG_MPC85xx_DS=y
-CONFIG_HIGHMEM=y
-CONFIG_HOTPLUG_CPU=y
-CONFIG_IRQ_ALL_CPUS=y
-CONFIG_FORCE_MAX_ZONEORDER=12
-# CONFIG_SUSPEND is not set
-CONFIG_PCI=y
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_MSI=y
-CONFIG_RAPIDIO=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=m
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_INET_ESP=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-CONFIG_NETWORK_SECMARK=y
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_ZONES=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CONNTRACK_TIMEOUT=y
-CONFIG_NF_CONNTRACK_TIMESTAMP=y
-CONFIG_NF_CT_PROTO_DCCP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_SNMP=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NF_CT_NETLINK_TIMEOUT=m
-CONFIG_NF_CT_NETLINK_HELPER=m
-CONFIG_NETFILTER_NETLINK_QUEUE_CT=y
-CONFIG_NETFILTER_XT_TARGET_AUDIT=m
-CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_HMARK=m
-CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
-CONFIG_NETFILTER_XT_TARGET_LED=m
-CONFIG_NETFILTER_XT_TARGET_LOG=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
-CONFIG_NETFILTER_XT_TARGET_TEE=m
-CONFIG_NETFILTER_XT_TARGET_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
-CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
-CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
-CONFIG_NETFILTER_XT_MATCH_BPF=m
-CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_CPU=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_NFACCT=m
-CONFIG_NETFILTER_XT_MATCH_OSF=m
-CONFIG_NETFILTER_XT_MATCH_OWNER=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_RATEEST=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_RECENT=m
-CONFIG_NETFILTER_XT_MATCH_SOCKET=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_TIME=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_RPFILTER=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_SYNPROXY=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT_IPV4=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_RPFILTER=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_TARGET_SYNPROXY=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_NF_NAT_IPV6=m
-CONFIG_IP6_NF_TARGET_MASQUERADE=m
-CONFIG_IP6_NF_TARGET_NPT=m
-CONFIG_IP_SCTP=m
-CONFIG_BRIDGE=m
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FW_LOADER_USER_HELPER is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_FTL=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_MTD_NAND_FSL_IFC=y
-CONFIG_MTD_UBI=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_EEPROM_LEGACY=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI=y
-CONFIG_SATA_FSL=y
-CONFIG_SATA_SIL24=y
-CONFIG_PATA_ALI=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_LINEAR=y
-CONFIG_MD_RAID0=y
-CONFIG_MD_RAID1=y
-CONFIG_MD_RAID10=y
-CONFIG_MD_RAID456=y
-CONFIG_MD_MULTIPATH=y
-CONFIG_BCACHE=y
-CONFIG_BLK_DEV_DM=m
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_DM_THIN_PROVISIONING=m
-CONFIG_DM_CACHE=m
-CONFIG_DM_MIRROR=m
-CONFIG_DM_RAID=m
-CONFIG_DM_ZERO=m
-CONFIG_DM_MULTIPATH=m
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_TUN=y
-CONFIG_NET_TULIP=y
-CONFIG_GIANFAR=y
-CONFIG_E1000E=y
-CONFIG_AT803X_PHY=y
-CONFIG_ATHEROS_PHY=y
-CONFIG_MARVELL_PHY=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_CICADA_PHY=y
-CONFIG_VITESSE_PHY=y
-CONFIG_DP8384x_PHY=y
-CONFIG_FIXED_PHY=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_ATH_CARDS=m
-CONFIG_ATH9K=m
-CONFIG_ATH9K_HTC=m
-CONFIG_RT2X00=m
-CONFIG_RT2800PCI=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RT2800USB_RT3573=y
-CONFIG_RT2800USB_RT53XX=y
-CONFIG_RT2800USB_RT55XX=y
-# CONFIG_RTL_CARDS is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_NVRAM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MPC=y
-CONFIG_SPI=y
-CONFIG_SPI_FSL_SPI=y
-CONFIG_SPI_FSL_ESPI=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_MPC8XXX=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_ARB is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_HRTIMER=m
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_DRIVERS is not set
-CONFIG_SND_INTEL8X0=m
-# CONFIG_SND_PPC is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-# CONFIG_HID_GENERIC is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_FSL=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
-CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_CMOS=y
-CONFIG_DMADEVICES=y
-CONFIG_FSL_DMA=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_FANOTIFY=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_HUGETLBFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_UBIFS_FS=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_XATTR=y
-CONFIG_SQUASHFS_LZO=y
-CONFIG_SQUASHFS_XZ=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_CIFS=m
-CONFIG_CIFS_XATTR=y
-CONFIG_CIFS_POSIX=y
-# CONFIG_CIFS_DEBUG is not set
-CONFIG_CIFS_SMB2=y
-CONFIG_CIFS_FSCACHE=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=m
-CONFIG_CRC_T10DIF=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_TALITOS=y

board/freescale/p2020ds/linux-fix-c6187597-breakage.patch

@@ -1,51 +0,0 @@
-From: Nikita Yushchenko <nyushchenko@dev.rtsoft.ru>
-Subject: [PATCH] usb: pci-quirks: do not access OHCI_FMINTERVAL register on ULI hw
-
-This access causes hang on Freescale P2020DS board (that has OHCI
-provided by ULI 1533 chip).
-
-Since preserving OHCI_FMINTERVAL was originally done only for NVIDIA
-hardware and only later (in c6187597) was turned unconditional, and
-c6187597 commit message again mentions only NVIDIA, I think it should be
-safe to disable preserving OHCI_FMINTERVAL if device vendor is ULI.
-
-Signed-off-by: Nikita Yushchenko <nyushchenko@dev.rtsoft.ru>
----
- drivers/usb/host/pci-quirks.c |    8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
-index 00661d3..5acbd5b 100644
---- a/drivers/usb/host/pci-quirks.c
-+++ b/drivers/usb/host/pci-quirks.c
-@@ -571,7 +571,7 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
- {
- 	void __iomem *base;
- 	u32 control;
--	u32 fminterval;
-+	u32 uninitialized_var(fminterval);
- 	int cnt;
- 
- 	if (!mmio_resource_enabled(pdev, 0))
-@@ -619,7 +619,8 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
- 	}
- 
- 	/* software reset of the controller, preserving HcFmInterval */
--	fminterval = readl(base + OHCI_FMINTERVAL);
-+	if (pdev->vendor != PCI_VENDOR_ID_AL)
-+		fminterval = readl(base + OHCI_FMINTERVAL);
- 	writel(OHCI_HCR, base + OHCI_CMDSTATUS);
- 
- 	/* reset requires max 10 us delay */
-@@ -628,7 +629,8 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
- 			break;
- 		udelay(1);
- 	}
--	writel(fminterval, base + OHCI_FMINTERVAL);
-+	if (pdev->vendor != PCI_VENDOR_ID_AL)
-+		writel(fminterval, base + OHCI_FMINTERVAL);
- 
- 	/* Now the controller is safely in SUSPEND and nothing can wake it up */
- 	iounmap(base);
--- 
-1.7.10.4