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Author SHA1 Message Date
Peter Korsgaard
1264adda0e Update for 2012.11.1
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-01-03 21:43:39 +01:00
Mikhail Boiko
d4700be53e dosfstools: fix download link
Signed-off-by: Mikhail Boiko <mikhailboiko85@gmail.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-31 16:56:10 +01:00
Frank Hunleth
8d73aa4e51 qt: fix qconfig configure parameter
The Qt configure option for specifying a custom qconfig.h
file changed from -config to -qconfig. This makes the
corresponding change in qt.mk.

Signed-off-by: Frank Hunleth <fhunleth@troodon-software.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-31 16:54:59 +01:00
Chris Zankel
b95825e626 xtensa: add -mlongcalls to CFLAGS for xtensa
The longcalls option allows calls across a greater range of addresses.

This option may degrade both code size and performance, but
the linker can generally optimize away the unnecessary overhead
when a call ends up within range

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-31 16:52:38 +01:00
Peter Korsgaard
4e3dd2f881 toolchain/gcc: also disable largefile for pass 1/2 if needed
Fixes issue with !BR2_LARGEFILE builds on Ubuntu 12.04 and GCC 4.6+

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-31 00:02:03 +01:00
Richard Braun
54d318a27f arch: fix BR2_ARCH for generic target variant
Signed-off-by: Richard Braun <rbraun@sceen.net>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-12-31 00:01:52 +01:00
4758 changed files with 100229 additions and 154231 deletions

1
.gitignore vendored
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@@ -12,4 +12,3 @@
*.orig
*.rej
*~
*.pyc

1512
CHANGES

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247
Config.in
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@@ -14,37 +14,6 @@ config BR2_HOSTARCH
string
option env="HOSTARCH"
config BR2_EXTERNAL
string
option env="BR2_EXTERNAL"
# Hidden boolean selected by packages in need of Java in order to build
# (example: xbmc)
config BR2_NEEDS_HOST_JAVA
bool
# Hidden boolean selected by packages in need of javac in order to build
# (example: classpath)
config BR2_NEEDS_HOST_JAVAC
bool
# Hidden boolean selected by packages in need of jar in order to build
# (example: classpath)
config BR2_NEEDS_HOST_JAR
bool
# Hidden boolean selected by pre-built packages for x86, when they
# need to run on x86-64 machines (example: pre-built external
# toolchains, binary tools like SAM-BA, etc.).
config BR2_HOSTARCH_NEEDS_IA32_LIBS
bool
# Hidden boolean selected by packages that need to build 32 bits
# binaries with the host compiler, even on 64 bits build machines (e.g
# bootloaders).
config BR2_HOSTARCH_NEEDS_IA32_COMPILER
bool
source "arch/Config.in"
menu "Build options"
@@ -67,10 +36,6 @@ config BR2_GIT
string "Git command"
default "git"
config BR2_CVS
string "CVS command"
default "cvs"
config BR2_LOCALFILES
string "Local files retrieval command"
default "cp"
@@ -124,24 +89,12 @@ config BR2_TAR_OPTIONS
endmenu
config BR2_DEFCONFIG_FROM_ENV
string
option env="BR2_DEFCONFIG"
config BR2_DEFCONFIG
string "Location to save buildroot config"
default BR2_DEFCONFIG_FROM_ENV if BR2_DEFCONFIG_FROM_ENV != ""
default "$(CONFIG_DIR)/defconfig"
help
When running 'make savedefconfig', the defconfig file will be saved
in this location.
config BR2_DL_DIR
string "Download dir"
default "$(TOPDIR)/dl"
help
Directory to store all the source files that we need to fetch.
If the Linux shell environment has defined the BR2_DL_DIR
If the Linux shell environment has defined the BUILDROOT_DL_DIR
environment variable, then this overrides this configuration item.
The default is $(TOPDIR)/dl
@@ -188,7 +141,7 @@ if !BR2_PRIMARY_SITE_ONLY
config BR2_BACKUP_SITE
string "Backup download site"
default "http://sources.buildroot.net"
default "http://sources.buildroot.net/"
help
Backup site to download from. If this option is set then buildroot
will fall back to download package sources from here if the
@@ -196,7 +149,7 @@ config BR2_BACKUP_SITE
config BR2_KERNEL_MIRROR
string "Kernel.org mirror"
default "https://www.kernel.org/pub"
default "http://www.kernel.org/pub/"
help
kernel.org is mirrored on a number of servers around the world.
The following allows you to select your preferred mirror.
@@ -220,27 +173,18 @@ config BR2_GNU_MIRROR
http://ftp.gnu.org/pub/gnu
http://mirror.aarnet.edu.au/pub/gnu
config BR2_DEBIAN_MIRROR
string "Debian Software mirror"
default "http://ftp.debian.org"
help
Debian has multiple software mirrors scattered around the world.
The following allows you to select your preferred mirror.
Usually, just add your country code like XX here:
http://ftp.XX.debian.org
endif
config BR2_LUAROCKS_MIRROR
string "LuaRocks mirror"
default "http://rocks.moonscript.org"
help
LuaRocks repository.
See http://luarocks.org
config BR2_CPAN_MIRROR
string "CPAN mirror (Perl packages)"
default "http://cpan.metacpan.org"
help
CPAN (Comprehensive Perl Archive Network) is a repository
of Perl packages. It has multiple software mirrors scattered
around the world. This option allows you to select a mirror.
The list of mirrors is available at:
http://search.cpan.org/mirror
endmenu
config BR2_JLEVEL
@@ -256,7 +200,7 @@ config BR2_CCACHE
help
This option will enable the use of ccache, a compiler
cache. It will cache the result of previous builds to speed
up future builds. By default, the cache is stored in
up future builds. The cache is stored in
$HOME/.buildroot-ccache.
Note that Buildroot does not try to invalidate the cache
@@ -266,55 +210,17 @@ config BR2_CCACHE
ccache cache by removing the $HOME/.buildroot-ccache
directory.
if BR2_CCACHE
config BR2_CCACHE_DIR
string "Compiler cache location"
depends on BR2_CCACHE
default "$(HOME)/.buildroot-ccache"
help
Where ccache should store cached files.
config BR2_CCACHE_INITIAL_SETUP
string "Compiler cache initial setup"
help
Initial ccache settings to apply, such as --max-files or --max-size.
For example, if your project is known to require more space than the
default max cache size, then you might want to increase the cache size
to a suitable amount using the -M (--max-size) option.
The string you specify here is passed verbatim to ccache. Refer to
ccache documentation for more details.
These initial settings are applied after ccache has been compiled.
endif
config BR2_DEPRECATED
bool "Show options and packages that are deprecated or obsolete"
bool "Show packages that are deprecated or obsolete"
help
This option shows outdated/obsolete versions of packages and
options that are otherwise hidden.
if BR2_DEPRECATED
config BR2_DEPRECATED_SINCE_2013_11
bool
default y
config BR2_DEPRECATED_SINCE_2014_02
bool
default y
config BR2_DEPRECATED_SINCE_2014_05
bool
default y
config BR2_DEPRECATED_SINCE_2014_08
bool
default y
endif
This option hides outdated/obsolete versions of packages.
config BR2_ENABLE_DEBUG
bool "build packages with debugging symbols"
@@ -362,7 +268,7 @@ choice
config BR2_STRIP_strip
bool "strip"
depends on !BR2_PACKAGE_HOST_ELF2FLT
depends on !BR2_ELF2FLT
help
Binaries and libraries in the target filesystem will be
stripped using the normal 'strip' command. This allows to
@@ -373,8 +279,7 @@ config BR2_STRIP_strip
config BR2_STRIP_sstrip
bool "sstrip"
select BR2_PACKAGE_SSTRIP_HOST
depends on !BR2_PACKAGE_HOST_ELF2FLT
depends on BR2_DEPRECATED_SINCE_2014_05
depends on !BR2_ELF2FLT
help
Binaries and libraries in the target filesystem will be
stripped using the 'sstrip' command, which strips a little
@@ -475,74 +380,38 @@ config BR2_OPTIMIZE_S
endchoice
config BR2_GOOGLE_BREAKPAD_ENABLE
bool "Enable google-breakpad support"
select BR2_PACKAGE_GOOGLE_BREAKPAD
depends on BR2_INSTALL_LIBSTDCPP
depends on BR2_TOOLCHAIN_USES_GLIBC
depends on BR2_PACKAGE_GOOGLE_BREAKPAD_ARCH_SUPPORTS
help
This option will enable the use of google breakpad, a
library and tool suite that allows you to distribute an
application to users with compiler-provided debugging
information removed, record crashes in compact "minidump"
files, send them back to your server and produce C and C++
stack traces from these minidumps. Breakpad can also write
minidumps on request for programs that have not crashed.
if BR2_GOOGLE_BREAKPAD_ENABLE
config BR2_GOOGLE_BREAKPAD_INCLUDE_FILES
string "List of executables and libraries to extract symbols from"
default ""
help
You may specify a space-separated list of binaries and
libraries with full paths relative to $(TARGET_DIR) of which
debug symbols will be dumped for further use with google
breakpad.
A directory structure that can be used by minidump-stackwalk
will be created at:
$(STAGING_DIR)/usr/share/google-breakpad-symbols
endif
config BR2_ENABLE_SSP
bool "build code with Stack Smashing Protection"
depends on BR2_TOOLCHAIN_HAS_SSP
help
Enable stack smashing protection support using GCCs
-fstack-protector-all option.
See http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
for details.
Note that this requires the toolchain to have SSP
support. This is always the case for glibc and eglibc
toolchain, but is optional in uClibc toolchains.
comment "enabling Stack Smashing Protection requires support in the toolchain"
depends on !BR2_TOOLCHAIN_HAS_SSP
config BR2_PREFER_STATIC_LIB
bool "build statically linked applications, no dynamic libraries"
bool "prefer static libraries"
help
Build all applications for the target statically linked.
This potentially increases your filesystem size and should only be
Where possible, build and use static libraries for the target.
This potentially increases your code size and should only be
used if you know what you do.
The default is to build dynamic libraries and use those on
the target filesystem.
Note that some applications cannot be build statically and so are
intentionally disabled.
WARNING: This is highly experimental at the moment.
The default (if this option is disabled) is to build dynamic
libraries and dynamically link applications to use those on the
target filesystem.
config BR2_HAVE_DOCUMENTATION
bool "documentation on the target"
# We no longer want to support a toolchain on the target
depends on BR2_DEPRECATED
help
Install the documentation, including manual pages and info
pages, on the target.
If you say n here, your target will not contain any
documentation.
config BR2_HAVE_DEVFILES
bool "development files in target filesystem"
# We no longer want to support a toolchain on the target
depends on BR2_DEPRECATED
help
Install headers and static libraries in the
target filesystem
config BR2_PACKAGE_OVERRIDE_FILE
string "location of a package override file"
default "$(CONFIG_DIR)/local.mk"
default "$(TOPDIR)/local.mk"
help
A package override file is a short makefile that contains
variable definitions of the form <pkg>_OVERRIDE_SRCDIR,
@@ -550,46 +419,20 @@ config BR2_PACKAGE_OVERRIDE_FILE
as the source directory for a particular package. See the
Buildroot documentation for more details on this feature.
config BR2_GLOBAL_PATCH_DIR
string "global patch directories"
help
You may specify a space separated list of one or more directories
containing global package patches. For a specific version
<packageversion> of a specific package <packagename>, patches are
applied as follows:
First, the default Buildroot patch set for the package is applied
from the package's directory in Buildroot.
Then for every directory - <global-patch-dir> - that exists in
BR2_GLOBAL_PATCH_DIR, if the directory
<global-patch-dir>/<packagename>/<packageversion>/ exists, then all
*.patch files in this directory will be applied.
Otherwise, if the directory <global-patch-dir>/<packagename> exists,
then all *.patch files in the directory will be applied.
endmenu
source "toolchain/Config.in"
source "system/Config.in"
source "linux/Config.in"
source "package/Config.in"
source "package/Config.in.host"
source "fs/Config.in"
source "boot/Config.in"
source "package/Config.in.host"
source "linux/Config.in"
source "Config.in.legacy"
menu "User-provided options"
depends on BR2_EXTERNAL != "support/dummy-external"
source "$BR2_EXTERNAL/Config.in"
endmenu

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701
Makefile

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@@ -12,38 +12,6 @@ ifeq ($(BR2_LEGACY),y)
$(error "You have legacy configuration in your .config! Please check your configuration.")
endif
#
# Legacy options from 2014.02
#
# The BUILDROOT_DL_DIR environment variable was renamed by BR2_DL_DIR. We
# want to detect someone using the old variable, _except_ if also the new
# variable was set. By the time we get here, however, we no longer have
# access to the BR2_DL_DIR environment variable (because it has been overridden
# by the .config inclusion). However, the environment variable (if defined) was
# saved in DL_DIR, so we can use that.
ifneq ($(BUILDROOT_DL_DIR),)
ifneq ($(BUILDROOT_DL_DIR),$(DL_DIR))
$(error "The BUILDROOT_DL_DIR environment variable was renamed to BR2_DL_DIR.")
endif
endif
# If a script is using the deprecated BUILDROOT_CONFIG, make sure it fails.
# Add some directories in front just in case someone used dirname on it.
BUILDROOT_CONFIG_FAKE = /tmp/deprecated/The-BUILDROOT_CONFIG-environment-variable-was-renamed-to-BR2_CONFIG
# Similar to above for BUILDROOT_CONFIG, but here we have no .config equivalent.
ifneq ($(BUILDROOT_CONFIG),)
ifneq ($(BUILDROOT_CONFIG),$(BR2_CONFIG))
ifneq ($(BUILDROOT_CONFIG),$(BUILDROOT_CONFIG_FAKE))
$(error "The BUILDROOT_CONFIG environment variable was renamed to BR2_CONFIG.")
endif
endif
endif
BUILDROOT_CONFIG = $(BUILDROOT_CONFIG_FAKE)
export BUILDROOT_CONFIG
#
# Legacy options from 2012.08
#

59
README
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@@ -1,59 +0,0 @@
To build and use the buildroot stuff, do the following:
1) run 'make menuconfig'
2) select the packages you wish to compile
3) run 'make'
4) wait while it compiles
5) Use your shiny new root filesystem. Depending on which sort of
root filesystem you selected, you may want to loop mount it,
chroot into it, nfs mount it on your target device, burn it
to flash, or whatever is appropriate for your target system.
You do not need to be root to build or run buildroot. Have fun!
Offline build:
==============
In order to do an offline-build (not connected to the net), fetch all
selected source by issuing a
$ make source
before you disconnect.
If your build-host is never connected, then you have to copy buildroot
and your toplevel .config to a machine that has an internet-connection
and issue "make source" there, then copy the content of your dl/ dir to
the build-host.
Building out-of-tree:
=====================
Buildroot supports building out of tree with a syntax similar
to the Linux kernel. To use it, add O=<directory> to the
make command line, E.G.:
$ make O=/tmp/build
And all the output files (including .config) will be located under /tmp/build.
More finegrained configuration:
===============================
You can specify a config-file for uClibc:
$ make UCLIBC_CONFIG_FILE=/my/uClibc.config
And you can specify a config-file for busybox:
$ make BUSYBOX_CONFIG_FILE=/my/busybox.config
To use a non-standard host-compiler (if you do not have 'gcc'),
make sure that the compiler is in your PATH and that the library paths are
setup properly, if your compiler is built dynamically:
$ make HOSTCC=gcc-4.3.orig HOSTCXX=gcc-4.3-mine
Depending on your configuration, there are some targets you can use to
use menuconfig of certain packages. This includes:
$ make HOSTCC=gcc-4.3 linux-menuconfig
$ make HOSTCC=gcc-4.3 uclibc-menuconfig
$ make HOSTCC=gcc-4.3 busybox-menuconfig
Please feed suggestions, bug reports, insults, and bribes back to the
buildroot mailing list: buildroot@buildroot.org

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@@ -1,13 +1,5 @@
menu "Target options"
config BR2_ARCH_IS_64
bool
config BR2_KERNEL_64_USERLAND_32
bool
config BR2_SOFT_FLOAT
bool
bool
choice
prompt "Target Architecture"
@@ -15,20 +7,6 @@ choice
help
Select the target architecture family to build for.
config BR2_arcle
bool "ARC (little endian)"
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
applications. Little endian.
config BR2_arceb
bool "ARC (big endian)"
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
applications. Big endian.
config BR2_arm
bool "ARM (little endian)"
help
@@ -47,7 +25,6 @@ config BR2_armeb
config BR2_aarch64
bool "AArch64"
select BR2_ARCH_IS_64
help
Aarch64 is a 64-bit architecture developed by ARM Holdings.
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -56,12 +33,6 @@ config BR2_aarch64
config BR2_avr32
bool "AVR32"
select BR2_SOFT_FLOAT
# This architecture is obsolete and complicated to maintain to
# do the lack of upstream support in the major toolchain
# components. If you're interested by AVR32, contact the
# Buildroot community. Otherwise, its support will be removed
# by the 2015.02 release.
depends on BR2_DEPRECATED_SINCE_2014_08
help
The AVR32 is a 32-bit RISC microprocessor architecture designed by
Atmel.
@@ -135,36 +106,10 @@ config BR2_mips64el
http://www.mips.com/
http://en.wikipedia.org/wiki/MIPS_Technologies
config BR2_nios2
bool "Nios II"
help
Nios II is a soft core processor from Altera Corporation.
http://www.altera.com/
http://en.wikipedia.org/wiki/Nios_II
config BR2_powerpc
bool "PowerPC"
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
http://www.power.org/
http://en.wikipedia.org/wiki/Powerpc
config BR2_powerpc64
bool "PowerPC64 (big endian)"
select BR2_ARCH_IS_64
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
http://www.power.org/
http://en.wikipedia.org/wiki/Powerpc
config BR2_powerpc64le
bool "PowerPC64 (little endian)"
select BR2_ARCH_IS_64
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Little endian.
http://www.power.org/
http://en.wikipedia.org/wiki/Powerpc
@@ -217,6 +162,9 @@ config BR2_ARCH
config BR2_ENDIAN
string
config BR2_GCC_TARGET_TUNE
string
config BR2_GCC_TARGET_ARCH
string
@@ -226,95 +174,6 @@ config BR2_GCC_TARGET_ABI
config BR2_GCC_TARGET_CPU
string
config BR2_GCC_TARGET_CPU_REVISION
string
# The value of this option will be passed as --with-fpu=<value> when
# building gcc (internal backend) or -mfpu=<value> in the toolchain
# wrapper (external toolchain)
config BR2_GCC_TARGET_FPU
string
# The value of this option will be passed as --with-float=<value> when
# building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
# wrapper (external toolchain)
config BR2_GCC_TARGET_FLOAT_ABI
string
# The value of this option will be passed as --with-mode=<value> when
# building gcc (internal backend) or -m<value> in the toolchain
# wrapper (external toolchain)
config BR2_GCC_TARGET_MODE
string
# If the architecture has atomic operations, select this:
config BR2_ARCH_HAS_ATOMICS
bool
# Set up target binary format
choice
prompt "Target Binary Format"
depends on BR2_bfin || BR2_m68k
default BR2_BINFMT_FDPIC
config BR2_BINFMT_ELF
bool "ELF"
depends on !BR2_bfin && !BR2_m68k
help
ELF (Executable and Linkable Format) is a format for libraries and
executables used across different architectures and operating
systems.
config BR2_BINFMT_FDPIC
bool "FDPIC"
depends on BR2_bfin || BR2_m68k
help
ELF FDPIC binaries are based on ELF, but allow the individual load
segments of a binary to be located in memory independently of each
other. This makes this format ideal for use in environments where no
MMU is available.
config BR2_BINFMT_FLAT
bool "FLAT"
depends on BR2_bfin || BR2_m68k
select BR2_PREFER_STATIC_LIB
help
FLAT binary is a relatively simple and lightweight executable format
based on the original a.out format. It is widely used in environment
where no MMU is available.
endchoice
# Set up flat binary type
choice
prompt "FLAT Binary type"
depends on BR2_BINFMT_FLAT
default BR2_BINFMT_FLAT_ONE
config BR2_BINFMT_FLAT_ONE
bool "One memory region"
help
All segments are linked into one memory region.
config BR2_BINFMT_FLAT_SEP_DATA
bool "Separate data and code region"
depends on BR2_bfin || BR2_m68k
help
Allow for the data and text segments to be separated and placed in
different regions of memory.
config BR2_BINFMT_FLAT_SHARED
bool "Shared binary"
depends on BR2_bfin || BR2_m68k
help
Allow to load and link indiviual FLAT binaries at run time.
endchoice
if BR2_arcle || BR2_arceb
source "arch/Config.in.arc"
endif
if BR2_arm || BR2_armeb
source "arch/Config.in.arm"
endif
@@ -343,11 +202,7 @@ if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
source "arch/Config.in.mips"
endif
if BR2_nios2
source "arch/Config.in.nios2"
endif
if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
if BR2_powerpc
source "arch/Config.in.powerpc"
endif
@@ -366,5 +221,3 @@ endif
if BR2_xtensa
source "arch/Config.in.xtensa"
endif
endmenu # Target options

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@@ -3,6 +3,3 @@ config BR2_ARCH
config BR2_ENDIAN
default "LITTLE"
config BR2_ARCH_HAS_ATOMICS
default y

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@@ -1,42 +0,0 @@
choice
prompt "Target CPU"
depends on BR2_arc
default BR2_arc770d
help
Specific CPU to use
config BR2_arc750d
bool "ARC 750D"
config BR2_arc770d
bool "ARC 770D"
config BR2_archs38
bool "ARC HS38"
endchoice
# Choice of atomic instructions presence
config BR2_ARC_ATOMIC_EXT
bool "Atomic extension (LLOCK/SCOND instructions)"
default y if BR2_arc770d || BR2_archs38
config BR2_ARCH_HAS_ATOMICS
default y if BR2_ARC_ATOMIC_EXT
config BR2_ARCH
default "arc" if BR2_arcle
default "arceb" if BR2_arceb
config BR2_arc
bool
default y if BR2_arcle || BR2_arceb
config BR2_ENDIAN
default "LITTLE" if BR2_arcle
default "BIG" if BR2_arceb
config BR2_GCC_TARGET_CPU
default "arc700" if BR2_arc750d
default "arc700" if BR2_arc770d
default "archs" if BR2_archs38

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@@ -1,141 +1,46 @@
# arm cpu features
config BR2_ARM_CPU_HAS_NEON
bool
# for some cores, NEON support is optional
config BR2_ARM_CPU_MAYBE_HAS_NEON
bool
# for some cores, VFPv2 is optional
config BR2_ARM_CPU_MAYBE_HAS_VFPV2
bool
config BR2_ARM_CPU_HAS_VFPV2
bool
# for some cores, VFPv3 is optional
config BR2_ARM_CPU_MAYBE_HAS_VFPV3
bool
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
config BR2_ARM_CPU_HAS_VFPV3
bool
select BR2_ARM_CPU_HAS_VFPV2
# for some cores, VFPv4 is optional
config BR2_ARM_CPU_MAYBE_HAS_VFPV4
bool
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
config BR2_ARM_CPU_HAS_VFPV4
bool
select BR2_ARM_CPU_HAS_VFPV3
config BR2_ARM_CPU_HAS_THUMB
bool
config BR2_ARM_CPU_HAS_THUMB2
bool
config BR2_ARM_CPU_ARMV4
bool
config BR2_ARM_CPU_ARMV5
bool
config BR2_ARM_CPU_ARMV6
bool
config BR2_ARM_CPU_ARMV7A
bool
choice
prompt "Target Architecture Variant"
depends on BR2_arm || BR2_armeb
default BR2_arm926t
default BR2_generic_arm
help
Specific CPU variant to use
config BR2_generic_arm
bool "generic_arm"
config BR2_arm7tdmi
bool "arm7tdmi"
config BR2_arm610
bool "arm610"
config BR2_arm710
bool "arm710"
config BR2_arm720t
bool "arm720t"
config BR2_arm920t
bool "arm920t"
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
config BR2_arm922t
bool "arm922t"
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
config BR2_arm10t
bool "arm10t"
config BR2_arm1136jf_s
bool "arm1136jf-s"
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
bool "arm1136jf_s"
config BR2_arm1176jz_s
bool "arm1176jz-s"
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_MAYBE_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a9
bool "cortex-A9"
select BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a12
bool "cortex-A12"
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a15
bool "cortex-A15"
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_ARMV4
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_ARMV4
config BR2_sa110
bool "sa110"
config BR2_sa1100
bool "sa1100"
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
config BR2_iwmmxt
bool "iwmmxt"
select BR2_ARM_CPU_ARMV5
endchoice
choice
@@ -143,213 +48,18 @@ choice
depends on BR2_arm || BR2_armeb
default BR2_ARM_EABI
help
Application Binary Interface to use. The Application Binary
Interface describes the calling conventions (how arguments
are passed to functions, how the return value is passed, how
system calls are made, etc.).
Application Binary Interface to use
Note:
Using OABI is discouraged.
config BR2_ARM_EABI
bool "EABI"
help
The EABI is currently the standard ARM ABI, which is used in
most projects. It supports both the 'soft' floating point
model (in which floating point instructions are emulated in
software) and the 'softfp' floating point model (in which
floating point instructions are executed using an hardware
floating point unit, but floating point arguments to
functions are passed in integer registers).
The 'softfp' floating point model is link-compatible with
the 'soft' floating point model, i.e you can link a library
built 'soft' with some other code built 'softfp'.
However, passing the floating point arguments in integer
registers is a bit inefficient, so if your ARM processor has
a floating point unit, and you don't have pre-compiled
'soft' or 'softfp' code, using the EABIhf ABI will provide
better floating point performances.
If your processor does not have a floating point unit, then
you must use this ABI.
config BR2_ARM_EABIHF
bool "EABIhf"
depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
help
The EABIhf is an extension of EABI which supports the 'hard'
floating point model. This model uses the floating point
unit to execute floating point instructions, and passes
floating point arguments in floating point registers.
It is more efficient than EABI for floating point related
workload. However, it does not allow to link against code
that has been pre-built for the 'soft' or 'softfp' floating
point models.
If your processor has a floating point unit, and you don't
depend on existing pre-compiled code, this option is most
likely the best choice.
config BR2_ARM_OABI
bool "OABI"
depends on !BR2_GCC_VERSION_4_7_X
endchoice
config BR2_ARM_ENABLE_NEON
bool "Enable NEON SIMD extension support"
depends on BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_HAS_NEON
help
For some CPU cores, the NEON SIMD extension is optional.
Select this option if you are certain your particular
implementation has NEON support and you want to use it.
choice
prompt "Floating point strategy"
depends on BR2_ARM_EABI || BR2_ARM_EABIHF
default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
config BR2_ARM_SOFT_FLOAT
bool "Soft float"
depends on BR2_ARM_EABI
select BR2_SOFT_FLOAT
help
This option allows to use software emulated floating
point. It should be used for ARM cores that do not include a
Vector Floating Point unit, such as ARMv5 cores (ARM926 for
example) or certain ARMv6 cores.
config BR2_ARM_FPU_VFPV2
bool "VFPv2"
depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
help
This option allows to use the VFPv2 floating point unit, as
available in some ARMv5 processors (ARM926EJ-S) and some
ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
MPCore).
Note that this option is also safe to use for newer cores
such as Cortex-A, because the VFPv3 and VFPv4 units are
backward compatible with VFPv2.
config BR2_ARM_FPU_VFPV3
bool "VFPv3"
depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
help
This option allows to use the VFPv3 floating point unit, as
available in some ARMv7 processors (Cortex-A{8, 9}). This
option requires a VFPv3 unit that has 32 double-precision
registers, which is not necessarily the case in all SOCs
based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
instead, which is guaranteed to work on all Cortex-A{8, 9}.
Note that this option is also safe to use for newer cores
that have a VFPv4 unit, because VFPv4 is backward compatible
with VFPv3. They must of course also have 32
double-precision registers.
config BR2_ARM_FPU_VFPV3D16
bool "VFPv3-D16"
depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
help
This option allows to use the VFPv3 floating point unit, as
available in some ARMv7 processors (Cortex-A{8, 9}). This
option requires a VFPv3 unit that has 16 double-precision
registers, which is generally the case in all SOCs based on
Cortex-A{8, 9}, even though VFPv3 is technically optional on
Cortex-A9. This is the safest option for those cores.
Note that this option is also safe to use for newer cores
such that have a VFPv4 unit, because the VFPv4 is backward
compatible with VFPv3.
config BR2_ARM_FPU_VFPV4
bool "VFPv4"
depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
help
This option allows to use the VFPv4 floating point unit, as
available in some ARMv7 processors (Cortex-A{5, 7, 12,
15}). This option requires a VFPv4 unit that has 32
double-precision registers, which is not necessarily the
case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
unsure, you should probably use VFPv4-D16 instead.
Note that if you want binary code that works on all ARMv7
cores, including the earlier Cortex-A{8, 9}, you should
instead select VFPv3.
config BR2_ARM_FPU_VFPV4D16
bool "VFPv4-D16"
depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
help
This option allows to use the VFPv4 floating point unit, as
available in some ARMv7 processors (Cortex-A{5, 7, 12,
15}). This option requires a VFPv4 unit that has 16
double-precision registers, which is always available on
Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
Cortex-A7.
Note that if you want binary code that works on all ARMv7
cores, including the earlier Cortex-A{8, 9}, you should
instead select VFPv3-D16.
config BR2_ARM_FPU_NEON
bool "NEON"
depends on BR2_ARM_CPU_HAS_NEON
help
This option allows to use the NEON SIMD unit, as available
in some ARMv7 processors, as a floating-point unit. It
should however be noted that using NEON for floating point
operations doesn't provide a complete compatibility with the
IEEE 754.
config BR2_ARM_FPU_NEON_VFPV4
bool "NEON/VFPv4"
depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
depends on BR2_ARM_CPU_HAS_NEON
help
This option allows to use both the VFPv4 and the NEON SIMD
units for floating point operations. Note that some ARMv7
cores do not necessarily have VFPv4 and/or NEON support, for
example on Cortex-A5 and Cortex-A7, support for VFPv4 and
NEON is optional.
endchoice
choice
prompt "ARM instruction set"
depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
bool "ARM"
help
This option instructs the compiler to generate regular ARM
instructions, that are all 32 bits wide.
config BR2_ARM_INSTRUCTIONS_THUMB
bool "Thumb"
depends on BR2_ARM_CPU_HAS_THUMB
help
This option instructions the compiler to generate Thumb
instructions, which allows to mix 16 bits instructions and
32 bits instructions. This generally provides a much smaller
compiled binary size.
config BR2_ARM_INSTRUCTIONS_THUMB2
bool "Thumb2"
depends on BR2_ARM_CPU_HAS_THUMB2
help
This option instructions the compiler to generate Thumb2
instructions, which allows to mix 16 bits instructions and
32 bits instructions. This generally provides a much smaller
compiled binary size.
endchoice
config BR2_ARM_INSTRUCTIONS_ARM
def_bool y
depends on !(BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2)
config BR2_ARCH
default "arm" if BR2_arm
default "armeb" if BR2_armeb
@@ -358,10 +68,14 @@ config BR2_ENDIAN
default "LITTLE" if BR2_arm
default "BIG" if BR2_armeb
config BR2_ARCH_HAS_ATOMICS
default y
config BR2_GCC_TARGET_CPU
config BR2_GCC_TARGET_TUNE
default "arm600" if BR2_arm600
default "arm610" if BR2_arm610
default "arm620" if BR2_arm620
default "arm7tdmi" if BR2_arm7tdmi
default "arm7tdmi" if BR2_arm720t
default "arm7tdmi" if BR2_arm740t
default "arm920" if BR2_arm920
default "arm920t" if BR2_arm920t
default "arm922t" if BR2_arm922t
default "arm926ej-s" if BR2_arm926t
@@ -369,35 +83,32 @@ config BR2_GCC_TARGET_CPU
default "arm1136jf-s" if BR2_arm1136jf_s
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
default "cortex-a5" if BR2_cortex_a5
default "cortex-a7" if BR2_cortex_a7
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
default "cortex-a12" if BR2_cortex_a12
default "cortex-a15" if BR2_cortex_a15
default "fa526" if BR2_fa526
default "marvell-pj4" if BR2_pj4
default "strongarm" if BR2_strongarm
default "strongarm110" if BR2_sa110
default "strongarm1100" if BR2_sa1100
default "xscale" if BR2_xscale
default "iwmmxt" if BR2_iwmmxt
config BR2_GCC_TARGET_ARCH
default "armv4t" if BR2_arm7tdmi
default "armv3" if BR2_arm610
default "armv3" if BR2_arm710
default "armv4t" if BR2_arm720t
default "armv4t" if BR2_arm920t
default "armv4t" if BR2_arm922t
default "armv5te" if BR2_arm926t
default "armv5t" if BR2_arm10t
default "armv6j" if BR2_arm1136jf_s
default "armv6zk" if BR2_arm1176jz_s
default "armv6zk" if BR2_arm1176jzf_s
default "armv7-a" if BR2_cortex_a8
default "armv7-a" if BR2_cortex_a9
default "armv4" if BR2_sa110
default "armv4" if BR2_sa1100
default "armv5te" if BR2_xscale
default "iwmmxt" if BR2_iwmmxt
config BR2_GCC_TARGET_ABI
default "aapcs-linux"
config BR2_GCC_TARGET_FPU
default "vfp" if BR2_ARM_FPU_VFPV2
default "vfpv3" if BR2_ARM_FPU_VFPV3
default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
default "vfpv4" if BR2_ARM_FPU_VFPV4
default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
default "neon" if BR2_ARM_FPU_NEON
default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
config BR2_GCC_TARGET_FLOAT_ABI
default "soft" if BR2_ARM_SOFT_FLOAT
default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
config BR2_GCC_TARGET_MODE
default "arm" if BR2_ARM_INSTRUCTIONS_ARM
default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
default "apcs-gnu" if BR2_ARM_OABI
default "aapcs-linux" if BR2_ARM_EABI

View File

@@ -1,11 +1,5 @@
config BR2_ARCH
default "avr32"
default "avr32"
config BR2_ENDIAN
default "BIG"
config BR2_GCC_TARGET_ARCH
default "ap"
config BR2_ARCH_HAS_ATOMICS
default y
default "BIG"

View File

@@ -1,110 +1,16 @@
choice
prompt "Target CPU"
prompt "Target ABI"
depends on BR2_bfin
default BR2_bf609
help
Specify target CPU
config BR2_bf606
bool "bf606"
config BR2_bf607
bool "bf607"
config BR2_bf608
bool "bf608"
config BR2_bf609
bool "bf609"
config BR2_bf512
bool "bf512"
config BR2_bf514
bool "bf514"
config BR2_bf516
bool "bf516"
config BR2_bf518
bool "bf518"
config BR2_bf522
bool "bf522"
config BR2_bf523
bool "bf523"
config BR2_bf524
bool "bf524"
config BR2_bf525
bool "bf525"
config BR2_bf526
bool "bf526"
config BR2_bf527
bool "bf527"
config BR2_bf531
bool "bf531"
config BR2_bf532
bool "bf532"
config BR2_bf533
bool "bf533"
config BR2_bf534
bool "bf534"
config BR2_bf536
bool "bf536"
config BR2_bf537
bool "bf537"
config BR2_bf538
bool "bf538"
config BR2_bf539
bool "bf539"
config BR2_bf542
bool "bf542"
config BR2_bf544
bool "bf544"
config BR2_bf547
bool "bf547"
config BR2_bf548
bool "bf548"
config BR2_bf549
bool "bf549"
config BR2_bf561
bool "bf561"
default BR2_BFIN_FDPIC
config BR2_BFIN_FDPIC
bool "FDPIC"
config BR2_BFIN_FLAT
bool "FLAT"
select BR2_PREFER_STATIC_LIB
endchoice
config BR2_ARCH
default "bfin"
config BR2_ENDIAN
default "LITTLE"
config BR2_ARCH_HAS_ATOMICS
default y
config BR2_GCC_TARGET_CPU
default bf606 if BR2_bf606
default bf607 if BR2_bf607
default bf608 if BR2_bf608
default bf609 if BR2_bf609
default bf512 if BR2_bf512
default bf514 if BR2_bf514
default bf516 if BR2_bf516
default bf518 if BR2_bf518
default bf522 if BR2_bf522
default bf523 if BR2_bf523
default bf524 if BR2_bf524
default bf525 if BR2_bf525
default bf526 if BR2_bf526
default bf527 if BR2_bf527
default bf531 if BR2_bf531
default bf532 if BR2_bf532
default bf533 if BR2_bf533
default bf534 if BR2_bf534
default bf536 if BR2_bf536
default bf537 if BR2_bf537
default bf538 if BR2_bf538
default bf539 if BR2_bf539
default bf542 if BR2_bf542
default bf544 if BR2_bf544
default bf547 if BR2_bf547
default bf548 if BR2_bf548
default bf549 if BR2_bf549
default bf561 if BR2_bf561
config BR2_GCC_TARGET_CPU_REVISION
string "Target CPU revision"
help
Specify a target CPU revision, which will be appended to the
value of the -mcpu option. For example, if the selected CPU is
bf609, and then selected CPU revision is "0.0", then gcc will
receive the -mcpu=bf609-0.0 option.
default "LITTLE"

View File

@@ -4,8 +4,13 @@ config BR2_ARCH
config BR2_ENDIAN
default "BIG"
config BR2_ARCH_HAS_ATOMICS
default y
config BR2_GCC_TARGET_TUNE
default "68000" if BR2_m68k_68000
default "68010" if BR2_m68k_68010
default "68020" if BR2_m68k_68020
default "68030" if BR2_m68k_68030
default "68040" if BR2_m68k_68040
default "68060" if BR2_m68k_68060
config BR2_GCC_TARGET_ARCH
default "68000" if BR2_m68k_68000

View File

@@ -1,6 +1,5 @@
config BR2_ARCH
default "microblazeel" if BR2_microblazeel
default "microblaze" if BR2_microblazebe
default "microblaze"
config BR2_ENDIAN
default "LITTLE" if BR2_microblazeel
@@ -9,6 +8,3 @@ config BR2_ENDIAN
config BR2_microblaze
bool
default y if BR2_microblazeel || BR2_microblazebe
config BR2_ARCH_HAS_ATOMICS
default y

View File

@@ -1,7 +1,8 @@
choice
prompt "Target Architecture Variant"
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
default BR2_mips_32 if BR2_mips || BR2_mipsel
default BR2_mips_3 if BR2_mips
default BR2_mips_1 if BR2_mipsel
default BR2_mips_64 if BR2_mips64 || BR2_mips64el
help
Specific CPU variant to use
@@ -11,16 +12,14 @@ choice
config BR2_mips_1
bool "mips I (generic)"
depends on !BR2_ARCH_IS_64 && BR2_DEPRECATED_SINCE_2013_11
depends on !BR2_ARCH_IS_64
config BR2_mips_2
bool "mips II"
depends on !BR2_ARCH_IS_64 && BR2_DEPRECATED_SINCE_2013_11
depends on !BR2_ARCH_IS_64
config BR2_mips_3
bool "mips III"
depends on BR2_DEPRECATED_SINCE_2013_11
config BR2_mips_4
bool "mips IV"
depends on BR2_DEPRECATED_SINCE_2013_11
config BR2_mips_32
bool "mips 32"
depends on !BR2_ARCH_IS_64
@@ -29,40 +28,30 @@ config BR2_mips_32r2
depends on !BR2_ARCH_IS_64
config BR2_mips_64
bool "mips 64"
depends on BR2_ARCH_IS_64
config BR2_mips_64r2
bool "mips 64r2"
depends on BR2_ARCH_IS_64
endchoice
choice
prompt "Target ABI"
depends on BR2_mips64 || BR2_mips64el
default BR2_MIPS_NABI32
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
default BR2_MIPS_OABI32 if !BR2_ARCH_IS_64
default BR2_MIPS_NABI32 if BR2_ARCH_IS_64
help
Application Binary Interface to use
config BR2_MIPS_OABI32
bool "o32"
config BR2_MIPS_NABI32
bool "n32"
depends on BR2_ARCH_IS_64
select BR2_KERNEL_64_USERLAND_32
config BR2_MIPS_NABI64
bool "n64"
depends on BR2_ARCH_IS_64
endchoice
config BR2_MIPS_SOFT_FLOAT
bool "Use soft-float"
default y
select BR2_SOFT_FLOAT
help
If your target CPU does not have a Floating Point Unit (FPU)
or a kernel FPU emulator, but you still wish to support
floating point functions, then everything will need to be
compiled with soft floating point support (-msoft-float).
config BR2_ARCH
default "mips" if BR2_mips
default "mipsel" if BR2_mipsel
@@ -73,10 +62,7 @@ config BR2_ENDIAN
default "LITTLE" if BR2_mipsel || BR2_mips64el
default "BIG" if BR2_mips || BR2_mips64
config BR2_ARCH_HAS_ATOMICS
default y
config BR2_GCC_TARGET_ARCH
config BR2_GCC_TARGET_TUNE
default "mips1" if BR2_mips_1
default "mips2" if BR2_mips_2
default "mips3" if BR2_mips_3
@@ -86,10 +72,6 @@ config BR2_GCC_TARGET_ARCH
default "mips64" if BR2_mips_64
default "mips64r2" if BR2_mips_64r2
config BR2_MIPS_OABI32
bool
default y if BR2_mips || BR2_mipsel
config BR2_GCC_TARGET_ABI
default "32" if BR2_MIPS_OABI32
default "n32" if BR2_MIPS_NABI32

View File

@@ -1,8 +0,0 @@
config BR2_ARCH
default "nios2"
config BR2_ENDIAN
default "LITTLE"
config BR2_ARCH_HAS_ATOMICS
default y

View File

@@ -1,11 +1,6 @@
config BR2_POWERPC_CPU_HAS_ALTIVEC
bool
config BR2_POWERPC_CPU_HAS_SPE
bool
choice
prompt "Target Architecture Variant"
depends on BR2_powerpc
default BR2_generic_powerpc
help
Specific CPU variant to use
@@ -13,164 +8,93 @@ config BR2_generic_powerpc
bool "generic"
config BR2_powerpc_401
bool "401"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_403
bool "403"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_405
bool "405"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_405fp
bool "405 with FPU"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_440
bool "440"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_440fp
bool "440 with FPU"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_464
bool "464"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_464fp
bool "464 with FPU"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_476
bool "476"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_476fp
bool "476 with FPU"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_505
bool "505"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_601
bool "601"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_602
bool "602"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_603
bool "603"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_603e
bool "603e"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_604
bool "604"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_604e
bool "604e"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_620
bool "620"
config BR2_powerpc_630
bool "630"
config BR2_powerpc_740
bool "740"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_7400
bool "7400"
select BR2_POWERPC_CPU_HAS_ALTIVEC
depends on !BR2_ARCH_IS_64
config BR2_powerpc_7450
bool "7450"
select BR2_POWERPC_CPU_HAS_ALTIVEC
depends on !BR2_ARCH_IS_64
config BR2_powerpc_750
bool "750"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_801
bool "801"
config BR2_powerpc_821
bool "821"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_823
bool "823"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_860
bool "860"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_970
bool "970"
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_8540
bool "8540 / e500v1"
depends on !BR2_ARCH_IS_64
select BR2_POWERPC_CPU_HAS_SPE
config BR2_powerpc_8548
bool "8548 / e500v2"
depends on !BR2_ARCH_IS_64
select BR2_POWERPC_CPU_HAS_SPE
config BR2_powerpc_e300c2
bool "e300c2"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_e300c3
bool "e300c3"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_e500mc
bool "e500mc"
depends on !BR2_ARCH_IS_64
config BR2_powerpc_power4
bool "power4"
config BR2_powerpc_power5
bool "power5"
config BR2_powerpc_power6
bool "power6"
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_power7
bool "power7"
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_power8
bool "power8"
select BR2_POWERPC_CPU_HAS_ALTIVEC
endchoice
choice
prompt "Target ABI"
default BR2_powerpc_SPE if BR2_POWERPC_CPU_HAS_SPE
depends on BR2_powerpc
default BR2_powerpc_SPE if BR2_powerpc_8540 || BR2_powerpc_8548
default BR2_powerpc_CLASSIC
help
Application Binary Interface to use
config BR2_powerpc_CLASSIC
bool "Classic"
depends on !BR2_POWERPC_CPU_HAS_SPE
depends on !(BR2_powerpc_8540 || BR2_powerpc_8548)
config BR2_powerpc_SPE
bool "SPE"
depends on BR2_POWERPC_CPU_HAS_SPE
depends on BR2_powerpc_8540 || BR2_powerpc_8548
endchoice
config BR2_POWERPC_SOFT_FLOAT
bool "Use soft-float"
select BR2_SOFT_FLOAT
help
If your target CPU does not have a Floating Point Unit (FPU)
or a kernel FPU emulator, but you still wish to support
floating point functions, then everything will need to be
compiled with soft floating point support (-msoft-float).
config BR2_ARCH
default "powerpc" if BR2_powerpc
default "powerpc64" if BR2_powerpc64
default "powerpc64le" if BR2_powerpc64le
config BR2_ENDIAN
default "BIG" if BR2_powerpc || BR2_powerpc64
default "LITTLE" if BR2_powerpc64le
default "BIG"
config BR2_ARCH_HAS_ATOMICS
default y
config BR2_GCC_TARGET_CPU
config BR2_GCC_TARGET_TUNE
default "401" if BR2_powerpc_401
default "403" if BR2_powerpc_403
default "405" if BR2_powerpc_405
default "405fp" if BR2_powerpc_405fp
default "440" if BR2_powerpc_440
default "440fp" if BR2_powerpc_440fp
default "464" if BR2_powerpc_464
default "464fp" if BR2_powerpc_464fp
default "476" if BR2_powerpc_476
default "476fp" if BR2_powerpc_476fp
default "505" if BR2_powerpc_505
default "601" if BR2_powerpc_601
default "602" if BR2_powerpc_602
@@ -184,6 +108,7 @@ config BR2_GCC_TARGET_CPU
default "7400" if BR2_powerpc_7400
default "7450" if BR2_powerpc_7450
default "750" if BR2_powerpc_750
default "801" if BR2_powerpc_801
default "821" if BR2_powerpc_821
default "823" if BR2_powerpc_823
default "860" if BR2_powerpc_860
@@ -193,11 +118,6 @@ config BR2_GCC_TARGET_CPU
default "e300c2" if BR2_powerpc_e300c2
default "e300c3" if BR2_powerpc_e300c3
default "e500mc" if BR2_powerpc_e500mc
default "power4" if BR2_powerpc_power4
default "power5" if BR2_powerpc_power5
default "power6" if BR2_powerpc_power6
default "power7" if BR2_powerpc_power7
default "power8" if BR2_powerpc_power8
config BR2_GCC_TARGET_ABI
default "altivec" if BR2_PPC_ABI_altivec

View File

@@ -5,8 +5,14 @@ choice
help
Specific CPU variant to use
config BR2_sh2
bool "sh2 (SH2 big endian)"
config BR2_sh2a
bool "sh2a (SH2A big endian)"
config BR2_sh3
bool "sh3 (SH3 little endian)"
config BR2_sh3eb
bool "sh3eb (SH3 big endian)"
config BR2_sh4
bool "sh4 (SH4 little endian)"
config BR2_sh4eb
@@ -18,7 +24,10 @@ config BR2_sh4aeb
endchoice
config BR2_ARCH
default "sh2" if BR2_sh2
default "sh2a" if BR2_sh2a
default "sh3" if BR2_sh3
default "sh3eb" if BR2_sh3eb
default "sh4" if BR2_sh4
default "sh4eb" if BR2_sh4eb
default "sh4a" if BR2_sh4a
@@ -26,8 +35,7 @@ config BR2_ARCH
default "sh64" if BR2_sh64
config BR2_ENDIAN
default "LITTLE" if BR2_sh4 || BR2_sh4a || BR2_sh64
default "BIG" if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb
config BR2_ARCH_HAS_ATOMICS
default y
default "LITTLE" if BR2_sh3 || BR2_sh4 || BR2_sh4a || \
BR2_x86_64 || BR2_sh64
default "BIG" if BR2_sh2 || BR2_sh2a || BR2_sh3eb || \
BR2_sh4eb || BR2_sh4aeb

View File

@@ -1,14 +1,40 @@
choice
prompt "Target Architecture Variant"
depends on BR2_sparc
default BR2_sparc_v8
default BR2_sparc_v7
help
Specific CPU variant to use
config BR2_sparc_v7
bool "v7"
config BR2_sparc_cypress
bool "cypress"
config BR2_sparc_v8
bool "v8"
config BR2_sparc_leon3
bool "leon3"
config BR2_sparc_sparchfleon
bool "hfleon"
config BR2_sparc_sparchfleonv8
bool "hfleonv8"
config BR2_sparc_sparcsfleon
bool "sfleon"
config BR2_sparc_sparcsfleonv8
bool "sfleonv8"
config BR2_sparc_supersparc
bool "supersparc"
config BR2_sparc_sparclite
bool "sparclite"
config BR2_sparc_f930
bool "f930"
config BR2_sparc_f934
bool "f934"
config BR2_sparc_hypersparc
bool "hypersparc"
config BR2_sparc_sparclite86x
bool "sparclite86x"
config BR2_sparc_sparclet
bool "sparclet"
config BR2_sparc_tsc701
bool "tsc701"
endchoice
config BR2_ARCH
@@ -17,9 +43,27 @@ config BR2_ARCH
config BR2_ENDIAN
default "BIG"
config BR2_ARCH_HAS_ATOMICS
default y
config BR2_GCC_TARGET_TUNE
default "v7" if BR2_sparc_v7
default "cypress" if BR2_sparc_cypress
default "v8" if BR2_sparc_v8
default "supersparc" if BR2_sparc_supersparc
default "hypersparc" if BR2_sparc_hypersparc
default "sparclite" if BR2_sparc_sparclite
default "f930" if BR2_sparc_f930
default "f934" if BR2_sparc_f934
default "sparclite86x" if BR2_sparc_sparclite86x
default "sparclet" if BR2_sparc_sparclet
default "tsc701" if BR2_sparc_tsc701
default "v9" if BR2_sparc_v9
default "v9" if BR2_sparc_v9a
default "v9" if BR2_sparc_v9b
default "ultrasparc" if BR2_sparc_ultrasparc
default "ultrasparc3" if BR2_sparc_ultrasparc3
default "niagara" if BR2_sparc_niagara
config BR2_GCC_TARGET_CPU
default "leon3" if BR2_sparc_leon3
default "v8" if BR2_sparc_v8
default "sparchfleon" if BR2_sparc_sparchfleon
default "sparchfleonv8" if BR2_sparc_sparchfleonv8
default "sparcsfleon" if BR2_sparc_sparcsfleon
default "sparcsfleonv8" if BR2_sparc_sparcsfleonv8

View File

@@ -9,18 +9,17 @@ config BR2_X86_CPU_HAS_SSE3
bool
config BR2_X86_CPU_HAS_SSSE3
bool
config BR2_X86_CPU_HAS_SSE4
bool
config BR2_X86_CPU_HAS_SSE42
bool
choice
prompt "Target Architecture Variant"
depends on BR2_i386 || BR2_x86_64
default BR2_x86_i586 if BR2_i386
default BR2_x86_generic if BR2_x86_64
help
Specific CPU variant to use
config BR2_x86_generic
bool "generic"
config BR2_x86_i386
bool "i386"
depends on !BR2_x86_64
@@ -80,15 +79,6 @@ config BR2_x86_core2
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
config BR2_x86_corei7
bool "corei7"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
config BR2_x86_atom
bool "atom"
select BR2_X86_CPU_HAS_MMX
@@ -130,15 +120,6 @@ config BR2_x86_barcelona
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
config BR2_x86_jaguar
bool "jaguar"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
config BR2_x86_geode
bool "geode"
# Don't include MMX support because there several variant of geode
@@ -183,23 +164,48 @@ config BR2_ARCH
default "i686" if BR2_x86_prescott
default "i686" if BR2_x86_nocona && BR2_i386
default "i686" if BR2_x86_core2 && BR2_i386
default "i686" if BR2_x86_corei7 && BR2_i386
default "i686" if BR2_x86_atom && BR2_i386
default "i686" if BR2_x86_opteron && BR2_i386
default "i686" if BR2_x86_opteron_sse3 && BR2_i386
default "i686" if BR2_x86_barcelona && BR2_i386
default "i686" if BR2_x86_jaguar && BR2_i386
default "i686" if BR2_x86_k6
default "i686" if BR2_x86_k6_2
default "i686" if BR2_x86_athlon
default "i686" if BR2_x86_athlon_4
default "x86_64" if BR2_x86_64
default "i386" if BR2_x86_generic
config BR2_ENDIAN
default "LITTLE"
config BR2_ARCH_HAS_ATOMICS
default y if !BR2_x86_i386
config BR2_GCC_TARGET_TUNE
default "i386" if BR2_x86_i386
default "i486" if BR2_x86_i486
default "i586" if BR2_x86_i586
default "pentium-mmx" if BR2_x86_pentium_mmx
default "i686" if BR2_x86_i686
default "pentiumpro" if BR2_x86_pentiumpro
default "pentium-m" if BR2_x86_pentium_m
default "pentium2" if BR2_x86_pentium2
default "pentium3" if BR2_x86_pentium3
default "pentium4" if BR2_x86_pentium4
default "prescott" if BR2_x86_prescott
default "nocona" if BR2_x86_nocona
default "core2" if BR2_x86_core2
default "atom" if BR2_x86_atom
default "k8" if BR2_x86_opteron
default "k8-sse3" if BR2_x86_opteron_sse3
default "barcelona" if BR2_x86_barcelona
default "k6" if BR2_x86_k6
default "k6-2" if BR2_x86_k6_2
default "athlon" if BR2_x86_athlon
default "athlon-4" if BR2_x86_athlon_4
default "winchip-c6" if BR2_x86_winchip_c6
default "winchip2" if BR2_x86_winchip2
default "c3" if BR2_x86_c3
default "c3-2" if BR2_x86_c32
default "geode" if BR2_x86_geode
default "generic" if BR2_x86_generic
config BR2_GCC_TARGET_ARCH
default "i386" if BR2_x86_i386
@@ -215,12 +221,10 @@ config BR2_GCC_TARGET_ARCH
default "prescott" if BR2_x86_prescott
default "nocona" if BR2_x86_nocona
default "core2" if BR2_x86_core2
default "corei7" if BR2_x86_corei7
default "atom" if BR2_x86_atom
default "k8" if BR2_x86_opteron
default "k8-sse3" if BR2_x86_opteron_sse3
default "barcelona" if BR2_x86_barcelona
default "btver2" if BR2_x86_jaguar
default "k6" if BR2_x86_k6
default "k6-2" if BR2_x86_k6_2
default "athlon" if BR2_x86_athlon

View File

@@ -35,6 +35,3 @@ config BR2_XTENSA_OVERLAY_DIR
config BR2_ARCH
default "xtensa" if BR2_xtensa
config BR2_ARCH_HAS_ATOMICS
default y

View File

@@ -1,7 +0,0 @@
#!/bin/sh
# post-image.sh for SoCkit
# 2014, "Roman Diouskine" <roman.diouskine@savoirfairelinux.com>
# 2014, "Sebastien Bourdelin" <sebastien.bourdelin@savoirfairelinux.com>
# create a DTB file copy with the name expected by the u-boot config
cp -af $BINARIES_DIR/socfpga_cyclone5_sockit.dtb $BINARIES_DIR/socfpga.dtb

View File

@@ -1,157 +0,0 @@
SoCkit
Intro
=====
This is the buildroot board support for the Arrow SoCkit Evaluation Board.
A good source of information is :
http://www.rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard
How it works
============
Boot process :
--------------
In summary, the bootloader has multiple stages, an hardcoded boot routine is
loaded from an on-chip ROM.
- That first stage is scanning the SD card's partition table to find
partition having the 0xA2 type.
- This partition is expected to contain a boot image on its first 60 Kb,
because u-boot is bigger, we must fill it with a preloader (u-boot-spl)
which will load the u-boot image.
- Then the u-boot image will load the Linux kernel.
A good source of information for the boot process is :
http://xillybus.com/tutorials/u-boot-image-altera-soc
Note for the SPL :
The SPL generated by the u-boot from Rocketboards doesn't seems to work,
therefore we provide a patch for {uboot-PKG}/board/altera/socfpga_cyclone5/*
based on the files generated with the Altera example design.
For more information about this files please look at :
http://www.rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization#Common_Source_Code
How to build it
===============
Configure Buildroot
-------------------
The altera_sockit_defconfig configuration is a minimal configuration with
all that is required to bring the SoCkit :
$ make altera_sockit_defconfig
Build everything
----------------
Note: you will need to have access to the network, since Buildroot will
download the packages' sources.
$ make
Result of the build
-------------------
After building, you should obtain this tree:
output/images/
├── rootfs.ext2
├── rootfs.ext3 -> rootfs.ext2
├── rootfs.tar
├── socfpga_cyclone5_sockit.dtb
├── socfpga.dtb
├── u-boot.img
├── u-boot-spl.bin
└── uImage
Signing the Preloader
---------------------
*** BEWARE ****
The u-boot-spl.bin must be signed using the Altera's tool "mkpimage".
This tool comes as a part of the Altera development environnment (SoC EDS).
A fork of this tool have been done by Maxime Hadjinlian and can be found here :
https://github.com/maximeh/mkpimage
Remember that without signing the u-boot-spl.bin, the board will not boot !!!
$ mkpimage u-boot-spl.bin -o u-boot-spl-signed.bin
Prepare your SDcard
===================
A good source of information for the partitioning process is :
http://www.rocketboards.org/foswiki/view/Projects/SoCKitLinaroLinuxDesktop#Partition_the_SD_Card
Create the SDcard partition table
----------------------------------
Determine the device associated to the SD card :
$ cat /proc/partitions
let's assume it is /dev/mmcblk0 :
$ sudo fdisk /dev/mmcblk0
Delete all previous partitions with 'd' then create the new partition table,
using these options, pressing enter after each one:
* n p 1 9000000 +20480K t 1 b
* n p 2 4096 +4496384K t 83
* n p 3 2048 +1024K t 3 a2
Using the 'p' option, the SD card's partition must look like this :
Device Boot Start End Blocks Id System
/dev/mmcblk0p1 9000000 9041919 20960 b W95 FAT32
/dev/mmcblk0p2 4096 8996863 4496384 83 Linux
/dev/mmcblk0p3 2048 4095 1024 a2 Unknown
Then write the partition table using 'w' and exit.
Make partition one a DOS partition :
$ sudo mkdosfs /dev/mmcblk0p1
Install the binaries to the SDcard
----------------------------------
Remember your binaries are located in output/images/, go inside that directory :
$ cd output/images
The partition with type a2 is the partition scan by the first bootloader stage
in the SoCkit ROM to find the next bootloader stage so we must write the signed
preloader and the u-boot binaries in that partition :
$ sudo dd if=u-boot-spl-signed.bin of=/dev/mmcblk0p3 bs=64k seek=0
$ sudo dd if=u-boot.img of=/dev/mmcblk0p3 bs=64k seek=4
Copy the Linux kernel and its Device tree :
$ sudo mkdir /mnt/sdcard
$ sudo mount /dev/mmcblk0p1 /mnt/sdcard
$ sudo cp socfpga.dtb uImage /mnt/sdcard
$ sudo umount /mnt/sdcard
Copy the rootfs :
$ sudo dd if=rootfs.ext2 of=/dev/mmcblk0p2 bs=64k
$ sudo sync
It's Done!
Finish
======
Eject your SDcard, insert it in your SoCkit, and power it up.
if you want a serial console, you can plug a micro B USB cable on the USB-UART
port, the serial port config to used is 57600/8-N-1.

View File

@@ -1,820 +0,0 @@
From c70f2ebb350da20af1a0ed4b7960b8e5a1952713 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Date: Thu, 20 Feb 2014 11:51:31 -0500
Subject: [PATCH] board: add to sockit a working preloader design
---
board/altera/socfpga_cyclone5/build.h | 2 +-
board/altera/socfpga_cyclone5/iocsr_config.c | 314 ++++++++++-----------
board/altera/socfpga_cyclone5/pinmux_config.c | 32 +--
board/altera/socfpga_cyclone5/pinmux_config.h | 8 +-
board/altera/socfpga_cyclone5/sdram/sdram_config.h | 14 +-
.../altera/socfpga_cyclone5/sdram/sequencer_auto.h | 16 +-
.../sdram/sequencer_auto_ac_init.c | 16 +-
.../socfpga_cyclone5/sdram/sequencer_defines.h | 34 +--
8 files changed, 218 insertions(+), 218 deletions(-)
diff --git a/board/altera/socfpga_cyclone5/build.h b/board/altera/socfpga_cyclone5/build.h
index e5d9c3c..a369015 100644
--- a/board/altera/socfpga_cyclone5/build.h
+++ b/board/altera/socfpga_cyclone5/build.h
@@ -29,7 +29,7 @@
* Handoff files must provide user option whether to
* enable watchdog during preloader execution phase
*/
-#define CONFIG_PRELOADER_WATCHDOG_ENABLE (0)
+#define CONFIG_PRELOADER_WATCHDOG_ENABLE (1)
/*
* Handoff files must provide user option whether to enable
diff --git a/board/altera/socfpga_cyclone5/iocsr_config.c b/board/altera/socfpga_cyclone5/iocsr_config.c
index fa663e1..90fc154 100644
--- a/board/altera/socfpga_cyclone5/iocsr_config.c
+++ b/board/altera/socfpga_cyclone5/iocsr_config.c
@@ -7,113 +7,113 @@ const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
0xC0000000,
0x0000003F,
0x00008000,
- 0x00020080,
- 0x08020000,
- 0x08000000,
- 0x00018020,
+ 0x00060180,
+ 0x18060000,
+ 0x18000000,
+ 0x00018060,
0x00000000,
0x00004000,
- 0x00010040,
- 0x04010000,
- 0x04000000,
- 0x00000010,
- 0x00004010,
+ 0x000300C0,
+ 0x0C030000,
+ 0x0C000000,
+ 0x00000030,
+ 0x0000C030,
0x00002000,
- 0x00020000,
- 0x02008000,
- 0x02000000,
- 0x00000008,
- 0x00002008,
+ 0x00018060,
+ 0x06018000,
+ 0x06000000,
+ 0x00000018,
+ 0x00006018,
0x00001000,
};
const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = {
- 0x000C0300,
- 0x10040000,
- 0x100000C0,
- 0x00000040,
- 0x00010040,
+ 0x00100000,
+ 0x300C0000,
+ 0x300000C0,
+ 0x000000C0,
+ 0x000300C0,
0x00008000,
0x00080000,
- 0x18060000,
- 0x18000000,
- 0x00000060,
- 0x00018060,
+ 0x20000000,
+ 0x00000000,
+ 0x00000080,
+ 0x00020000,
0x00004000,
- 0x00010040,
+ 0x000300C0,
0x10000000,
- 0x04000000,
- 0x00000010,
- 0x00004010,
+ 0x0C000000,
+ 0x00000030,
+ 0x0000C030,
0x00002000,
- 0x06008020,
- 0x02008000,
+ 0x06018060,
+ 0x06018000,
0x01FE0000,
0xF8000000,
0x00000007,
0x00001000,
- 0x00004010,
- 0x01004000,
- 0x01000000,
- 0x00003004,
- 0x00001004,
+ 0x0000C030,
+ 0x0300C000,
+ 0x03000000,
+ 0x0000300C,
+ 0x0000300C,
0x00000800,
0x00000000,
0x00000000,
- 0x00800000,
- 0x00000002,
+ 0x01800000,
+ 0x00000006,
0x00002000,
0x00000400,
0x00000000,
- 0x00401000,
+ 0x00C03000,
0x00000003,
0x00000000,
0x00000000,
0x00000200,
- 0x00600802,
+ 0x00601806,
0x00000000,
- 0x80200000,
- 0x80000600,
- 0x00000200,
+ 0x80600000,
+ 0x80000601,
+ 0x00000601,
0x00000100,
- 0x00300401,
- 0xC0100400,
- 0x40100000,
- 0x40000300,
- 0x000C0100,
+ 0x00300C03,
+ 0xC0300C00,
+ 0xC0300000,
+ 0xC0000300,
+ 0x000C0300,
0x00000080,
};
const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = {
- 0x80040100,
+ 0x300C0300,
0x00000000,
0x0FF00000,
0x00000000,
- 0x0C010040,
+ 0x0C0300C0,
0x00008000,
- 0x18020080,
- 0x00000000,
- 0x08000000,
- 0x00040020,
- 0x06018060,
+ 0x18060180,
+ 0x18060000,
+ 0x18000000,
+ 0x00018060,
+ 0x00018060,
0x00004000,
- 0x0C010040,
- 0x04010000,
+ 0x000300C0,
+ 0x0C030000,
0x00000030,
0x00000000,
- 0x03004010,
+ 0x0300C030,
0x00002000,
- 0x06008020,
- 0x02008000,
- 0x02000018,
- 0x00006008,
- 0x01802008,
+ 0x00018060,
+ 0x06018000,
+ 0x06000000,
+ 0x00000018,
+ 0x00006018,
0x00001000,
- 0x03004010,
- 0x01004000,
- 0x0100000C,
- 0x00003004,
- 0x00C01004,
+ 0x0000C030,
+ 0x00000000,
+ 0x03000000,
+ 0x0000000C,
+ 0x00C0300C,
0x00000800,
};
@@ -170,14 +170,14 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xA0000034,
0x0D000001,
0x6068030C,
- 0xC7034018,
- 0x0E381A01,
+ 0xCF034059,
+ 0x1E781A03,
0x8030C0D0,
- 0x34018606,
- 0x01A01C70,
+ 0x34059606,
+ 0x01A03CF0,
0x0C0D0000,
- 0x18606803,
- 0x01C70340,
+ 0x59606803,
+ 0x03CF0340,
0xD000001A,
0x068030C0,
0x10040000,
@@ -244,15 +244,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xA0000034,
0x0D000001,
0x6068030C,
- 0xC7034018,
- 0x0E381A01,
+ 0xCF034059,
+ 0x1E781A03,
0x8030C0D0,
- 0x34018606,
+ 0x34059606,
0x01A00000,
0x0C0D0000,
- 0x18606803,
- 0x01C70340,
- 0xD00E381A,
+ 0x59606803,
+ 0x03CF0340,
+ 0xD01E781A,
0x068030C0,
0x10040000,
0x00200000,
@@ -273,7 +273,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -301,7 +301,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00010040,
@@ -321,15 +321,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
+ 0xF5DE791E,
+ 0x0356D348,
0x821A0000,
0x0000D000,
0x01860680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -347,7 +347,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -375,7 +375,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00015000,
@@ -395,15 +395,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
- 0x821A00C3,
+ 0xF5DE791E,
+ 0x0356D348,
+ 0x821A02CB,
0x0000D000,
0x00000680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -421,7 +421,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -449,7 +449,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00010040,
@@ -469,15 +469,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
+ 0xF5DE791E,
+ 0x0356D348,
0x821A0000,
0x0000D000,
0x00000680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -495,7 +495,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0xAA0D4000,
0x01C3A810,
0xAA0D4000,
- 0x01C3A808,
+ 0x01C3A810,
0xAA0D4000,
0x01C3A810,
0x00040100,
@@ -523,7 +523,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x2A835000,
0x0070EA04,
0x2A835000,
- 0x0070EA02,
+ 0x0070EA04,
0x2A835000,
0x0070EA04,
0x00010040,
@@ -543,15 +543,15 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x14864000,
0x69A47A05,
0xCBCF23D7,
- 0xF41E791E,
- 0x034ED348,
+ 0xF5DE791E,
+ 0x0356D348,
0x821A0000,
0x0000D000,
0x00000680,
0xD769A47A,
0x1ECBCF23,
- 0x48F41E79,
- 0x00034ED3,
+ 0x48F5DE79,
+ 0x000356D3,
0x00080200,
0x00001000,
0x00080200,
@@ -567,80 +567,80 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
0x04000002,
0x00820000,
0x00489000,
- 0x001A1A1A,
- 0x085506A0,
- 0x0000E1D4,
- 0x045506A0,
- 0x0000E1D4,
- 0x085506A0,
- 0x8000E1D4,
+ 0x801A1A1A,
+ 0x00000200,
+ 0x80000004,
+ 0x00000200,
+ 0x80000004,
+ 0x00000200,
+ 0x80000004,
0x00000200,
0x00000004,
- 0x04000000,
- 0x00000009,
- 0x00002410,
+ 0x00040000,
+ 0x10000000,
+ 0x00000000,
0x00000040,
- 0x41000000,
- 0x00002082,
- 0x00000350,
- 0x000000DA,
+ 0x00010000,
+ 0x40002000,
+ 0x00000100,
+ 0x40000002,
+ 0x00000100,
+ 0x40000002,
0x00000100,
0x40000002,
0x00000100,
0x00000002,
- 0x042A8350,
- 0x000070EA,
- 0x86000000,
- 0x08000004,
+ 0x00020000,
+ 0x08000000,
0x00000000,
- 0x00482000,
- 0x21800000,
- 0x00101061,
- 0x021541A8,
- 0x00003875,
- 0x011541A8,
- 0x00003875,
- 0x021541A8,
- 0x20003875,
+ 0x00000020,
+ 0x00008000,
+ 0x20001000,
+ 0x00000080,
+ 0x20000001,
+ 0x00000080,
+ 0x20000001,
+ 0x00000080,
+ 0x20000001,
0x00000080,
0x00000001,
- 0x41000000,
- 0x00000002,
- 0x00FF0904,
+ 0x00010000,
+ 0x04000000,
+ 0x00FF0000,
0x00000000,
- 0x90400000,
- 0x00000820,
+ 0x00004000,
+ 0x00000800,
0x80000001,
- 0x38D612AF,
- 0x86F8E38E,
- 0x0A0A78B4,
- 0x000D020A,
+ 0x00041419,
+ 0x40000000,
+ 0x04000816,
+ 0x000D0000,
0x00006800,
- 0x028A4320,
- 0xEBB4D23D,
- 0x8F65E791,
- 0xA47A0F3C,
- 0x0001A769,
- 0x00410D00,
+ 0x00000340,
+ 0xD000001A,
+ 0x06800000,
+ 0x00340000,
+ 0x0001A000,
+ 0x00000D00,
0x40000068,
- 0x3D000003,
- 0x91EBB4D2,
- 0x3C8F65E7,
- 0x69A47A0F,
- 0x000001A7,
+ 0x1A000003,
+ 0x00D00000,
+ 0x00068000,
+ 0x00003400,
+ 0x000001A0,
+ 0x00000401,
+ 0x00000008,
0x00000401,
0x00000008,
0x00000401,
0x00000008,
- 0x00000540,
- 0x000003A8,
- 0x10AA0D40,
- 0x8001C3A8,
+ 0x00000401,
+ 0x80000008,
0x0000007F,
+ 0x20000000,
0x00000000,
- 0x00004060,
- 0xE1208000,
+ 0xE0000080,
0x0000001F,
- 0x00004100,
+ 0x00004000,
};
diff --git a/board/altera/socfpga_cyclone5/pinmux_config.c b/board/altera/socfpga_cyclone5/pinmux_config.c
index 730067e..cfd74cd 100644
--- a/board/altera/socfpga_cyclone5/pinmux_config.c
+++ b/board/altera/socfpga_cyclone5/pinmux_config.c
@@ -23,7 +23,7 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
0, /* EMACIO18 */
0, /* EMACIO19 */
3, /* FLASHIO0 */
- 3, /* FLASHIO1 */
+ 0, /* FLASHIO1 */
3, /* FLASHIO2 */
3, /* FLASHIO3 */
0, /* FLASHIO4 */
@@ -34,25 +34,25 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
3, /* FLASHIO9 */
3, /* FLASHIO10 */
3, /* FLASHIO11 */
- 3, /* GENERALIO0 */
- 3, /* GENERALIO1 */
- 3, /* GENERALIO2 */
- 3, /* GENERALIO3 */
- 3, /* GENERALIO4 */
- 3, /* GENERALIO5 */
- 3, /* GENERALIO6 */
- 3, /* GENERALIO7 */
- 3, /* GENERALIO8 */
+ 0, /* GENERALIO0 */
+ 1, /* GENERALIO1 */
+ 1, /* GENERALIO2 */
+ 1, /* GENERALIO3 */
+ 1, /* GENERALIO4 */
+ 0, /* GENERALIO5 */
+ 0, /* GENERALIO6 */
+ 0, /* GENERALIO7 */
+ 0, /* GENERALIO8 */
3, /* GENERALIO9 */
3, /* GENERALIO10 */
3, /* GENERALIO11 */
3, /* GENERALIO12 */
- 2, /* GENERALIO13 */
- 2, /* GENERALIO14 */
- 3, /* GENERALIO15 */
- 3, /* GENERALIO16 */
- 2, /* GENERALIO17 */
- 2, /* GENERALIO18 */
+ 0, /* GENERALIO13 */
+ 0, /* GENERALIO14 */
+ 1, /* GENERALIO15 */
+ 1, /* GENERALIO16 */
+ 1, /* GENERALIO17 */
+ 1, /* GENERALIO18 */
0, /* GENERALIO19 */
0, /* GENERALIO20 */
0, /* GENERALIO21 */
diff --git a/board/altera/socfpga_cyclone5/pinmux_config.h b/board/altera/socfpga_cyclone5/pinmux_config.h
index fb483ab..64c750a 100644
--- a/board/altera/socfpga_cyclone5/pinmux_config.h
+++ b/board/altera/socfpga_cyclone5/pinmux_config.h
@@ -11,15 +11,15 @@
#define CONFIG_HPS_UART0 (1)
#define CONFIG_HPS_UART1 (0)
#define CONFIG_HPS_TRACE (0)
-#define CONFIG_HPS_I2C0 (1)
-#define CONFIG_HPS_I2C1 (0)
+#define CONFIG_HPS_I2C0 (0)
+#define CONFIG_HPS_I2C1 (1)
#define CONFIG_HPS_I2C2 (0)
#define CONFIG_HPS_I2C3 (0)
#define CONFIG_HPS_SPIM0 (1)
-#define CONFIG_HPS_SPIM1 (0)
+#define CONFIG_HPS_SPIM1 (1)
#define CONFIG_HPS_SPIS0 (0)
#define CONFIG_HPS_SPIS1 (0)
-#define CONFIG_HPS_CAN0 (1)
+#define CONFIG_HPS_CAN0 (0)
#define CONFIG_HPS_CAN1 (0)
#define CONFIG_HPS_SDMMC_BUSWIDTH (4)
diff --git a/board/altera/socfpga_cyclone5/sdram/sdram_config.h b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
index b90d6f3..dd027ef 100755
--- a/board/altera/socfpga_cyclone5/sdram/sdram_config.h
+++ b/board/altera/socfpga_cyclone5/sdram/sdram_config.h
@@ -4,16 +4,16 @@
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE (2)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL (8)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER (0)
-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN (1)
-#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN (1)
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN (0)
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN (0)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN (1)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT (10)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN (0)
#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS (0)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL (6)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL (8)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL (0)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL (7)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD (4)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL (11)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD (3)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW (12)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC (104)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI (3120)
@@ -21,7 +21,7 @@
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP (6)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR (6)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR (4)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP (4)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP (3)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS (14)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC (20)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD (4)
@@ -33,7 +33,7 @@
#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS (15)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS (3)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS (1)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH (40)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH (32)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH (8)
#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN (0)
#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL (2)
diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
index e8c5484..919676d 100644
--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto.h
@@ -34,7 +34,7 @@
#define __RW_MGR_ac_read_en 0x21
#define __RW_MGR_ac_mrs3_mirr 0x0C
#define __RW_MGR_ac_mrs2 0x05
-#define __RW_MGR_CONTENT_ac_mrs1 0x10090044
+#define __RW_MGR_CONTENT_ac_mrs1 0x10090006
#define __RW_MGR_CONTENT_ac_mrs3 0x100B0000
#define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata_wl_1 0x18980000
#define __RW_MGR_CONTENT_ac_act_1 0x106B0000
@@ -46,8 +46,8 @@
#define __RW_MGR_CONTENT_ac_init_reset_0_cke_0 0x20700000
#define __RW_MGR_CONTENT_ac_read_bank_0_1_norden 0x10580008
#define __RW_MGR_CONTENT_ac_pre_all 0x10280400
-#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080431
-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080530
+#define __RW_MGR_CONTENT_ac_mrs0_user 0x10080471
+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset 0x10080570
#define __RW_MGR_CONTENT_ac_read_bank_0_0 0x13580000
#define __RW_MGR_CONTENT_ac_write_bank_0_col_1 0x1C980008
#define __RW_MGR_CONTENT_ac_read_bank_0_1 0x13580008
@@ -55,21 +55,21 @@
#define __RW_MGR_CONTENT_ac_write_bank_1_col_1 0x1C9B0008
#define __RW_MGR_CONTENT_ac_write_bank_0_col_0 0x1C980000
#define __RW_MGR_CONTENT_ac_read_bank_1_0 0x135B0000
-#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0024
+#define __RW_MGR_CONTENT_ac_mrs1_mirr 0x100A0006
#define __RW_MGR_CONTENT_ac_read_bank_1_1 0x135B0008
#define __RW_MGR_CONTENT_ac_des_odt_1 0x38780000
-#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804C8
+#define __RW_MGR_CONTENT_ac_mrs0_dll_reset_mirr 0x100804E8
#define __RW_MGR_CONTENT_ac_zqcl 0x10380400
#define __RW_MGR_CONTENT_ac_write_predata 0x38F80000
-#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080449
+#define __RW_MGR_CONTENT_ac_mrs0_user_mirr 0x10080469
#define __RW_MGR_CONTENT_ac_ref 0x10480000
#define __RW_MGR_CONTENT_ac_nop 0x30780000
#define __RW_MGR_CONTENT_ac_rdimm 0x10780000
-#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090010
+#define __RW_MGR_CONTENT_ac_mrs2_mirr 0x10090218
#define __RW_MGR_CONTENT_ac_write_bank_0_col_0_nodata 0x18180000
#define __RW_MGR_CONTENT_ac_read_en 0x33780000
#define __RW_MGR_CONTENT_ac_mrs3_mirr 0x100B0000
-#define __RW_MGR_CONTENT_ac_mrs2 0x100A0008
+#define __RW_MGR_CONTENT_ac_mrs2 0x100A0218
#define __RW_MGR_READ_B2B_WAIT2 0x6A
#define __RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x31
diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
index e16efa1..20b4ca1 100644
--- a/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_auto_ac_init.c
@@ -6,16 +6,16 @@ const alt_u32 ac_rom_init[36] =
{
0x20700000,
0x20780000,
- 0x10080431,
- 0x10080530,
- 0x10090044,
- 0x100a0008,
+ 0x10080471,
+ 0x10080570,
+ 0x10090006,
+ 0x100a0218,
0x100b0000,
0x10380400,
- 0x10080449,
- 0x100804c8,
- 0x100a0024,
- 0x10090010,
+ 0x10080469,
+ 0x100804e8,
+ 0x100a0006,
+ 0x10090218,
0x100b0000,
0x30780000,
0x38780000,
diff --git a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
index 52faf3f..b85b85c 100644
--- a/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
+++ b/board/altera/socfpga_cyclone5/sdram/sequencer_defines.h
@@ -1,28 +1,28 @@
#ifndef _SEQUENCER_DEFINES_H_
#define _SEQUENCER_DEFINES_H_
-#define AC_ROM_MR1_MIRR 0000000100100
+#define AC_ROM_MR1_MIRR 0000000000110
#define AC_ROM_MR1_OCD_ENABLE
-#define AC_ROM_MR2_MIRR 0000000010000
+#define AC_ROM_MR2_MIRR 0001000011000
#define AC_ROM_MR3_MIRR 0000000000000
#define AC_ROM_MR0_CALIB
-#define AC_ROM_MR0_DLL_RESET_MIRR 0010011001000
-#define AC_ROM_MR0_DLL_RESET 0010100110000
-#define AC_ROM_MR0_MIRR 0010001001001
-#define AC_ROM_MR0 0010000110001
-#define AC_ROM_MR1 0000001000100
-#define AC_ROM_MR2 0000000001000
+#define AC_ROM_MR0_DLL_RESET_MIRR 0010011101000
+#define AC_ROM_MR0_DLL_RESET 0010101110000
+#define AC_ROM_MR0_MIRR 0010001101001
+#define AC_ROM_MR0 0010001110001
+#define AC_ROM_MR1 0000000000110
+#define AC_ROM_MR2 0001000011000
#define AC_ROM_MR3 0000000000000
#define AFI_CLK_FREQ 401
#define AFI_RATE_RATIO 1
#define ARRIAVGZ 0
#define ARRIAV 0
-#define AVL_CLK_FREQ 67
+#define AVL_CLK_FREQ 81
#define BFM_MODE 0
#define BURST2 0
#define CALIBRATE_BIT_SLIPS 0
-#define CALIB_LFIFO_OFFSET 7
-#define CALIB_VFIFO_OFFSET 5
+#define CALIB_LFIFO_OFFSET 11
+#define CALIB_VFIFO_OFFSET 9
#define CYCLONEV 1
#define DDR2 0
#define DDR3 1
@@ -89,20 +89,20 @@
#define RW_MGR_MEM_CHIP_SELECT_WIDTH 1
#define RW_MGR_MEM_CLK_EN_WIDTH 1
#define RW_MGR_MEM_CONTROL_WIDTH 1
-#define RW_MGR_MEM_DATA_MASK_WIDTH 5
-#define RW_MGR_MEM_DATA_WIDTH 40
+#define RW_MGR_MEM_DATA_MASK_WIDTH 4
+#define RW_MGR_MEM_DATA_WIDTH 32
#define RW_MGR_MEM_DQ_PER_READ_DQS 8
#define RW_MGR_MEM_DQ_PER_WRITE_DQS 8
-#define RW_MGR_MEM_IF_READ_DQS_WIDTH 5
-#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 5
+#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4
+#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4
#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
#define RW_MGR_MEM_NUMBER_OF_RANKS 1
#define RW_MGR_MEM_ODT_WIDTH 1
#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1
#define RW_MGR_MR0_BL 1
-#define RW_MGR_MR0_CAS_LATENCY 3
-#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 5
+#define RW_MGR_MR0_CAS_LATENCY 7
+#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4
#define RW_MGR_WRITE_TO_DEBUG_READ 1.0
#define SKEW_CALIBRATION 0
#define STATIC_FULL_CALIBRATION 1
--
1.9.0

View File

@@ -3,7 +3,7 @@ ARM software simulator of the AArch64 architecture.
First, one has to download the AArch64 software simulator from:
https://silver.arm.com/download/download.tm?pv=1509509
https://silver.arm.com/download/download.tm?pv=1317469
Then, use the arm_foundationv8_defconfig configuration to build your
Buildroot system.

View File

@@ -1,230 +0,0 @@
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CGROUPS=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MXC=y
CONFIG_MXC_IRQ_PRIOR=y
CONFIG_MACH_IMX27_DT=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_FPE_NWFPE=y
CONFIG_FPE_NWFPE_XP=y
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_RAW=m
CONFIG_CAN_BCM=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_PROC_DEVICETREE=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_SMSC_PHY=y
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RTL8192CU=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_IMX=m
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_PWC=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=m
CONFIG_VIDEO_MX2=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
# CONFIG_DVB_AU8522_V4L is not set
# CONFIG_DVB_TUNER_DIB0070 is not set
# CONFIG_DVB_TUNER_DIB0090 is not set
CONFIG_FB=y
# CONFIG_FB_MX3 is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_CHIPIDEA_DEBUG=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_HID=m
CONFIG_USB_ULPI=y
CONFIG_MMC=y
CONFIG_MMC_MXC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1374=y
CONFIG_RTC_DRV_MXC=m
CONFIG_DMADEVICES=y
CONFIG_IMX_SDMA=y
CONFIG_IMX_DMA=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=m
CONFIG_PWM=y
CONFIG_PWM_IMX=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_DNOTIFY is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=m
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_INFO=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

View File

@@ -1,185 +0,0 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MXS=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_IDLE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_FLEXCAN=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_PID=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_M25P80=y
# CONFIG_M25PXX_USE_FAST_READ is not set
CONFIG_MTD_SST25L=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_GPMI_NAND=y
CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_NETDEVICES=y
CONFIG_RTL8187=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_SERIO_SERPORT is not set
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_MXS_AUART=y
CONFIG_TTY_PRINTK=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MXS=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=m
CONFIG_SPI_MXS=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_HWMON=m
CONFIG_WATCHDOG=y
CONFIG_STMP3XXX_RTC_WATCHDOG=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_FB=y
CONFIG_FB_MXS=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_MXS_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_ETH=m
CONFIG_MMC=y
CONFIG_MMC_MXS=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_STMP=y
CONFIG_DMADEVICES=y
CONFIG_MXS_DMA=y
CONFIG_STAGING=y
CONFIG_MXS_LRADC=y
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_MXS=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT2_FS_XIP=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_AUTOFS4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_FS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set

View File

@@ -1,266 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_MXC_IRQ_PRIOR=y
CONFIG_MACH_IMX51_DT=y
CONFIG_ARM_THUMBEE=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_IMX=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_SUSPEND is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_RAW=m
CONFIG_CAN_BCM=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_L2CAP=y
CONFIG_BT_SCO=y
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_PID=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_MISC_DEVICES=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_SMSC_PHY=y
CONFIG_NET_ETHERNET=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=m
CONFIG_KEYBOARD_IMX=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_WM831X=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
CONFIG_INPUT_WM831X_ON=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_WM831X=m
CONFIG_POWER_SUPPLY=m
CONFIG_WM831X_BACKUP=m
CONFIG_WM831X_POWER=m
CONFIG_HWMON=m
CONFIG_SENSORS_AS1531=m
CONFIG_SENSORS_WM831X=m
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_WM831X_WATCHDOG=m
CONFIG_IMX2_WDT=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MFD_IMX_IPU_V3=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_VIDEO_DEV=m
# CONFIG_RC_CORE is not set
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
CONFIG_VIDEO_VIVI=m
CONFIG_USB_VIDEO_CLASS=m
# CONFIG_RADIO_ADAPTERS is not set
CONFIG_FB=y
CONFIG_FB_MX5=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_SND_SOC_APF51_DEV_WM8960=m
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_SUSPEND=y
CONFIG_USB_OTG=y
# CONFIG_USB_OTG_WHITELIST is not set
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=m
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_ETH=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SPI=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_WM831X_STATUS=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_MXC=y
CONFIG_RTC_DRV_WM831X=y
CONFIG_STAGING=y
CONFIG_IIO=m
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT2_FS_XIP=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_AUTOFS4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_CMODE_NONE=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_FS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set

View File

@@ -0,0 +1,26 @@
From 053ba505eb0d40287ac5750daf454af0aed2ce75 Mon Sep 17 00:00:00 2001
From: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Date: Tue, 4 Oct 2011 14:19:58 +0200
Subject: [PATCH 1/2] [ARM] mach-types: Re-add apf9328
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
---
arch/arm/tools/mach-types | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index fff68d0..07811a7 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -188,6 +188,7 @@ omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900
davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901
palmz72 MACH_PALMZ72 PALMZ72 904
nxdb500 MACH_NXDB500 NXDB500 905
+apf9328 MACH_APF9328 APF9328 906
palmt5 MACH_PALMT5 PALMT5 917
palmtc MACH_PALMTC PALMTC 918
omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919
--
1.7.3.4

View File

@@ -0,0 +1,16 @@
APF9328 needs CONFIG_MTD_CFI_INTELEXT to boot on its NOR FLASH.
Signed-off-by: Julien Boibessot <julien.boibessot@armadeus.com>
Index: linux-3.1.1/arch/arm/mach-imx/Kconfig
===================================================================
--- linux-3.1.1.orig/arch/arm/mach-imx/Kconfig 2011-11-16 14:45:55.000000000 +0100
+++ linux-3.1.1/arch/arm/mach-imx/Kconfig 2011-11-16 14:47:20.000000000 +0100
@@ -84,6 +84,7 @@
bool "APF9328"
select SOC_IMX1
select IMX_HAVE_PLATFORM_IMX_UART
+ select MTD_CFI_INTELEXT
help
Say Yes here if you are using the Armadeus APF9328 development board

View File

@@ -1,98 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_LZO=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9260=y
CONFIG_ARCH_AT91SAM9260_SAM9XE=y
CONFIG_MACH_AT91SAM9260EK=y
CONFIG_MACH_CAM60=y
CONFIG_MACH_SAM9_L9260=y
CONFIG_MACH_AFEB9260=y
CONFIG_MACH_USB_A9260=y
CONFIG_MACH_QIL_A9260=y
CONFIG_MACH_CPU9260=y
CONFIG_MACH_FLEXIBITY=y
CONFIG_MACH_SNAPPER_9260=y
CONFIG_MACH_AT91SAM_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
# CONFIG_ARM_THUMB is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_AT91SAM9X_WATCHDOG=y
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
CONFIG_USB_GADGET=y
CONFIG_USB_ZERO=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_EXT2_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_CRAMFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

View File

@@ -1,73 +0,0 @@
Atmel SAMA5D3 Xplained board
============================
This document explains how to set up a basic Buildroot system on the
Atmel SAMA5D3 Xplained board, whose main site is
http://www.atmel.com/tools/ATSAMA5D3-XPLD.aspx. Additional details can
also be found on the http://www.at91.com/linux4sam/bin/view/Linux4SAM/
web site.
Note that the default Buildroot configuration is prepared to boot from
an SD card: the first stage bootloader, second stage bootloader,
kernel image and root filesystem are all located on the SD card. Some
adjustements in the bootloader configuration will be needed to boot
from NAND flash.
Configuring and building Buildroot
----------------------------------
make atmel_xplained_defconfig
make
Preparing the SD card
---------------------
The SD card must be partitionned with at least two partitions: one
FAT16 partition for the bootloaders, kernel image and Device Tree
blob, and one ext4 partition for the root filesystem. To partition the
SD card:
sudo sfdisk -uM /dev/mmcblk0 <<EOF
,64,6
;
EOF
This creates a 64 MB partition for the FAT16 filesystem (type 6) and
uses the rest for the ext4 filesystem used for the root filesystem.
Then, format both partitions:
sudo mkfs.msdos -n boot /dev/mmcblk0p1
sudo mkfs.ext4 -L rootfs -O ^huge_file /dev/mmcblk0p2
Note: the -O ^huge_file option is needed to avoid enabling the huge
files features of ext4 (to support files larges than 2 TB), which
needs the kernel option CONFIG_LBDAF to be enabled.
Mount both partitions (if not done automatically by your system):
sudo mount /dev/mmcblk0p1 /media/boot
sudo mount /dev/mmcblk0p2 /media/rootfs
Copy the bootloaders, kernel image and Device Tree blob to the first
partition:
cp output/images/sama5d3_xplained-sdcardboot-uboot-3.6.2.bin /media/boot/boot.bin
cp output/images/u-boot.bin /media/boot/u-boot.bin
cp output/images/zImage /media/boot/zImage
cp output/images/at91-sama5d3_xplained.dtb /media/boot/at91-sama5d3_xplained.dtb
Extract the root filesystem to the second partition:
sudo tar -C /media/rootfs -xf output/images/rootfs.tar
Unmount both partitions:
sudo umount /media/boot
sudo umount /media/rootfs
Insert your SD card in your Xplained board, and enjoy. The default
U-Boot environment will properly load the kernel and Device Tree blob
from the first partition of the SD card, so everything works
automatically.

View File

@@ -1,72 +0,0 @@
This is the buildroot board support for the Avnet Zedboard. The Zedboard is
a development board based on the Xilinx Zynq-7000 based All-Programmable
System-On-Chip.
Zedboard information including schematics, reference designs, and manuals are
available from http://www.zedboard.org .
The U-Boot firmware for the Xilinx Zynq All Programmable SoC depends
on some propietary code. This dependency consists of a pair of
files are available from the Xilinx SDK installation.
You will need these files from Xilinx SDK installation to generate
the U-Boot firmware:
ps7_init.c
ps7_init.h
Buildroot will create the following files and place them in the
<output>/images directory.
zynq-zed.dtb
rootfs.cpio.uboot
uImage
u-boot.img
boot.bin
uboot.bin -- U-Boot SPL w/ Xilinx boot.bin wrapper
---------------------------------------------------
Due to licensing issues, the files ps7_init.c/h are not able to be
distributed with the U-Boot source code. These files are required to make a
boot.bin file.
If you already have the Xilinx tools installed, the following sequence will
unpack, patch and build the rfs, kernel, uboot, and uboot-spl.
make zedboard_defconfig
make uboot-patch
cp ${XILINX}/ISE_DS/EDK/sw/lib/hwplatform_templates/zed_hw_platform/ps7_init.{c,h} \
output/build/uboot-xilinx-v2014.1/board/xilinx/zynq/
After copying these files into the U-Boot source tree, you can
continue the build with:
make
*Notice*
While the build will successfully complete without the ps7_init.*
files, the uboot.bin file generated by this configuration will not
function properly on the Zedboard. Therefore, it is imperative that
the ps7_init.* files be copied into the U-Boot source tree any time
the clean, or uboot-dirclean targets are made.
Resulting system
----------------
A FAT32 partition should be created at the beggining of the SD Card
and the following files should be installed:
/boot.bin
/devicetree.dtb
/uImage
/uramdisk.image.gz
/u-boot.img
All needed files can be taken from output/images/
boot.bin, uImage and u-boot.img are direct copies of the same files
available on output/images/
devicetree.dtb is just zynq-zed.dtb renamed.
uramdisk.image.gz is rootfs.cpio.uboot renamed

View File

@@ -1,251 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP_RESET_CLOCKS=y
CONFIG_OMAP_MUX_DEBUG=y
CONFIG_ARCH_OMAP3=y
CONFIG_ARCH_OMAP4=y
CONFIG_SOC_AM43XX=y
# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
# CONFIG_SOC_TI81XX is not set
# CONFIG_MACH_OMAP3_BEAGLE is not set
# CONFIG_MACH_DEVKIT8000 is not set
# CONFIG_MACH_OMAP_LDP is not set
# CONFIG_MACH_OMAP3530_LV_SOM is not set
# CONFIG_MACH_OMAP3_TORPEDO is not set
# CONFIG_MACH_OVERO is not set
# CONFIG_MACH_OMAP3EVM is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
# CONFIG_MACH_TOUCHBOOK is not set
# CONFIG_MACH_OMAP_3430SDP is not set
# CONFIG_MACH_NOKIA_RM680 is not set
# CONFIG_MACH_NOKIA_RX51 is not set
# CONFIG_MACH_OMAP_ZOOM2 is not set
# CONFIG_MACH_OMAP_ZOOM3 is not set
# CONFIG_MACH_CM_T35 is not set
# CONFIG_MACH_CM_T3517 is not set
# CONFIG_MACH_IGEP0020 is not set
# CONFIG_MACH_IGEP0030 is not set
# CONFIG_MACH_SBC3530 is not set
# CONFIG_MACH_OMAP_3630SDP is not set
CONFIG_ARM_THUMBEE=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_GENERIC_CPUFREQ_CPU0=y
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
CONFIG_FPE_NWFPE=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_BINFMT_MISC=y
CONFIG_PM_RUNTIME=y
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_OMAP_OCP2SCP=y
CONFIG_CONNECTOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=16384
CONFIG_CROSSBAR=y
CONFIG_EEPROM_93CX6=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_MD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_TI_CPSW=y
CONFIG_TI_CPTS=y
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_AT803X_PHY=y
CONFIG_SMSC_PHY=y
# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_OMAP=y
CONFIG_SERIAL_OMAP_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_OMAP=y
CONFIG_SPI=y
CONFIG_SPI_OMAP24XX=y
CONFIG_SPI_TI_QSPI=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_W1=y
CONFIG_POWER_SUPPLY=y
CONFIG_THERMAL=y
CONFIG_THERMAL_GOV_FAIR_SHARE=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_CPU_THERMAL=y
CONFIG_TI_SOC_THERMAL=y
CONFIG_TI_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_OMAP_WATCHDOG=y
CONFIG_MFD_SYSCON=y
CONFIG_MFD_TPS65217=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_PBIAS=y
CONFIG_REGULATOR_TPS65023=y
CONFIG_REGULATOR_TPS6507X=y
CONFIG_REGULATOR_TPS65217=y
CONFIG_REGULATOR_TIAVSCLASS0=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_DA8XX=y
CONFIG_FB_DA8XX_TDA998X=y
CONFIG_OMAP2_DSS=y
CONFIG_OMAP2_DSS_SDI=y
CONFIG_OMAP2_DSS_DSI=y
CONFIG_FB_OMAP2=y
CONFIG_DISPLAY_CONNECTOR_HDMI=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_HDRC=m
CONFIG_USB_MUSB_OMAP2PLUS=m
CONFIG_USB_MUSB_DSPS=m
CONFIG_USB_TI_CPPI41_DMA=y
CONFIG_USB_STORAGE=y
CONFIG_AM335X_PHY_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_ETH_EEM=y
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_MMC=y
CONFIG_MMC_UNSAFE_RESUME=y
CONFIG_SDIO_UART=y
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_OMAP=y
CONFIG_DMADEVICES=y
CONFIG_TI_EDMA=y
CONFIG_DMA_OMAP=y
CONFIG_TI_CPPI41=y
CONFIG_COMMON_CLK_DEBUG=y
CONFIG_OMAP_USB2=y
CONFIG_OMAP_PIPE3=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_EXT4_FS=y
CONFIG_QUOTA=y
CONFIG_QFMT_V2=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
CONFIG_PROVE_LOCKING=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
CONFIG_AVERAGE=y

View File

@@ -0,0 +1,252 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_DEFAULT_HOSTNAME="beaglebone"
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_FHANDLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_NAMESPACES=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_ARCH_OMAP=y
CONFIG_OMAP_MUX_DEBUG=y
CONFIG_OMAP_MBOX_FWK=y
# CONFIG_OMAP_32K_TIMER is not set
# CONFIG_MACH_OMAP_GENERIC is not set
# CONFIG_ARCH_OMAP2 is not set
# CONFIG_ARCH_OMAP4 is not set
# CONFIG_SOC_OMAP3430 is not set
# CONFIG_MACH_OMAP3_BEAGLE is not set
# CONFIG_MACH_DEVKIT8000 is not set
# CONFIG_MACH_OMAP_LDP is not set
# CONFIG_MACH_OMAP3530_LV_SOM is not set
# CONFIG_MACH_OMAP3_TORPEDO is not set
# CONFIG_MACH_ENCORE is not set
# CONFIG_MACH_OVERO is not set
# CONFIG_MACH_OMAP3EVM is not set
# CONFIG_MACH_OMAP3517EVM is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
# CONFIG_MACH_OMAP3_TOUCHBOOK is not set
# CONFIG_MACH_OMAP_3430SDP is not set
# CONFIG_MACH_NOKIA_RM680 is not set
# CONFIG_MACH_NOKIA_RX51 is not set
# CONFIG_MACH_OMAP_ZOOM2 is not set
# CONFIG_MACH_OMAP_ZOOM3 is not set
# CONFIG_MACH_CM_T35 is not set
# CONFIG_MACH_CM_T3517 is not set
# CONFIG_MACH_IGEP0020 is not set
# CONFIG_MACH_IGEP0030 is not set
# CONFIG_MACH_SBC3530 is not set
# CONFIG_MACH_OMAP_3630SDP is not set
# CONFIG_MACH_TI8168EVM is not set
# CONFIG_MACH_TI8148EVM is not set
# CONFIG_MACH_AM335XIAEVM is not set
CONFIG_OMAP3_EDMA=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_THUMB2_KERNEL=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE=" debug "
CONFIG_AUTO_ZRELADDR=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_BINFMT_MISC=y
# CONFIG_SUSPEND is not set
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_RFKILL_REGULATOR=m
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_CONNECTOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=65536
CONFIG_MISC_DEVICES=y
CONFIG_BMP085=m
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_93CX6=m
CONFIG_SENSORS_LIS3_I2C=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_TI_CPSW=y
CONFIG_SMSC_PHY=y
# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_MOUSE_PS2 is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_AD714X=m
CONFIG_INPUT_BMA150=m
CONFIG_INPUT_MMA8450=m
CONFIG_INPUT_MPU3050=m
CONFIG_INPUT_ATI_REMOTE2=m
CONFIG_INPUT_KEYSPAN_REMOTE=m
CONFIG_INPUT_KXTJ9=m
CONFIG_INPUT_POWERMATE=m
CONFIG_INPUT_YEALINK=m
CONFIG_INPUT_CM109=m
CONFIG_INPUT_TWL4030_PWRBUTTON=y
CONFIG_INPUT_TWL4030_VIBRA=m
CONFIG_INPUT_TWL6040_VIBRA=m
CONFIG_INPUT_UINPUT=m
CONFIG_INPUT_PCF8574=m
CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
CONFIG_INPUT_ADXL34X=m
CONFIG_INPUT_CMA3000=m
CONFIG_INPUT_CMA3000_I2C=m
# CONFIG_SERIO is not set
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_HW_RANDOM=y
CONFIG_RAW_DRIVER=m
CONFIG_I2C_CHARDEV=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=m
CONFIG_SPI_OMAP24XX=y
CONFIG_SPI_SPIDEV=m
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_TWL4030=y
CONFIG_GENERIC_PWM=y
CONFIG_DAVINCI_EHRPWM=y
CONFIG_ECAP_PWM=y
CONFIG_POWER_SUPPLY=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_OMAP_WATCHDOG=y
CONFIG_TWL4030_WATCHDOG=y
CONFIG_MFD_TPS65217=y
CONFIG_REGULATOR_DUMMY=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
CONFIG_REGULATOR_USERSPACE_CONSUMER=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_TWL4030=y
CONFIG_REGULATOR_TPS65023=y
CONFIG_REGULATOR_TPS6507X=y
CONFIG_REGULATOR_TPS65217=y
CONFIG_DISPLAY_SUPPORT=y
CONFIG_HIDRAW=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_TI81XX_GLUE=y
CONFIG_USB_TI_CPPI41_DMA_HW=y
CONFIG_USB_ACM=y
CONFIG_USB_LIBUSUAL=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MUSB_HDRC=y
CONFIG_USB_ETH=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_UNSAFE_RESUME=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_UIO=m
CONFIG_UIO_PDRV=m
CONFIG_UIO_PDRV_GENIRQ=m
CONFIG_UIO_PRUSS=m
CONFIG_STAGING=y
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_SW_RING=y
CONFIG_IIO_KFIFO_BUF=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_EXT2_FS=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_FANOTIFY=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_JTAG_ENABLE=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set

View File

@@ -1,34 +0,0 @@
From 29885f2f3d700341d322274db6ad085e601c0994 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <panto@antoniou-consulting.com>
Date: Fri, 4 Jan 2013 00:32:33 +0200
Subject: [PATCH 3/3] arm: Export cache flush management symbols when
!MULTI_CACHE
When compiling a kernel without CONFIG_MULTI_CACHE enabled the
dma access functions end up not being exported. Fix it.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
---
arch/arm/kernel/setup.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index da1d1aa..dcb678c 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -923,3 +923,12 @@ const struct seq_operations cpuinfo_op = {
.stop = c_stop,
.show = c_show
};
+
+/* export the cache management functions */
+#ifndef MULTI_CACHE
+
+EXPORT_SYMBOL(__glue(_CACHE,_dma_map_area));
+EXPORT_SYMBOL(__glue(_CACHE,_dma_unmap_area));
+EXPORT_SYMBOL(__glue(_CACHE,_dma_flush_range));
+
+#endif
--
1.7.10.4

View File

@@ -1,6 +0,0 @@
#!/bin/sh
# post-image.sh for BeagleBone
# 2014, Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
# copy the uEnv.txt to the output/images directory
cp board/beaglebone/uEnv.txt $BINARIES_DIR/uEnv.txt

View File

@@ -1,62 +0,0 @@
BeagleBone
Intro
=====
To be able to use BeagleBone board with the images generated by
Buildroot, you have prepare the SDCard.
How to build it
===============
$ make beaglebone_defconfig
Then you can edit the build options using
$ make menuconfig
Compile all and build rootfs image:
$ make
Result of the build
-------------------
After building, you should get a tree like this:
output/images/
├── am335x-boneblack.dtb
├── am335x-bone.dtb
├── MLO
├── rootfs.ext2
├── u-boot.img
├── uEnv.txt
└── zImage
Prepare you SDCard
==================
You need to prepare first partition in fat32 and marked as bootable,
and second where you will write rootfs.
Copy the files to boot partition
$ cp MLO u-boot.img zImage uEnv.txt *.dtb /media/zzzzz
where /media/zzzzz is the mount point
Then you need to write the rootfs image onto SDCard:
# dd if=rootfs.ext2 of=/dev/xxxxx
where /dev/xxxxx is the second partition. Use:
# fdisk -l
to check for correct one.
Finish
======
Unmount all mounted SDCard partitions and insert the card to BeagleBone.
Hold the "BOOT" button and apply power. Then release the "BOOT" button.
The output is available on the serial console.

View File

@@ -1,3 +0,0 @@
bootpart=0:1
bootdir=
uenvcmd=run loaduimage;run loadramdisk;run findfdt;run loadfdt;run ramboot

Binary file not shown.

Binary file not shown.

View File

@@ -1,18 +1,18 @@
#!/bin/sh
# post-build fixups
# for further details, see
#
# http://boundarydevices.com/u-boot-on-i-mx6/
#
# for furthe details, see
# http://boundarydevices.com/u-boot-conventions-for-i-mx6-nitrogen6x-and-sabrelite/
TARGET_DIR=$1
IMAGES_DIR=$1/../images
BOARD_DIR="$(dirname $0)"
# bd u-boot looks for bootscript here
cp $BOARD_DIR/6x_bootscript $TARGET_DIR
cp $BOARD_DIR/6q_bootscript $TARGET_DIR
# u-boot / update script for bd upgradeu command
if [ -e $BINARIES_DIR/u-boot.imx ];
if [ -e $IMAGES_DIR/u-boot.bin ];
then
cp $BINARIES_DIR/u-boot.imx $TARGET_DIR
cp $BOARD_DIR/6x_upgrade $TARGET_DIR
cp $IMAGES_DIR/u-boot.bin $TARGET_DIR
cp $BOARD_DIR/6q_upgrade $TARGET_DIR
fi

View File

@@ -2,12 +2,15 @@ Buildroot for Boundary Devices Nitrogen6X:
http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/
Notice: U-Boot as shipped on the board has a bug reading rev 0 ext2
file systems (which is what genext2fs generates). To convert it to rev
1, do:
tune2fs -O filetype output/images/rootfs.ext2
e2fsck -a output/images/rootfs.ext2
To install, simply extract rootfs.ext2 to first partition of a uSD card:
sudo dd if=output/images/rootfs.ext2 of=/dev/sdX1
Where 'sdX1' is the device node of the uSD partition.
To upgrade u-boot, cancel autoboot and type:
run upgradeu

View File

@@ -1,45 +0,0 @@
From 3d1a9b44b9dcd2c0f5d54c09596c96c0524d8340 Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Tue, 13 Nov 2012 11:47:41 +0100
Subject: [PATCH] trace-debug[stm]: Fix for BT/WLAN instability
Pins under mop500_ske_pins array are used for different
functionalities in snowball. Ex: GPIO161 pin configured
for keypad here must stay configured as GPIO alternate
function for operating PMU_EN pin of BT/WLAN chip in snowball.
So forbid configuring these pins, for snowball
Signed-off-by: Rajanikanth H.V <rajanikanth.hv@stericsson.com>
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/mach-ux500/board-mop500-stm.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-ux500/board-mop500-stm.c b/arch/arm/mach-ux500/board-mop500-stm.c
index 1bef2a0..532fb9e 100644
--- a/arch/arm/mach-ux500/board-mop500-stm.c
+++ b/arch/arm/mach-ux500/board-mop500-stm.c
@@ -121,7 +121,9 @@ static int stm_ste_disable_ape_on_mipi60(void)
if (retval)
STM_ERR("Failed to disable MIPI60\n");
else {
- retval = nmk_config_pins(ARRAY_AND_SIZE(mop500_ske_pins));
+ if (!machine_is_snowball())
+ retval = nmk_config_pins(
+ ARRAY_AND_SIZE(mop500_ske_pins));
if (retval)
STM_ERR("Failed to enable SKE gpio\n");
}
@@ -314,7 +316,8 @@ static int stm_ste_connection(enum stm_connection_type con_type)
/* Enable altC3 on GPIO70-74 (STMMOD) and GPIO75-76 (UARTMOD) */
prcmu_enable_stm_mod_uart();
/* Enable APE on MIPI60 */
- retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
+ if (!machine_is_snowball())
+ retval = nmk_config_pins_sleep(ARRAY_AND_SIZE(mop500_ske_pins));
if (retval)
STM_ERR("Failed to disable SKE GPIO\n");
else {
--
1.7.9.5

View File

@@ -1,551 +0,0 @@
From 53bd82b122f4530a98cba45795832820bb1d0b45 Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Mon, 13 Aug 2012 11:26:10 +0200
Subject: [PATCH] Add support for the Calao-systems TNY-A9G20-LPW
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
board/tny_a9g20_lpw/nandflash/Makefile | 121 ++++++++++++
board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h | 114 ++++++++++++
board/tny_a9g20_lpw/tny_a9g20_lpw.c | 243 +++++++++++++++++++++++++
crt0_gnu.S | 6 +
include/part.h | 6 +-
5 files changed, 489 insertions(+), 1 deletion(-)
create mode 100644 board/tny_a9g20_lpw/nandflash/Makefile
create mode 100644 board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
create mode 100644 board/tny_a9g20_lpw/tny_a9g20_lpw.c
diff --git a/board/tny_a9g20_lpw/nandflash/Makefile b/board/tny_a9g20_lpw/nandflash/Makefile
new file mode 100644
index 0000000..7efbea7
--- /dev/null
+++ b/board/tny_a9g20_lpw/nandflash/Makefile
@@ -0,0 +1,121 @@
+# TODO: set this appropriately for your local toolchain
+ifndef ERASE_FCT
+ERASE_FCT=rm -f
+endif
+ifndef CROSS_COMPILE
+CROSS_COMPILE=arm-elf-
+endif
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# NandFlashBoot Configuration for AT91SAM9260EK
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9G20
+# Board name (case sensitive!!!)
+BOARD=tny_a9g20_lpw
+# Link Address and Top_of_Memory
+LINK_ADDR=0x200000
+TOP_OF_MEMORY=0x301000
+# Name of current directory
+PROJECT=nandflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ nandflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ $(ERASE_FCT) *.o *.bin *.elf *.map
diff --git a/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
new file mode 100644
index 0000000..b1f8a1d
--- /dev/null
+++ b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
@@ -0,0 +1,114 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : tny-a9g20-lpw.h
+ * Object :
+ * Creation : GH August 13th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _TNY_A9G20_LPW_H
+#define _TNY_A9G20_LPW_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (100000000)
+#define PLL_LOCK_TIMEOUT 1000000
+
+/* set PLLA to 800Mhz from MAINCK= 12Mhz MULA=199 (0xC7+1= 200), DIVA=0x03 (Fplla=12Mhz x [(199+1)/3]=800Mhz) */
+#define PLLA_SETTINGS 0x20C73F03
+#define PLLB_SETTINGS 0x100F3F02
+
+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
+/* LP-SDRAM (fmax=100Mhz) PDIV=0 => PRESCALER CLK=PCLK; */
+/* MDIV = 2 => PRESCALER CLK / 4 = MCLK=100Mhz */
+/* PRESCALER CLK = PLLA (800Mhz) / 2 (PRES=1) = 400Mhz */
+#define MCKR_SETTINGS 0x0204
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* NandFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SMARTMEDIA_BASE 0x40000000
+
+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
+
+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
+
+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
+
+
+/* ******************************************************************** */
+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 100000000.*/
+/* Please refer to SMC section in AT91SAM9 datasheet to learn how */
+/* to generate these values. */
+/* ******************************************************************** */
+#define AT91C_SM_NWE_SETUP (1 << 0)
+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
+#define AT91C_SM_NRD_SETUP (1 << 16)
+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
+
+#define AT91C_SM_NWE_PULSE (3 << 0)
+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
+#define AT91C_SM_NRD_PULSE (3 << 16)
+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
+
+#define AT91C_SM_NWE_CYCLE (5 << 0)
+#define AT91C_SM_NRD_CYCLE (5 << 16)
+
+#define AT91C_SM_TDF (2 << 16)
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
+
+#define MACH_TYPE 0x80B /* TNY-A9G20 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#undef CFG_DEBUG
+#undef CFG_DATAFLASH
+
+#define CFG_NANDFLASH
+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
+
+#define CFG_SDRAM
+#define CFG_HW_INIT
+
+#endif /* _TNY_A9G20_LPW_H */
diff --git a/board/tny_a9g20_lpw/tny_a9g20_lpw.c b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
new file mode 100644
index 0000000..cef9055
--- /dev/null
+++ b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
@@ -0,0 +1,243 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : tny_a9g20_lpw.c
+ * Object :
+ * Creation : GH August 13th 2012
+ *-----------------------------------------------------------------------------
+ */
+#include "../../include/part.h"
+#include "../../include/gpio.h"
+#include "../../include/pmc.h"
+#include "../../include/debug.h"
+#include "../../include/sdramc.h"
+#include "../../include/main.h"
+#ifdef CFG_NANDFLASH
+#include "../../include/nandflash.h"
+#endif
+
+static inline unsigned int get_cp15(void)
+{
+ unsigned int value;
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
+ return value;
+}
+
+static inline void set_cp15(unsigned int value)
+{
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
+}
+
+#ifdef CFG_HW_INIT
+/*----------------------------------------------------------------------------*/
+/* \fn hw_init */
+/* \brief This function performs very low level HW initialization */
+/* This function is invoked as soon as possible during the c_startup */
+/* The bss segment must be initialized */
+/*----------------------------------------------------------------------------*/
+void hw_init(void)
+{
+ unsigned int cp15;
+
+ /* Configure PIOs */
+ const struct pio_desc hw_pio[] = {
+#ifdef CFG_DEBUG
+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Disable watchdog */
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
+
+ /* At this stage the main oscillator is supposed to be enabled
+ * PCK = MCK = MOSC */
+ writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
+
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* PCK = PLLA/2 = 3 * MCK */
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
+ /* Switch MCK on PLLA output */
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure PLLB */
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure CP15 */
+ cp15 = get_cp15();
+ cp15 |= I_CACHE;
+ set_cp15(cp15);
+
+ /* Configure the PIO controller */
+ pio_setup(hw_pio);
+
+ /* Configure the EBI Slave Slot Cycle to 64 */
+ writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
+
+#ifdef CFG_DEBUG
+ /* Enable Debug messages on the DBGU */
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
+
+ dbg_print("Start AT91Bootstrap...\n\r");
+#endif /* CFG_DEBUG */
+
+#ifdef CFG_SDRAM
+ /* Initialize the matrix (slow slew rate enabled and LPSDRAM memory voltage = 1.8V) */
+ writel(((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<17)) & ~0x00010000, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SDRAM Controller */
+ sdram_init( AT91C_SDRAMC_NC_9 |
+ AT91C_SDRAMC_NR_13 |
+ AT91C_SDRAMC_CAS_3 |
+ AT91C_SDRAMC_NB_4_BANKS |
+ AT91C_SDRAMC_DBW_32_BITS |
+ AT91C_SDRAMC_TWR_2 |
+ AT91C_SDRAMC_TRC_7 |
+ AT91C_SDRAMC_TRP_2 |
+ AT91C_SDRAMC_TRCD_2 |
+ AT91C_SDRAMC_TRAS_5 |
+ AT91C_SDRAMC_TXSR_8, /* Control Register */
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
+ AT91C_SDRAMC_MD_LOW_POWER_SDRAM); /* SDRAM (low power) */
+
+#endif /* CFG_SDRAM */
+}
+#endif /* CFG_HW_INIT */
+
+#ifdef CFG_SDRAM
+/*------------------------------------------------------------------------------*/
+/* \fn sdramc_hw_init */
+/* \brief This function performs SDRAMC HW initialization */
+/*------------------------------------------------------------------------------*/
+void sdramc_hw_init(void)
+{
+ /* Configure PIOs */
+/* const struct pio_desc sdramc_pio[] = {
+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+*/
+ /* Configure the SDRAMC PIO controller to output PCK0 */
+/* pio_setup(sdramc_pio); */
+
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
+
+}
+#endif /* CFG_SDRAM */
+
+#ifdef CFG_NANDFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn nand_recovery */
+/* \brief This function erases NandFlash Block 0 if BP4 is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+static void nand_recovery(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc bp4_pio[] = {
+ {"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(bp4_pio);
+
+ /* If BP4 is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if (!pio_get_value(AT91C_PIN_PA(31)) )
+ AT91F_NandEraseBlock0();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_hw_init */
+/* \brief NandFlash HW init */
+/*------------------------------------------------------------------------------*/
+void nandflash_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc nand_pio[] = {
+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SMC CS3 */
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(nand_pio);
+
+ nand_recovery();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_16bits_dbw_init */
+/* \brief Configure SMC in 16 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_16bits_dbw_init(void)
+{
+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_8bits_dbw_init */
+/* \brief Configure SMC in 8 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_8bits_dbw_init(void)
+{
+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+#endif /* #ifdef CFG_NANDFLASH */
diff --git a/crt0_gnu.S b/crt0_gnu.S
index 042b617..c6cd49d 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -106,6 +106,12 @@ _relocate_to_sram:
#endif /* CFG_NORFLASH */
_setup_clocks:
+/* Test if main osc is bypassed */
+ ldr r0,=AT91C_PMC_MOR
+ ldr r1, [r0]
+ ldr r2,=AT91C_CKGR_OSCBYPASS
+ ands r1, r1, r2
+ bne _init_data /* branch if OSCBYPASS=1 */
/* Test if main oscillator is enabled */
ldr r0,=AT91C_PMC_SR
ldr r1, [r0]
diff --git a/include/part.h b/include/part.h
index ba5985a..ab79af1 100644
--- a/include/part.h
+++ b/include/part.h
@@ -46,7 +46,11 @@
#ifdef AT91SAM9G20
#include "AT91SAM9260_inc.h"
-#include "at91sam9g20ek.h"
+ #ifdef at91sam9g20ek
+ #include "at91sam9g20ek.h"
+ #elif tny_a9g20_lpw
+ #include "tny-a9g20-lpw.h"
+ #endif
#endif
#ifdef AT91SAM9261
--
1.7.9.5

View File

@@ -1,187 +0,0 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_SOC_AT91SAM9260=y
CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y
CONFIG_SOC_AT91SAM9N12=y
CONFIG_MACH_AT91SAM_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_TIMER_HZ=128
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
CONFIG_EEPROM_93CX6=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_DAVICOM_PHY=y
CONFIG_MICREL_PHY=y
# CONFIG_WLAN is not set
CONFIG_INPUT_POLLDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_SERIO is not set
CONFIG_LEGACY_PTY_COUNT=4
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SSB=m
CONFIG_FB=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_ATMEL_LCDC=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_FONT_MINI_4x6=y
CONFIG_LOGO=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
CONFIG_USB_AT91=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_ACM_MS=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=y
CONFIG_MMC_SPI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_DMADEVICES=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ARC4=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=m
CONFIG_AVERAGE=y

View File

@@ -1,603 +0,0 @@
From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
From: Gregory Hermant <gregory.hermant@calao-systems.com>
Date: Tue, 2 Oct 2012 09:19:15 +0200
Subject: [PATCH] Add support for the USB-A9260
Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
board/usb_a9260/nandflash/Makefile | 122 ++++++++++++++
board/usb_a9260/nandflash/usb-a9260.h | 109 ++++++++++++
board/usb_a9260/usb_a9260.c | 298 +++++++++++++++++++++++++++++++++
crt0_gnu.S | 7 +
include/part.h | 6 +-
5 files changed, 541 insertions(+), 1 deletion(-)
create mode 100644 board/usb_a9260/nandflash/Makefile
create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
create mode 100644 board/usb_a9260/usb_a9260.c
diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
new file mode 100644
index 0000000..02f4b50
--- /dev/null
+++ b/board/usb_a9260/nandflash/Makefile
@@ -0,0 +1,122 @@
+# TODO: set this appropriately for your local toolchain
+ifndef ERASE_FCT
+ERASE_FCT=rm -f
+endif
+ifndef CROSS_COMPILE
+CROSS_COMPILE=arm-elf-
+endif
+
+TOOLCHAIN=gcc
+
+BOOTSTRAP_PATH=../../..
+
+# NandFlashBoot Configuration for USB-A9260
+
+# Target name (case sensitive!!!)
+TARGET=AT91SAM9260
+# Board name (case sensitive!!!)
+BOARD=usb_a9260
+# Link Address and Top_of_Memory
+LINK_ADDR=0x200000
+TOP_OF_MEMORY=0x301000
+# Name of current directory
+PROJECT=nandflash
+
+ifndef BOOT_NAME
+BOOT_NAME=$(PROJECT)_$(BOARD)
+endif
+
+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
+
+ifeq ($(TOOLCHAIN), gcc)
+
+AS=$(CROSS_COMPILE)gcc
+CC=$(CROSS_COMPILE)gcc
+LD=$(CROSS_COMPILE)gcc
+NM= $(CROSS_COMPILE)nm
+SIZE=$(CROSS_COMPILE)size
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
+
+# Linker flags.
+# -Wl,...: tell GCC to pass this to linker.
+# -Map: create map file
+# --cref: add cross reference to map file
+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
+OBJS=crt0_gnu.o
+
+endif
+
+OBJS+=\
+ $(BOARD).o \
+ main.o \
+ gpio.o \
+ pmc.o \
+ debug.o \
+ sdramc.o \
+ nandflash.o \
+ _udivsi3.o \
+ _umodsi3.o \
+ div0.o \
+ udiv.o \
+ string.o
+
+
+rebuild: clean all
+
+all: $(BOOT_NAME)
+
+ifeq ($(TOOLCHAIN), gcc)
+$(BOOT_NAME): $(OBJS)
+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
+endif
+
+
+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
+
+main.o: $(BOOTSTRAP_PATH)/main.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
+
+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
+
+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
+
+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
+
+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
+
+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
+
+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
+
+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
+
+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
+
+string.o: $(BOOTSTRAP_PATH)/lib/string.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
+
+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
+
+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
+
+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
+
+clean:
+ $(ERASE_FCT) *.o *.bin *.elf *.map
diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
new file mode 100644
index 0000000..2aaf759
--- /dev/null
+++ b/board/usb_a9260/nandflash/usb-a9260.h
@@ -0,0 +1,109 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb-a9260.h
+ * Object :
+ * Creation : GH Oct 1th 2012
+ *-----------------------------------------------------------------------------
+ */
+#ifndef _USB_A9260_H
+#define _USB_A9260_H
+
+/* ******************************************************************* */
+/* PMC Settings */
+/* */
+/* The main oscillator is enabled as soon as possible in the c_startup */
+/* and MCK is switched on the main oscillator. */
+/* PLL initialization is done later in the hw_init() function */
+/* ******************************************************************* */
+#define MASTER_CLOCK (180000000/2)
+#define PLL_LOCK_TIMEOUT 1000000
+
+#define PLLA_SETTINGS 0x20593F06
+#define PLLB_SETTINGS 0x10483F0E
+
+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
+
+/* ******************************************************************* */
+/* NandFlash Settings */
+/* */
+/* ******************************************************************* */
+#define AT91C_SMARTMEDIA_BASE 0x40000000
+
+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
+
+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
+
+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
+
+
+/* ******************************************************************** */
+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
+/* Please refer to SMC section in AT91SAM datasheet to learn how */
+/* to generate these values. */
+/* ******************************************************************** */
+#define AT91C_SM_NWE_SETUP (1 << 0)
+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
+#define AT91C_SM_NRD_SETUP (1 << 16)
+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
+
+#define AT91C_SM_NWE_PULSE (3 << 0)
+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
+#define AT91C_SM_NRD_PULSE (3 << 16)
+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
+
+#define AT91C_SM_NWE_CYCLE (5 << 0)
+#define AT91C_SM_NRD_CYCLE (5 << 16)
+#define AT91C_SM_TDF (2 << 16)
+
+/* ******************************************************************* */
+/* BootStrap Settings */
+/* */
+/* ******************************************************************* */
+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
+
+#define MACH_TYPE 0x6AD /* USB-A9260 */
+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
+
+/* ******************************************************************* */
+/* Application Settings */
+/* ******************************************************************* */
+#undef CFG_DEBUG
+#undef CFG_DATAFLASH
+
+#define CFG_NANDFLASH
+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
+
+#define CFG_HW_INIT
+#define CFG_SDRAM
+
+#endif /* _USB_A9260_H */
diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
new file mode 100644
index 0000000..de30f0b
--- /dev/null
+++ b/board/usb_a9260/usb_a9260.c
@@ -0,0 +1,298 @@
+/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support - ROUSSET -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaiimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ * File Name : usb_a9260.c
+ * Object :
+ * Creation : GH Oct 1th 2012
+ *-----------------------------------------------------------------------------
+ */
+#include "../../include/part.h"
+#include "../../include/gpio.h"
+#include "../../include/pmc.h"
+#include "../../include/debug.h"
+#include "../../include/sdramc.h"
+#include "../../include/main.h"
+#ifdef CFG_NANDFLASH
+#include "../../include/nandflash.h"
+#endif
+#ifdef CFG_DATAFLASH
+#include "../../include/dataflash.h"
+#endif
+
+static inline unsigned int get_cp15(void)
+{
+ unsigned int value;
+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
+ return value;
+}
+
+static inline void set_cp15(unsigned int value)
+{
+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
+}
+
+#ifdef CFG_HW_INIT
+/*----------------------------------------------------------------------------*/
+/* \fn hw_init */
+/* \brief This function performs very low level HW initialization */
+/* This function is invoked as soon as possible during the c_startup */
+/* The bss segment must be initialized */
+/*----------------------------------------------------------------------------*/
+void hw_init(void)
+{
+ unsigned int cp15;
+
+ /* Configure PIOs */
+ const struct pio_desc hw_pio[] = {
+#ifdef CFG_DEBUG
+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Disable watchdog */
+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
+
+ /* At this stage the main oscillator is supposed to be enabled
+ * PCK = MCK = MOSC */
+
+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* PCK = PLLA = 2 * MCK */
+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
+ /* Switch MCK on PLLA output */
+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure PLLB */
+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
+
+ /* Configure CP15 */
+ cp15 = get_cp15();
+ cp15 |= I_CACHE;
+ set_cp15(cp15);
+
+ /* Configure the PIO controller */
+ pio_setup(hw_pio);
+
+ /* Configure the EBI Slave Slot Cycle to 64 */
+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
+
+#ifdef CFG_DEBUG
+ /* Enable Debug messages on the DBGU */
+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
+
+ dbg_print("Start AT91Bootstrap...\n\r");
+#endif /* CFG_DEBUG */
+
+#ifdef CFG_SDRAM
+ /* Initialize the matrix */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SDRAM Controller */
+ sdram_init( AT91C_SDRAMC_NC_9 |
+ AT91C_SDRAMC_NR_13 |
+ AT91C_SDRAMC_CAS_2 |
+ AT91C_SDRAMC_NB_4_BANKS |
+ AT91C_SDRAMC_DBW_32_BITS |
+ AT91C_SDRAMC_TWR_2 |
+ AT91C_SDRAMC_TRC_7 |
+ AT91C_SDRAMC_TRP_2 |
+ AT91C_SDRAMC_TRCD_2 |
+ AT91C_SDRAMC_TRAS_5 |
+ AT91C_SDRAMC_TXSR_8, /* Control Register */
+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
+
+
+#endif /* CFG_SDRAM */
+}
+#endif /* CFG_HW_INIT */
+
+#ifdef CFG_SDRAM
+/*------------------------------------------------------------------------------*/
+/* \fn sdramc_hw_init */
+/* \brief This function performs SDRAMC HW initialization */
+/*------------------------------------------------------------------------------*/
+void sdramc_hw_init(void)
+{
+ /* Configure PIOs */
+/* const struct pio_desc sdramc_pio[] = {
+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+*/
+ /* Configure the SDRAMC PIO controller to output PCK0 */
+/* pio_setup(sdramc_pio); */
+
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
+
+}
+#endif /* CFG_SDRAM */
+
+#ifdef CFG_DATAFLASH
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_recovery */
+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+void df_recovery(AT91PS_DF pDf)
+{
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USR PB is pressed during Boot sequence */
+ /* Erase DataFlash Page 0*/
+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
+ df_page_erase(pDf, 0);
+#endif
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn df_hw_init */
+/* \brief This function performs DataFlash HW initialization */
+/*------------------------------------------------------------------------------*/
+void df_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc df_pio[] = {
+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
+#endif
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ pio_setup(df_pio);
+}
+#endif /* CFG_DATAFLASH */
+
+
+
+#ifdef CFG_NANDFLASH
+/*------------------------------------------------------------------------------*/
+/* \fn nand_recovery */
+/* \brief This function erases NandFlash Block 0 if USR PB is pressed */
+/* during boot sequence */
+/*------------------------------------------------------------------------------*/
+static void nand_recovery(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc usrpb_pio[] = {
+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(usrpb_pio);
+
+ /* If USR PB is pressed during Boot sequence */
+ /* Erase NandFlash block 0*/
+ if (!pio_get_value(AT91C_PIN_PB(10)) )
+ AT91F_NandEraseBlock0();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_hw_init */
+/* \brief NandFlash HW init */
+/*------------------------------------------------------------------------------*/
+void nandflash_hw_init(void)
+{
+ /* Configure PIOs */
+ const struct pio_desc nand_pio[] = {
+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+ };
+
+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
+
+ /* Configure SMC CS3 */
+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
+ pio_setup(nand_pio);
+
+ nand_recovery();
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_16bits_dbw_init */
+/* \brief Configure SMC in 16 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_16bits_dbw_init(void)
+{
+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+/*------------------------------------------------------------------------------*/
+/* \fn nandflash_cfg_8bits_dbw_init */
+/* \brief Configure SMC in 8 bits mode */
+/*------------------------------------------------------------------------------*/
+void nandflash_cfg_8bits_dbw_init(void)
+{
+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
+}
+
+
+#endif /* #ifdef CFG_NANDFLASH */
diff --git a/crt0_gnu.S b/crt0_gnu.S
index 042b617..002feef 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -106,6 +106,13 @@ _relocate_to_sram:
#endif /* CFG_NORFLASH */
_setup_clocks:
+/* Test if main osc is bypassed */
+ ldr r0,=AT91C_PMC_MOR
+ ldr r1, [r0]
+ ldr r2,=AT91C_CKGR_OSCBYPASS
+ ands r1, r1, r2
+ bne _init_data /* branch if OSCBYPASS=1 */
+
/* Test if main oscillator is enabled */
ldr r0,=AT91C_PMC_SR
ldr r1, [r0]
diff --git a/include/part.h b/include/part.h
index ba5985a..212789f 100644
--- a/include/part.h
+++ b/include/part.h
@@ -35,7 +35,11 @@
#ifdef AT91SAM9260
#include "AT91SAM9260_inc.h"
-#include "at91sam9260ek.h"
+ #ifdef at91sam9260ek
+ #include "at91sam9260ek.h"
+ #elif usb_a9260
+ #include "usb-a9260.h"
+ #endif
#endif
#ifdef AT91SAM9XE
--
1.7.9.5

View File

@@ -1,97 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9260=y
CONFIG_MACH_USB_A9260=y
CONFIG_AT91_SLOW_CLOCK=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_EXT2_FS=y
CONFIG_FUSE_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

View File

@@ -1,2 +0,0 @@
set bootargs console=ttymxc1,115200 root=/dev/mmcblk0p1 rootwait consoleblank=0
${fs}load mmc ${disk}:1 10800000 /boot/uImage && bootm 10800000 ; echo "Error loading kernel image"

View File

@@ -1,7 +0,0 @@
#!/bin/sh
TARGET_DIR=$1
BOARD_DIR="$(dirname $0)"
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "boot script" \
-d $BOARD_DIR/6q_bootscript.txt $TARGET_DIR/6q_bootscript

View File

@@ -1,36 +0,0 @@
This is the minimal buildroot support for the Congatec QMX6 Qseven CoM
conga-QMX6 is based on the freescale iMX6 SoC. For more information please
have a look at http://www.congatec.com/products/qseven/conga-qmx6.html
The configuration is based on the currently latest kernel release from
Congatec's git repository which is based on 3.0.35. The bootloader u-boot
is preconfigured on the CPU module and does not need to be replaced.
To build the default configuration you only have to:
make qmx6_defconfig && make
You will need a microSD card of sufficient size and the first or only
partition configured as Linux type.
To transfer the system to the card do:
$ sudo dd if=output/images/rootfs.ext2 of=/dev/sdX1
You can optionally extend the filesystem size to the whole partition:
$ sudo resize2fs /dev/sdX1
You can also update the card image without completely rewriting it:
$ sudo mount /dev/sdX1 /mnt
$ sudo tar xf output/images/rootfs.tar -C /mnt
$ sudo umount /mnt
Connect a terminal program to the rs232 connector marked "CONSOLE"
with baudrate set to 115200, insert the microSD card into the socket
on the CPU module and power the board to watch the system boot.
Booting from the SD card slot on the base board is currently not
supported.

View File

@@ -1,4 +0,0 @@
setenv bootargs console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait panic=10 ${extra}
fatload mmc 0 0x43000000 script.bin
fatload mmc 0 0x48000000 uImage
bootm 0x48000000

View File

@@ -1,749 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_AUDIT=y
CONFIG_IRQ_DOMAIN_DEBUG=y
CONFIG_RCU_FAST_NO_HZ=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=19
CONFIG_CGROUPS=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_RESOURCE_COUNTERS=y
CONFIG_CGROUP_MEM_RES_CTLR=y
CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
CONFIG_CGROUP_MEM_RES_CTLR_KMEM=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_CGROUP=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PERF_COUNTERS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_JUMP_LABEL=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_OSF_PARTITION=y
CONFIG_AMIGA_PARTITION=y
CONFIG_MAC_PARTITION=y
CONFIG_BSD_DISKLABEL=y
CONFIG_MINIX_SUBPARTITION=y
CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_SGI_PARTITION=y
CONFIG_SUN_PARTITION=y
CONFIG_KARMA_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_CFQ_GROUP_IOSCHED=y
CONFIG_ARCH_SUN7I=y
CONFIG_SUNXI_SCALING_MIN=408
# CONFIG_CACHE_L2X0 is not set
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_SMP=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_NR_CPUS=2
CONFIG_PREEMPT=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y
CONFIG_COMPACTION=y
CONFIG_KSM=y
CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/mmc0p1 rw init=/init loglevel=8"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT=m
CONFIG_CPU_FREQ_DEFAULT_GOV_FANTASY=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=m
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
CONFIG_CPU_FREQ_USR_EVNT_NOTIFY=y
CONFIG_CPU_FREQ_DVFS=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_BINFMT_MISC=y
CONFIG_PM_RUNTIME=y
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_FIB_TRIE_STATS=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NET_IPIP=y
CONFIG_NET_IPGRE_DEMUX=m
CONFIG_NET_IPGRE=m
CONFIG_NET_IPGRE_BROADCAST=y
CONFIG_IP_MROUTE=y
CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_ARPD=y
CONFIG_SYN_COOKIES=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
CONFIG_INET_DIAG=m
CONFIG_INET_UDP_DIAG=m
CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_BIC=y
CONFIG_TCP_CONG_WESTWOOD=y
CONFIG_TCP_CONG_HTCP=y
CONFIG_TCP_CONG_HSTCP=y
CONFIG_TCP_CONG_HYBLA=y
CONFIG_TCP_CONG_SCALABLE=y
CONFIG_TCP_CONG_LP=y
CONFIG_TCP_CONG_VENO=y
CONFIG_TCP_CONG_YEAH=y
CONFIG_TCP_CONG_ILLINOIS=y
CONFIG_TCP_MD5SIG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_MIP6=m
CONFIG_INET6_XFRM_MODE_TRANSPORT=m
CONFIG_INET6_XFRM_MODE_TUNNEL=m
CONFIG_INET6_XFRM_MODE_BEET=m
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
CONFIG_IPV6_SIT=m
CONFIG_IPV6_SIT_6RD=y
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_IPV6_MROUTE=y
CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
CONFIG_IPV6_PIMSM_V2=y
# CONFIG_ANDROID_PARANOID_NETWORK is not set
CONFIG_NETWORK_SECMARK=y
CONFIG_NETWORK_PHY_TIMESTAMPING=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_ZONES=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CONNTRACK_TIMEOUT=y
CONFIG_NF_CONNTRACK_TIMESTAMP=y
CONFIG_NF_CT_PROTO_DCCP=m
CONFIG_NF_CT_PROTO_SCTP=m
CONFIG_NF_CT_PROTO_UDPLITE=m
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
CONFIG_NF_CONNTRACK_IRC=m
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
CONFIG_NF_CONNTRACK_SNMP=m
CONFIG_NF_CONNTRACK_PPTP=m
CONFIG_NF_CONNTRACK_SANE=m
CONFIG_NF_CONNTRACK_SIP=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NF_CT_NETLINK=m
CONFIG_NF_CT_NETLINK_TIMEOUT=m
CONFIG_NETFILTER_TPROXY=m
CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_AUDIT=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
CONFIG_NETFILTER_XT_TARGET_CT=m
CONFIG_NETFILTER_XT_TARGET_DSCP=m
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
CONFIG_NETFILTER_XT_TARGET_LED=m
CONFIG_NETFILTER_XT_TARGET_LOG=m
CONFIG_NETFILTER_XT_TARGET_MARK=m
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
CONFIG_NETFILTER_XT_TARGET_TEE=m
CONFIG_NETFILTER_XT_TARGET_TPROXY=m
CONFIG_NETFILTER_XT_TARGET_TRACE=m
CONFIG_NETFILTER_XT_TARGET_SECMARK=m
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
CONFIG_NETFILTER_XT_MATCH_CPU=m
CONFIG_NETFILTER_XT_MATCH_DCCP=m
CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
CONFIG_NETFILTER_XT_MATCH_DSCP=m
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
CONFIG_NETFILTER_XT_MATCH_IPVS=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MARK=m
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
CONFIG_NETFILTER_XT_MATCH_NFACCT=m
CONFIG_NETFILTER_XT_MATCH_OSF=m
CONFIG_NETFILTER_XT_MATCH_OWNER=m
CONFIG_NETFILTER_XT_MATCH_POLICY=m
CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
CONFIG_NETFILTER_XT_MATCH_QUOTA=m
CONFIG_NETFILTER_XT_MATCH_QUOTA2=m
CONFIG_NETFILTER_XT_MATCH_RATEEST=m
CONFIG_NETFILTER_XT_MATCH_REALM=m
CONFIG_NETFILTER_XT_MATCH_RECENT=m
CONFIG_NETFILTER_XT_MATCH_SCTP=m
CONFIG_NETFILTER_XT_MATCH_SOCKET=m
CONFIG_NETFILTER_XT_MATCH_STATE=m
CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
CONFIG_NETFILTER_XT_MATCH_STRING=m
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
CONFIG_NETFILTER_XT_MATCH_TIME=m
CONFIG_NETFILTER_XT_MATCH_U32=m
CONFIG_IP_SET=m
CONFIG_IP_SET_BITMAP_IP=m
CONFIG_IP_SET_BITMAP_IPMAC=m
CONFIG_IP_SET_BITMAP_PORT=m
CONFIG_IP_SET_HASH_IP=m
CONFIG_IP_SET_HASH_IPPORT=m
CONFIG_IP_SET_HASH_IPPORTIP=m
CONFIG_IP_SET_HASH_IPPORTNET=m
CONFIG_IP_SET_HASH_NET=m
CONFIG_IP_SET_HASH_NETPORT=m
CONFIG_IP_SET_HASH_NETIFACE=m
CONFIG_IP_SET_LIST_SET=m
CONFIG_IP_VS=m
CONFIG_IP_VS_IPV6=y
CONFIG_IP_VS_PROTO_TCP=y
CONFIG_IP_VS_PROTO_UDP=y
CONFIG_IP_VS_PROTO_ESP=y
CONFIG_IP_VS_PROTO_AH=y
CONFIG_IP_VS_PROTO_SCTP=y
CONFIG_IP_VS_RR=m
CONFIG_IP_VS_WRR=m
CONFIG_IP_VS_LC=m
CONFIG_IP_VS_WLC=m
CONFIG_IP_VS_LBLC=m
CONFIG_IP_VS_LBLCR=m
CONFIG_IP_VS_DH=m
CONFIG_IP_VS_SH=m
CONFIG_IP_VS_SED=m
CONFIG_IP_VS_NQ=m
CONFIG_IP_VS_FTP=m
CONFIG_IP_VS_PE_SIP=m
CONFIG_NF_CONNTRACK_IPV4=m
CONFIG_IP_NF_QUEUE=m
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_RPFILTER=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_REJECT_SKERR=y
CONFIG_IP_NF_TARGET_ULOG=m
CONFIG_NF_NAT=m
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_NF_CONNTRACK_IPV6=m
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
CONFIG_IP6_NF_MATCH_AH=m
CONFIG_IP6_NF_MATCH_EUI64=m
CONFIG_IP6_NF_MATCH_FRAG=m
CONFIG_IP6_NF_MATCH_OPTS=m
CONFIG_IP6_NF_MATCH_HL=m
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
CONFIG_IP6_NF_MATCH_MH=m
CONFIG_IP6_NF_MATCH_RPFILTER=m
CONFIG_IP6_NF_MATCH_RT=m
CONFIG_IP6_NF_TARGET_HL=m
CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_TARGET_REJECT=m
CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
CONFIG_IP6_NF_MANGLE=m
CONFIG_IP6_NF_RAW=m
CONFIG_BRIDGE_NF_EBTABLES=m
CONFIG_BRIDGE_EBT_BROUTE=m
CONFIG_BRIDGE_EBT_T_FILTER=m
CONFIG_BRIDGE_EBT_T_NAT=m
CONFIG_BRIDGE_EBT_802_3=m
CONFIG_BRIDGE_EBT_AMONG=m
CONFIG_BRIDGE_EBT_ARP=m
CONFIG_BRIDGE_EBT_IP=m
CONFIG_BRIDGE_EBT_IP6=m
CONFIG_BRIDGE_EBT_LIMIT=m
CONFIG_BRIDGE_EBT_MARK=m
CONFIG_BRIDGE_EBT_PKTTYPE=m
CONFIG_BRIDGE_EBT_STP=m
CONFIG_BRIDGE_EBT_VLAN=m
CONFIG_BRIDGE_EBT_ARPREPLY=m
CONFIG_BRIDGE_EBT_DNAT=m
CONFIG_BRIDGE_EBT_MARK_T=m
CONFIG_BRIDGE_EBT_REDIRECT=m
CONFIG_BRIDGE_EBT_SNAT=m
CONFIG_BRIDGE_EBT_LOG=m
CONFIG_BRIDGE_EBT_ULOG=m
CONFIG_BRIDGE_EBT_NFLOG=m
CONFIG_L2TP=m
CONFIG_L2TP_V3=y
CONFIG_L2TP_IP=m
CONFIG_L2TP_ETH=m
CONFIG_BRIDGE=m
CONFIG_VLAN_8021Q=m
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_BATMAN_ADV=m
CONFIG_OPENVSWITCH=m
CONFIG_NETPRIO_CGROUP=m
CONFIG_NET_PKTGEN=m
CONFIG_IRDA=m
CONFIG_IRLAN=m
CONFIG_IRNET=m
CONFIG_IRCOMM=m
CONFIG_IRDA_ULTRA=y
CONFIG_IRTTY_SIR=m
CONFIG_KINGSUN_DONGLE=m
CONFIG_KSDAZZLE_DONGLE=m
CONFIG_KS959_DONGLE=m
CONFIG_USB_IRDA=m
CONFIG_SIGMATEL_FIR=m
CONFIG_MCS_FIR=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIBTSDIO=m
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
CONFIG_BT_MRVL=m
CONFIG_BT_MRVL_SDIO=m
CONFIG_BT_ATH3K=m
CONFIG_AF_RXRPC=m
CONFIG_RXKAD=m
CONFIG_CFG80211=y
CONFIG_CFG80211_DEVELOPER_WARNINGS=y
CONFIG_WIRELESS_EXT_SYSFS=y
CONFIG_LIB80211=m
CONFIG_CFG80211_ALLOW_RECONNECT=y
CONFIG_MAC80211=m
CONFIG_MAC80211_MESH=y
CONFIG_WIMAX=m
CONFIG_RFKILL=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_CONNECTOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_CRYPTOLOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_SUNXI_DBGREG=m
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_ATA=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_SW_SATA_AHCI_PLATFORM=y
CONFIG_NETDEVICES=y
CONFIG_BONDING=m
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_SUNXI_EMAC=y
CONFIG_PHYLIB=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPPOE=m
CONFIG_PPPOLAC=m
CONFIG_PPPOPNS=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_USB_IPHETH=m
CONFIG_ATH_COMMON=m
CONFIG_ATH9K=m
CONFIG_RTL8192CU=m
CONFIG_RTL8192CU_SW=m
CONFIG_RTL8188EU=m
CONFIG_RTXX7X_SW=m
CONFIG_INPUT_POLLDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_KEYRESET=y
CONFIG_KEYBOARD_HV2605_KEYBOARD=m
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_GT801=m
CONFIG_TOUCHSCREEN_GT811=m
CONFIG_TOUCHSCREEN_GT818=m
CONFIG_TOUCHSCREEN_FT5X_TS=m
CONFIG_TOUCHSCREEN_ZT8031=m
CONFIG_GSENSOR=y
CONFIG_SENSORS_BMA250=m
CONFIG_MEMSIC_ECOMPASS=m
CONFIG_SENSORS_MXC622X=m
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=8
CONFIG_SERIAL_8250_RUNTIME_UARTS=8
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_SPI=y
CONFIG_SPI_DEBUG=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_SUNXI=m
CONFIG_POWER_SUPPLY=y
CONFIG_AW_AXP=y
# CONFIG_HWMON is not set
CONFIG_REGULATOR=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_VIDEO_DEV=y
CONFIG_MEDIA_TUNER_CUSTOMISE=y
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
# CONFIG_MEDIA_TUNER_TDA18212 is not set
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_M5602=m
CONFIG_USB_STV06XX=m
CONFIG_USB_GL860=m
CONFIG_USB_GSPCA_BENQ=m
CONFIG_USB_GSPCA_CONEX=m
CONFIG_USB_GSPCA_CPIA1=m
CONFIG_USB_GSPCA_ETOMS=m
CONFIG_USB_GSPCA_FINEPIX=m
CONFIG_USB_GSPCA_JEILINJ=m
CONFIG_USB_GSPCA_JL2005BCD=m
CONFIG_USB_GSPCA_KINECT=m
CONFIG_USB_GSPCA_KONICA=m
CONFIG_USB_GSPCA_MARS=m
CONFIG_USB_GSPCA_MR97310A=m
CONFIG_USB_GSPCA_NW80X=m
CONFIG_USB_GSPCA_OV519=m
CONFIG_USB_GSPCA_OV534=m
CONFIG_USB_GSPCA_OV534_9=m
CONFIG_USB_GSPCA_PAC207=m
CONFIG_USB_GSPCA_PAC7302=m
CONFIG_USB_GSPCA_PAC7311=m
CONFIG_USB_GSPCA_SE401=m
CONFIG_USB_GSPCA_SN9C2028=m
CONFIG_USB_GSPCA_SN9C20X=m
CONFIG_USB_GSPCA_SONIXB=m
CONFIG_USB_GSPCA_SONIXJ=m
CONFIG_USB_GSPCA_SPCA500=m
CONFIG_USB_GSPCA_SPCA501=m
CONFIG_USB_GSPCA_SPCA505=m
CONFIG_USB_GSPCA_SPCA506=m
CONFIG_USB_GSPCA_SPCA508=m
CONFIG_USB_GSPCA_SPCA561=m
CONFIG_USB_GSPCA_SPCA1528=m
CONFIG_USB_GSPCA_SQ905=m
CONFIG_USB_GSPCA_SQ905C=m
CONFIG_USB_GSPCA_SQ930X=m
CONFIG_USB_GSPCA_STK014=m
CONFIG_USB_GSPCA_STV0680=m
CONFIG_USB_GSPCA_SUNPLUS=m
CONFIG_USB_GSPCA_T613=m
CONFIG_USB_GSPCA_TOPRO=m
CONFIG_USB_GSPCA_TV8532=m
CONFIG_USB_GSPCA_VC032X=m
CONFIG_USB_GSPCA_VICAM=m
CONFIG_USB_GSPCA_XIRLINK_CIT=m
CONFIG_USB_GSPCA_ZC3XX=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_EM28XX=m
CONFIG_VIDEO_EM28XX_ALSA=m
CONFIG_VIDEO_CX231XX=m
CONFIG_VIDEO_CX231XX_ALSA=m
CONFIG_VIDEO_TM6000=m
CONFIG_VIDEO_TM6000_ALSA=m
CONFIG_VIDEO_USBVISION=m
CONFIG_USB_ET61X251=m
CONFIG_USB_SN9C102=m
CONFIG_USB_PWC=m
CONFIG_VIDEO_CPIA2=m
CONFIG_USB_ZR364XX=m
CONFIG_USB_STKWEBCAM=m
CONFIG_USB_S2255=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=m
CONFIG_SOC_CAMERA_IMX074=m
CONFIG_SOC_CAMERA_MT9M001=m
CONFIG_SOC_CAMERA_MT9M111=m
CONFIG_SOC_CAMERA_MT9T031=m
CONFIG_SOC_CAMERA_MT9T112=m
CONFIG_SOC_CAMERA_MT9V022=m
CONFIG_SOC_CAMERA_RJ54N1=m
CONFIG_SOC_CAMERA_TW9910=m
CONFIG_SOC_CAMERA_PLATFORM=m
CONFIG_SOC_CAMERA_OV2640=m
CONFIG_SOC_CAMERA_OV5642=m
CONFIG_SOC_CAMERA_OV6650=m
CONFIG_SOC_CAMERA_OV772X=m
CONFIG_SOC_CAMERA_OV9640=m
CONFIG_SOC_CAMERA_OV9740=m
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_VIDEO_CSI_SUN4I is not set
CONFIG_RADIO_SI470X=y
CONFIG_USB_SI470X=m
CONFIG_I2C_SI470X=m
CONFIG_USB_MR800=m
CONFIG_USB_DSBR=m
CONFIG_RADIO_SI4713=m
CONFIG_USB_KEENE=m
CONFIG_RADIO_TEA5764=m
CONFIG_RADIO_SAA7706H=m
CONFIG_RADIO_TEF6862=m
CONFIG_RADIO_WL1273=m
CONFIG_AUDIO_ENGINE=y
CONFIG_PA_CONTROL=y
CONFIG_DRM=m
CONFIG_DRM_MALI=m
CONFIG_DRM_UDL=m
CONFIG_MALI=m
CONFIG_MALI400_DEBUG=y
CONFIG_MALI400_GPU_UTILIZATION=y
CONFIG_FB=y
CONFIG_FB_SUNXI=y
CONFIG_FB_SUNXI_LCD=y
CONFIG_FB_SUNXI_HDMI=y
CONFIG_HDMI_CEC=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SEQUENCER=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
CONFIG_SND_SEQUENCER_OSS=y
CONFIG_SND_HRTIMER=m
CONFIG_SND_VERBOSE_PRINTK=y
CONFIG_SND_ALOOP=m
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_SOC=y
CONFIG_SND_SUNXI_SOC_SPDIF=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_HID_PID=y
CONFIG_USB_HIDDEV=y
CONFIG_HID_KYE=y
CONFIG_HID_LOGITECH_DJ=y
CONFIG_LOGITECH_FF=y
# CONFIG_LOGIWHEELS_FF is not set
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_REALTEK=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_ISD200=y
CONFIG_USB_STORAGE_USBAT=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
CONFIG_USB_STORAGE_ALAUDA=y
CONFIG_USB_STORAGE_ONETOUCH=y
CONFIG_USB_STORAGE_KARMA=y
CONFIG_USB_STORAGE_CYPRESS_ATACB=y
CONFIG_USB_STORAGE_ENE_UB6250=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_CONSOLE=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_GADGET=y
CONFIG_USB_FILE_STORAGE=m
CONFIG_USB_FILE_STORAGE_TEST=y
CONFIG_MMC=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_USHC=y
CONFIG_MMC_SUNXI_POWER_CONTROL=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_SUNXI=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_SUN4I=y
CONFIG_STAGING=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_LOGGER=y
CONFIG_ANDROID_RAM_CONSOLE=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_REISERFS_FS=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
# CONFIG_PRINT_QUOTA_WARNING is not set
CONFIG_QFMT_V2=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
CONFIG_FSCACHE=y
CONFIG_FSCACHE_STATS=y
CONFIG_CACHEFILES=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
CONFIG_NTFS_FS=y
CONFIG_NTFS_RW=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=y
CONFIG_HFS_FS=y
CONFIG_HFSPLUS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="y"
CONFIG_ROOT_NFS=y
CONFIG_NFS_USE_LEGACY_DNS=y
CONFIG_NFSD=m
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_FAULT_INJECTION=y
CONFIG_CIFS=y
CONFIG_CIFS_DFS_UPCALL=y
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_CODEPAGE_950=y
CONFIG_NLS_CODEPAGE_932=y
CONFIG_NLS_CODEPAGE_949=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_SHIRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LIST=y
CONFIG_BOOT_PRINTK_DELAY=y
CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
# CONFIG_FTRACE is not set
CONFIG_DYNAMIC_DEBUG=y
CONFIG_STRICT_DEVMEM=y
CONFIG_DEBUG_LL=y
CONFIG_SECURITYFS=y
# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_ZLIB=y
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
CONFIG_LIBCRC32C=y

View File

@@ -1,124 +0,0 @@
#! /bin/sh
# mkCubieCard.sh v0.1:
# 2013, Carlo Caione <carlo.caione@gmail.com>
# heavely based on :
# mkA10card.sh v0.1
# 2012, Jason Plum <jplum@archlinuxarm.org>
# loosely based on :
# mkcard.sh v0.5
# (c) Copyright 2009 Graeme Gregory <dp@xora.org.uk>
# Licensed under terms of GPLv2
#
# Parts of the procudure base on the work of Denys Dmytriyenko
# http://wiki.omap.com/index.php/MMC_Boot_Format
IMAGES_DIR=$1
SPL_IMG=$IMAGES_DIR/sunxi-spl.bin
SPL_UBOOT=$IMAGES_DIR/u-boot-sunxi-with-spl.bin
UBOOT_IMG=$IMAGES_DIR/u-boot.bin
UIMAGE=$IMAGES_DIR/uImage
BIN_BOARD_FILE=$IMAGES_DIR/script.bin
ROOTFS=$IMAGES_DIR/rootfs.tar
BOOT_CMD_H=$IMAGES_DIR/boot.scr
export LC_ALL=C
if [ $# -ne 2 ]; then
echo "Usage: $0 <images_dir> <drive>"
exit 1;
fi
if [ `id -u` -ne 0 ]; then
echo "This script must be run as root" 1>&2
exit 1
fi
if [ ! -f $SPL_IMG -a ! -f $SPL_UBOOT ] ||
[ ! -f $UBOOT_IMG ] ||
[ ! -f $UIMAGE ] ||
[ ! -f $BIN_BOARD_FILE ] ||
[ ! -f $ROOTFS ] ||
[ ! -f $BOOT_CMD_H ]; then
echo "File(s) missing."
exit 1
fi
DRIVE=$2
P1=`mktemp -d`
P2=`mktemp -d`
dd if=/dev/zero of=$DRIVE bs=1M count=3
SIZE=`fdisk -l $DRIVE | grep Disk | grep bytes | awk '{print $5}'`
echo DISK SIZE - $SIZE bytes
# ~2048, 16MB, FAT, bootable
# ~rest of drive, Ext4
{
echo 32,512,0x0C,*
echo 544,,,-
} | sfdisk -D $DRIVE
sleep 1
if [ -b ${DRIVE}1 ]; then
D1=${DRIVE}1
umount ${DRIVE}1
mkfs.vfat -n "boot" ${DRIVE}1
else
if [ -b ${DRIVE}p1 ]; then
D1=${DRIVE}p1
umount ${DRIVE}p1
mkfs.vfat -n "boot" ${DRIVE}p1
else
echo "Cant find boot partition in /dev"
exit 1
fi
fi
if [ -b ${DRIVE}2 ]; then
D2=${DRIVE}2
umount ${DRIVE}2
mkfs.ext4 -L "Cubie" ${DRIVE}2
else
if [ -b ${DRIVE}p2 ]; then
D2=${DRIVE}p2
umount ${DRIVE}p2
mkfs.ext4 -L "Cubie" ${DRIVE}p2
else
echo "Cant find rootfs partition in /dev"
exit 1
fi
fi
mount $D1 $P1
mount $D2 $P2
# write uImage
cp $UIMAGE $P1
# write board file
cp $BIN_BOARD_FILE $P1
# write u-boot script
cp $BOOT_CMD_H $P1
# write rootfs
tar -C $P2 -xvf $ROOTFS
sync
umount $D1
umount $D2
rm -fr $P1
rm -fr $P2
if [ -e $SPL_UBOOT ]; then
dd if=$SPL_UBOOT of=$DRIVE bs=1024 seek=8
else
# write SPL
dd if=$SPL_IMG of=$DRIVE bs=1024 seek=8
# write mele u-boot
dd if=$UBOOT_IMG of=$DRIVE bs=1024 seek=32
fi

View File

@@ -1,14 +0,0 @@
#!/bin/sh
# post-build.sh for CubieBoard
# 2013, Carlo Caione <carlo.caione@gmail.com>
BOARD_DIR="$(dirname $0)"
MKIMAGE=$HOST_DIR/usr/bin/mkimage
BOOT_CMD=$BOARD_DIR/boot.cmd
BOOT_CMD_H=$BINARIES_DIR/boot.scr
# U-Boot script
if [ -e $MKIMAGE -a -e $BOOT_CMD ];
then
$MKIMAGE -C none -A arm -T script -d $BOOT_CMD $BOOT_CMD_H
fi

View File

@@ -1,62 +0,0 @@
cubieboard and cubieboard2
-----
Intro
-----
To be able to use your cubieboard board with the images generated by
Buildroot you have to correctly setup the SD card.
For more information, please see http://linux-sunxi.org/FirstSteps
---------------
How to build it
---------------
You need to use the cubieboard_defconfig or cubieboard2_defconfig, to do so:
* make cubieboard_defconfig
or
* make cubieboard2_defconfig
And to compile:
* make
-----------------
What is generated
-----------------
After building, you should obtain this tree:
output/images/
+-- rootfs.tar
+-- boot.scr
+-- script.bin
+-- sunxi-spl.bin
+-- u-boot.bin
+-- u-boot-sunxi-with-spl.bin (optional)
`-- uImage
--------------------------
How setting up the SD card
--------------------------
Depending on the rootfs size, you might want to use a 2GB or larger SD-card.
The script mkcubiecard.sh will take care of partitioning and formatting
the SD-card.
BEWARE! This process will erase your SD card.
Use dmesg to find out where the SD card is attached in the /dev tree
(<device>) and then:
# sudo ./mkcubiecard.sh <images_dir> <device>
where:
- <images_dir> is the directory containing the generated files (usually
output/images)
- <device> is the device file of the SD card (usually /dev/sdX)
--
Carlo Caione <carlo.caione@gmail.com>

View File

@@ -1 +0,0 @@
../imx6sabresd/create-boot-sd.sh

View File

@@ -1,93 +0,0 @@
#!/bin/sh
set -u
set -e
PROGNAME=$(basename $0)
usage()
{
echo "Create an SD card that boots on an i.MX53/6 board."
echo
echo "Note: all data on the the card will be completely deleted!"
echo "Use with care!"
echo "Superuser permissions may be required to write to the device."
echo
echo "Usage: ${PROGNAME} <sd_block_device>"
echo "Arguments:"
echo " <sd_block_device> The device to be written to"
echo
echo "Example: ${PROGNAME} /dev/mmcblk0"
echo
}
if [ $# -ne 1 ]; then
usage
exit 1
fi
if [ $(id -u) -ne 0 ]; then
echo "${PROGNAME} must be run as root"
exit 1
fi
DEV=${1}
# The partition name prefix depends on the device name:
# - /dev/sde -> /dev/sde1
# - /dev/mmcblk0 -> /dev/mmcblk0p1
if echo ${DEV}|grep -q mmcblk ; then
PART="p"
else
PART=""
fi
PART1=${DEV}${PART}1
PART2=${DEV}${PART}2
# Unmount the partitions if mounted
umount ${PART1} || true
umount ${PART2} || true
# First, clear the card
dd if=/dev/zero of=${DEV} bs=1M count=20
sync
# Partition the card.
# SD layout for i.MX6 boot:
# - Bootloader at offset 1024
# - FAT partition starting at 1MB offset, containing uImage and *.dtb
# - ext2/3 partition formatted as ext2 or ext3, containing the root filesystem.
sfdisk ${DEV} <<EOF
32,480,b
512,,L
EOF
sync
# Copy the bootloader at offset 1024
dd if=output/images/u-boot.imx of=${DEV} obs=512 seek=2
# Prepare a temp dir for mounting partitions
TMPDIR=$(mktemp -d)
# FAT partition: kernel and DTBs
mkfs.vfat ${PART1}
mount ${PART1} ${TMPDIR}
cp output/images/*Image ${TMPDIR}/
cp output/images/*.dtb ${TMPDIR}/ || true
sync
umount ${TMPDIR}
# ext2 partition: root filesystem
mkfs.ext2 ${PART2}
mount ${PART2} ${TMPDIR}
tar -C ${TMPDIR}/ -xf output/images/rootfs.tar
sync
umount ${TMPDIR}
# Cleanup
rmdir ${TMPDIR}
sync
echo Done

View File

@@ -1,36 +0,0 @@
From 4a7cd7c5b165317dccf45cfc235da3e14bc339e8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= <vincent.stehle@freescale.com>
Date: Tue, 12 Aug 2014 10:17:31 +0200
Subject: [PATCH] mx6qsabre_common: boot Linux to /init in mfgtools mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Buildroot supplies a nice /init wrapper script to use when booting from a
ramdisk.
This patch tells u-boot to tell the kernel to boot into /init (instead of
/linuxrc) on i.MX6, when booting in mfgtools mode. This way we can boot a
buildroot system entirely through USB.
Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
---
include/configs/mx6qsabre_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h
index 69ff0df..ec7b665 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -129,7 +129,7 @@
#define CONFIG_MFG_ENV_SETTINGS \
"mfgtool_args=setenv bootargs console=" CONFIG_CONSOLE_DEV ",115200 " \
- "rdinit=/linuxrc " \
+ "rdinit=/init " \
"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
"g_mass_storage.iSerialNumber=\"\" "\
--
2.0.1

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@@ -1,67 +0,0 @@
*******************************************************
Freescale i.MX6Q and i.MX6DL SABRESD development boards
*******************************************************
This file documents the Buildroot support for the Freescale SABRE Board for
Smart Devices Based on the i.MX 6 Series (SABRESD).
Read the SABRESD Quick Start Guide for an introduction to the board:
http://cache.freescale.com/files/32bit/doc/quick_start_guide/SABRESDB_IMX6_QSG.pdf
Build
=====
First, configure Buildroot for your SABRESD board.
For i.MX6Q:
make freescale_imx6qsabresd_defconfig
For i.MX6DL:
make freescale_imx6dlsabresd_defconfig
Build all components:
make
You will find in ./output/images/ the following files:
- imx6dl-sabresd.dtb or imx6q-sabresd.dtb
- rootfs.ext2
- rootfs.tar
- u-boot.imx
- uImage
Create a bootable SD card
=========================
To determine the device associated to the SD card have a look in the
/proc/partitions file:
cat /proc/partitions
Run the following script as root on your SD card. This will partition the card
and copy the bootloader, kernel, DTBs and root filesystem as needed.
*** WARNING! The script will destroy all the card content. Use with care! ***
./board/freescale/imx6sabresd/create-boot-sd.sh <your-sd-device>
Boot the SABRESD board
======================
To boot your newly created system (refer to the SABRESD Quick Start Guide for
guidance):
- insert the SD card in the SD3 slot of the board;
- locate the BOOT dip switches (SW6), set dips 2 and 7 to ON, all others to OFF;
- connect a Micro USB cable to Debug Port and connect using a terminal emulator
at 115200 bps, 8n1;
- power on the board.
Enjoy!
References
==========
https://community.freescale.com/docs/DOC-95015
https://community.freescale.com/docs/DOC-95017
https://community.freescale.com/docs/DOC-99218

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@@ -1,94 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_KALLSYMS is not set
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
# CONFIG_PPC_CHRP is not set
# CONFIG_PPC_PMAC is not set
CONFIG_PPC_83xx=y
CONFIG_MPC831x_RDB=y
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_SYN_COOKIES=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=32768
CONFIG_CHR_DEV_SG=y
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_ATA=y
CONFIG_SATA_FSL=y
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
CONFIG_NETDEVICES=y
CONFIG_GIANFAR=y
CONFIG_E100=y
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_WATCHDOG=y
CONFIG_VIDEO_OUTPUT_CONTROL=m
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
CONFIG_USB_UHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set

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@@ -1,62 +0,0 @@
******************** WARNING ********************
The compiled U-Boot binary is intended for NAND flash only!
It won't work for NOR and will brick that bootloader!
Also don't go playing around with different U-boot versions or flash targets
unless you've got the necessary hardware and/or know-how to unbrick your kit.
2014.01 is known good for NAND.
******************** WARNING ********************
You'll need to program the files created by buildroot into the flash.
The fast way is to tftp transfer the files via one of the network interfaces.
Alternatively you can transfer the files via serial console with an Ymodem
file transfer from your terminal program by using a "loady" command
from the u-boot prompt instead of the "tftp ..." commands stated below.
Beware that serial console file transfers are quite slow!
Remember to set the MPC8315ERDB switches to NAND boot if you want to use
your newly built U-Boot.
1. Program the new U-Boot binary to NAND flash (optional)
If you don't feel confident upgrading your bootloader then don't do it,
it's unnecessary most of the time.
=> tftp $loadaddr u-boot-nand.bin
=> nand erase 0 0x80000
=> nand write $loadaddr 0 0x80000 $filesize
2. Program the kernel to NAND flash
=> tftp $loadaddr uImage
=> nand erase 0x100000 0x1e0000
=> nand write $loadaddr 0x100000 0x1e0000
3. Program the DTB to NAND flash
=> tftp $loadaddr mpc8315erdb.dtb
=> nand erase 0x2e0000 0x20000
=> nand write $loadaddr 0x2e0000 0x20000
4. Program the root filesystem to NAND flash
=> tftp $loadaddr rootfs.jffs2
=> nand erase 0x400000 0x1c00000
=> nand write $loadaddr 0x400000 $filesize
5. Booting your new system
=> setenv nandboot 'setenv bootargs root=/dev/mtdblock3 rootfstype=jffs2 console=$consoledev,$baudrate;nand read $fdtaddr 0x2e0000 0x20000;nand read $loadaddr 0x100000 0x1e0000;bootm $loadaddr - $fdtaddr'
If you want to set this boot option as default:
=> setenv bootcmd 'run nandboot'
=> saveenv
...or for a single boot:
=> run nandboot
You can login with user "root".

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@@ -1,132 +0,0 @@
CONFIG_PPC_85xx=y
CONFIG_PHYS_64BIT=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_AUDIT=y
CONFIG_IRQ_DOMAIN_DEBUG=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_P1010_RDB=y
CONFIG_HIGHMEM=y
CONFIG_SWIOTLB=y
CONFIG_FORCE_MAX_ZONEORDER=12
CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_RAPIDIO=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NET_IPIP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_INET_ESP=y
# CONFIG_INET_XFRM_MODE_BEET is not set
CONFIG_IPV6=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_FTL=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=131072
CONFIG_EEPROM_LEGACY=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_ATA=y
CONFIG_SATA_FSL=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_GIANFAR=y
CONFIG_VITESSE_PHY=y
CONFIG_FIXED_PHY=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=2
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_NVRAM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
CONFIG_SPI=y
CONFIG_SPI_FSL_SPI=y
CONFIG_SPI_FSL_ESPI=y
# CONFIG_HWMON is not set
CONFIG_USB=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_ESDHC=y
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_CMOS=y
CONFIG_DMADEVICES=y
CONFIG_FSL_DMA=y
CONFIG_EXT4_FS=y
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_SQUASHFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_CRC_T10DIF=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_FSL_CAAM=y

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@@ -1,77 +0,0 @@
******************** WARNING ********************
The compiled U-Boot binary is intended for NOR flash only!
It won't work for NAND or SPI and will brick those bootloaders!
Also don't go playing around with different U-boot versions or flash targets
unless you've got the necessary hardware and/or know-how to unbrick your kit.
2014.01 is known good for NOR on the P1010RDB-PA kit.
Freescale released a revised version of the kit with a faster processor and
some other hardware changes named P1010RDB-PB. U-Boot needs to be configured
differently for this kit hence this default config WILL NOT WORK.
This is ONLY related to U-Boot, otherwise the configuration is the same,
you can perfectly use the generated kernel and rootfs.
IF you want to build an U-Boot for the new kit just change
BR2_TARGET_UBOOT_BOARDNAME from P1010RDB-PA_NOR to P1010RDB-PB_NOR.
!!!!! THIS IS COMPLETELY UNTESTED BY BR DEVS SO YOU ARE ON YOUR OWN !!!!!
If it works we'd like to know so drop an email to the mailing list. Thanks.
If your kit doesn't mention PA nor PB in their shipping inventory then it's
the old version (PA).
******************** WARNING ********************
You'll need to program the files created by buildroot into the flash.
The fast way is to tftp transfer the files via one of the network interfaces.
Alternatively you can transfer the files via serial console with an Ymodem
file transfer from your terminal program by using a "loady" command
from the u-boot prompt instead of the "tftp ..." commands stated below.
Beware that serial console file transfers are quite slow!
Remember to set the P1010RDB switches to NOR boot if you want to use
your newly built U-Boot.
1. Program the new U-Boot binary to NOR flash (optional)
If you don't feel confident upgrading your bootloader then don't do it,
it's unnecessary most of the time.
=> tftp $loadaddr u-boot.bin
=> protect off 0xeff80000 +$filesize
=> erase 0xeff80000 +$filesize
=> cp.b $loadaddr 0xeff80000 $filesize
2. Program the DTB to NOR flash
=> tftp $loadaddr p1010rdb.dtb
=> erase 0xee000000 +$filesize
=> cp.b $loadaddr 0xee000000 $filesize
3. Program the kernel to NOR flash
=> tftp $loadaddr uImage
=> erase 0xee080000 +$filesize
=> cp.b $loadaddr 0xee080000 $filesize
4. Program the root filesystem to NOR flash
=> tftp $loadaddr rootfs.jffs2
=> erase 0xee800000 0xeff5ffff
=> cp.b $loadaddr 0xee800000 $filesize
5. Booting your new system
=> setenv norboot 'setenv bootargs root=/dev/mtdblock2 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xee080000 - 0xee000000'
If you want to set this boot option as default:
=> setenv bootcmd 'run norboot'
=> saveenv
...or for a single boot:
=> run norboot
You can login with user "root".

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@@ -1,48 +0,0 @@
This the Buildroot support for the LPC3131 based Gnublin board (see here:
http://en.gnublin.org/) and to the Elektor Linux board
(http://www.elektor.com/news/elektor-presents-embedded-linux-made-easy.2147294.
lynkx)
Unfortunately currently the AD and the pwm modules are not supported, i'm about
to add also those drivers as well to the current kernel later.
Base kernel version: 3.7 (available here:
https://gitorious.org/linux-3-7-gnublin/linux-3-7-gnublin/commits/gnublin-
support)
U-boot version: 2009.11 (available here:
https://gitorious.org/u-boot-gnublin-support/u-boot-gnublin-support)
Steps to create a bootable SD card (with the given config you need an at least
500 MB SD card):
1.Config buildroot with the gnublin_defconfig:
$ make gnublin_defconfig
2.Tweak the config for your needs:
$ make menuconfig
3.Build:
$ make
4.Create two partitions on your SD card, one with type of BootIt (fdisk ID: df),
the size should be around 1M, and another partition with all of the left space
on the card, and with the type of normal DOS partition.
5.From the output/images directory dump the u-boot image to the BootIt partition
(probably you have to modify the output /dev files according to your system):
$ dd if=output/images/u-boot.bin of=/dev/sdc1
6.Dump the root fs image as well:
$ dd if=output/images/rootfs.ext2 of=/dev/sdc2
7.Insert the SD card into the board's slot, and your board should boot up with
your newly created system.
Any feedback/report is welcome on the mr.zoltan.gyarmati[at]gmail.com

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@@ -1,135 +0,0 @@
Lego Mindstorms EV3
Intro
=====
This is the buildroot basic board support for the Lego Mindstorms EV3
programmable brick. No support for sensors and drivers is provided for the
moment.
The Lego Mindstorms EV3 brick comprises a Texas Instruments AM1808 SoC, with
an ARM 926EJ-S main processor running at 300 MHz.
See:
- https://en.wikipedia.org/wiki/Lego_Mindstorms_EV3
- http://www.lego.com/en-us/mindstorms/products/ev3/31313-mindstorms-ev3/
- http://www.ti.com/product/am1808
The buildroot configuration uses the Linux kernel of the ev3dev project.
See:
- http://botbench.com/blog/2013/07/31/lego-mindstorms-ev3-source-code-available/
- https://github.com/mindboards/ev3sources
Note that the EV3 configuration uses gcc 4.7, as the boot is broken with gcc
4.8.
How it works
============
Boot process :
--------------
The u-boot on-board the EV3 brick has provision to boot a Linux kernel from the
external µSD card. It will try to load a uImage from the first µSD card
partition, which must be formatted with a FAT filesystem.
How to build it
===============
Configure Buildroot
-------------------
The lego_ev3_defconfig configuration provides basic support to boot on the Lego
Mindstorms EV3 programmable brick:
$ make lego_ev3_defconfig
Build everything
----------------
Note: you will need to have access to the network, since Buildroot will
download the packages' sources.
$ make
Result of the build
-------------------
After building, you should obtain this tree:
output/images/
├── rootfs.ext2
├── rootfs.ext3 -> rootfs.ext2
└── uImage
Prepare your SDcard
===================
The following µSD card layout is recommended:
- First partition formated with a FAT filesystem, containing the uImage.
- Second partition formatted as ext2 or ext3, containing the root filesystem.
Create the SDcard partition table
----------------------------------
Determine the device associated to the SD card :
$ cat /proc/partitions
Let's assume it is /dev/mmcblk0 :
$ sudo fdisk /dev/mmcblk0
Delete all previous partitions by creating a new disklabel with 'o', then
create the new partition table, using these options, pressing enter after each
one:
* n p 1 2048 +10M t c
* n p 2 22528 +256M
Using the 'p' option, the SD card's partition must look like this :
Device Boot Start End Blocks Id System
/dev/mmcblk0p1 2048 22527 10240 c W95 FAT32 (LBA)
/dev/mmcblk0p2 22528 546815 262144 83 Linux
Then write the partition table using 'w' and exit.
Make partition one a DOS partition :
$ sudo mkfs.vfat /dev/mmcblk0p1
Install the binaries to the SDcard
----------------------------------
Remember your binaries are located in output/images/, go inside that directory :
$ cd output/images
Copy the Linux kernel:
$ sudo mkdir /mnt/sdcard
$ sudo mount /dev/mmcblk0p1 /mnt/sdcard
$ sudo cp uImage /mnt/sdcard
$ sudo umount /mnt/sdcard
Copy the rootfs :
$ sudo dd if=rootfs.ext3 of=/dev/mmcblk0p2 bs=1M
$ sync
It's Done!
Finish
======
Eject your µSD card, insert it in your Lego EV3, and power it up.
To have a serial console, you will need a proper USB to Lego serial port
adapter plugged into the EV3 sensors port 1.
See:
- http://botbench.com/blog/2013/08/15/ev3-creating-console-cable/
- http://botbench.com/blog/2013/08/05/mindsensors-ev3-usb-console-adapter/
The serial port config to use is 115200/8-N-1.

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@@ -1,6 +0,0 @@
set default="0"
set timeout="5"
menuentry "Buildroot" {
linux /bzImage root=/dev/mmcblk0p2 rootwait console=tty0 console=ttyS0,115200
}

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@@ -1,47 +0,0 @@
CONFIG_NO_HZ=y
CONFIG_SMP=y
CONFIG_X86_INTEL_LPSS=y
CONFIG_MATOM=y
CONFIG_EFI=y
CONFIG_PM_RUNTIME=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_X86_INTEL_PSTATE=y
CONFIG_X86_ACPI_CPUFREQ=y
CONFIG_INTEL_IDLE=y
CONFIG_IA32_EMULATION=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_CHR_DEV_SG=y
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_ATA_PIIX=y
CONFIG_NETDEVICES=y
CONFIG_R8169=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DW=y
CONFIG_I2C_I801=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_DESIGNWARE_PCI=y
CONFIG_SPI=y
CONFIG_SPI_PXA2XX=y
CONFIG_SPI_DESIGNWARE=y
CONFIG_PINCTRL_BAYTRAIL=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_AGP=y
CONFIG_DRM=y
CONFIG_DRM_I915=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PCI=y
CONFIG_MMC_SDHCI_ACPI=y
CONFIG_PWM=y
CONFIG_PWM_LPSS=y
CONFIG_EXT4_FS=y

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@@ -1,2 +0,0 @@
#!/bin/sh
cp board/minnowboard-max/grub.cfg ${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg

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@@ -1,40 +0,0 @@
Prepare the SD card for the Minnow Board MAX
============================================
1. Partition the SD card with a GPT partition table
sudo cgdisk /dev/mmcblk0
Create two partitions:
a) First partition of a few dozens of megabytes, which will be
used to store the bootloader and the kernel image. Type must
be EF00 (EFI partition).
b) Second partition of any size, which will be used to store the
root filesystem. Type must be 8300 (Linux filesystem)
2. Prepare the boot partition
We will format it, mount it, copy the EFI data generated by
Buildroot, and the kernel image.
sudo mkfs.vfat -F 32 -n boot /dev/mmcblk0p1
sudo mount /dev/mmcblk0p1 /mnt
sudo cp -a output/images/efi-part/* /mnt/
sudo cp output/images/bzImage /mnt/
sudo umount /mnt
3. Prepare the root partition
We will format it, mount it, and extract the root filesystem.
sudo mkfs.ext4 -L root /dev/mmcblk0p2
sudo mount /dev/mmcblk0p2 /mnt
sudo tar -C /mnt -xf output/images/rootfs.tar
sudo umount /mnt
4. Enjoy
Additional information about this board can be found at
http://www.minnowboard.org/ or http://elinux.org/Minnowboard:MinnowMax.

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@@ -1,6 +0,0 @@
set default="0"
set timeout="5"
menuentry "Buildroot" {
linux /bzImage root=/dev/mmcblk0p2 rootwait console=ttyPCH0,115200
}

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@@ -1,172 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_RCU_FANOUT=32
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
CONFIG_CGROUP_DEBUG=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_RESOURCE_COUNTERS=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_MEMCG_KMEM=y
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_CGROUP=y
CONFIG_NAMESPACES=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_SMP=y
CONFIG_MATOM=y
CONFIG_SCHED_SMT=y
CONFIG_PREEMPT=y
CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
CONFIG_X86_CHECK_BIOS_CORRUPTION=y
# CONFIG_MTRR_SANITIZER is not set
CONFIG_EFI=y
CONFIG_EFI_STUB=y
CONFIG_HZ_1000=y
CONFIG_PM_RUNTIME=y
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_X86_ACPI_CPUFREQ=y
CONFIG_INTEL_IDLE=y
CONFIG_PCI_MMCONFIG=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_MSI=y
CONFIG_HOTPLUG_PCI=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_SUB_POLICY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER=m
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_RAM=y
CONFIG_PCH_PHUB=m
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=m
CONFIG_NETCONSOLE=y
CONFIG_TUN=m
CONFIG_PCH_GBE=m
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO_POLLED=y
# CONFIG_MOUSE_PS2 is not set
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_PCH_UART=y
CONFIG_SERIAL_PCH_UART_CONSOLE=y
CONFIG_GEN_RTC=y
CONFIG_GEN_RTC_X=y
CONFIG_HPET=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_EG20T=m
CONFIG_SPI=y
CONFIG_SPI_GPIO=m
CONFIG_SPI_TOPCLIFF_PCH=m
CONFIG_SPI_SPIDEV=m
CONFIG_GPIOLIB=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_SCH=y
CONFIG_GPIO_PCH=y
CONFIG_WATCHDOG=y
CONFIG_SOFT_WATCHDOG=m
CONFIG_AGP=m
CONFIG_DRM=m
CONFIG_FB=y
CONFIG_FB_EFI=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_HDA_INTEL=m
CONFIG_USB=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=m
CONFIG_USB_EG20T=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PCI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_DMADEVICES=y
CONFIG_PCH_DMA=y
CONFIG_MINNOWBOARD=y
CONFIG_MINNOWBOARD_GPIO=m
CONFIG_MINNOWBOARD_KEYS=m
CONFIG_EFI_VARS=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_ISO9660_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=m
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_PRINTK_TIME=y
CONFIG_FRAME_WARN=1024
CONFIG_TIMER_STATS=y
CONFIG_LATENCYTOP=y
CONFIG_BLK_DEV_IO_TRACE=y

View File

@@ -1,2 +0,0 @@
#!/bin/sh
cp board/minnowboard/grub.cfg ${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg

View File

@@ -1,40 +0,0 @@
Prepare the SD card for the Minnow Board
========================================
1. Partition the SD card with a GPT partition table
sudo cgdisk /dev/mmcblk0
Create two partitions:
a) First partition of a few dozens of megabytes, which will be
used to store the bootloader and the kernel image. Type must
be EF00 (EFI partition).
b) Second partition of any size, which will be used to store the
root filesystem. Type must be 8300 (Linux filesystem)
2. Prepare the boot partition
We will format it, mount it, copy the EFI data generated by
Buildroot, and the kernel image.
sudo mkfs.vfat -F 32 -n boot /dev/mmcblk0p1
sudo mount /dev/mmcblk0p1 /mnt
sudo cp -a output/images/efi-part/* /mnt/
sudo cp output/images/bzImage /mnt/
sudo umount /mnt
3. Prepare the root partition
We will format it, mount it, and extract the root filesystem.
sudo mkfs.ext3 -L root /dev/mmcblk0p2
sudo mount /dev/mmcblk0p2 /mnt
sudo tar -C /mnt -xf output/images/rootfs.tar
sudo umount /mnt
4. Enjoy
Additional information about this board can be found at
http://www.minnowboard.org/.

View File

@@ -1,152 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PERF_EVENTS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_BLK_DEV_INTEGRITY=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MXS=y
# CONFIG_ARM_THUMB is not set
CONFIG_PREEMPT_VOLUNTARY=y
CONFIG_AEABI=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait"
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_SYN_COOKIES=y
CONFIG_CFG80211=y
CONFIG_CFG80211_WEXT=y
CONFIG_MAC80211=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_SST25L=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_GPMI_NAND=y
CONFIG_MTD_UBI=y
# CONFIG_BLK_DEV is not set
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_93CX6=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
# CONFIG_ETHERNET is not set
CONFIG_USB_USBNET=y
CONFIG_USB_NET_SMSC95XX=y
CONFIG_RTL8187=m
CONFIG_ATH_CARDS=m
CONFIG_ATH9K_HTC=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
CONFIG_RTL_CARDS=m
CONFIG_RTL8192CU=m
# CONFIG_RTLWIFI_DEBUG is not set
CONFIG_ZD1211RW=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_MXS_AUART=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MXS=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=m
CONFIG_SPI_MXS=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_STMP3XXX_RTC_WATCHDOG=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_FB=y
CONFIG_FB_MXS=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_HRTIMER=y
# CONFIG_SND_SUPPORT_OLD_API is not set
# CONFIG_SND_VERBOSE_PROCFS is not set
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_MXS_PHY=y
CONFIG_MMC=y
CONFIG_MMC_MXS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_STMP=y
CONFIG_DMADEVICES=y
CONFIG_MXS_DMA=y
CONFIG_STAGING=y
CONFIG_MXS_LRADC=y
CONFIG_IIO=y
CONFIG_IIO_SYSFS_TRIGGER=y
CONFIG_PWM=y
CONFIG_PWM_MXS=y
CONFIG_EXT4_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_MISC_FILESYSTEMS is not set
# CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_PRINTK_TIME=y
CONFIG_FRAME_WARN=2048
CONFIG_UNUSED_SYMBOLS=y
CONFIG_DEBUG_FS=y
CONFIG_STRICT_DEVMEM=y
CONFIG_DEBUG_USER=y
CONFIG_KEYS=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_MXS_DCP=y
CONFIG_CRC_CCITT=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC7=m
CONFIG_FONTS=y

View File

@@ -1,122 +0,0 @@
Forward-ported patch from https://github.com/koliqi/imx23-olinuxino
for mxs-bootlets-10.12.01
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
diff -Nura imx-bootlets-src-10.12.01/linux_prep/board/imx23_olinuxino_dev.c imx-bootlets-src-10.12.01-olinuxino/linux_prep/board/imx23_olinuxino_dev.c
--- imx-bootlets-src-10.12.01/linux_prep/board/imx23_olinuxino_dev.c 1969-12-31 21:00:00.000000000 -0300
+++ imx-bootlets-src-10.12.01-olinuxino/linux_prep/board/imx23_olinuxino_dev.c 2013-05-17 15:07:33.282961551 -0300
@@ -0,0 +1,54 @@
+/*
+ * Platform specific data for the IMX23_OLINUXINO development board
+ *
+ * Fadil Berisha <fadil.r.berisha@gmail.com>
+ *
+ * Copyright 2008 SigmaTel, Inc
+ * Copyright 2008 Embedded Alley Solutions, Inc
+ * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <setup.h>
+#include <keys.h>
+#include <lradc_buttons.h>
+
+/************************************************
+ * LRADC keyboard data *
+ ************************************************/
+int lradc_keypad_ch = LRADC_CH0;
+int lradc_vddio_ch = LRADC_CH6;
+
+struct lradc_keycode lradc_keycodes[] = {
+ { 100, KEY4 },
+ { 306, KEY5 },
+ { 601, KEY6 },
+ { 932, KEY7 },
+ { 1260, KEY8 },
+ { 1424, KEY9 },
+ { 1707, KEY10 },
+ { 2207, KEY11 },
+ { 2525, KEY12 },
+ { 2831, KEY13 },
+ { 3134, KEY14 },
+ { -1, 0 },
+};
+
+/************************************************
+ * Magic key combinations for Armadillo *
+ ************************************************/
+u32 magic_keys[MAGIC_KEY_NR] = {
+ [MAGIC_KEY1] = KEY4,
+ [MAGIC_KEY2] = KEY6,
+ [MAGIC_KEY3] = KEY10,
+};
+
+/************************************************
+ * Default command line *
+ ************************************************/
+char cmdline_def[] = "console=ttyAMA0,115200";
diff -Nura imx-bootlets-src-10.12.01/linux_prep/cmdlines/imx23_olinuxino_dev.txt imx-bootlets-src-10.12.01-olinuxino/linux_prep/cmdlines/imx23_olinuxino_dev.txt
--- imx-bootlets-src-10.12.01/linux_prep/cmdlines/imx23_olinuxino_dev.txt 1969-12-31 21:00:00.000000000 -0300
+++ imx-bootlets-src-10.12.01-olinuxino/linux_prep/cmdlines/imx23_olinuxino_dev.txt 2013-05-17 15:07:49.663496106 -0300
@@ -0,0 +1,3 @@
+console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait
+console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait
+console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait
diff -Nura imx-bootlets-src-10.12.01/linux_prep/core/setup.c imx-bootlets-src-10.12.01-olinuxino/linux_prep/core/setup.c
--- imx-bootlets-src-10.12.01/linux_prep/core/setup.c 2010-11-04 04:35:38.000000000 -0300
+++ imx-bootlets-src-10.12.01-olinuxino/linux_prep/core/setup.c 2013-05-17 15:08:39.246114205 -0300
@@ -84,6 +84,8 @@
#include "../../mach-mx28/includes/registers/regsrtc.h"
#elif defined(STMP378X)
#include "../../mach-mx23/includes/registers/regsrtc.h"
+#elif defined(IMX23_OLINUXINO)
+#include "../../mach-mx23/includes/registers/regsrtc.h"
#endif
#define NAND_SECONDARY_BOOT 0x00000002
diff -Nura imx-bootlets-src-10.12.01/linux_prep/include/mx23/platform.h imx-bootlets-src-10.12.01-olinuxino/linux_prep/include/mx23/platform.h
--- imx-bootlets-src-10.12.01/linux_prep/include/mx23/platform.h 2010-11-04 04:35:38.000000000 -0300
+++ imx-bootlets-src-10.12.01-olinuxino/linux_prep/include/mx23/platform.h 2013-05-17 15:09:21.006476997 -0300
@@ -19,6 +19,8 @@
#if defined (BOARD_STMP378X_DEV)
#define MACHINE_ID 0xa45
+#elif defined (BOARD_IMX23_OLINUXINO_DEV)
+#define MACHINE_ID 0x1009
#else
#error "Allocate a machine ID for your board"
#endif
diff -Nura imx-bootlets-src-10.12.01/linux_prep/Makefile imx-bootlets-src-10.12.01-olinuxino/linux_prep/Makefile
--- imx-bootlets-src-10.12.01/linux_prep/Makefile 2010-11-04 04:35:38.000000000 -0300
+++ imx-bootlets-src-10.12.01-olinuxino/linux_prep/Makefile 2013-05-17 15:09:53.554539143 -0300
@@ -69,6 +69,11 @@
HW_OBJS = $(LRADC_OBJS)
CFLAGS += -DMX28 -DBOARD_MX28_EVK
endif
+ifeq ($(BOARD), imx23_olinuxino_dev)
+ARCH = mx23
+HW_OBJS = $(LRADC_OBJS)
+CFLAGS += -DIMX23_OLINUXINO -DBOARD_IMX23_OLINUXINO_DEV
+endif
# Generic code
CORE_OBJS = entry.o resume.o cmdlines.o setup.o keys.o
diff -Nura imx-bootlets-src-10.12.01/Makefile imx-bootlets-src-10.12.01-olinuxino/Makefile
--- imx-bootlets-src-10.12.01/Makefile 2010-11-04 04:35:38.000000000 -0300
+++ imx-bootlets-src-10.12.01-olinuxino/Makefile 2013-05-17 15:23:53.709956619 -0300
@@ -16,6 +16,9 @@
ifeq ($(BOARD), iMX28_EVK)
ARCH = mx28
endif
+ifeq ($(BOARD), imx23_olinuxino_dev)
+ARCH = mx23
+endif
all: build_prep gen_bootstream

View File

@@ -1,57 +0,0 @@
This configuration is intended as a base image.
It includes kernel and firmware support for the common USB WiFi hardware.
Packages for WiFi support are up to the user, you'll probably want
one or more of: hostapd, iw, wireless_tools and/or wpa_supplicant.
It also pulls up the console on the serial port, not on TV output.
You'll need a spare MicroSD card with Freescale's special partition layout.
This is basically two partitions:
1) Type 53, the bootstrap + bootloader/kernel partition, should be 16MB.
2) Anything you like, for this example an ext2 partition, type 83 (linux).
Assuming you see your MicroSD card as /dev/sdc you'd need to do, as root
and from the buildroot project top level directory:
(remember to replace /dev/sdc* with the appropiate device name!)
***** WARNING: Double check that /dev/sdc is your MicroSD card *****
***** It might be /dev/sdb or some other device name *****
***** Failure to do so may result in you wiping your hard disk *****
1. Unmount the filesystem(s) if they're already mounted, usually...
# for fs in `grep /dev/sdc /proc/mounts|cut -d ' ' -f 1`;do umount $fs;done
...should work
2. Blank the partition table out
# dd if=/dev/zero of=/dev/sdc bs=1024 count=1024
3. Set up the partitions
# fdisk /dev/sdc
n
p
1
<ENTER>
+16MB
t
53
n
p
2
<ENTER>
<ENTER>
w
4. Fill up the first (bootstrap + kernel) partition
# dd if=output/images/imx23_olinuxino_dev_linux.sb bs=512 of=/dev/sdc1 seek=4
5. Fill up the second (filesystem) partition
# dd if=output/images/rootfs.ext2 of=/dev/sdc2 bs=512
6. Remove the MicroSD card from your linux PC and put it into your olinuxino.
7. Boot! You're done!

View File

@@ -1,56 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_FHANDLE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_TASKSTATS=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_PROFILING=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_BLK_DEV_BSGLIB=y
CONFIG_ARCH_VEXPRESS=y
CONFIG_SMP=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_BINFMT_MISC=y
CONFIG_COMPAT=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_PACKET_DIAG=y
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_BRIDGE=m
CONFIG_NET_SCHED=y
CONFIG_VSOCKETS=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_VIRTIO_BLK=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_SCSI_VIRTIO=y
CONFIG_ATA=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_MACVLAN=y
CONFIG_VIRTIO_NET=y
CONFIG_NLMON=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_RTC_CLASS=y
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
CONFIG_MAILBOX=y
CONFIG_PL320_MBOX=y
CONFIG_EXT4_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y

View File

@@ -1,7 +0,0 @@
Run the emulation with:
qemu-system-aarch64 -M virt -cpu cortex-a57 -nographic -smp 1 -kernel output/images/Image -append "console=ttyAMA0" -netdev user,id=eth0 -device virtio-net-device,netdev=eth0
The login prompt will appear in the terminal that started Qemu.
Tested with QEMU 2.1.2

View File

@@ -1,10 +0,0 @@
Run the emulation with:
qemu-system-arm -M nuri -kernel output/images/zImage -append "console=ttySAC1,115200" -smp 2 -serial null -serial stdio
The login prompt will appear in the terminal that started Qemu. The
graphical window is the framebuffer.
Startup time is slow because of the SMP CPU emulation so be patient.
Tested with QEMU 2.1.2

View File

@@ -1,81 +0,0 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_VERSATILE=y
CONFIG_MACH_VERSATILE_AB=y
CONFIG_PCI=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=1f03 mem=32M"
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_EEPROM_LEGACY=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_NETDEVICES=y
CONFIG_SMC91X=y
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_AMBAKMI=y
CONFIG_LEGACY_PTY_COUNT=16
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=m
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_ARMCLCD=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
CONFIG_SND_ARMAACI=m
CONFIG_MMC=y
CONFIG_MMC_ARMMMCI=m
CONFIG_EXT4_FS=y
CONFIG_VFAT_FS=m
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_JFFS2_FS=y
CONFIG_CRAMFS=y
CONFIG_MINIX_FS=y
CONFIG_ROMFS_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_FONTS=y
CONFIG_FONT_ACORN_8x8=y

View File

@@ -0,0 +1,89 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MACH_VERSATILE_AB=y
CONFIG_PCI=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_LEDS=y
CONFIG_LEDS_CPU=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=1f03 mem=32M"
CONFIG_VFP=y
CONFIG_PM=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_ARM_INTEGRATOR=y
CONFIG_BLK_DEV_RAM=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMC91X=y
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_AMBAKMI=y
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_LEGACY_PTY_COUNT=16
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=m
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_ARMCLCD=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_SOUND=y
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
CONFIG_SND_ARMAACI=m
CONFIG_MMC=y
CONFIG_MMC_ARMMMCI=m
CONFIG_EXT2_FS=y
CONFIG_VFAT_FS=m
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_CRAMFS=y
CONFIG_MINIX_FS=y
CONFIG_ROMFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y

View File

@@ -5,4 +5,4 @@ Run the emulation with:
The login prompt will appear in the terminal that started Qemu. The
graphical window is the framebuffer.
Tested with QEMU 2.1.2
Tested with QEMU 1.2.0

View File

@@ -5,4 +5,4 @@ Run the emulation with:
The login prompt will appear in the terminal that started Qemu. The
graphical window is the framebuffer.
Tested with QEMU 2.1.2
Tested with QEMU 1.2.0

View File

@@ -1,56 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_OPT_LIB_ASM=y
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan3adsp"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_HZ_100=y
CONFIG_MMU=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE_FORCE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_NETDEVICES=y
CONFIG_XILINX_EMACLITE=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_DNOTIFY is not set
CONFIG_NFS_FS=y
CONFIG_CIFS=y
CONFIG_CIFS_STATS=y
CONFIG_CIFS_STATS2=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SLAB=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

View File

@@ -0,0 +1,68 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_OPT_LIB_ASM=y
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan3adsp"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_HZ_100=y
CONFIG_MMU=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE_FORCE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_XILINX_EMACLITE=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_CIFS=y
CONFIG_CIFS_STATS=y
CONFIG_CIFS_STATS2=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_SLAB=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_INFO=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

View File

@@ -4,4 +4,4 @@ Run the emulation with:
The login prompt will appear in the terminal that started Qemu.
Tested with QEMU 2.1.2
Tested with QEMU 1.2.0

View File

@@ -0,0 +1,367 @@
/*
* Device Tree Generator version: 1.1
*
* (C) Copyright 2007-2008 Xilinx, Inc.
* (C) Copyright 2007-2009 Michal Simek
*
* Michal SIMEK <monstr@monstr.eu>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
*
* XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,microblaze";
hard-reset-gpios = <&LEDs_8Bit 2 1>;
model = "testing";
DDR2_SDRAM: memory@90000000 {
device_type = "memory";
reg = < 0x90000000 0x10000000 >;
} ;
aliases {
ethernet0 = &Hard_Ethernet_MAC;
serial0 = &RS232_Uart_1;
} ;
chosen {
bootargs = "console=ttyUL0,115200 highres=on";
linux,stdout-path = "/plb@0/serial@84000000";
} ;
cpus {
#address-cells = <1>;
#cpus = <0x1>;
#size-cells = <0>;
microblaze_0: cpu@0 {
clock-frequency = <125000000>;
compatible = "xlnx,microblaze-7.10.d";
d-cache-baseaddr = <0x90000000>;
d-cache-highaddr = <0x9fffffff>;
d-cache-line-size = <0x10>;
d-cache-size = <0x2000>;
device_type = "cpu";
i-cache-baseaddr = <0x90000000>;
i-cache-highaddr = <0x9fffffff>;
i-cache-line-size = <0x10>;
i-cache-size = <0x2000>;
model = "microblaze,7.10.d";
reg = <0>;
timebase-frequency = <125000000>;
xlnx,addr-tag-bits = <0xf>;
xlnx,allow-dcache-wr = <0x1>;
xlnx,allow-icache-wr = <0x1>;
xlnx,area-optimized = <0x0>;
xlnx,cache-byte-size = <0x2000>;
xlnx,d-lmb = <0x1>;
xlnx,d-opb = <0x0>;
xlnx,d-plb = <0x1>;
xlnx,data-size = <0x20>;
xlnx,dcache-addr-tag = <0xf>;
xlnx,dcache-always-used = <0x1>;
xlnx,dcache-byte-size = <0x2000>;
xlnx,dcache-line-len = <0x4>;
xlnx,dcache-use-fsl = <0x1>;
xlnx,debug-enabled = <0x1>;
xlnx,div-zero-exception = <0x1>;
xlnx,dopb-bus-exception = <0x0>;
xlnx,dynamic-bus-sizing = <0x1>;
xlnx,edge-is-positive = <0x1>;
xlnx,family = "virtex5";
xlnx,endianness = <0x1>;
xlnx,fpu-exception = <0x1>;
xlnx,fsl-data-size = <0x20>;
xlnx,fsl-exception = <0x0>;
xlnx,fsl-links = <0x0>;
xlnx,i-lmb = <0x1>;
xlnx,i-opb = <0x0>;
xlnx,i-plb = <0x1>;
xlnx,icache-always-used = <0x1>;
xlnx,icache-line-len = <0x4>;
xlnx,icache-use-fsl = <0x1>;
xlnx,ill-opcode-exception = <0x1>;
xlnx,instance = "microblaze_0";
xlnx,interconnect = <0x1>;
xlnx,interrupt-is-edge = <0x0>;
xlnx,iopb-bus-exception = <0x0>;
xlnx,mmu-dtlb-size = <0x4>;
xlnx,mmu-itlb-size = <0x2>;
xlnx,mmu-tlb-access = <0x3>;
xlnx,mmu-zones = <0x10>;
xlnx,number-of-pc-brk = <0x1>;
xlnx,number-of-rd-addr-brk = <0x0>;
xlnx,number-of-wr-addr-brk = <0x0>;
xlnx,opcode-0x0-illegal = <0x1>;
xlnx,pvr = <0x2>;
xlnx,pvr-user1 = <0x0>;
xlnx,pvr-user2 = <0x0>;
xlnx,reset-msr = <0x0>;
xlnx,sco = <0x0>;
xlnx,unaligned-exceptions = <0x1>;
xlnx,use-barrel = <0x1>;
xlnx,use-dcache = <0x1>;
xlnx,use-div = <0x1>;
xlnx,use-ext-brk = <0x1>;
xlnx,use-ext-nm-brk = <0x1>;
xlnx,use-extended-fsl-instr = <0x0>;
xlnx,use-fpu = <0x2>;
xlnx,use-hw-mul = <0x2>;
xlnx,use-icache = <0x1>;
xlnx,use-interrupt = <0x1>;
xlnx,use-mmu = <0x3>;
xlnx,use-msr-instr = <0x1>;
xlnx,use-pcmp-instr = <0x1>;
} ;
} ;
mb_plb: plb@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,plb-v46-1.03.a", "xlnx,plb-v46-1.00.a", "simple-bus";
ranges ;
FLASH: flash@a0000000 {
bank-width = <2>;
compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
reg = < 0xa0000000 0x2000000 >;
xlnx,family = "virtex5";
xlnx,include-datawidth-matching-0 = <0x1>;
xlnx,include-datawidth-matching-1 = <0x0>;
xlnx,include-datawidth-matching-2 = <0x0>;
xlnx,include-datawidth-matching-3 = <0x0>;
xlnx,include-negedge-ioregs = <0x0>;
xlnx,include-plb-ipif = <0x1>;
xlnx,include-wrbuf = <0x1>;
xlnx,max-mem-width = <0x10>;
xlnx,mch-native-dwidth = <0x20>;
xlnx,mch-plb-clk-period-ps = <0x1f40>;
xlnx,mch-splb-awidth = <0x20>;
xlnx,mch0-accessbuf-depth = <0x10>;
xlnx,mch0-protocol = <0x0>;
xlnx,mch0-rddatabuf-depth = <0x10>;
xlnx,mch1-accessbuf-depth = <0x10>;
xlnx,mch1-protocol = <0x0>;
xlnx,mch1-rddatabuf-depth = <0x10>;
xlnx,mch2-accessbuf-depth = <0x10>;
xlnx,mch2-protocol = <0x0>;
xlnx,mch2-rddatabuf-depth = <0x10>;
xlnx,mch3-accessbuf-depth = <0x10>;
xlnx,mch3-protocol = <0x0>;
xlnx,mch3-rddatabuf-depth = <0x10>;
xlnx,mem0-width = <0x10>;
xlnx,mem1-width = <0x20>;
xlnx,mem2-width = <0x20>;
xlnx,mem3-width = <0x20>;
xlnx,num-banks-mem = <0x1>;
xlnx,num-channels = <0x0>;
xlnx,priority-mode = <0x0>;
xlnx,synch-mem-0 = <0x0>;
xlnx,synch-mem-1 = <0x0>;
xlnx,synch-mem-2 = <0x0>;
xlnx,synch-mem-3 = <0x0>;
xlnx,synch-pipedelay-0 = <0x2>;
xlnx,synch-pipedelay-1 = <0x2>;
xlnx,synch-pipedelay-2 = <0x2>;
xlnx,synch-pipedelay-3 = <0x2>;
xlnx,tavdv-ps-mem-0 = <0x1adb0>;
xlnx,tavdv-ps-mem-1 = <0x3a98>;
xlnx,tavdv-ps-mem-2 = <0x3a98>;
xlnx,tavdv-ps-mem-3 = <0x3a98>;
xlnx,tcedv-ps-mem-0 = <0x1adb0>;
xlnx,tcedv-ps-mem-1 = <0x3a98>;
xlnx,tcedv-ps-mem-2 = <0x3a98>;
xlnx,tcedv-ps-mem-3 = <0x3a98>;
xlnx,thzce-ps-mem-0 = <0x88b8>;
xlnx,thzce-ps-mem-1 = <0x1b58>;
xlnx,thzce-ps-mem-2 = <0x1b58>;
xlnx,thzce-ps-mem-3 = <0x1b58>;
xlnx,thzoe-ps-mem-0 = <0x1b58>;
xlnx,thzoe-ps-mem-1 = <0x1b58>;
xlnx,thzoe-ps-mem-2 = <0x1b58>;
xlnx,thzoe-ps-mem-3 = <0x1b58>;
xlnx,tlzwe-ps-mem-0 = <0x88b8>;
xlnx,tlzwe-ps-mem-1 = <0x0>;
xlnx,tlzwe-ps-mem-2 = <0x0>;
xlnx,tlzwe-ps-mem-3 = <0x0>;
xlnx,twc-ps-mem-0 = <0x2af8>;
xlnx,twc-ps-mem-1 = <0x3a98>;
xlnx,twc-ps-mem-2 = <0x3a98>;
xlnx,twc-ps-mem-3 = <0x3a98>;
xlnx,twp-ps-mem-0 = <0x11170>;
xlnx,twp-ps-mem-1 = <0x2ee0>;
xlnx,twp-ps-mem-2 = <0x2ee0>;
xlnx,twp-ps-mem-3 = <0x2ee0>;
xlnx,xcl0-linesize = <0x4>;
xlnx,xcl0-writexfer = <0x1>;
xlnx,xcl1-linesize = <0x4>;
xlnx,xcl1-writexfer = <0x1>;
xlnx,xcl2-linesize = <0x4>;
xlnx,xcl2-writexfer = <0x1>;
xlnx,xcl3-linesize = <0x4>;
xlnx,xcl3-writexfer = <0x1>;
} ;
Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,compound";
ranges ;
ethernet@81c00000 {
compatible = "xlnx,xps-ll-temac-1.01.b", "xlnx,xps-ll-temac-1.00.a";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 5 2 >;
llink-connected = <&PIM3>;
local-mac-address = [ 00 0a 35 00 00 00 ];
reg = < 0x81c00000 0x40 >;
xlnx,bus2core-clk-ratio = <0x1>;
xlnx,phy-type = <0x1>;
xlnx,phyaddr = <0x1>;
xlnx,rxcsum = <0x0>;
xlnx,rxfifo = <0x1000>;
xlnx,temac-type = <0x0>;
xlnx,txcsum = <0x0>;
xlnx,txfifo = <0x1000>;
} ;
} ;
IIC_EEPROM: i2c@81600000 {
compatible = "xlnx,xps-iic-2.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 6 2 >;
reg = < 0x81600000 0x10000 >;
xlnx,clk-freq = <0x7735940>;
xlnx,family = "virtex5";
xlnx,gpo-width = <0x1>;
xlnx,iic-freq = <0x186a0>;
xlnx,scl-inertial-delay = <0x0>;
xlnx,sda-inertial-delay = <0x0>;
xlnx,ten-bit-adr = <0x0>;
} ;
LEDs_8Bit: gpio@81400000 {
compatible = "xlnx,xps-gpio-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 7 2 >;
reg = < 0x81400000 0x10000 >;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,family = "virtex5";
xlnx,gpio-width = <0x8>;
xlnx,interrupt-present = <0x1>;
xlnx,is-bidir = <0x1>;
xlnx,is-bidir-2 = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
#gpio-cells = <2>;
gpio-controller;
} ;
gpio-leds {
compatible = "gpio-leds";
heartbeat {
label = "Heartbeat";
gpios = <&LEDs_8Bit 4 1>;
linux,default-trigger = "heartbeat";
};
yellow {
label = "Yellow";
gpios = <&LEDs_8Bit 5 1>;
};
red {
label = "Red";
gpios = <&LEDs_8Bit 6 1>;
};
green {
label = "Green";
gpios = <&LEDs_8Bit 7 1>;
};
} ;
RS232_Uart_1: serial@84000000 {
clock-frequency = <125000000>;
compatible = "xlnx,xps-uartlite-1.00.a";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&xps_intc_0>;
interrupts = < 8 0 >;
port-number = <0>;
reg = < 0x84000000 0x10000 >;
xlnx,baudrate = <0x1c200>;
xlnx,data-bits = <0x8>;
xlnx,family = "virtex5";
xlnx,odd-parity = <0x0>;
xlnx,use-parity = <0x0>;
} ;
SysACE_CompactFlash: sysace@83600000 {
compatible = "xlnx,xps-sysace-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 4 2 >;
reg = < 0x83600000 0x10000 >;
xlnx,family = "virtex5";
xlnx,mem-width = <0x10>;
} ;
debug_module: debug@84400000 {
compatible = "xlnx,mdm-1.00.d";
reg = < 0x84400000 0x10000 >;
xlnx,family = "virtex5";
xlnx,interconnect = <0x1>;
xlnx,jtag-chain = <0x2>;
xlnx,mb-dbg-ports = <0x1>;
xlnx,uart-width = <0x8>;
xlnx,use-uart = <0x1>;
xlnx,write-fsl-ports = <0x0>;
} ;
mpmc@90000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,mpmc-4.02.a";
ranges ;
PIM3: sdma@84600180 {
compatible = "xlnx,ll-dma-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 2 2 1 2 >;
reg = < 0x84600180 0x80 >;
} ;
} ;
xps_intc_0: interrupt-controller@81800000 {
#interrupt-cells = <0x2>;
compatible = "xlnx,xps-intc-1.00.a";
interrupt-controller ;
reg = < 0x81800000 0x10000 >;
xlnx,kind-of-intr = <0x100>;
xlnx,num-intr-inputs = <0x9>;
} ;
xps_timer_1: timer@83c00000 {
compatible = "xlnx,xps-timer-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 3 2 >;
reg = < 0x83c00000 0x10000 >;
xlnx,count-width = <0x20>;
xlnx,family = "virtex5";
xlnx,gen0-assert = <0x1>;
xlnx,gen1-assert = <0x1>;
xlnx,one-timer-only = <0x0>;
xlnx,trig0-assert = <0x1>;
xlnx,trig1-assert = <0x1>;
} ;
} ;
} ;

View File

@@ -1,11 +0,0 @@
diff -Nur linux-3.14.orig/drivers/net/ethernet/xilinx/xilinx_emaclite.c linux-3.14/drivers/net/ethernet/xilinx/xilinx_emaclite.c
--- linux-3.14.orig/drivers/net/ethernet/xilinx/xilinx_emaclite.c 2014-03-31 05:40:15.000000000 +0200
+++ linux-3.14/drivers/net/ethernet/xilinx/xilinx_emaclite.c 2014-04-11 22:53:42.000000000 +0200
@@ -1249,6 +1249,7 @@
{ .compatible = "xlnx,opb-ethernetlite-1.01.b", },
{ .compatible = "xlnx,xps-ethernetlite-1.00.a", },
{ .compatible = "xlnx,xps-ethernetlite-2.00.a", },
+ { .compatible = "xlnx,xps-ethernetlite-2.00.b", },
{ .compatible = "xlnx,xps-ethernetlite-2.01.a", },
{ .compatible = "xlnx,xps-ethernetlite-3.00.a", },
{ /* end of list */ },

View File

@@ -1,57 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan3adsp"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_HZ_100=y
CONFIG_MMU=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE_FORCE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_NETDEVICES=y
CONFIG_XILINX_EMACLITE=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_DNOTIFY is not set
CONFIG_NFS_FS=y
CONFIG_CIFS=y
CONFIG_CIFS_STATS=y
CONFIG_CIFS_STATS2=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SLAB=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRC16=y

View File

@@ -0,0 +1,67 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan3adsp"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_HZ_100=y
CONFIG_MMU=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE_FORCE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_XILINX_EMACLITE=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_CIFS=y
CONFIG_CIFS_STATS=y
CONFIG_CIFS_STATS2=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_SLAB=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_INFO=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

View File

@@ -4,4 +4,4 @@ Run the emulation with:
The login prompt will appear in the terminal that started Qemu.
Tested with QEMU 2.1.2
Tested with QEMU 1.2.0

View File

@@ -0,0 +1,367 @@
/*
* Device Tree Generator version: 1.1
*
* (C) Copyright 2007-2008 Xilinx, Inc.
* (C) Copyright 2007-2009 Michal Simek
*
* Michal SIMEK <monstr@monstr.eu>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
*
* XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,microblaze";
hard-reset-gpios = <&LEDs_8Bit 2 1>;
model = "testing";
DDR2_SDRAM: memory@90000000 {
device_type = "memory";
reg = < 0x90000000 0x10000000 >;
} ;
aliases {
ethernet0 = &Hard_Ethernet_MAC;
serial0 = &RS232_Uart_1;
} ;
chosen {
bootargs = "console=ttyUL0,115200 highres=on";
linux,stdout-path = "/plb@0/serial@84000000";
} ;
cpus {
#address-cells = <1>;
#cpus = <0x1>;
#size-cells = <0>;
microblaze_0: cpu@0 {
clock-frequency = <125000000>;
compatible = "xlnx,microblaze-7.10.d";
d-cache-baseaddr = <0x90000000>;
d-cache-highaddr = <0x9fffffff>;
d-cache-line-size = <0x10>;
d-cache-size = <0x2000>;
device_type = "cpu";
i-cache-baseaddr = <0x90000000>;
i-cache-highaddr = <0x9fffffff>;
i-cache-line-size = <0x10>;
i-cache-size = <0x2000>;
model = "microblaze,7.10.d";
reg = <0>;
timebase-frequency = <125000000>;
xlnx,addr-tag-bits = <0xf>;
xlnx,allow-dcache-wr = <0x1>;
xlnx,allow-icache-wr = <0x1>;
xlnx,area-optimized = <0x0>;
xlnx,cache-byte-size = <0x2000>;
xlnx,d-lmb = <0x1>;
xlnx,d-opb = <0x0>;
xlnx,d-plb = <0x1>;
xlnx,data-size = <0x20>;
xlnx,dcache-addr-tag = <0xf>;
xlnx,dcache-always-used = <0x1>;
xlnx,dcache-byte-size = <0x2000>;
xlnx,dcache-line-len = <0x4>;
xlnx,dcache-use-fsl = <0x1>;
xlnx,debug-enabled = <0x1>;
xlnx,div-zero-exception = <0x1>;
xlnx,dopb-bus-exception = <0x0>;
xlnx,dynamic-bus-sizing = <0x1>;
xlnx,edge-is-positive = <0x1>;
xlnx,family = "virtex5";
xlnx,endianness = <0x1>;
xlnx,fpu-exception = <0x1>;
xlnx,fsl-data-size = <0x20>;
xlnx,fsl-exception = <0x0>;
xlnx,fsl-links = <0x0>;
xlnx,i-lmb = <0x1>;
xlnx,i-opb = <0x0>;
xlnx,i-plb = <0x1>;
xlnx,icache-always-used = <0x1>;
xlnx,icache-line-len = <0x4>;
xlnx,icache-use-fsl = <0x1>;
xlnx,ill-opcode-exception = <0x1>;
xlnx,instance = "microblaze_0";
xlnx,interconnect = <0x1>;
xlnx,interrupt-is-edge = <0x0>;
xlnx,iopb-bus-exception = <0x0>;
xlnx,mmu-dtlb-size = <0x4>;
xlnx,mmu-itlb-size = <0x2>;
xlnx,mmu-tlb-access = <0x3>;
xlnx,mmu-zones = <0x10>;
xlnx,number-of-pc-brk = <0x1>;
xlnx,number-of-rd-addr-brk = <0x0>;
xlnx,number-of-wr-addr-brk = <0x0>;
xlnx,opcode-0x0-illegal = <0x1>;
xlnx,pvr = <0x2>;
xlnx,pvr-user1 = <0x0>;
xlnx,pvr-user2 = <0x0>;
xlnx,reset-msr = <0x0>;
xlnx,sco = <0x0>;
xlnx,unaligned-exceptions = <0x1>;
xlnx,use-barrel = <0x1>;
xlnx,use-dcache = <0x1>;
xlnx,use-div = <0x1>;
xlnx,use-ext-brk = <0x1>;
xlnx,use-ext-nm-brk = <0x1>;
xlnx,use-extended-fsl-instr = <0x0>;
xlnx,use-fpu = <0x2>;
xlnx,use-hw-mul = <0x2>;
xlnx,use-icache = <0x1>;
xlnx,use-interrupt = <0x1>;
xlnx,use-mmu = <0x3>;
xlnx,use-msr-instr = <0x1>;
xlnx,use-pcmp-instr = <0x1>;
} ;
} ;
mb_plb: plb@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,plb-v46-1.03.a", "xlnx,plb-v46-1.00.a", "simple-bus";
ranges ;
FLASH: flash@a0000000 {
bank-width = <2>;
compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
reg = < 0xa0000000 0x2000000 >;
xlnx,family = "virtex5";
xlnx,include-datawidth-matching-0 = <0x1>;
xlnx,include-datawidth-matching-1 = <0x0>;
xlnx,include-datawidth-matching-2 = <0x0>;
xlnx,include-datawidth-matching-3 = <0x0>;
xlnx,include-negedge-ioregs = <0x0>;
xlnx,include-plb-ipif = <0x1>;
xlnx,include-wrbuf = <0x1>;
xlnx,max-mem-width = <0x10>;
xlnx,mch-native-dwidth = <0x20>;
xlnx,mch-plb-clk-period-ps = <0x1f40>;
xlnx,mch-splb-awidth = <0x20>;
xlnx,mch0-accessbuf-depth = <0x10>;
xlnx,mch0-protocol = <0x0>;
xlnx,mch0-rddatabuf-depth = <0x10>;
xlnx,mch1-accessbuf-depth = <0x10>;
xlnx,mch1-protocol = <0x0>;
xlnx,mch1-rddatabuf-depth = <0x10>;
xlnx,mch2-accessbuf-depth = <0x10>;
xlnx,mch2-protocol = <0x0>;
xlnx,mch2-rddatabuf-depth = <0x10>;
xlnx,mch3-accessbuf-depth = <0x10>;
xlnx,mch3-protocol = <0x0>;
xlnx,mch3-rddatabuf-depth = <0x10>;
xlnx,mem0-width = <0x10>;
xlnx,mem1-width = <0x20>;
xlnx,mem2-width = <0x20>;
xlnx,mem3-width = <0x20>;
xlnx,num-banks-mem = <0x1>;
xlnx,num-channels = <0x0>;
xlnx,priority-mode = <0x0>;
xlnx,synch-mem-0 = <0x0>;
xlnx,synch-mem-1 = <0x0>;
xlnx,synch-mem-2 = <0x0>;
xlnx,synch-mem-3 = <0x0>;
xlnx,synch-pipedelay-0 = <0x2>;
xlnx,synch-pipedelay-1 = <0x2>;
xlnx,synch-pipedelay-2 = <0x2>;
xlnx,synch-pipedelay-3 = <0x2>;
xlnx,tavdv-ps-mem-0 = <0x1adb0>;
xlnx,tavdv-ps-mem-1 = <0x3a98>;
xlnx,tavdv-ps-mem-2 = <0x3a98>;
xlnx,tavdv-ps-mem-3 = <0x3a98>;
xlnx,tcedv-ps-mem-0 = <0x1adb0>;
xlnx,tcedv-ps-mem-1 = <0x3a98>;
xlnx,tcedv-ps-mem-2 = <0x3a98>;
xlnx,tcedv-ps-mem-3 = <0x3a98>;
xlnx,thzce-ps-mem-0 = <0x88b8>;
xlnx,thzce-ps-mem-1 = <0x1b58>;
xlnx,thzce-ps-mem-2 = <0x1b58>;
xlnx,thzce-ps-mem-3 = <0x1b58>;
xlnx,thzoe-ps-mem-0 = <0x1b58>;
xlnx,thzoe-ps-mem-1 = <0x1b58>;
xlnx,thzoe-ps-mem-2 = <0x1b58>;
xlnx,thzoe-ps-mem-3 = <0x1b58>;
xlnx,tlzwe-ps-mem-0 = <0x88b8>;
xlnx,tlzwe-ps-mem-1 = <0x0>;
xlnx,tlzwe-ps-mem-2 = <0x0>;
xlnx,tlzwe-ps-mem-3 = <0x0>;
xlnx,twc-ps-mem-0 = <0x2af8>;
xlnx,twc-ps-mem-1 = <0x3a98>;
xlnx,twc-ps-mem-2 = <0x3a98>;
xlnx,twc-ps-mem-3 = <0x3a98>;
xlnx,twp-ps-mem-0 = <0x11170>;
xlnx,twp-ps-mem-1 = <0x2ee0>;
xlnx,twp-ps-mem-2 = <0x2ee0>;
xlnx,twp-ps-mem-3 = <0x2ee0>;
xlnx,xcl0-linesize = <0x4>;
xlnx,xcl0-writexfer = <0x1>;
xlnx,xcl1-linesize = <0x4>;
xlnx,xcl1-writexfer = <0x1>;
xlnx,xcl2-linesize = <0x4>;
xlnx,xcl2-writexfer = <0x1>;
xlnx,xcl3-linesize = <0x4>;
xlnx,xcl3-writexfer = <0x1>;
} ;
Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,compound";
ranges ;
ethernet@81c00000 {
compatible = "xlnx,xps-ll-temac-1.01.b", "xlnx,xps-ll-temac-1.00.a";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 5 2 >;
llink-connected = <&PIM3>;
local-mac-address = [ 00 0a 35 00 00 00 ];
reg = < 0x81c00000 0x40 >;
xlnx,bus2core-clk-ratio = <0x1>;
xlnx,phy-type = <0x1>;
xlnx,phyaddr = <0x1>;
xlnx,rxcsum = <0x0>;
xlnx,rxfifo = <0x1000>;
xlnx,temac-type = <0x0>;
xlnx,txcsum = <0x0>;
xlnx,txfifo = <0x1000>;
} ;
} ;
IIC_EEPROM: i2c@81600000 {
compatible = "xlnx,xps-iic-2.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 6 2 >;
reg = < 0x81600000 0x10000 >;
xlnx,clk-freq = <0x7735940>;
xlnx,family = "virtex5";
xlnx,gpo-width = <0x1>;
xlnx,iic-freq = <0x186a0>;
xlnx,scl-inertial-delay = <0x0>;
xlnx,sda-inertial-delay = <0x0>;
xlnx,ten-bit-adr = <0x0>;
} ;
LEDs_8Bit: gpio@81400000 {
compatible = "xlnx,xps-gpio-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 7 2 >;
reg = < 0x81400000 0x10000 >;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,family = "virtex5";
xlnx,gpio-width = <0x8>;
xlnx,interrupt-present = <0x1>;
xlnx,is-bidir = <0x1>;
xlnx,is-bidir-2 = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
#gpio-cells = <2>;
gpio-controller;
} ;
gpio-leds {
compatible = "gpio-leds";
heartbeat {
label = "Heartbeat";
gpios = <&LEDs_8Bit 4 1>;
linux,default-trigger = "heartbeat";
};
yellow {
label = "Yellow";
gpios = <&LEDs_8Bit 5 1>;
};
red {
label = "Red";
gpios = <&LEDs_8Bit 6 1>;
};
green {
label = "Green";
gpios = <&LEDs_8Bit 7 1>;
};
} ;
RS232_Uart_1: serial@84000000 {
clock-frequency = <125000000>;
compatible = "xlnx,xps-uartlite-1.00.a";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&xps_intc_0>;
interrupts = < 8 0 >;
port-number = <0>;
reg = < 0x84000000 0x10000 >;
xlnx,baudrate = <0x1c200>;
xlnx,data-bits = <0x8>;
xlnx,family = "virtex5";
xlnx,odd-parity = <0x0>;
xlnx,use-parity = <0x0>;
} ;
SysACE_CompactFlash: sysace@83600000 {
compatible = "xlnx,xps-sysace-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 4 2 >;
reg = < 0x83600000 0x10000 >;
xlnx,family = "virtex5";
xlnx,mem-width = <0x10>;
} ;
debug_module: debug@84400000 {
compatible = "xlnx,mdm-1.00.d";
reg = < 0x84400000 0x10000 >;
xlnx,family = "virtex5";
xlnx,interconnect = <0x1>;
xlnx,jtag-chain = <0x2>;
xlnx,mb-dbg-ports = <0x1>;
xlnx,uart-width = <0x8>;
xlnx,use-uart = <0x1>;
xlnx,write-fsl-ports = <0x0>;
} ;
mpmc@90000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,mpmc-4.02.a";
ranges ;
PIM3: sdma@84600180 {
compatible = "xlnx,ll-dma-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 2 2 1 2 >;
reg = < 0x84600180 0x80 >;
} ;
} ;
xps_intc_0: interrupt-controller@81800000 {
#interrupt-cells = <0x2>;
compatible = "xlnx,xps-intc-1.00.a";
interrupt-controller ;
reg = < 0x81800000 0x10000 >;
xlnx,kind-of-intr = <0x100>;
xlnx,num-intr-inputs = <0x9>;
} ;
xps_timer_1: timer@83c00000 {
compatible = "xlnx,xps-timer-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 3 2 >;
reg = < 0x83c00000 0x10000 >;
xlnx,count-width = <0x20>;
xlnx,family = "virtex5";
xlnx,gen0-assert = <0x1>;
xlnx,gen1-assert = <0x1>;
xlnx,one-timer-only = <0x0>;
xlnx,trig0-assert = <0x1>;
xlnx,trig1-assert = <0x1>;
} ;
} ;
} ;

View File

@@ -1,11 +0,0 @@
diff -Nur linux-3.14.orig/drivers/net/ethernet/xilinx/xilinx_emaclite.c linux-3.14/drivers/net/ethernet/xilinx/xilinx_emaclite.c
--- linux-3.14.orig/drivers/net/ethernet/xilinx/xilinx_emaclite.c 2014-03-31 05:40:15.000000000 +0200
+++ linux-3.14/drivers/net/ethernet/xilinx/xilinx_emaclite.c 2014-04-11 22:53:42.000000000 +0200
@@ -1249,6 +1249,7 @@
{ .compatible = "xlnx,opb-ethernetlite-1.01.b", },
{ .compatible = "xlnx,xps-ethernetlite-1.00.a", },
{ .compatible = "xlnx,xps-ethernetlite-2.00.a", },
+ { .compatible = "xlnx,xps-ethernetlite-2.00.b", },
{ .compatible = "xlnx,xps-ethernetlite-2.01.a", },
{ .compatible = "xlnx,xps-ethernetlite-3.00.a", },
{ /* end of list */ },

View File

@@ -1,60 +0,0 @@
CONFIG_MIPS_MALTA=y
CONFIG_CPU_MIPS32_R2=y
CONFIG_MIPS_MT_SMP=y
CONFIG_NR_CPUS=2
CONFIG_HZ_100=y
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=15
CONFIG_NAMESPACES=y
CONFIG_RELAY=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_GENERIC=y
CONFIG_BLK_DEV_PIIX=y
CONFIG_NETDEVICES=y
CONFIG_PCNET32=y
# CONFIG_WLAN is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO_I8042 is not set
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_CIRRUS=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT4_FS=y
CONFIG_QUOTA=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y

View File

@@ -0,0 +1,76 @@
CONFIG_MIPS_MALTA=y
CONFIG_CPU_MIPS32_R2=y
CONFIG_MIPS_MT_SMP=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_HZ_100=y
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=15
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_RELAY=y
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
CONFIG_IPC_NS=y
CONFIG_PID_NS=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PCI=y
CONFIG_PM=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_MISC_DEVICES is not set
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_GENERIC=y
CONFIG_BLK_DEV_PIIX=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_WLAN is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO_I8042 is not set
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_MFD_SUPPORT is not set
CONFIG_FB=y
CONFIG_FB_CIRRUS=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_QUOTA=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set

View File

@@ -1,9 +1,9 @@
Run the emulation with:
qemu-system-mips -M malta -kernel output/images/vmlinux -serial stdio -hda output/images/rootfs.ext2 -append "root=/dev/hda" -net nic,model=pcnet -net user
qemu-system-mips -M malta -kernel output/images/vmlinux -serial stdio -hda output/images/rootfs.ext2 -append "root=/dev/hda"
The login prompt will appear in the terminal that started Qemu. The
graphical window is the framebuffer. No keyboard support has been
enabled.
Tested with QEMU 2.1.2
Tested with QEMU 1.2.0

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