Thomas De Schampheleire b21e159b5d arch/mips: add (Marvell) Octeon II processor ...

The compiler recognizes a specific 'march' value for Octeon II processors,
so create a 'Target Architecture Variant' entry for it in the target menu.

Signed-off-by: Thomas De Schampheleire <thomas.de_schampheleire@nokia.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>

2019-02-04 17:30:06 +01:00

..

arch.mk

arch: drop BR2_GCC_TARGET_CPU_REVISION option

2018-10-01 14:52:32 +02:00

arch.mk.riscv

arch: add support for RISC-V 32-bit (riscv32) architecture

2019-01-06 14:09:31 +01:00

arch.mk.xtensa

arc/xtensa: store the Xtensa overlay in the per-package DL_DIR

2018-04-02 15:59:30 +02:00

Config.in

arch: drop BR2_GCC_TARGET_CPU_REVISION option

2018-10-01 14:52:32 +02:00

Config.in.arc

arch/Config.in*: fix attributes order

2018-04-01 07:59:45 +02:00

Config.in.arm

arch/arm: add an armv8.3a core

2018-12-30 16:10:04 +01:00

Config.in.csky

arch: add BR2_READELF_ARCH_NAME hidden config option

2017-03-20 22:22:17 +01:00

Config.in.m68k

arch/Config.in*: fix attributes order

2018-04-01 07:59:45 +02:00

Config.in.microblaze

arch: add BR2_READELF_ARCH_NAME hidden config option

2017-03-20 22:22:17 +01:00

Config.in.mips

arch/mips: add (Marvell) Octeon II processor

2019-02-04 17:30:06 +01:00

Config.in.nios2

arch: add BR2_READELF_ARCH_NAME hidden config option

2017-03-20 22:22:17 +01:00

Config.in.or1k

arch: add BR2_READELF_ARCH_NAME hidden config option

2017-03-20 22:22:17 +01:00

Config.in.powerpc

arch/Config.in*: fix attributes order

2018-04-01 07:59:45 +02:00

Config.in.riscv

arch: add support for RISC-V 32-bit (riscv32) architecture

2019-01-06 14:09:31 +01:00

Config.in.sh

arch/Config.in*: fix attributes order

2018-04-01 07:59:45 +02:00

Config.in.sparc

arch/Config.in*: fix attributes order

2018-04-01 07:59:45 +02:00

Config.in.x86

arch/Config.in*: fix attributes order

2018-04-01 07:59:45 +02:00

Config.in.xtensa

arch/Config.in*: re-wrap help text

2018-04-01 08:00:13 +02:00