From 93cb79318147191bf3b9fc2b047c24095f3194bc Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 25 Jan 2022 00:01:00 +0100 Subject: [PATCH] support/scripts/gen-bootlin-toolchains: add support for new x86-64 toolchains Following the merge of d6ce2a16814fd96a45888a774da6a4db74cd540a ("arch/Config.in.x86: add option for -march=x86-64") and eeace1cc13ce09a0c88ce177465b836d6eb58298 ("arch/Config.in.x86: add support for x86-64-v2, x86-64-v3, x86-64-v4"), bootlin.toolchains.com now provides toolchains targetting the x86-64, x86-64-v2, x86-64-v3 and x86-64-v4 architecture variants. This commits modifies gen-bootlin-toolchains to support these toolchains. It should be noted that the description for the x86-64-v3 and x86-64-v4 toolchains are for now the same, as Buildroot doesn't yet have the options to describe the extra features that x86-64-v4 expects to find on the hardware platform. Signed-off-by: Thomas Petazzoni Signed-off-by: Yann E. MORIN --- support/scripts/gen-bootlin-toolchains | 48 ++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/support/scripts/gen-bootlin-toolchains b/support/scripts/gen-bootlin-toolchains index f160a44152..a42ddb4097 100755 --- a/support/scripts/gen-bootlin-toolchains +++ b/support/scripts/gen-bootlin-toolchains @@ -178,6 +178,54 @@ arches = { 'conditions': ['BR2_sparc', 'BR2_sparc_v8'], 'prefix': 'sparc', }, + 'x86-64': { + 'conditions': ['BR2_x86_64', + 'BR2_X86_CPU_HAS_MMX', + 'BR2_X86_CPU_HAS_SSE', + 'BR2_X86_CPU_HAS_SSE2'], + 'test_options': ['BR2_x86_64', 'BR2_x86_x86_64'], + 'prefix': 'x86_64', + }, + 'x86-64-v2': { + 'conditions': ['BR2_x86_64', + 'BR2_X86_CPU_HAS_MMX', + 'BR2_X86_CPU_HAS_SSE', + 'BR2_X86_CPU_HAS_SSE2', + 'BR2_X86_CPU_HAS_SSE3', + 'BR2_X86_CPU_HAS_SSSE3', + 'BR2_X86_CPU_HAS_SSE4', + 'BR2_X86_CPU_HAS_SSE42'], + 'test_options': ['BR2_x86_64', 'BR2_x86_x86_64_v2'], + 'prefix': 'x86_64', + }, + 'x86-64-v3': { + 'conditions': ['BR2_x86_64', + 'BR2_X86_CPU_HAS_MMX', + 'BR2_X86_CPU_HAS_SSE', + 'BR2_X86_CPU_HAS_SSE2', + 'BR2_X86_CPU_HAS_SSE3', + 'BR2_X86_CPU_HAS_SSSE3', + 'BR2_X86_CPU_HAS_SSE4', + 'BR2_X86_CPU_HAS_SSE42', + 'BR2_X86_CPU_HAS_AVX', + 'BR2_X86_CPU_HAS_AVX2'], + 'test_options': ['BR2_x86_64', 'BR2_x86_x86_64_v3'], + 'prefix': 'x86_64', + }, + 'x86-64-v4': { + 'conditions': ['BR2_x86_64', + 'BR2_X86_CPU_HAS_MMX', + 'BR2_X86_CPU_HAS_SSE', + 'BR2_X86_CPU_HAS_SSE2', + 'BR2_X86_CPU_HAS_SSE3', + 'BR2_X86_CPU_HAS_SSSE3', + 'BR2_X86_CPU_HAS_SSE4', + 'BR2_X86_CPU_HAS_SSE42', + 'BR2_X86_CPU_HAS_AVX', + 'BR2_X86_CPU_HAS_AVX2'], + 'test_options': ['BR2_x86_64', 'BR2_x86_x86_64_v4'], + 'prefix': 'x86_64', + }, 'x86-64-core-i7': { 'conditions': ['BR2_x86_64', 'BR2_X86_CPU_HAS_MMX',