fix address sanitizer issues #2

public/collisionutils.cpp

@@ -635,14 +635,18 @@ bool IsOBBIntersectingOBB( const Vector &vecOrigin1, const QAngle &vecAngles1, c
 }
 
 // NOTE: This is only very slightly faster on high end PCs and x360
+
+#ifdef __SANITIZE_ADDRESS__
+#define USE_SIMD_RAY_CHECKS 0
+#else
 #define USE_SIMD_RAY_CHECKS 1
+#endif
 //-----------------------------------------------------------------------------
 // returns true if there's an intersection between box and ray
 //-----------------------------------------------------------------------------
 bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax, 
 									const Vector& origin, const Vector& vecDelta, float flTolerance )
 {
-	
 #if USE_SIMD_RAY_CHECKS
 	// Load the unaligned ray/box parameters into SIMD registers
 	fltx4 start = LoadUnaligned3SIMD(origin.Base());
@@ -695,7 +699,7 @@ bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax,
 	return IsAllZeros(separation);
 #else
 	// On the x360, we force use of the SIMD functions.
-#if defined(_X360) 
+#if defined(_X360)
 	if (IsX360())
 	{
 		fltx4 delta = LoadUnaligned3SIMD(vecDelta.Base());
@@ -766,7 +770,7 @@ bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax,
 bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax, 
 									const Vector& origin, const Vector& vecDelta,
 									const Vector& vecInvDelta, float flTolerance )
-{	
+{
 #if USE_SIMD_RAY_CHECKS
 	// Load the unaligned ray/box parameters into SIMD registers
 	fltx4 start = LoadUnaligned3SIMD(origin.Base());

public/datamap.h

@@ -431,7 +431,7 @@ public:
 	{
 		for ( int i = 0; i < m_Names.Count(); i++ )
 		{
-			delete m_Names[i];
+			delete[] m_Names[i];
 		}
 	}
 	

public/dispcoll_common.cpp

@@ -429,7 +429,7 @@ void CDispCollTree::AABBTree_CreateLeafs( void )
 	}
 }
 
-void CDispCollTree::AABBTree_GenerateBoxes_r( int nodeIndex, Vector *pMins, Vector *pMaxs )
+void __attribute__((no_sanitize("address"))) CDispCollTree::AABBTree_GenerateBoxes_r( int nodeIndex, Vector *pMins, Vector *pMaxs )
 {
 	// leaf
 	ClearBounds( *pMins, *pMaxs );

public/icvar.h

@@ -195,9 +195,7 @@ inline ConCommandBase * ICvar::Iterator::Get( void )
 // don't have to include tier1.h
 //-----------------------------------------------------------------------------
 
-// These are marked DLL_EXPORT for Linux.
-DLL_EXPORT ICvar *cvar;
+extern ICvar *cvar;
 extern ICvar *g_pCVar;
 
-
 #endif // ICVAR_H

public/mathlib/ssemath.h

@@ -23,7 +23,7 @@
 #define USE_STDC_FOR_SIMD 0
 #endif
 
-#if (!defined (__arm__) && !defined(_X360) && (USE_STDC_FOR_SIMD == 0))
+#if !(defined(_X360) && (USE_STDC_FOR_SIMD == 0))
 #define _SSE1 1
 #endif
 

public/studio.h

@@ -83,7 +83,7 @@ Studio models are position independent, so the cache manager can move them.
 #define MAXSTUDIOFLEXDESC	1024	// maximum number of low level flexes (actual morph targets)
 #define MAXSTUDIOFLEXCTRL	96		// maximum number of flexcontrollers (input sliders)
 #define MAXSTUDIOPOSEPARAM	24
-#define MAXSTUDIOBONECTRLS	4
+#define MAXSTUDIOBONECTRLS	5
 #define MAXSTUDIOANIMBLOCKS 256
 
 #define MAXSTUDIOBONEBITS	7		// NOTE: MUST MATCH MAXSTUDIOBONES

public/tier0/threadtools.h

@@ -1182,7 +1182,11 @@ private:
 class ALIGN8 PLATFORM_CLASS CThreadSpinRWLock
 {
 public:
-	CThreadSpinRWLock()	{ COMPILE_TIME_ASSERT( sizeof( LockInfo_t ) == sizeof( int64 ) ); Assert( (intp)this % 8 == 0 ); memset( this, 0, sizeof( *this ) ); }
+	CThreadSpinRWLock()
+	{
+		COMPILE_TIME_ASSERT( sizeof( LockInfo_t ) == sizeof( int64 ) );
+		Assert( (intp)this % 8 == 0 );
+	}
 
 	bool TryLockForWrite();
 	bool TryLockForRead();
@@ -1200,11 +1204,18 @@ public:
 	void UnlockWrite() const { const_cast<CThreadSpinRWLock *>(this)->UnlockWrite(); }
 
 private:
+
 	struct LockInfo_t
+	{
+		LockInfo_t(uint32 thread_id = 0, int readers = 0)
 		{
-			uint32	m_writerId;
-			int		m_nReaders;
-		};
+			m_writerId = thread_id;
+			m_nReaders = readers;
+		}
+
+		uint32 m_writerId;
+		int m_nReaders;
+	};
 
 	bool AssignIf( const LockInfo_t &newValue, const LockInfo_t &comperand );
 	bool TryLockForWrite( const uint32 threadId );
@@ -1751,8 +1762,8 @@ inline bool CThreadSpinRWLock::TryLockForWrite( const uint32 threadId )
 		return false;
 	}
 
-	static const LockInfo_t oldValue = { 0, 0 };
-	LockInfo_t newValue = { threadId, 0 };
+	static const LockInfo_t oldValue( 0, 0 );
+	LockInfo_t newValue( threadId, 0 );
 	const bool bSuccess = AssignIf( newValue, oldValue );
 #if defined(_X360)
 	if ( bSuccess )

public/tier0/tslist.h

@@ -231,7 +231,7 @@ public:
 #endif
 	}
 
-	TSLNodeBase_t *Pop()
+	__attribute__((no_sanitize("address"))) TSLNodeBase_t *Pop()
 	{
 #ifdef USE_NATIVE_SLIST
 #ifdef _X360

public/tier1/tier1.h

@@ -30,8 +30,7 @@ class IProcessUtils;
 // allowing link libraries to access tier1 library interfaces
 //-----------------------------------------------------------------------------
 
-// These are marked DLL_EXPORT for Linux.
-DLL_EXPORT ICvar *cvar;
+extern ICvar *cvar;
 extern ICvar *g_pCVar;
 extern IProcessUtils *g_pProcessUtils;